vgpu.c 12 KB

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  1. /*
  2. * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21. * SOFTWARE.
  22. *
  23. * Authors:
  24. * Eddie Dong <eddie.dong@intel.com>
  25. * Kevin Tian <kevin.tian@intel.com>
  26. *
  27. * Contributors:
  28. * Ping Gao <ping.a.gao@intel.com>
  29. * Zhi Wang <zhi.a.wang@intel.com>
  30. * Bing Niu <bing.niu@intel.com>
  31. *
  32. */
  33. #include "i915_drv.h"
  34. #include "gvt.h"
  35. #include "i915_pvinfo.h"
  36. void populate_pvinfo_page(struct intel_vgpu *vgpu)
  37. {
  38. /* setup the ballooning information */
  39. vgpu_vreg64(vgpu, vgtif_reg(magic)) = VGT_MAGIC;
  40. vgpu_vreg(vgpu, vgtif_reg(version_major)) = 1;
  41. vgpu_vreg(vgpu, vgtif_reg(version_minor)) = 0;
  42. vgpu_vreg(vgpu, vgtif_reg(display_ready)) = 0;
  43. vgpu_vreg(vgpu, vgtif_reg(vgt_id)) = vgpu->id;
  44. vgpu_vreg(vgpu, vgtif_reg(avail_rs.mappable_gmadr.base)) =
  45. vgpu_aperture_gmadr_base(vgpu);
  46. vgpu_vreg(vgpu, vgtif_reg(avail_rs.mappable_gmadr.size)) =
  47. vgpu_aperture_sz(vgpu);
  48. vgpu_vreg(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.base)) =
  49. vgpu_hidden_gmadr_base(vgpu);
  50. vgpu_vreg(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.size)) =
  51. vgpu_hidden_sz(vgpu);
  52. vgpu_vreg(vgpu, vgtif_reg(avail_rs.fence_num)) = vgpu_fence_sz(vgpu);
  53. gvt_dbg_core("Populate PVINFO PAGE for vGPU %d\n", vgpu->id);
  54. gvt_dbg_core("aperture base [GMADR] 0x%llx size 0x%llx\n",
  55. vgpu_aperture_gmadr_base(vgpu), vgpu_aperture_sz(vgpu));
  56. gvt_dbg_core("hidden base [GMADR] 0x%llx size=0x%llx\n",
  57. vgpu_hidden_gmadr_base(vgpu), vgpu_hidden_sz(vgpu));
  58. gvt_dbg_core("fence size %d\n", vgpu_fence_sz(vgpu));
  59. WARN_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE);
  60. }
  61. /**
  62. * intel_gvt_init_vgpu_types - initialize vGPU type list
  63. * @gvt : GVT device
  64. *
  65. * Initialize vGPU type list based on available resource.
  66. *
  67. */
  68. int intel_gvt_init_vgpu_types(struct intel_gvt *gvt)
  69. {
  70. unsigned int num_types;
  71. unsigned int i, low_avail;
  72. unsigned int min_low;
  73. /* vGPU type name is defined as GVTg_Vx_y which contains
  74. * physical GPU generation type and 'y' means maximum vGPU
  75. * instances user can create on one physical GPU for this
  76. * type.
  77. *
  78. * Depend on physical SKU resource, might see vGPU types like
  79. * GVTg_V4_8, GVTg_V4_4, GVTg_V4_2, etc. We can create
  80. * different types of vGPU on same physical GPU depending on
  81. * available resource. Each vGPU type will have "avail_instance"
  82. * to indicate how many vGPU instance can be created for this
  83. * type.
  84. *
  85. * Currently use static size here as we init type earlier..
  86. */
  87. low_avail = MB_TO_BYTES(256) - HOST_LOW_GM_SIZE;
  88. num_types = 4;
  89. gvt->types = kzalloc(num_types * sizeof(struct intel_vgpu_type),
  90. GFP_KERNEL);
  91. if (!gvt->types)
  92. return -ENOMEM;
  93. min_low = MB_TO_BYTES(32);
  94. for (i = 0; i < num_types; ++i) {
  95. if (low_avail / min_low == 0)
  96. break;
  97. gvt->types[i].low_gm_size = min_low;
  98. gvt->types[i].high_gm_size = max((min_low<<3), MB_TO_BYTES(384U));
  99. gvt->types[i].fence = 4;
  100. gvt->types[i].max_instance = low_avail / min_low;
  101. gvt->types[i].avail_instance = gvt->types[i].max_instance;
  102. if (IS_GEN8(gvt->dev_priv))
  103. sprintf(gvt->types[i].name, "GVTg_V4_%u",
  104. gvt->types[i].max_instance);
  105. else if (IS_GEN9(gvt->dev_priv))
  106. sprintf(gvt->types[i].name, "GVTg_V5_%u",
  107. gvt->types[i].max_instance);
  108. min_low <<= 1;
  109. gvt_dbg_core("type[%d]: %s max %u avail %u low %u high %u fence %u\n",
  110. i, gvt->types[i].name, gvt->types[i].max_instance,
  111. gvt->types[i].avail_instance,
  112. gvt->types[i].low_gm_size,
  113. gvt->types[i].high_gm_size, gvt->types[i].fence);
  114. }
  115. gvt->num_types = i;
  116. return 0;
  117. }
  118. void intel_gvt_clean_vgpu_types(struct intel_gvt *gvt)
  119. {
  120. kfree(gvt->types);
  121. }
  122. static void intel_gvt_update_vgpu_types(struct intel_gvt *gvt)
  123. {
  124. int i;
  125. unsigned int low_gm_avail, high_gm_avail, fence_avail;
  126. unsigned int low_gm_min, high_gm_min, fence_min, total_min;
  127. /* Need to depend on maxium hw resource size but keep on
  128. * static config for now.
  129. */
  130. low_gm_avail = MB_TO_BYTES(256) - HOST_LOW_GM_SIZE -
  131. gvt->gm.vgpu_allocated_low_gm_size;
  132. high_gm_avail = MB_TO_BYTES(256) * 8UL - HOST_HIGH_GM_SIZE -
  133. gvt->gm.vgpu_allocated_high_gm_size;
  134. fence_avail = gvt_fence_sz(gvt) - HOST_FENCE -
  135. gvt->fence.vgpu_allocated_fence_num;
  136. for (i = 0; i < gvt->num_types; i++) {
  137. low_gm_min = low_gm_avail / gvt->types[i].low_gm_size;
  138. high_gm_min = high_gm_avail / gvt->types[i].high_gm_size;
  139. fence_min = fence_avail / gvt->types[i].fence;
  140. total_min = min(min(low_gm_min, high_gm_min), fence_min);
  141. gvt->types[i].avail_instance = min(gvt->types[i].max_instance,
  142. total_min);
  143. gvt_dbg_core("update type[%d]: %s max %u avail %u low %u high %u fence %u\n",
  144. i, gvt->types[i].name, gvt->types[i].max_instance,
  145. gvt->types[i].avail_instance, gvt->types[i].low_gm_size,
  146. gvt->types[i].high_gm_size, gvt->types[i].fence);
  147. }
  148. }
  149. /**
  150. * intel_gvt_destroy_vgpu - destroy a virtual GPU
  151. * @vgpu: virtual GPU
  152. *
  153. * This function is called when user wants to destroy a virtual GPU.
  154. *
  155. */
  156. void intel_gvt_destroy_vgpu(struct intel_vgpu *vgpu)
  157. {
  158. struct intel_gvt *gvt = vgpu->gvt;
  159. mutex_lock(&gvt->lock);
  160. vgpu->active = false;
  161. idr_remove(&gvt->vgpu_idr, vgpu->id);
  162. if (atomic_read(&vgpu->running_workload_num)) {
  163. mutex_unlock(&gvt->lock);
  164. intel_gvt_wait_vgpu_idle(vgpu);
  165. mutex_lock(&gvt->lock);
  166. }
  167. intel_vgpu_stop_schedule(vgpu);
  168. intel_vgpu_clean_sched_policy(vgpu);
  169. intel_vgpu_clean_gvt_context(vgpu);
  170. intel_vgpu_clean_execlist(vgpu);
  171. intel_vgpu_clean_display(vgpu);
  172. intel_vgpu_clean_opregion(vgpu);
  173. intel_vgpu_clean_gtt(vgpu);
  174. intel_gvt_hypervisor_detach_vgpu(vgpu);
  175. intel_vgpu_free_resource(vgpu);
  176. intel_vgpu_clean_mmio(vgpu);
  177. vfree(vgpu);
  178. intel_gvt_update_vgpu_types(gvt);
  179. mutex_unlock(&gvt->lock);
  180. }
  181. static struct intel_vgpu *__intel_gvt_create_vgpu(struct intel_gvt *gvt,
  182. struct intel_vgpu_creation_params *param)
  183. {
  184. struct intel_vgpu *vgpu;
  185. int ret;
  186. gvt_dbg_core("handle %llu low %llu MB high %llu MB fence %llu\n",
  187. param->handle, param->low_gm_sz, param->high_gm_sz,
  188. param->fence_sz);
  189. vgpu = vzalloc(sizeof(*vgpu));
  190. if (!vgpu)
  191. return ERR_PTR(-ENOMEM);
  192. mutex_lock(&gvt->lock);
  193. ret = idr_alloc(&gvt->vgpu_idr, vgpu, 1, GVT_MAX_VGPU, GFP_KERNEL);
  194. if (ret < 0)
  195. goto out_free_vgpu;
  196. vgpu->id = ret;
  197. vgpu->handle = param->handle;
  198. vgpu->gvt = gvt;
  199. bitmap_zero(vgpu->tlb_handle_pending, I915_NUM_ENGINES);
  200. intel_vgpu_init_cfg_space(vgpu, param->primary);
  201. ret = intel_vgpu_init_mmio(vgpu);
  202. if (ret)
  203. goto out_clean_idr;
  204. ret = intel_vgpu_alloc_resource(vgpu, param);
  205. if (ret)
  206. goto out_clean_vgpu_mmio;
  207. populate_pvinfo_page(vgpu);
  208. ret = intel_gvt_hypervisor_attach_vgpu(vgpu);
  209. if (ret)
  210. goto out_clean_vgpu_resource;
  211. ret = intel_vgpu_init_gtt(vgpu);
  212. if (ret)
  213. goto out_detach_hypervisor_vgpu;
  214. ret = intel_vgpu_init_display(vgpu);
  215. if (ret)
  216. goto out_clean_gtt;
  217. ret = intel_vgpu_init_execlist(vgpu);
  218. if (ret)
  219. goto out_clean_display;
  220. ret = intel_vgpu_init_gvt_context(vgpu);
  221. if (ret)
  222. goto out_clean_execlist;
  223. ret = intel_vgpu_init_sched_policy(vgpu);
  224. if (ret)
  225. goto out_clean_shadow_ctx;
  226. vgpu->active = true;
  227. mutex_unlock(&gvt->lock);
  228. return vgpu;
  229. out_clean_shadow_ctx:
  230. intel_vgpu_clean_gvt_context(vgpu);
  231. out_clean_execlist:
  232. intel_vgpu_clean_execlist(vgpu);
  233. out_clean_display:
  234. intel_vgpu_clean_display(vgpu);
  235. out_clean_gtt:
  236. intel_vgpu_clean_gtt(vgpu);
  237. out_detach_hypervisor_vgpu:
  238. intel_gvt_hypervisor_detach_vgpu(vgpu);
  239. out_clean_vgpu_resource:
  240. intel_vgpu_free_resource(vgpu);
  241. out_clean_vgpu_mmio:
  242. intel_vgpu_clean_mmio(vgpu);
  243. out_clean_idr:
  244. idr_remove(&gvt->vgpu_idr, vgpu->id);
  245. out_free_vgpu:
  246. vfree(vgpu);
  247. mutex_unlock(&gvt->lock);
  248. return ERR_PTR(ret);
  249. }
  250. /**
  251. * intel_gvt_create_vgpu - create a virtual GPU
  252. * @gvt: GVT device
  253. * @type: type of the vGPU to create
  254. *
  255. * This function is called when user wants to create a virtual GPU.
  256. *
  257. * Returns:
  258. * pointer to intel_vgpu, error pointer if failed.
  259. */
  260. struct intel_vgpu *intel_gvt_create_vgpu(struct intel_gvt *gvt,
  261. struct intel_vgpu_type *type)
  262. {
  263. struct intel_vgpu_creation_params param;
  264. struct intel_vgpu *vgpu;
  265. param.handle = 0;
  266. param.primary = 1;
  267. param.low_gm_sz = type->low_gm_size;
  268. param.high_gm_sz = type->high_gm_size;
  269. param.fence_sz = type->fence;
  270. /* XXX current param based on MB */
  271. param.low_gm_sz = BYTES_TO_MB(param.low_gm_sz);
  272. param.high_gm_sz = BYTES_TO_MB(param.high_gm_sz);
  273. vgpu = __intel_gvt_create_vgpu(gvt, &param);
  274. if (IS_ERR(vgpu))
  275. return vgpu;
  276. /* calculate left instance change for types */
  277. intel_gvt_update_vgpu_types(gvt);
  278. return vgpu;
  279. }
  280. /**
  281. * intel_gvt_reset_vgpu_locked - reset a virtual GPU by DMLR or GT reset
  282. * @vgpu: virtual GPU
  283. * @dmlr: vGPU Device Model Level Reset or GT Reset
  284. * @engine_mask: engines to reset for GT reset
  285. *
  286. * This function is called when user wants to reset a virtual GPU through
  287. * device model reset or GT reset. The caller should hold the gvt lock.
  288. *
  289. * vGPU Device Model Level Reset (DMLR) simulates the PCI level reset to reset
  290. * the whole vGPU to default state as when it is created. This vGPU function
  291. * is required both for functionary and security concerns.The ultimate goal
  292. * of vGPU FLR is that reuse a vGPU instance by virtual machines. When we
  293. * assign a vGPU to a virtual machine we must isse such reset first.
  294. *
  295. * Full GT Reset and Per-Engine GT Reset are soft reset flow for GPU engines
  296. * (Render, Blitter, Video, Video Enhancement). It is defined by GPU Spec.
  297. * Unlike the FLR, GT reset only reset particular resource of a vGPU per
  298. * the reset request. Guest driver can issue a GT reset by programming the
  299. * virtual GDRST register to reset specific virtual GPU engine or all
  300. * engines.
  301. *
  302. * The parameter dev_level is to identify if we will do DMLR or GT reset.
  303. * The parameter engine_mask is to specific the engines that need to be
  304. * resetted. If value ALL_ENGINES is given for engine_mask, it means
  305. * the caller requests a full GT reset that we will reset all virtual
  306. * GPU engines. For FLR, engine_mask is ignored.
  307. */
  308. void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr,
  309. unsigned int engine_mask)
  310. {
  311. struct intel_gvt *gvt = vgpu->gvt;
  312. struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;
  313. gvt_dbg_core("------------------------------------------\n");
  314. gvt_dbg_core("resseting vgpu%d, dmlr %d, engine_mask %08x\n",
  315. vgpu->id, dmlr, engine_mask);
  316. vgpu->resetting = true;
  317. intel_vgpu_stop_schedule(vgpu);
  318. /*
  319. * The current_vgpu will set to NULL after stopping the
  320. * scheduler when the reset is triggered by current vgpu.
  321. */
  322. if (scheduler->current_vgpu == NULL) {
  323. mutex_unlock(&gvt->lock);
  324. intel_gvt_wait_vgpu_idle(vgpu);
  325. mutex_lock(&gvt->lock);
  326. }
  327. intel_vgpu_reset_execlist(vgpu, dmlr ? ALL_ENGINES : engine_mask);
  328. /* full GPU reset or device model level reset */
  329. if (engine_mask == ALL_ENGINES || dmlr) {
  330. intel_vgpu_reset_gtt(vgpu, dmlr);
  331. intel_vgpu_reset_resource(vgpu);
  332. intel_vgpu_reset_mmio(vgpu);
  333. populate_pvinfo_page(vgpu);
  334. if (dmlr)
  335. intel_vgpu_reset_cfg_space(vgpu);
  336. }
  337. vgpu->resetting = false;
  338. gvt_dbg_core("reset vgpu%d done\n", vgpu->id);
  339. gvt_dbg_core("------------------------------------------\n");
  340. }
  341. /**
  342. * intel_gvt_reset_vgpu - reset a virtual GPU (Function Level)
  343. * @vgpu: virtual GPU
  344. *
  345. * This function is called when user wants to reset a virtual GPU.
  346. *
  347. */
  348. void intel_gvt_reset_vgpu(struct intel_vgpu *vgpu)
  349. {
  350. mutex_lock(&vgpu->gvt->lock);
  351. intel_gvt_reset_vgpu_locked(vgpu, true, 0);
  352. mutex_unlock(&vgpu->gvt->lock);
  353. }