cdv_intel_lvds.c 21 KB

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  1. /*
  2. * Copyright © 2006-2011 Intel Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License along with
  14. * this program; if not, write to the Free Software Foundation, Inc.,
  15. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  16. *
  17. * Authors:
  18. * Eric Anholt <eric@anholt.net>
  19. * Dave Airlie <airlied@linux.ie>
  20. * Jesse Barnes <jesse.barnes@intel.com>
  21. */
  22. #include <linux/i2c.h>
  23. #include <linux/dmi.h>
  24. #include <drm/drmP.h>
  25. #include "intel_bios.h"
  26. #include "psb_drv.h"
  27. #include "psb_intel_drv.h"
  28. #include "psb_intel_reg.h"
  29. #include "power.h"
  30. #include <linux/pm_runtime.h>
  31. #include "cdv_device.h"
  32. /**
  33. * LVDS I2C backlight control macros
  34. */
  35. #define BRIGHTNESS_MAX_LEVEL 100
  36. #define BRIGHTNESS_MASK 0xFF
  37. #define BLC_I2C_TYPE 0x01
  38. #define BLC_PWM_TYPT 0x02
  39. #define BLC_POLARITY_NORMAL 0
  40. #define BLC_POLARITY_INVERSE 1
  41. #define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE)
  42. #define PSB_BLC_MIN_PWM_REG_FREQ (0x2)
  43. #define PSB_BLC_PWM_PRECISION_FACTOR (10)
  44. #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
  45. #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
  46. struct cdv_intel_lvds_priv {
  47. /**
  48. * Saved LVDO output states
  49. */
  50. uint32_t savePP_ON;
  51. uint32_t savePP_OFF;
  52. uint32_t saveLVDS;
  53. uint32_t savePP_CONTROL;
  54. uint32_t savePP_CYCLE;
  55. uint32_t savePFIT_CONTROL;
  56. uint32_t savePFIT_PGM_RATIOS;
  57. uint32_t saveBLC_PWM_CTL;
  58. };
  59. /*
  60. * Returns the maximum level of the backlight duty cycle field.
  61. */
  62. static u32 cdv_intel_lvds_get_max_backlight(struct drm_device *dev)
  63. {
  64. struct drm_psb_private *dev_priv = dev->dev_private;
  65. u32 retval;
  66. if (gma_power_begin(dev, false)) {
  67. retval = ((REG_READ(BLC_PWM_CTL) &
  68. BACKLIGHT_MODULATION_FREQ_MASK) >>
  69. BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  70. gma_power_end(dev);
  71. } else
  72. retval = ((dev_priv->regs.saveBLC_PWM_CTL &
  73. BACKLIGHT_MODULATION_FREQ_MASK) >>
  74. BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  75. return retval;
  76. }
  77. #if 0
  78. /*
  79. * Set LVDS backlight level by I2C command
  80. */
  81. static int cdv_lvds_i2c_set_brightness(struct drm_device *dev,
  82. unsigned int level)
  83. {
  84. struct drm_psb_private *dev_priv = dev->dev_private;
  85. struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
  86. u8 out_buf[2];
  87. unsigned int blc_i2c_brightness;
  88. struct i2c_msg msgs[] = {
  89. {
  90. .addr = lvds_i2c_bus->slave_addr,
  91. .flags = 0,
  92. .len = 2,
  93. .buf = out_buf,
  94. }
  95. };
  96. blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
  97. BRIGHTNESS_MASK /
  98. BRIGHTNESS_MAX_LEVEL);
  99. if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
  100. blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
  101. out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
  102. out_buf[1] = (u8)blc_i2c_brightness;
  103. if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1)
  104. return 0;
  105. DRM_ERROR("I2C transfer error\n");
  106. return -1;
  107. }
  108. static int cdv_lvds_pwm_set_brightness(struct drm_device *dev, int level)
  109. {
  110. struct drm_psb_private *dev_priv = dev->dev_private;
  111. u32 max_pwm_blc;
  112. u32 blc_pwm_duty_cycle;
  113. max_pwm_blc = cdv_intel_lvds_get_max_backlight(dev);
  114. /*BLC_PWM_CTL Should be initiated while backlight device init*/
  115. BUG_ON((max_pwm_blc & PSB_BLC_MAX_PWM_REG_FREQ) == 0);
  116. blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
  117. if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
  118. blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
  119. blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
  120. REG_WRITE(BLC_PWM_CTL,
  121. (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
  122. (blc_pwm_duty_cycle));
  123. return 0;
  124. }
  125. /*
  126. * Set LVDS backlight level either by I2C or PWM
  127. */
  128. void cdv_intel_lvds_set_brightness(struct drm_device *dev, int level)
  129. {
  130. struct drm_psb_private *dev_priv = dev->dev_private;
  131. if (!dev_priv->lvds_bl) {
  132. DRM_ERROR("NO LVDS Backlight Info\n");
  133. return;
  134. }
  135. if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
  136. cdv_lvds_i2c_set_brightness(dev, level);
  137. else
  138. cdv_lvds_pwm_set_brightness(dev, level);
  139. }
  140. #endif
  141. /**
  142. * Sets the backlight level.
  143. *
  144. * level backlight level, from 0 to cdv_intel_lvds_get_max_backlight().
  145. */
  146. static void cdv_intel_lvds_set_backlight(struct drm_device *dev, int level)
  147. {
  148. struct drm_psb_private *dev_priv = dev->dev_private;
  149. u32 blc_pwm_ctl;
  150. if (gma_power_begin(dev, false)) {
  151. blc_pwm_ctl =
  152. REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  153. REG_WRITE(BLC_PWM_CTL,
  154. (blc_pwm_ctl |
  155. (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
  156. gma_power_end(dev);
  157. } else {
  158. blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
  159. ~BACKLIGHT_DUTY_CYCLE_MASK;
  160. dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
  161. (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
  162. }
  163. }
  164. /**
  165. * Sets the power state for the panel.
  166. */
  167. static void cdv_intel_lvds_set_power(struct drm_device *dev,
  168. struct drm_encoder *encoder, bool on)
  169. {
  170. struct drm_psb_private *dev_priv = dev->dev_private;
  171. u32 pp_status;
  172. if (!gma_power_begin(dev, true))
  173. return;
  174. if (on) {
  175. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
  176. POWER_TARGET_ON);
  177. do {
  178. pp_status = REG_READ(PP_STATUS);
  179. } while ((pp_status & PP_ON) == 0);
  180. cdv_intel_lvds_set_backlight(dev,
  181. dev_priv->mode_dev.backlight_duty_cycle);
  182. } else {
  183. cdv_intel_lvds_set_backlight(dev, 0);
  184. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
  185. ~POWER_TARGET_ON);
  186. do {
  187. pp_status = REG_READ(PP_STATUS);
  188. } while (pp_status & PP_ON);
  189. }
  190. gma_power_end(dev);
  191. }
  192. static void cdv_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
  193. {
  194. struct drm_device *dev = encoder->dev;
  195. if (mode == DRM_MODE_DPMS_ON)
  196. cdv_intel_lvds_set_power(dev, encoder, true);
  197. else
  198. cdv_intel_lvds_set_power(dev, encoder, false);
  199. /* XXX: We never power down the LVDS pairs. */
  200. }
  201. static void cdv_intel_lvds_save(struct drm_connector *connector)
  202. {
  203. }
  204. static void cdv_intel_lvds_restore(struct drm_connector *connector)
  205. {
  206. }
  207. static int cdv_intel_lvds_mode_valid(struct drm_connector *connector,
  208. struct drm_display_mode *mode)
  209. {
  210. struct drm_device *dev = connector->dev;
  211. struct drm_psb_private *dev_priv = dev->dev_private;
  212. struct drm_display_mode *fixed_mode =
  213. dev_priv->mode_dev.panel_fixed_mode;
  214. /* just in case */
  215. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  216. return MODE_NO_DBLESCAN;
  217. /* just in case */
  218. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  219. return MODE_NO_INTERLACE;
  220. if (fixed_mode) {
  221. if (mode->hdisplay > fixed_mode->hdisplay)
  222. return MODE_PANEL;
  223. if (mode->vdisplay > fixed_mode->vdisplay)
  224. return MODE_PANEL;
  225. }
  226. return MODE_OK;
  227. }
  228. static bool cdv_intel_lvds_mode_fixup(struct drm_encoder *encoder,
  229. const struct drm_display_mode *mode,
  230. struct drm_display_mode *adjusted_mode)
  231. {
  232. struct drm_device *dev = encoder->dev;
  233. struct drm_psb_private *dev_priv = dev->dev_private;
  234. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  235. struct drm_encoder *tmp_encoder;
  236. struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
  237. /* Should never happen!! */
  238. list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
  239. head) {
  240. if (tmp_encoder != encoder
  241. && tmp_encoder->crtc == encoder->crtc) {
  242. printk(KERN_ERR "Can't enable LVDS and another "
  243. "encoder on the same pipe\n");
  244. return false;
  245. }
  246. }
  247. /*
  248. * If we have timings from the BIOS for the panel, put them in
  249. * to the adjusted mode. The CRTC will be set up for this mode,
  250. * with the panel scaling set up to source from the H/VDisplay
  251. * of the original mode.
  252. */
  253. if (panel_fixed_mode != NULL) {
  254. adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
  255. adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
  256. adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
  257. adjusted_mode->htotal = panel_fixed_mode->htotal;
  258. adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
  259. adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
  260. adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
  261. adjusted_mode->vtotal = panel_fixed_mode->vtotal;
  262. adjusted_mode->clock = panel_fixed_mode->clock;
  263. drm_mode_set_crtcinfo(adjusted_mode,
  264. CRTC_INTERLACE_HALVE_V);
  265. }
  266. /*
  267. * XXX: It would be nice to support lower refresh rates on the
  268. * panels to reduce power consumption, and perhaps match the
  269. * user's requested refresh rate.
  270. */
  271. return true;
  272. }
  273. static void cdv_intel_lvds_prepare(struct drm_encoder *encoder)
  274. {
  275. struct drm_device *dev = encoder->dev;
  276. struct drm_psb_private *dev_priv = dev->dev_private;
  277. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  278. if (!gma_power_begin(dev, true))
  279. return;
  280. mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
  281. mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
  282. BACKLIGHT_DUTY_CYCLE_MASK);
  283. cdv_intel_lvds_set_power(dev, encoder, false);
  284. gma_power_end(dev);
  285. }
  286. static void cdv_intel_lvds_commit(struct drm_encoder *encoder)
  287. {
  288. struct drm_device *dev = encoder->dev;
  289. struct drm_psb_private *dev_priv = dev->dev_private;
  290. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  291. if (mode_dev->backlight_duty_cycle == 0)
  292. mode_dev->backlight_duty_cycle =
  293. cdv_intel_lvds_get_max_backlight(dev);
  294. cdv_intel_lvds_set_power(dev, encoder, true);
  295. }
  296. static void cdv_intel_lvds_mode_set(struct drm_encoder *encoder,
  297. struct drm_display_mode *mode,
  298. struct drm_display_mode *adjusted_mode)
  299. {
  300. struct drm_device *dev = encoder->dev;
  301. struct drm_psb_private *dev_priv = dev->dev_private;
  302. struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
  303. u32 pfit_control;
  304. /*
  305. * The LVDS pin pair will already have been turned on in the
  306. * cdv_intel_crtc_mode_set since it has a large impact on the DPLL
  307. * settings.
  308. */
  309. /*
  310. * Enable automatic panel scaling so that non-native modes fill the
  311. * screen. Should be enabled before the pipe is enabled, according to
  312. * register description and PRM.
  313. */
  314. if (mode->hdisplay != adjusted_mode->hdisplay ||
  315. mode->vdisplay != adjusted_mode->vdisplay)
  316. pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
  317. HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
  318. HORIZ_INTERP_BILINEAR);
  319. else
  320. pfit_control = 0;
  321. pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT;
  322. if (dev_priv->lvds_dither)
  323. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  324. REG_WRITE(PFIT_CONTROL, pfit_control);
  325. }
  326. /**
  327. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  328. */
  329. static int cdv_intel_lvds_get_modes(struct drm_connector *connector)
  330. {
  331. struct drm_device *dev = connector->dev;
  332. struct drm_psb_private *dev_priv = dev->dev_private;
  333. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  334. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  335. int ret;
  336. ret = psb_intel_ddc_get_modes(connector, &gma_encoder->i2c_bus->adapter);
  337. if (ret)
  338. return ret;
  339. if (mode_dev->panel_fixed_mode != NULL) {
  340. struct drm_display_mode *mode =
  341. drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
  342. drm_mode_probed_add(connector, mode);
  343. return 1;
  344. }
  345. return 0;
  346. }
  347. /**
  348. * cdv_intel_lvds_destroy - unregister and free LVDS structures
  349. * @connector: connector to free
  350. *
  351. * Unregister the DDC bus for this connector then free the driver private
  352. * structure.
  353. */
  354. static void cdv_intel_lvds_destroy(struct drm_connector *connector)
  355. {
  356. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  357. psb_intel_i2c_destroy(gma_encoder->i2c_bus);
  358. drm_connector_unregister(connector);
  359. drm_connector_cleanup(connector);
  360. kfree(connector);
  361. }
  362. static int cdv_intel_lvds_set_property(struct drm_connector *connector,
  363. struct drm_property *property,
  364. uint64_t value)
  365. {
  366. struct drm_encoder *encoder = connector->encoder;
  367. if (!strcmp(property->name, "scaling mode") && encoder) {
  368. struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
  369. uint64_t curValue;
  370. if (!crtc)
  371. return -1;
  372. switch (value) {
  373. case DRM_MODE_SCALE_FULLSCREEN:
  374. break;
  375. case DRM_MODE_SCALE_NO_SCALE:
  376. break;
  377. case DRM_MODE_SCALE_ASPECT:
  378. break;
  379. default:
  380. return -1;
  381. }
  382. if (drm_object_property_get_value(&connector->base,
  383. property,
  384. &curValue))
  385. return -1;
  386. if (curValue == value)
  387. return 0;
  388. if (drm_object_property_set_value(&connector->base,
  389. property,
  390. value))
  391. return -1;
  392. if (crtc->saved_mode.hdisplay != 0 &&
  393. crtc->saved_mode.vdisplay != 0) {
  394. if (!drm_crtc_helper_set_mode(encoder->crtc,
  395. &crtc->saved_mode,
  396. encoder->crtc->x,
  397. encoder->crtc->y,
  398. encoder->crtc->primary->fb))
  399. return -1;
  400. }
  401. } else if (!strcmp(property->name, "backlight") && encoder) {
  402. if (drm_object_property_set_value(&connector->base,
  403. property,
  404. value))
  405. return -1;
  406. else
  407. gma_backlight_set(encoder->dev, value);
  408. } else if (!strcmp(property->name, "DPMS") && encoder) {
  409. const struct drm_encoder_helper_funcs *helpers =
  410. encoder->helper_private;
  411. helpers->dpms(encoder, value);
  412. }
  413. return 0;
  414. }
  415. static const struct drm_encoder_helper_funcs
  416. cdv_intel_lvds_helper_funcs = {
  417. .dpms = cdv_intel_lvds_encoder_dpms,
  418. .mode_fixup = cdv_intel_lvds_mode_fixup,
  419. .prepare = cdv_intel_lvds_prepare,
  420. .mode_set = cdv_intel_lvds_mode_set,
  421. .commit = cdv_intel_lvds_commit,
  422. };
  423. static const struct drm_connector_helper_funcs
  424. cdv_intel_lvds_connector_helper_funcs = {
  425. .get_modes = cdv_intel_lvds_get_modes,
  426. .mode_valid = cdv_intel_lvds_mode_valid,
  427. .best_encoder = gma_best_encoder,
  428. };
  429. static const struct drm_connector_funcs cdv_intel_lvds_connector_funcs = {
  430. .dpms = drm_helper_connector_dpms,
  431. .fill_modes = drm_helper_probe_single_connector_modes,
  432. .set_property = cdv_intel_lvds_set_property,
  433. .destroy = cdv_intel_lvds_destroy,
  434. };
  435. static void cdv_intel_lvds_enc_destroy(struct drm_encoder *encoder)
  436. {
  437. drm_encoder_cleanup(encoder);
  438. }
  439. static const struct drm_encoder_funcs cdv_intel_lvds_enc_funcs = {
  440. .destroy = cdv_intel_lvds_enc_destroy,
  441. };
  442. /*
  443. * Enumerate the child dev array parsed from VBT to check whether
  444. * the LVDS is present.
  445. * If it is present, return 1.
  446. * If it is not present, return false.
  447. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  448. */
  449. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  450. u8 *i2c_pin)
  451. {
  452. struct drm_psb_private *dev_priv = dev->dev_private;
  453. int i;
  454. if (!dev_priv->child_dev_num)
  455. return true;
  456. for (i = 0; i < dev_priv->child_dev_num; i++) {
  457. struct child_device_config *child = dev_priv->child_dev + i;
  458. /* If the device type is not LFP, continue.
  459. * We have to check both the new identifiers as well as the
  460. * old for compatibility with some BIOSes.
  461. */
  462. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  463. child->device_type != DEVICE_TYPE_LFP)
  464. continue;
  465. if (child->i2c_pin)
  466. *i2c_pin = child->i2c_pin;
  467. /* However, we cannot trust the BIOS writers to populate
  468. * the VBT correctly. Since LVDS requires additional
  469. * information from AIM blocks, a non-zero addin offset is
  470. * a good indicator that the LVDS is actually present.
  471. */
  472. if (child->addin_offset)
  473. return true;
  474. /* But even then some BIOS writers perform some black magic
  475. * and instantiate the device without reference to any
  476. * additional data. Trust that if the VBT was written into
  477. * the OpRegion then they have validated the LVDS's existence.
  478. */
  479. if (dev_priv->opregion.vbt)
  480. return true;
  481. }
  482. return false;
  483. }
  484. /**
  485. * cdv_intel_lvds_init - setup LVDS connectors on this device
  486. * @dev: drm device
  487. *
  488. * Create the connector, register the LVDS DDC bus, and try to figure out what
  489. * modes we can display on the LVDS panel (if present).
  490. */
  491. void cdv_intel_lvds_init(struct drm_device *dev,
  492. struct psb_intel_mode_device *mode_dev)
  493. {
  494. struct gma_encoder *gma_encoder;
  495. struct gma_connector *gma_connector;
  496. struct cdv_intel_lvds_priv *lvds_priv;
  497. struct drm_connector *connector;
  498. struct drm_encoder *encoder;
  499. struct drm_display_mode *scan;
  500. struct drm_crtc *crtc;
  501. struct drm_psb_private *dev_priv = dev->dev_private;
  502. u32 lvds;
  503. int pipe;
  504. u8 pin;
  505. pin = GMBUS_PORT_PANEL;
  506. if (!lvds_is_present_in_vbt(dev, &pin)) {
  507. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  508. return;
  509. }
  510. gma_encoder = kzalloc(sizeof(struct gma_encoder),
  511. GFP_KERNEL);
  512. if (!gma_encoder)
  513. return;
  514. gma_connector = kzalloc(sizeof(struct gma_connector),
  515. GFP_KERNEL);
  516. if (!gma_connector)
  517. goto failed_connector;
  518. lvds_priv = kzalloc(sizeof(struct cdv_intel_lvds_priv), GFP_KERNEL);
  519. if (!lvds_priv)
  520. goto failed_lvds_priv;
  521. gma_encoder->dev_priv = lvds_priv;
  522. connector = &gma_connector->base;
  523. gma_connector->save = cdv_intel_lvds_save;
  524. gma_connector->restore = cdv_intel_lvds_restore;
  525. encoder = &gma_encoder->base;
  526. drm_connector_init(dev, connector,
  527. &cdv_intel_lvds_connector_funcs,
  528. DRM_MODE_CONNECTOR_LVDS);
  529. drm_encoder_init(dev, encoder,
  530. &cdv_intel_lvds_enc_funcs,
  531. DRM_MODE_ENCODER_LVDS, NULL);
  532. gma_connector_attach_encoder(gma_connector, gma_encoder);
  533. gma_encoder->type = INTEL_OUTPUT_LVDS;
  534. drm_encoder_helper_add(encoder, &cdv_intel_lvds_helper_funcs);
  535. drm_connector_helper_add(connector,
  536. &cdv_intel_lvds_connector_helper_funcs);
  537. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  538. connector->interlace_allowed = false;
  539. connector->doublescan_allowed = false;
  540. /*Attach connector properties*/
  541. drm_object_attach_property(&connector->base,
  542. dev->mode_config.scaling_mode_property,
  543. DRM_MODE_SCALE_FULLSCREEN);
  544. drm_object_attach_property(&connector->base,
  545. dev_priv->backlight_property,
  546. BRIGHTNESS_MAX_LEVEL);
  547. /**
  548. * Set up I2C bus
  549. * FIXME: distroy i2c_bus when exit
  550. */
  551. gma_encoder->i2c_bus = psb_intel_i2c_create(dev,
  552. GPIOB,
  553. "LVDSBLC_B");
  554. if (!gma_encoder->i2c_bus) {
  555. dev_printk(KERN_ERR,
  556. &dev->pdev->dev, "I2C bus registration failed.\n");
  557. goto failed_blc_i2c;
  558. }
  559. gma_encoder->i2c_bus->slave_addr = 0x2C;
  560. dev_priv->lvds_i2c_bus = gma_encoder->i2c_bus;
  561. /*
  562. * LVDS discovery:
  563. * 1) check for EDID on DDC
  564. * 2) check for VBT data
  565. * 3) check to see if LVDS is already on
  566. * if none of the above, no panel
  567. * 4) make sure lid is open
  568. * if closed, act like it's not there for now
  569. */
  570. /* Set up the DDC bus. */
  571. gma_encoder->ddc_bus = psb_intel_i2c_create(dev,
  572. GPIOC,
  573. "LVDSDDC_C");
  574. if (!gma_encoder->ddc_bus) {
  575. dev_printk(KERN_ERR, &dev->pdev->dev,
  576. "DDC bus registration " "failed.\n");
  577. goto failed_ddc;
  578. }
  579. /*
  580. * Attempt to get the fixed panel mode from DDC. Assume that the
  581. * preferred mode is the right one.
  582. */
  583. mutex_lock(&dev->mode_config.mutex);
  584. psb_intel_ddc_get_modes(connector,
  585. &gma_encoder->ddc_bus->adapter);
  586. list_for_each_entry(scan, &connector->probed_modes, head) {
  587. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  588. mode_dev->panel_fixed_mode =
  589. drm_mode_duplicate(dev, scan);
  590. goto out; /* FIXME: check for quirks */
  591. }
  592. }
  593. /* Failed to get EDID, what about VBT? do we need this?*/
  594. if (dev_priv->lfp_lvds_vbt_mode) {
  595. mode_dev->panel_fixed_mode =
  596. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  597. if (mode_dev->panel_fixed_mode) {
  598. mode_dev->panel_fixed_mode->type |=
  599. DRM_MODE_TYPE_PREFERRED;
  600. goto out; /* FIXME: check for quirks */
  601. }
  602. }
  603. /*
  604. * If we didn't get EDID, try checking if the panel is already turned
  605. * on. If so, assume that whatever is currently programmed is the
  606. * correct mode.
  607. */
  608. lvds = REG_READ(LVDS);
  609. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  610. crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
  611. if (crtc && (lvds & LVDS_PORT_EN)) {
  612. mode_dev->panel_fixed_mode =
  613. cdv_intel_crtc_mode_get(dev, crtc);
  614. if (mode_dev->panel_fixed_mode) {
  615. mode_dev->panel_fixed_mode->type |=
  616. DRM_MODE_TYPE_PREFERRED;
  617. goto out; /* FIXME: check for quirks */
  618. }
  619. }
  620. /* If we still don't have a mode after all that, give up. */
  621. if (!mode_dev->panel_fixed_mode) {
  622. DRM_DEBUG
  623. ("Found no modes on the lvds, ignoring the LVDS\n");
  624. goto failed_find;
  625. }
  626. /* setup PWM */
  627. {
  628. u32 pwm;
  629. pwm = REG_READ(BLC_PWM_CTL2);
  630. if (pipe == 1)
  631. pwm |= PWM_PIPE_B;
  632. else
  633. pwm &= ~PWM_PIPE_B;
  634. pwm |= PWM_ENABLE;
  635. REG_WRITE(BLC_PWM_CTL2, pwm);
  636. }
  637. out:
  638. mutex_unlock(&dev->mode_config.mutex);
  639. drm_connector_register(connector);
  640. return;
  641. failed_find:
  642. mutex_unlock(&dev->mode_config.mutex);
  643. printk(KERN_ERR "Failed find\n");
  644. psb_intel_i2c_destroy(gma_encoder->ddc_bus);
  645. failed_ddc:
  646. printk(KERN_ERR "Failed DDC\n");
  647. psb_intel_i2c_destroy(gma_encoder->i2c_bus);
  648. failed_blc_i2c:
  649. printk(KERN_ERR "Failed BLC\n");
  650. drm_encoder_cleanup(encoder);
  651. drm_connector_cleanup(connector);
  652. kfree(lvds_priv);
  653. failed_lvds_priv:
  654. kfree(gma_connector);
  655. failed_connector:
  656. kfree(gma_encoder);
  657. }