powernv-cpufreq.c 28 KB

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  1. /*
  2. * POWERNV cpufreq driver for the IBM POWER processors
  3. *
  4. * (C) Copyright IBM 2014
  5. *
  6. * Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2, or (at your option)
  11. * any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. */
  19. #define pr_fmt(fmt) "powernv-cpufreq: " fmt
  20. #include <linux/kernel.h>
  21. #include <linux/sysfs.h>
  22. #include <linux/cpumask.h>
  23. #include <linux/module.h>
  24. #include <linux/cpufreq.h>
  25. #include <linux/smp.h>
  26. #include <linux/of.h>
  27. #include <linux/reboot.h>
  28. #include <linux/slab.h>
  29. #include <linux/cpu.h>
  30. #include <trace/events/power.h>
  31. #include <asm/cputhreads.h>
  32. #include <asm/firmware.h>
  33. #include <asm/reg.h>
  34. #include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */
  35. #include <asm/opal.h>
  36. #include <linux/timer.h>
  37. #define POWERNV_MAX_PSTATES 256
  38. #define PMSR_PSAFE_ENABLE (1UL << 30)
  39. #define PMSR_SPR_EM_DISABLE (1UL << 31)
  40. #define PMSR_MAX(x) ((x >> 32) & 0xFF)
  41. #define LPSTATE_SHIFT 48
  42. #define GPSTATE_SHIFT 56
  43. #define GET_LPSTATE(x) (((x) >> LPSTATE_SHIFT) & 0xFF)
  44. #define GET_GPSTATE(x) (((x) >> GPSTATE_SHIFT) & 0xFF)
  45. #define MAX_RAMP_DOWN_TIME 5120
  46. /*
  47. * On an idle system we want the global pstate to ramp-down from max value to
  48. * min over a span of ~5 secs. Also we want it to initially ramp-down slowly and
  49. * then ramp-down rapidly later on.
  50. *
  51. * This gives a percentage rampdown for time elapsed in milliseconds.
  52. * ramp_down_percentage = ((ms * ms) >> 18)
  53. * ~= 3.8 * (sec * sec)
  54. *
  55. * At 0 ms ramp_down_percent = 0
  56. * At 5120 ms ramp_down_percent = 100
  57. */
  58. #define ramp_down_percent(time) ((time * time) >> 18)
  59. /* Interval after which the timer is queued to bring down global pstate */
  60. #define GPSTATE_TIMER_INTERVAL 2000
  61. /**
  62. * struct global_pstate_info - Per policy data structure to maintain history of
  63. * global pstates
  64. * @highest_lpstate_idx: The local pstate index from which we are
  65. * ramping down
  66. * @elapsed_time: Time in ms spent in ramping down from
  67. * highest_lpstate_idx
  68. * @last_sampled_time: Time from boot in ms when global pstates were
  69. * last set
  70. * @last_lpstate_idx, Last set value of local pstate and global
  71. * last_gpstate_idx pstate in terms of cpufreq table index
  72. * @timer: Is used for ramping down if cpu goes idle for
  73. * a long time with global pstate held high
  74. * @gpstate_lock: A spinlock to maintain synchronization between
  75. * routines called by the timer handler and
  76. * governer's target_index calls
  77. */
  78. struct global_pstate_info {
  79. int highest_lpstate_idx;
  80. unsigned int elapsed_time;
  81. unsigned int last_sampled_time;
  82. int last_lpstate_idx;
  83. int last_gpstate_idx;
  84. spinlock_t gpstate_lock;
  85. struct timer_list timer;
  86. };
  87. static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
  88. static bool rebooting, throttled, occ_reset;
  89. static const char * const throttle_reason[] = {
  90. "No throttling",
  91. "Power Cap",
  92. "Processor Over Temperature",
  93. "Power Supply Failure",
  94. "Over Current",
  95. "OCC Reset"
  96. };
  97. enum throttle_reason_type {
  98. NO_THROTTLE = 0,
  99. POWERCAP,
  100. CPU_OVERTEMP,
  101. POWER_SUPPLY_FAILURE,
  102. OVERCURRENT,
  103. OCC_RESET_THROTTLE,
  104. OCC_MAX_REASON
  105. };
  106. static struct chip {
  107. unsigned int id;
  108. bool throttled;
  109. bool restore;
  110. u8 throttle_reason;
  111. cpumask_t mask;
  112. struct work_struct throttle;
  113. int throttle_turbo;
  114. int throttle_sub_turbo;
  115. int reason[OCC_MAX_REASON];
  116. } *chips;
  117. static int nr_chips;
  118. static DEFINE_PER_CPU(struct chip *, chip_info);
  119. /*
  120. * Note:
  121. * The set of pstates consists of contiguous integers.
  122. * powernv_pstate_info stores the index of the frequency table for
  123. * max, min and nominal frequencies. It also stores number of
  124. * available frequencies.
  125. *
  126. * powernv_pstate_info.nominal indicates the index to the highest
  127. * non-turbo frequency.
  128. */
  129. static struct powernv_pstate_info {
  130. unsigned int min;
  131. unsigned int max;
  132. unsigned int nominal;
  133. unsigned int nr_pstates;
  134. } powernv_pstate_info;
  135. /* Use following macros for conversions between pstate_id and index */
  136. static inline int idx_to_pstate(unsigned int i)
  137. {
  138. if (unlikely(i >= powernv_pstate_info.nr_pstates)) {
  139. pr_warn_once("index %u is out of bound\n", i);
  140. return powernv_freqs[powernv_pstate_info.nominal].driver_data;
  141. }
  142. return powernv_freqs[i].driver_data;
  143. }
  144. static inline unsigned int pstate_to_idx(int pstate)
  145. {
  146. int min = powernv_freqs[powernv_pstate_info.min].driver_data;
  147. int max = powernv_freqs[powernv_pstate_info.max].driver_data;
  148. if (min > 0) {
  149. if (unlikely((pstate < max) || (pstate > min))) {
  150. pr_warn_once("pstate %d is out of bound\n", pstate);
  151. return powernv_pstate_info.nominal;
  152. }
  153. } else {
  154. if (unlikely((pstate > max) || (pstate < min))) {
  155. pr_warn_once("pstate %d is out of bound\n", pstate);
  156. return powernv_pstate_info.nominal;
  157. }
  158. }
  159. /*
  160. * abs() is deliberately used so that is works with
  161. * both monotonically increasing and decreasing
  162. * pstate values
  163. */
  164. return abs(pstate - idx_to_pstate(powernv_pstate_info.max));
  165. }
  166. static inline void reset_gpstates(struct cpufreq_policy *policy)
  167. {
  168. struct global_pstate_info *gpstates = policy->driver_data;
  169. gpstates->highest_lpstate_idx = 0;
  170. gpstates->elapsed_time = 0;
  171. gpstates->last_sampled_time = 0;
  172. gpstates->last_lpstate_idx = 0;
  173. gpstates->last_gpstate_idx = 0;
  174. }
  175. /*
  176. * Initialize the freq table based on data obtained
  177. * from the firmware passed via device-tree
  178. */
  179. static int init_powernv_pstates(void)
  180. {
  181. struct device_node *power_mgt;
  182. int i, nr_pstates = 0;
  183. const __be32 *pstate_ids, *pstate_freqs;
  184. u32 len_ids, len_freqs;
  185. u32 pstate_min, pstate_max, pstate_nominal;
  186. power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");
  187. if (!power_mgt) {
  188. pr_warn("power-mgt node not found\n");
  189. return -ENODEV;
  190. }
  191. if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) {
  192. pr_warn("ibm,pstate-min node not found\n");
  193. return -ENODEV;
  194. }
  195. if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) {
  196. pr_warn("ibm,pstate-max node not found\n");
  197. return -ENODEV;
  198. }
  199. if (of_property_read_u32(power_mgt, "ibm,pstate-nominal",
  200. &pstate_nominal)) {
  201. pr_warn("ibm,pstate-nominal not found\n");
  202. return -ENODEV;
  203. }
  204. pr_info("cpufreq pstate min %d nominal %d max %d\n", pstate_min,
  205. pstate_nominal, pstate_max);
  206. pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids);
  207. if (!pstate_ids) {
  208. pr_warn("ibm,pstate-ids not found\n");
  209. return -ENODEV;
  210. }
  211. pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz",
  212. &len_freqs);
  213. if (!pstate_freqs) {
  214. pr_warn("ibm,pstate-frequencies-mhz not found\n");
  215. return -ENODEV;
  216. }
  217. if (len_ids != len_freqs) {
  218. pr_warn("Entries in ibm,pstate-ids and "
  219. "ibm,pstate-frequencies-mhz does not match\n");
  220. }
  221. nr_pstates = min(len_ids, len_freqs) / sizeof(u32);
  222. if (!nr_pstates) {
  223. pr_warn("No PStates found\n");
  224. return -ENODEV;
  225. }
  226. powernv_pstate_info.nr_pstates = nr_pstates;
  227. pr_debug("NR PStates %d\n", nr_pstates);
  228. for (i = 0; i < nr_pstates; i++) {
  229. u32 id = be32_to_cpu(pstate_ids[i]);
  230. u32 freq = be32_to_cpu(pstate_freqs[i]);
  231. pr_debug("PState id %d freq %d MHz\n", id, freq);
  232. powernv_freqs[i].frequency = freq * 1000; /* kHz */
  233. powernv_freqs[i].driver_data = id;
  234. if (id == pstate_max)
  235. powernv_pstate_info.max = i;
  236. else if (id == pstate_nominal)
  237. powernv_pstate_info.nominal = i;
  238. else if (id == pstate_min)
  239. powernv_pstate_info.min = i;
  240. }
  241. /* End of list marker entry */
  242. powernv_freqs[i].frequency = CPUFREQ_TABLE_END;
  243. return 0;
  244. }
  245. /* Returns the CPU frequency corresponding to the pstate_id. */
  246. static unsigned int pstate_id_to_freq(int pstate_id)
  247. {
  248. int i;
  249. i = pstate_to_idx(pstate_id);
  250. if (i >= powernv_pstate_info.nr_pstates || i < 0) {
  251. pr_warn("PState id %d outside of PState table, "
  252. "reporting nominal id %d instead\n",
  253. pstate_id, idx_to_pstate(powernv_pstate_info.nominal));
  254. i = powernv_pstate_info.nominal;
  255. }
  256. return powernv_freqs[i].frequency;
  257. }
  258. /*
  259. * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by
  260. * the firmware
  261. */
  262. static ssize_t cpuinfo_nominal_freq_show(struct cpufreq_policy *policy,
  263. char *buf)
  264. {
  265. return sprintf(buf, "%u\n",
  266. powernv_freqs[powernv_pstate_info.nominal].frequency);
  267. }
  268. struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq =
  269. __ATTR_RO(cpuinfo_nominal_freq);
  270. static struct freq_attr *powernv_cpu_freq_attr[] = {
  271. &cpufreq_freq_attr_scaling_available_freqs,
  272. &cpufreq_freq_attr_cpuinfo_nominal_freq,
  273. NULL,
  274. };
  275. #define throttle_attr(name, member) \
  276. static ssize_t name##_show(struct cpufreq_policy *policy, char *buf) \
  277. { \
  278. struct chip *chip = per_cpu(chip_info, policy->cpu); \
  279. \
  280. return sprintf(buf, "%u\n", chip->member); \
  281. } \
  282. \
  283. static struct freq_attr throttle_attr_##name = __ATTR_RO(name) \
  284. throttle_attr(unthrottle, reason[NO_THROTTLE]);
  285. throttle_attr(powercap, reason[POWERCAP]);
  286. throttle_attr(overtemp, reason[CPU_OVERTEMP]);
  287. throttle_attr(supply_fault, reason[POWER_SUPPLY_FAILURE]);
  288. throttle_attr(overcurrent, reason[OVERCURRENT]);
  289. throttle_attr(occ_reset, reason[OCC_RESET_THROTTLE]);
  290. throttle_attr(turbo_stat, throttle_turbo);
  291. throttle_attr(sub_turbo_stat, throttle_sub_turbo);
  292. static struct attribute *throttle_attrs[] = {
  293. &throttle_attr_unthrottle.attr,
  294. &throttle_attr_powercap.attr,
  295. &throttle_attr_overtemp.attr,
  296. &throttle_attr_supply_fault.attr,
  297. &throttle_attr_overcurrent.attr,
  298. &throttle_attr_occ_reset.attr,
  299. &throttle_attr_turbo_stat.attr,
  300. &throttle_attr_sub_turbo_stat.attr,
  301. NULL,
  302. };
  303. static const struct attribute_group throttle_attr_grp = {
  304. .name = "throttle_stats",
  305. .attrs = throttle_attrs,
  306. };
  307. /* Helper routines */
  308. /* Access helpers to power mgt SPR */
  309. static inline unsigned long get_pmspr(unsigned long sprn)
  310. {
  311. switch (sprn) {
  312. case SPRN_PMCR:
  313. return mfspr(SPRN_PMCR);
  314. case SPRN_PMICR:
  315. return mfspr(SPRN_PMICR);
  316. case SPRN_PMSR:
  317. return mfspr(SPRN_PMSR);
  318. }
  319. BUG();
  320. }
  321. static inline void set_pmspr(unsigned long sprn, unsigned long val)
  322. {
  323. switch (sprn) {
  324. case SPRN_PMCR:
  325. mtspr(SPRN_PMCR, val);
  326. return;
  327. case SPRN_PMICR:
  328. mtspr(SPRN_PMICR, val);
  329. return;
  330. }
  331. BUG();
  332. }
  333. /*
  334. * Use objects of this type to query/update
  335. * pstates on a remote CPU via smp_call_function.
  336. */
  337. struct powernv_smp_call_data {
  338. unsigned int freq;
  339. int pstate_id;
  340. int gpstate_id;
  341. };
  342. /*
  343. * powernv_read_cpu_freq: Reads the current frequency on this CPU.
  344. *
  345. * Called via smp_call_function.
  346. *
  347. * Note: The caller of the smp_call_function should pass an argument of
  348. * the type 'struct powernv_smp_call_data *' along with this function.
  349. *
  350. * The current frequency on this CPU will be returned via
  351. * ((struct powernv_smp_call_data *)arg)->freq;
  352. */
  353. static void powernv_read_cpu_freq(void *arg)
  354. {
  355. unsigned long pmspr_val;
  356. s8 local_pstate_id;
  357. struct powernv_smp_call_data *freq_data = arg;
  358. pmspr_val = get_pmspr(SPRN_PMSR);
  359. /*
  360. * The local pstate id corresponds bits 48..55 in the PMSR.
  361. * Note: Watch out for the sign!
  362. */
  363. local_pstate_id = (pmspr_val >> 48) & 0xFF;
  364. freq_data->pstate_id = local_pstate_id;
  365. freq_data->freq = pstate_id_to_freq(freq_data->pstate_id);
  366. pr_debug("cpu %d pmsr %016lX pstate_id %d frequency %d kHz\n",
  367. raw_smp_processor_id(), pmspr_val, freq_data->pstate_id,
  368. freq_data->freq);
  369. }
  370. /*
  371. * powernv_cpufreq_get: Returns the CPU frequency as reported by the
  372. * firmware for CPU 'cpu'. This value is reported through the sysfs
  373. * file cpuinfo_cur_freq.
  374. */
  375. static unsigned int powernv_cpufreq_get(unsigned int cpu)
  376. {
  377. struct powernv_smp_call_data freq_data;
  378. smp_call_function_any(cpu_sibling_mask(cpu), powernv_read_cpu_freq,
  379. &freq_data, 1);
  380. return freq_data.freq;
  381. }
  382. /*
  383. * set_pstate: Sets the pstate on this CPU.
  384. *
  385. * This is called via an smp_call_function.
  386. *
  387. * The caller must ensure that freq_data is of the type
  388. * (struct powernv_smp_call_data *) and the pstate_id which needs to be set
  389. * on this CPU should be present in freq_data->pstate_id.
  390. */
  391. static void set_pstate(void *data)
  392. {
  393. unsigned long val;
  394. struct powernv_smp_call_data *freq_data = data;
  395. unsigned long pstate_ul = freq_data->pstate_id;
  396. unsigned long gpstate_ul = freq_data->gpstate_id;
  397. val = get_pmspr(SPRN_PMCR);
  398. val = val & 0x0000FFFFFFFFFFFFULL;
  399. pstate_ul = pstate_ul & 0xFF;
  400. gpstate_ul = gpstate_ul & 0xFF;
  401. /* Set both global(bits 56..63) and local(bits 48..55) PStates */
  402. val = val | (gpstate_ul << 56) | (pstate_ul << 48);
  403. pr_debug("Setting cpu %d pmcr to %016lX\n",
  404. raw_smp_processor_id(), val);
  405. set_pmspr(SPRN_PMCR, val);
  406. }
  407. /*
  408. * get_nominal_index: Returns the index corresponding to the nominal
  409. * pstate in the cpufreq table
  410. */
  411. static inline unsigned int get_nominal_index(void)
  412. {
  413. return powernv_pstate_info.nominal;
  414. }
  415. static void powernv_cpufreq_throttle_check(void *data)
  416. {
  417. struct chip *chip;
  418. unsigned int cpu = smp_processor_id();
  419. unsigned long pmsr;
  420. int pmsr_pmax;
  421. unsigned int pmsr_pmax_idx;
  422. pmsr = get_pmspr(SPRN_PMSR);
  423. chip = this_cpu_read(chip_info);
  424. /* Check for Pmax Capping */
  425. pmsr_pmax = (s8)PMSR_MAX(pmsr);
  426. pmsr_pmax_idx = pstate_to_idx(pmsr_pmax);
  427. if (pmsr_pmax_idx != powernv_pstate_info.max) {
  428. if (chip->throttled)
  429. goto next;
  430. chip->throttled = true;
  431. if (pmsr_pmax_idx > powernv_pstate_info.nominal) {
  432. pr_warn_once("CPU %d on Chip %u has Pmax(%d) reduced below nominal frequency(%d)\n",
  433. cpu, chip->id, pmsr_pmax,
  434. idx_to_pstate(powernv_pstate_info.nominal));
  435. chip->throttle_sub_turbo++;
  436. } else {
  437. chip->throttle_turbo++;
  438. }
  439. trace_powernv_throttle(chip->id,
  440. throttle_reason[chip->throttle_reason],
  441. pmsr_pmax);
  442. } else if (chip->throttled) {
  443. chip->throttled = false;
  444. trace_powernv_throttle(chip->id,
  445. throttle_reason[chip->throttle_reason],
  446. pmsr_pmax);
  447. }
  448. /* Check if Psafe_mode_active is set in PMSR. */
  449. next:
  450. if (pmsr & PMSR_PSAFE_ENABLE) {
  451. throttled = true;
  452. pr_info("Pstate set to safe frequency\n");
  453. }
  454. /* Check if SPR_EM_DISABLE is set in PMSR */
  455. if (pmsr & PMSR_SPR_EM_DISABLE) {
  456. throttled = true;
  457. pr_info("Frequency Control disabled from OS\n");
  458. }
  459. if (throttled) {
  460. pr_info("PMSR = %16lx\n", pmsr);
  461. pr_warn("CPU Frequency could be throttled\n");
  462. }
  463. }
  464. /**
  465. * calc_global_pstate - Calculate global pstate
  466. * @elapsed_time: Elapsed time in milliseconds
  467. * @local_pstate_idx: New local pstate
  468. * @highest_lpstate_idx: pstate from which its ramping down
  469. *
  470. * Finds the appropriate global pstate based on the pstate from which its
  471. * ramping down and the time elapsed in ramping down. It follows a quadratic
  472. * equation which ensures that it reaches ramping down to pmin in 5sec.
  473. */
  474. static inline int calc_global_pstate(unsigned int elapsed_time,
  475. int highest_lpstate_idx,
  476. int local_pstate_idx)
  477. {
  478. int index_diff;
  479. /*
  480. * Using ramp_down_percent we get the percentage of rampdown
  481. * that we are expecting to be dropping. Difference between
  482. * highest_lpstate_idx and powernv_pstate_info.min will give a absolute
  483. * number of how many pstates we will drop eventually by the end of
  484. * 5 seconds, then just scale it get the number pstates to be dropped.
  485. */
  486. index_diff = ((int)ramp_down_percent(elapsed_time) *
  487. (powernv_pstate_info.min - highest_lpstate_idx)) / 100;
  488. /* Ensure that global pstate is >= to local pstate */
  489. if (highest_lpstate_idx + index_diff >= local_pstate_idx)
  490. return local_pstate_idx;
  491. else
  492. return highest_lpstate_idx + index_diff;
  493. }
  494. static inline void queue_gpstate_timer(struct global_pstate_info *gpstates)
  495. {
  496. unsigned int timer_interval;
  497. /*
  498. * Setting up timer to fire after GPSTATE_TIMER_INTERVAL ms, But
  499. * if it exceeds MAX_RAMP_DOWN_TIME ms for ramp down time.
  500. * Set timer such that it fires exactly at MAX_RAMP_DOWN_TIME
  501. * seconds of ramp down time.
  502. */
  503. if ((gpstates->elapsed_time + GPSTATE_TIMER_INTERVAL)
  504. > MAX_RAMP_DOWN_TIME)
  505. timer_interval = MAX_RAMP_DOWN_TIME - gpstates->elapsed_time;
  506. else
  507. timer_interval = GPSTATE_TIMER_INTERVAL;
  508. mod_timer(&gpstates->timer, jiffies + msecs_to_jiffies(timer_interval));
  509. }
  510. /**
  511. * gpstate_timer_handler
  512. *
  513. * @data: pointer to cpufreq_policy on which timer was queued
  514. *
  515. * This handler brings down the global pstate closer to the local pstate
  516. * according quadratic equation. Queues a new timer if it is still not equal
  517. * to local pstate
  518. */
  519. void gpstate_timer_handler(unsigned long data)
  520. {
  521. struct cpufreq_policy *policy = (struct cpufreq_policy *)data;
  522. struct global_pstate_info *gpstates = policy->driver_data;
  523. int gpstate_idx, lpstate_idx;
  524. unsigned long val;
  525. unsigned int time_diff = jiffies_to_msecs(jiffies)
  526. - gpstates->last_sampled_time;
  527. struct powernv_smp_call_data freq_data;
  528. if (!spin_trylock(&gpstates->gpstate_lock))
  529. return;
  530. /*
  531. * If PMCR was last updated was using fast_swtich then
  532. * We may have wrong in gpstate->last_lpstate_idx
  533. * value. Hence, read from PMCR to get correct data.
  534. */
  535. val = get_pmspr(SPRN_PMCR);
  536. freq_data.gpstate_id = (s8)GET_GPSTATE(val);
  537. freq_data.pstate_id = (s8)GET_LPSTATE(val);
  538. if (freq_data.gpstate_id == freq_data.pstate_id) {
  539. reset_gpstates(policy);
  540. spin_unlock(&gpstates->gpstate_lock);
  541. return;
  542. }
  543. gpstates->last_sampled_time += time_diff;
  544. gpstates->elapsed_time += time_diff;
  545. if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) {
  546. gpstate_idx = pstate_to_idx(freq_data.pstate_id);
  547. lpstate_idx = gpstate_idx;
  548. reset_gpstates(policy);
  549. gpstates->highest_lpstate_idx = gpstate_idx;
  550. } else {
  551. lpstate_idx = pstate_to_idx(freq_data.pstate_id);
  552. gpstate_idx = calc_global_pstate(gpstates->elapsed_time,
  553. gpstates->highest_lpstate_idx,
  554. lpstate_idx);
  555. }
  556. freq_data.gpstate_id = idx_to_pstate(gpstate_idx);
  557. gpstates->last_gpstate_idx = gpstate_idx;
  558. gpstates->last_lpstate_idx = lpstate_idx;
  559. /*
  560. * If local pstate is equal to global pstate, rampdown is over
  561. * So timer is not required to be queued.
  562. */
  563. if (gpstate_idx != gpstates->last_lpstate_idx)
  564. queue_gpstate_timer(gpstates);
  565. spin_unlock(&gpstates->gpstate_lock);
  566. /* Timer may get migrated to a different cpu on cpu hot unplug */
  567. smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1);
  568. }
  569. /*
  570. * powernv_cpufreq_target_index: Sets the frequency corresponding to
  571. * the cpufreq table entry indexed by new_index on the cpus in the
  572. * mask policy->cpus
  573. */
  574. static int powernv_cpufreq_target_index(struct cpufreq_policy *policy,
  575. unsigned int new_index)
  576. {
  577. struct powernv_smp_call_data freq_data;
  578. unsigned int cur_msec, gpstate_idx;
  579. struct global_pstate_info *gpstates = policy->driver_data;
  580. if (unlikely(rebooting) && new_index != get_nominal_index())
  581. return 0;
  582. if (!throttled) {
  583. /* we don't want to be preempted while
  584. * checking if the CPU frequency has been throttled
  585. */
  586. preempt_disable();
  587. powernv_cpufreq_throttle_check(NULL);
  588. preempt_enable();
  589. }
  590. cur_msec = jiffies_to_msecs(get_jiffies_64());
  591. spin_lock(&gpstates->gpstate_lock);
  592. freq_data.pstate_id = idx_to_pstate(new_index);
  593. if (!gpstates->last_sampled_time) {
  594. gpstate_idx = new_index;
  595. gpstates->highest_lpstate_idx = new_index;
  596. goto gpstates_done;
  597. }
  598. if (gpstates->last_gpstate_idx < new_index) {
  599. gpstates->elapsed_time += cur_msec -
  600. gpstates->last_sampled_time;
  601. /*
  602. * If its has been ramping down for more than MAX_RAMP_DOWN_TIME
  603. * we should be resetting all global pstate related data. Set it
  604. * equal to local pstate to start fresh.
  605. */
  606. if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) {
  607. reset_gpstates(policy);
  608. gpstates->highest_lpstate_idx = new_index;
  609. gpstate_idx = new_index;
  610. } else {
  611. /* Elaspsed_time is less than 5 seconds, continue to rampdown */
  612. gpstate_idx = calc_global_pstate(gpstates->elapsed_time,
  613. gpstates->highest_lpstate_idx,
  614. new_index);
  615. }
  616. } else {
  617. reset_gpstates(policy);
  618. gpstates->highest_lpstate_idx = new_index;
  619. gpstate_idx = new_index;
  620. }
  621. /*
  622. * If local pstate is equal to global pstate, rampdown is over
  623. * So timer is not required to be queued.
  624. */
  625. if (gpstate_idx != new_index)
  626. queue_gpstate_timer(gpstates);
  627. else
  628. del_timer_sync(&gpstates->timer);
  629. gpstates_done:
  630. freq_data.gpstate_id = idx_to_pstate(gpstate_idx);
  631. gpstates->last_sampled_time = cur_msec;
  632. gpstates->last_gpstate_idx = gpstate_idx;
  633. gpstates->last_lpstate_idx = new_index;
  634. spin_unlock(&gpstates->gpstate_lock);
  635. /*
  636. * Use smp_call_function to send IPI and execute the
  637. * mtspr on target CPU. We could do that without IPI
  638. * if current CPU is within policy->cpus (core)
  639. */
  640. smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1);
  641. return 0;
  642. }
  643. static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy)
  644. {
  645. int base, i, ret;
  646. struct kernfs_node *kn;
  647. struct global_pstate_info *gpstates;
  648. base = cpu_first_thread_sibling(policy->cpu);
  649. for (i = 0; i < threads_per_core; i++)
  650. cpumask_set_cpu(base + i, policy->cpus);
  651. kn = kernfs_find_and_get(policy->kobj.sd, throttle_attr_grp.name);
  652. if (!kn) {
  653. int ret;
  654. ret = sysfs_create_group(&policy->kobj, &throttle_attr_grp);
  655. if (ret) {
  656. pr_info("Failed to create throttle stats directory for cpu %d\n",
  657. policy->cpu);
  658. return ret;
  659. }
  660. } else {
  661. kernfs_put(kn);
  662. }
  663. gpstates = kzalloc(sizeof(*gpstates), GFP_KERNEL);
  664. if (!gpstates)
  665. return -ENOMEM;
  666. policy->driver_data = gpstates;
  667. /* initialize timer */
  668. init_timer_pinned_deferrable(&gpstates->timer);
  669. gpstates->timer.data = (unsigned long)policy;
  670. gpstates->timer.function = gpstate_timer_handler;
  671. gpstates->timer.expires = jiffies +
  672. msecs_to_jiffies(GPSTATE_TIMER_INTERVAL);
  673. spin_lock_init(&gpstates->gpstate_lock);
  674. ret = cpufreq_table_validate_and_show(policy, powernv_freqs);
  675. if (ret < 0) {
  676. kfree(policy->driver_data);
  677. return ret;
  678. }
  679. policy->fast_switch_possible = true;
  680. return ret;
  681. }
  682. static int powernv_cpufreq_cpu_exit(struct cpufreq_policy *policy)
  683. {
  684. /* timer is deleted in cpufreq_cpu_stop() */
  685. kfree(policy->driver_data);
  686. return 0;
  687. }
  688. static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb,
  689. unsigned long action, void *unused)
  690. {
  691. int cpu;
  692. struct cpufreq_policy cpu_policy;
  693. rebooting = true;
  694. for_each_online_cpu(cpu) {
  695. cpufreq_get_policy(&cpu_policy, cpu);
  696. powernv_cpufreq_target_index(&cpu_policy, get_nominal_index());
  697. }
  698. return NOTIFY_DONE;
  699. }
  700. static struct notifier_block powernv_cpufreq_reboot_nb = {
  701. .notifier_call = powernv_cpufreq_reboot_notifier,
  702. };
  703. void powernv_cpufreq_work_fn(struct work_struct *work)
  704. {
  705. struct chip *chip = container_of(work, struct chip, throttle);
  706. unsigned int cpu;
  707. cpumask_t mask;
  708. get_online_cpus();
  709. cpumask_and(&mask, &chip->mask, cpu_online_mask);
  710. smp_call_function_any(&mask,
  711. powernv_cpufreq_throttle_check, NULL, 0);
  712. if (!chip->restore)
  713. goto out;
  714. chip->restore = false;
  715. for_each_cpu(cpu, &mask) {
  716. int index;
  717. struct cpufreq_policy policy;
  718. cpufreq_get_policy(&policy, cpu);
  719. index = cpufreq_table_find_index_c(&policy, policy.cur);
  720. powernv_cpufreq_target_index(&policy, index);
  721. cpumask_andnot(&mask, &mask, policy.cpus);
  722. }
  723. out:
  724. put_online_cpus();
  725. }
  726. static int powernv_cpufreq_occ_msg(struct notifier_block *nb,
  727. unsigned long msg_type, void *_msg)
  728. {
  729. struct opal_msg *msg = _msg;
  730. struct opal_occ_msg omsg;
  731. int i;
  732. if (msg_type != OPAL_MSG_OCC)
  733. return 0;
  734. omsg.type = be64_to_cpu(msg->params[0]);
  735. switch (omsg.type) {
  736. case OCC_RESET:
  737. occ_reset = true;
  738. pr_info("OCC (On Chip Controller - enforces hard thermal/power limits) Resetting\n");
  739. /*
  740. * powernv_cpufreq_throttle_check() is called in
  741. * target() callback which can detect the throttle state
  742. * for governors like ondemand.
  743. * But static governors will not call target() often thus
  744. * report throttling here.
  745. */
  746. if (!throttled) {
  747. throttled = true;
  748. pr_warn("CPU frequency is throttled for duration\n");
  749. }
  750. break;
  751. case OCC_LOAD:
  752. pr_info("OCC Loading, CPU frequency is throttled until OCC is started\n");
  753. break;
  754. case OCC_THROTTLE:
  755. omsg.chip = be64_to_cpu(msg->params[1]);
  756. omsg.throttle_status = be64_to_cpu(msg->params[2]);
  757. if (occ_reset) {
  758. occ_reset = false;
  759. throttled = false;
  760. pr_info("OCC Active, CPU frequency is no longer throttled\n");
  761. for (i = 0; i < nr_chips; i++) {
  762. chips[i].restore = true;
  763. schedule_work(&chips[i].throttle);
  764. }
  765. return 0;
  766. }
  767. for (i = 0; i < nr_chips; i++)
  768. if (chips[i].id == omsg.chip)
  769. break;
  770. if (omsg.throttle_status >= 0 &&
  771. omsg.throttle_status <= OCC_MAX_THROTTLE_STATUS) {
  772. chips[i].throttle_reason = omsg.throttle_status;
  773. chips[i].reason[omsg.throttle_status]++;
  774. }
  775. if (!omsg.throttle_status)
  776. chips[i].restore = true;
  777. schedule_work(&chips[i].throttle);
  778. }
  779. return 0;
  780. }
  781. static struct notifier_block powernv_cpufreq_opal_nb = {
  782. .notifier_call = powernv_cpufreq_occ_msg,
  783. .next = NULL,
  784. .priority = 0,
  785. };
  786. static void powernv_cpufreq_stop_cpu(struct cpufreq_policy *policy)
  787. {
  788. struct powernv_smp_call_data freq_data;
  789. struct global_pstate_info *gpstates = policy->driver_data;
  790. freq_data.pstate_id = idx_to_pstate(powernv_pstate_info.min);
  791. freq_data.gpstate_id = idx_to_pstate(powernv_pstate_info.min);
  792. smp_call_function_single(policy->cpu, set_pstate, &freq_data, 1);
  793. del_timer_sync(&gpstates->timer);
  794. }
  795. static unsigned int powernv_fast_switch(struct cpufreq_policy *policy,
  796. unsigned int target_freq)
  797. {
  798. int index;
  799. struct powernv_smp_call_data freq_data;
  800. index = cpufreq_table_find_index_dl(policy, target_freq);
  801. freq_data.pstate_id = powernv_freqs[index].driver_data;
  802. freq_data.gpstate_id = powernv_freqs[index].driver_data;
  803. set_pstate(&freq_data);
  804. return powernv_freqs[index].frequency;
  805. }
  806. static struct cpufreq_driver powernv_cpufreq_driver = {
  807. .name = "powernv-cpufreq",
  808. .flags = CPUFREQ_CONST_LOOPS,
  809. .init = powernv_cpufreq_cpu_init,
  810. .exit = powernv_cpufreq_cpu_exit,
  811. .verify = cpufreq_generic_frequency_table_verify,
  812. .target_index = powernv_cpufreq_target_index,
  813. .fast_switch = powernv_fast_switch,
  814. .get = powernv_cpufreq_get,
  815. .stop_cpu = powernv_cpufreq_stop_cpu,
  816. .attr = powernv_cpu_freq_attr,
  817. };
  818. static int init_chip_info(void)
  819. {
  820. unsigned int chip[256];
  821. unsigned int cpu, i;
  822. unsigned int prev_chip_id = UINT_MAX;
  823. for_each_possible_cpu(cpu) {
  824. unsigned int id = cpu_to_chip_id(cpu);
  825. if (prev_chip_id != id) {
  826. prev_chip_id = id;
  827. chip[nr_chips++] = id;
  828. }
  829. }
  830. chips = kcalloc(nr_chips, sizeof(struct chip), GFP_KERNEL);
  831. if (!chips)
  832. return -ENOMEM;
  833. for (i = 0; i < nr_chips; i++) {
  834. chips[i].id = chip[i];
  835. cpumask_copy(&chips[i].mask, cpumask_of_node(chip[i]));
  836. INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn);
  837. for_each_cpu(cpu, &chips[i].mask)
  838. per_cpu(chip_info, cpu) = &chips[i];
  839. }
  840. return 0;
  841. }
  842. static inline void clean_chip_info(void)
  843. {
  844. kfree(chips);
  845. }
  846. static inline void unregister_all_notifiers(void)
  847. {
  848. opal_message_notifier_unregister(OPAL_MSG_OCC,
  849. &powernv_cpufreq_opal_nb);
  850. unregister_reboot_notifier(&powernv_cpufreq_reboot_nb);
  851. }
  852. static int __init powernv_cpufreq_init(void)
  853. {
  854. int rc = 0;
  855. /* Don't probe on pseries (guest) platforms */
  856. if (!firmware_has_feature(FW_FEATURE_OPAL))
  857. return -ENODEV;
  858. /* Discover pstates from device tree and init */
  859. rc = init_powernv_pstates();
  860. if (rc)
  861. goto out;
  862. /* Populate chip info */
  863. rc = init_chip_info();
  864. if (rc)
  865. goto out;
  866. register_reboot_notifier(&powernv_cpufreq_reboot_nb);
  867. opal_message_notifier_register(OPAL_MSG_OCC, &powernv_cpufreq_opal_nb);
  868. rc = cpufreq_register_driver(&powernv_cpufreq_driver);
  869. if (!rc)
  870. return 0;
  871. pr_info("Failed to register the cpufreq driver (%d)\n", rc);
  872. unregister_all_notifiers();
  873. clean_chip_info();
  874. out:
  875. pr_info("Platform driver disabled. System does not support PState control\n");
  876. return rc;
  877. }
  878. module_init(powernv_cpufreq_init);
  879. static void __exit powernv_cpufreq_exit(void)
  880. {
  881. cpufreq_unregister_driver(&powernv_cpufreq_driver);
  882. unregister_all_notifiers();
  883. clean_chip_info();
  884. }
  885. module_exit(powernv_cpufreq_exit);
  886. MODULE_LICENSE("GPL");
  887. MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>");