tpm_tis_core.c 21 KB

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  1. /*
  2. * Copyright (C) 2005, 2006 IBM Corporation
  3. * Copyright (C) 2014, 2015 Intel Corporation
  4. *
  5. * Authors:
  6. * Leendert van Doorn <leendert@watson.ibm.com>
  7. * Kylene Hall <kjhall@us.ibm.com>
  8. *
  9. * Maintained by: <tpmdd-devel@lists.sourceforge.net>
  10. *
  11. * Device driver for TCG/TCPA TPM (trusted platform module).
  12. * Specifications at www.trustedcomputinggroup.org
  13. *
  14. * This device driver implements the TPM interface as defined in
  15. * the TCG TPM Interface Spec version 1.2, revision 1.0.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation, version 2 of the
  20. * License.
  21. */
  22. #include <linux/init.h>
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/pnp.h>
  26. #include <linux/slab.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/wait.h>
  29. #include <linux/acpi.h>
  30. #include <linux/freezer.h>
  31. #include "tpm.h"
  32. #include "tpm_tis_core.h"
  33. /* Before we attempt to access the TPM we must see that the valid bit is set.
  34. * The specification says that this bit is 0 at reset and remains 0 until the
  35. * 'TPM has gone through its self test and initialization and has established
  36. * correct values in the other bits.'
  37. */
  38. static int wait_startup(struct tpm_chip *chip, int l)
  39. {
  40. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  41. unsigned long stop = jiffies + chip->timeout_a;
  42. do {
  43. int rc;
  44. u8 access;
  45. rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
  46. if (rc < 0)
  47. return rc;
  48. if (access & TPM_ACCESS_VALID)
  49. return 0;
  50. msleep(TPM_TIMEOUT);
  51. } while (time_before(jiffies, stop));
  52. return -1;
  53. }
  54. static int check_locality(struct tpm_chip *chip, int l)
  55. {
  56. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  57. int rc;
  58. u8 access;
  59. rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
  60. if (rc < 0)
  61. return rc;
  62. if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
  63. (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
  64. return priv->locality = l;
  65. return -1;
  66. }
  67. static void release_locality(struct tpm_chip *chip, int l, int force)
  68. {
  69. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  70. int rc;
  71. u8 access;
  72. rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
  73. if (rc < 0)
  74. return;
  75. if (force || (access &
  76. (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
  77. (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
  78. tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
  79. }
  80. static int request_locality(struct tpm_chip *chip, int l)
  81. {
  82. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  83. unsigned long stop, timeout;
  84. long rc;
  85. if (check_locality(chip, l) >= 0)
  86. return l;
  87. rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
  88. if (rc < 0)
  89. return rc;
  90. stop = jiffies + chip->timeout_a;
  91. if (chip->flags & TPM_CHIP_FLAG_IRQ) {
  92. again:
  93. timeout = stop - jiffies;
  94. if ((long)timeout <= 0)
  95. return -1;
  96. rc = wait_event_interruptible_timeout(priv->int_queue,
  97. (check_locality
  98. (chip, l) >= 0),
  99. timeout);
  100. if (rc > 0)
  101. return l;
  102. if (rc == -ERESTARTSYS && freezing(current)) {
  103. clear_thread_flag(TIF_SIGPENDING);
  104. goto again;
  105. }
  106. } else {
  107. /* wait for burstcount */
  108. do {
  109. if (check_locality(chip, l) >= 0)
  110. return l;
  111. msleep(TPM_TIMEOUT);
  112. } while (time_before(jiffies, stop));
  113. }
  114. return -1;
  115. }
  116. static u8 tpm_tis_status(struct tpm_chip *chip)
  117. {
  118. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  119. int rc;
  120. u8 status;
  121. rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status);
  122. if (rc < 0)
  123. return 0;
  124. return status;
  125. }
  126. static void tpm_tis_ready(struct tpm_chip *chip)
  127. {
  128. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  129. /* this causes the current command to be aborted */
  130. tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
  131. }
  132. static int get_burstcount(struct tpm_chip *chip)
  133. {
  134. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  135. unsigned long stop;
  136. int burstcnt, rc;
  137. u32 value;
  138. /* wait for burstcount */
  139. /* which timeout value, spec has 2 answers (c & d) */
  140. stop = jiffies + chip->timeout_d;
  141. do {
  142. rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value);
  143. if (rc < 0)
  144. return rc;
  145. burstcnt = (value >> 8) & 0xFFFF;
  146. if (burstcnt)
  147. return burstcnt;
  148. msleep(TPM_TIMEOUT);
  149. } while (time_before(jiffies, stop));
  150. return -EBUSY;
  151. }
  152. static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
  153. {
  154. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  155. int size = 0, burstcnt, rc;
  156. while (size < count) {
  157. rc = wait_for_tpm_stat(chip,
  158. TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  159. chip->timeout_c,
  160. &priv->read_queue, true);
  161. if (rc < 0)
  162. return rc;
  163. burstcnt = get_burstcount(chip);
  164. if (burstcnt < 0) {
  165. dev_err(&chip->dev, "Unable to read burstcount\n");
  166. return burstcnt;
  167. }
  168. burstcnt = min_t(int, burstcnt, count - size);
  169. rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
  170. burstcnt, buf + size);
  171. if (rc < 0)
  172. return rc;
  173. size += burstcnt;
  174. }
  175. return size;
  176. }
  177. static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
  178. {
  179. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  180. int size = 0;
  181. int expected, status;
  182. if (count < TPM_HEADER_SIZE) {
  183. size = -EIO;
  184. goto out;
  185. }
  186. size = recv_data(chip, buf, TPM_HEADER_SIZE);
  187. /* read first 10 bytes, including tag, paramsize, and result */
  188. if (size < TPM_HEADER_SIZE) {
  189. dev_err(&chip->dev, "Unable to read header\n");
  190. goto out;
  191. }
  192. expected = be32_to_cpu(*(__be32 *) (buf + 2));
  193. if (expected > count) {
  194. size = -EIO;
  195. goto out;
  196. }
  197. size += recv_data(chip, &buf[TPM_HEADER_SIZE],
  198. expected - TPM_HEADER_SIZE);
  199. if (size < expected) {
  200. dev_err(&chip->dev, "Unable to read remainder of result\n");
  201. size = -ETIME;
  202. goto out;
  203. }
  204. if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
  205. &priv->int_queue, false) < 0) {
  206. size = -ETIME;
  207. goto out;
  208. }
  209. status = tpm_tis_status(chip);
  210. if (status & TPM_STS_DATA_AVAIL) { /* retry? */
  211. dev_err(&chip->dev, "Error left over data\n");
  212. size = -EIO;
  213. goto out;
  214. }
  215. out:
  216. tpm_tis_ready(chip);
  217. release_locality(chip, priv->locality, 0);
  218. return size;
  219. }
  220. /*
  221. * If interrupts are used (signaled by an irq set in the vendor structure)
  222. * tpm.c can skip polling for the data to be available as the interrupt is
  223. * waited for here
  224. */
  225. static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
  226. {
  227. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  228. int rc, status, burstcnt;
  229. size_t count = 0;
  230. bool itpm = priv->flags & TPM_TIS_ITPM_POSSIBLE;
  231. if (request_locality(chip, 0) < 0)
  232. return -EBUSY;
  233. status = tpm_tis_status(chip);
  234. if ((status & TPM_STS_COMMAND_READY) == 0) {
  235. tpm_tis_ready(chip);
  236. if (wait_for_tpm_stat
  237. (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
  238. &priv->int_queue, false) < 0) {
  239. rc = -ETIME;
  240. goto out_err;
  241. }
  242. }
  243. while (count < len - 1) {
  244. burstcnt = get_burstcount(chip);
  245. if (burstcnt < 0) {
  246. dev_err(&chip->dev, "Unable to read burstcount\n");
  247. rc = burstcnt;
  248. goto out_err;
  249. }
  250. burstcnt = min_t(int, burstcnt, len - count - 1);
  251. rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
  252. burstcnt, buf + count);
  253. if (rc < 0)
  254. goto out_err;
  255. count += burstcnt;
  256. if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
  257. &priv->int_queue, false) < 0) {
  258. rc = -ETIME;
  259. goto out_err;
  260. }
  261. status = tpm_tis_status(chip);
  262. if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
  263. rc = -EIO;
  264. goto out_err;
  265. }
  266. }
  267. /* write last byte */
  268. rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
  269. if (rc < 0)
  270. goto out_err;
  271. if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
  272. &priv->int_queue, false) < 0) {
  273. rc = -ETIME;
  274. goto out_err;
  275. }
  276. status = tpm_tis_status(chip);
  277. if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) {
  278. rc = -EIO;
  279. goto out_err;
  280. }
  281. return 0;
  282. out_err:
  283. tpm_tis_ready(chip);
  284. release_locality(chip, priv->locality, 0);
  285. return rc;
  286. }
  287. static void disable_interrupts(struct tpm_chip *chip)
  288. {
  289. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  290. u32 intmask;
  291. int rc;
  292. rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
  293. if (rc < 0)
  294. intmask = 0;
  295. intmask &= ~TPM_GLOBAL_INT_ENABLE;
  296. rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
  297. devm_free_irq(chip->dev.parent, priv->irq, chip);
  298. priv->irq = 0;
  299. chip->flags &= ~TPM_CHIP_FLAG_IRQ;
  300. }
  301. /*
  302. * If interrupts are used (signaled by an irq set in the vendor structure)
  303. * tpm.c can skip polling for the data to be available as the interrupt is
  304. * waited for here
  305. */
  306. static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
  307. {
  308. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  309. int rc;
  310. u32 ordinal;
  311. unsigned long dur;
  312. rc = tpm_tis_send_data(chip, buf, len);
  313. if (rc < 0)
  314. return rc;
  315. /* go and do it */
  316. rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
  317. if (rc < 0)
  318. goto out_err;
  319. if (chip->flags & TPM_CHIP_FLAG_IRQ) {
  320. ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
  321. if (chip->flags & TPM_CHIP_FLAG_TPM2)
  322. dur = tpm2_calc_ordinal_duration(chip, ordinal);
  323. else
  324. dur = tpm_calc_ordinal_duration(chip, ordinal);
  325. if (wait_for_tpm_stat
  326. (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
  327. &priv->read_queue, false) < 0) {
  328. rc = -ETIME;
  329. goto out_err;
  330. }
  331. }
  332. return len;
  333. out_err:
  334. tpm_tis_ready(chip);
  335. release_locality(chip, priv->locality, 0);
  336. return rc;
  337. }
  338. static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
  339. {
  340. int rc, irq;
  341. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  342. if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
  343. return tpm_tis_send_main(chip, buf, len);
  344. /* Verify receipt of the expected IRQ */
  345. irq = priv->irq;
  346. priv->irq = 0;
  347. chip->flags &= ~TPM_CHIP_FLAG_IRQ;
  348. rc = tpm_tis_send_main(chip, buf, len);
  349. priv->irq = irq;
  350. chip->flags |= TPM_CHIP_FLAG_IRQ;
  351. if (!priv->irq_tested)
  352. msleep(1);
  353. if (!priv->irq_tested)
  354. disable_interrupts(chip);
  355. priv->irq_tested = true;
  356. return rc;
  357. }
  358. struct tis_vendor_timeout_override {
  359. u32 did_vid;
  360. unsigned long timeout_us[4];
  361. };
  362. static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
  363. /* Atmel 3204 */
  364. { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
  365. (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
  366. };
  367. static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
  368. unsigned long *timeout_cap)
  369. {
  370. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  371. int i, rc;
  372. u32 did_vid;
  373. rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
  374. if (rc < 0)
  375. return rc;
  376. for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
  377. if (vendor_timeout_overrides[i].did_vid != did_vid)
  378. continue;
  379. memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
  380. sizeof(vendor_timeout_overrides[i].timeout_us));
  381. return true;
  382. }
  383. return false;
  384. }
  385. /*
  386. * Early probing for iTPM with STS_DATA_EXPECT flaw.
  387. * Try sending command without itpm flag set and if that
  388. * fails, repeat with itpm flag set.
  389. */
  390. static int probe_itpm(struct tpm_chip *chip)
  391. {
  392. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  393. int rc = 0;
  394. u8 cmd_getticks[] = {
  395. 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
  396. 0x00, 0x00, 0x00, 0xf1
  397. };
  398. size_t len = sizeof(cmd_getticks);
  399. u16 vendor;
  400. rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor);
  401. if (rc < 0)
  402. return rc;
  403. /* probe only iTPMS */
  404. if (vendor != TPM_VID_INTEL)
  405. return 0;
  406. rc = tpm_tis_send_data(chip, cmd_getticks, len);
  407. if (rc == 0)
  408. goto out;
  409. tpm_tis_ready(chip);
  410. release_locality(chip, priv->locality, 0);
  411. rc = tpm_tis_send_data(chip, cmd_getticks, len);
  412. if (rc == 0) {
  413. dev_info(&chip->dev, "Detected an iTPM.\n");
  414. rc = 1;
  415. } else
  416. rc = -EFAULT;
  417. out:
  418. tpm_tis_ready(chip);
  419. release_locality(chip, priv->locality, 0);
  420. return rc;
  421. }
  422. static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
  423. {
  424. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  425. switch (priv->manufacturer_id) {
  426. case TPM_VID_WINBOND:
  427. return ((status == TPM_STS_VALID) ||
  428. (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
  429. case TPM_VID_STM:
  430. return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
  431. default:
  432. return (status == TPM_STS_COMMAND_READY);
  433. }
  434. }
  435. static irqreturn_t tis_int_handler(int dummy, void *dev_id)
  436. {
  437. struct tpm_chip *chip = dev_id;
  438. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  439. u32 interrupt;
  440. int i, rc;
  441. rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
  442. if (rc < 0)
  443. return IRQ_NONE;
  444. if (interrupt == 0)
  445. return IRQ_NONE;
  446. priv->irq_tested = true;
  447. if (interrupt & TPM_INTF_DATA_AVAIL_INT)
  448. wake_up_interruptible(&priv->read_queue);
  449. if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
  450. for (i = 0; i < 5; i++)
  451. if (check_locality(chip, i) >= 0)
  452. break;
  453. if (interrupt &
  454. (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
  455. TPM_INTF_CMD_READY_INT))
  456. wake_up_interruptible(&priv->int_queue);
  457. /* Clear interrupts handled with TPM_EOI */
  458. rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
  459. if (rc < 0)
  460. return IRQ_NONE;
  461. tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
  462. return IRQ_HANDLED;
  463. }
  464. static int tpm_tis_gen_interrupt(struct tpm_chip *chip)
  465. {
  466. const char *desc = "attempting to generate an interrupt";
  467. u32 cap2;
  468. cap_t cap;
  469. if (chip->flags & TPM_CHIP_FLAG_TPM2)
  470. return tpm2_get_tpm_pt(chip, 0x100, &cap2, desc);
  471. else
  472. return tpm_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc);
  473. }
  474. /* Register the IRQ and issue a command that will cause an interrupt. If an
  475. * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
  476. * everything and leave in polling mode. Returns 0 on success.
  477. */
  478. static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
  479. int flags, int irq)
  480. {
  481. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  482. u8 original_int_vec;
  483. int rc;
  484. u32 int_status;
  485. if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags,
  486. dev_name(&chip->dev), chip) != 0) {
  487. dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
  488. irq);
  489. return -1;
  490. }
  491. priv->irq = irq;
  492. rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
  493. &original_int_vec);
  494. if (rc < 0)
  495. return rc;
  496. rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
  497. if (rc < 0)
  498. return rc;
  499. rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
  500. if (rc < 0)
  501. return rc;
  502. /* Clear all existing */
  503. rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
  504. if (rc < 0)
  505. return rc;
  506. /* Turn on */
  507. rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality),
  508. intmask | TPM_GLOBAL_INT_ENABLE);
  509. if (rc < 0)
  510. return rc;
  511. priv->irq_tested = false;
  512. /* Generate an interrupt by having the core call through to
  513. * tpm_tis_send
  514. */
  515. rc = tpm_tis_gen_interrupt(chip);
  516. if (rc < 0)
  517. return rc;
  518. /* tpm_tis_send will either confirm the interrupt is working or it
  519. * will call disable_irq which undoes all of the above.
  520. */
  521. if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
  522. rc = tpm_tis_write8(priv, original_int_vec,
  523. TPM_INT_VECTOR(priv->locality));
  524. if (rc < 0)
  525. return rc;
  526. return 1;
  527. }
  528. return 0;
  529. }
  530. /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
  531. * do not have ACPI/etc. We typically expect the interrupt to be declared if
  532. * present.
  533. */
  534. static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
  535. {
  536. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  537. u8 original_int_vec;
  538. int i, rc;
  539. rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
  540. &original_int_vec);
  541. if (rc < 0)
  542. return;
  543. if (!original_int_vec) {
  544. if (IS_ENABLED(CONFIG_X86))
  545. for (i = 3; i <= 15; i++)
  546. if (!tpm_tis_probe_irq_single(chip, intmask, 0,
  547. i))
  548. return;
  549. } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
  550. original_int_vec))
  551. return;
  552. }
  553. void tpm_tis_remove(struct tpm_chip *chip)
  554. {
  555. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  556. u32 reg = TPM_INT_ENABLE(priv->locality);
  557. u32 interrupt;
  558. int rc;
  559. rc = tpm_tis_read32(priv, reg, &interrupt);
  560. if (rc < 0)
  561. interrupt = 0;
  562. tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
  563. release_locality(chip, priv->locality, 1);
  564. }
  565. EXPORT_SYMBOL_GPL(tpm_tis_remove);
  566. static const struct tpm_class_ops tpm_tis = {
  567. .flags = TPM_OPS_AUTO_STARTUP,
  568. .status = tpm_tis_status,
  569. .recv = tpm_tis_recv,
  570. .send = tpm_tis_send,
  571. .cancel = tpm_tis_ready,
  572. .update_timeouts = tpm_tis_update_timeouts,
  573. .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  574. .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  575. .req_canceled = tpm_tis_req_canceled,
  576. };
  577. int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
  578. const struct tpm_tis_phy_ops *phy_ops,
  579. acpi_handle acpi_dev_handle)
  580. {
  581. u32 vendor, intfcaps, intmask;
  582. u8 rid;
  583. int rc, probe;
  584. struct tpm_chip *chip;
  585. chip = tpmm_chip_alloc(dev, &tpm_tis);
  586. if (IS_ERR(chip))
  587. return PTR_ERR(chip);
  588. #ifdef CONFIG_ACPI
  589. chip->acpi_dev_handle = acpi_dev_handle;
  590. #endif
  591. /* Maximum timeouts */
  592. chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX);
  593. chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX);
  594. chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX);
  595. chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX);
  596. priv->phy_ops = phy_ops;
  597. dev_set_drvdata(&chip->dev, priv);
  598. if (wait_startup(chip, 0) != 0) {
  599. rc = -ENODEV;
  600. goto out_err;
  601. }
  602. /* Take control of the TPM's interrupt hardware and shut it off */
  603. rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
  604. if (rc < 0)
  605. goto out_err;
  606. intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
  607. TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
  608. intmask &= ~TPM_GLOBAL_INT_ENABLE;
  609. tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
  610. if (request_locality(chip, 0) != 0) {
  611. rc = -ENODEV;
  612. goto out_err;
  613. }
  614. rc = tpm2_probe(chip);
  615. if (rc)
  616. goto out_err;
  617. rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor);
  618. if (rc < 0)
  619. goto out_err;
  620. priv->manufacturer_id = vendor;
  621. rc = tpm_tis_read8(priv, TPM_RID(0), &rid);
  622. if (rc < 0)
  623. goto out_err;
  624. dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
  625. (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
  626. vendor >> 16, rid);
  627. if (!(priv->flags & TPM_TIS_ITPM_POSSIBLE)) {
  628. probe = probe_itpm(chip);
  629. if (probe < 0) {
  630. rc = -ENODEV;
  631. goto out_err;
  632. }
  633. if (!!probe)
  634. priv->flags |= TPM_TIS_ITPM_POSSIBLE;
  635. }
  636. /* Figure out the capabilities */
  637. rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
  638. if (rc < 0)
  639. goto out_err;
  640. dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
  641. intfcaps);
  642. if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
  643. dev_dbg(dev, "\tBurst Count Static\n");
  644. if (intfcaps & TPM_INTF_CMD_READY_INT)
  645. dev_dbg(dev, "\tCommand Ready Int Support\n");
  646. if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
  647. dev_dbg(dev, "\tInterrupt Edge Falling\n");
  648. if (intfcaps & TPM_INTF_INT_EDGE_RISING)
  649. dev_dbg(dev, "\tInterrupt Edge Rising\n");
  650. if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
  651. dev_dbg(dev, "\tInterrupt Level Low\n");
  652. if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
  653. dev_dbg(dev, "\tInterrupt Level High\n");
  654. if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
  655. dev_dbg(dev, "\tLocality Change Int Support\n");
  656. if (intfcaps & TPM_INTF_STS_VALID_INT)
  657. dev_dbg(dev, "\tSts Valid Int Support\n");
  658. if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
  659. dev_dbg(dev, "\tData Avail Int Support\n");
  660. /* INTERRUPT Setup */
  661. init_waitqueue_head(&priv->read_queue);
  662. init_waitqueue_head(&priv->int_queue);
  663. if (irq != -1) {
  664. /* Before doing irq testing issue a command to the TPM in polling mode
  665. * to make sure it works. May as well use that command to set the
  666. * proper timeouts for the driver.
  667. */
  668. if (tpm_get_timeouts(chip)) {
  669. dev_err(dev, "Could not get TPM timeouts and durations\n");
  670. rc = -ENODEV;
  671. goto out_err;
  672. }
  673. if (irq) {
  674. tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
  675. irq);
  676. if (!(chip->flags & TPM_CHIP_FLAG_IRQ))
  677. dev_err(&chip->dev, FW_BUG
  678. "TPM interrupt not working, polling instead\n");
  679. } else {
  680. tpm_tis_probe_irq(chip, intmask);
  681. }
  682. }
  683. return tpm_chip_register(chip);
  684. out_err:
  685. tpm_tis_remove(chip);
  686. return rc;
  687. }
  688. EXPORT_SYMBOL_GPL(tpm_tis_core_init);
  689. #ifdef CONFIG_PM_SLEEP
  690. static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
  691. {
  692. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  693. u32 intmask;
  694. int rc;
  695. /* reenable interrupts that device may have lost or
  696. * BIOS/firmware may have disabled
  697. */
  698. rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
  699. if (rc < 0)
  700. return;
  701. rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
  702. if (rc < 0)
  703. return;
  704. intmask |= TPM_INTF_CMD_READY_INT
  705. | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
  706. | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
  707. tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
  708. }
  709. int tpm_tis_resume(struct device *dev)
  710. {
  711. struct tpm_chip *chip = dev_get_drvdata(dev);
  712. int ret;
  713. if (chip->flags & TPM_CHIP_FLAG_IRQ)
  714. tpm_tis_reenable_interrupts(chip);
  715. ret = tpm_pm_resume(dev);
  716. if (ret)
  717. return ret;
  718. /* TPM 1.2 requires self-test on resume. This function actually returns
  719. * an error code but for unknown reason it isn't handled.
  720. */
  721. if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
  722. tpm_do_selftest(chip);
  723. return 0;
  724. }
  725. EXPORT_SYMBOL_GPL(tpm_tis_resume);
  726. #endif
  727. MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
  728. MODULE_DESCRIPTION("TPM Driver");
  729. MODULE_VERSION("2.0");
  730. MODULE_LICENSE("GPL");