amd-rng.c 4.2 KB

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  1. /*
  2. * RNG driver for AMD RNGs
  3. *
  4. * Copyright 2005 (c) MontaVista Software, Inc.
  5. *
  6. * with the majority of the code coming from:
  7. *
  8. * Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG)
  9. * (c) Copyright 2003 Red Hat Inc <jgarzik@redhat.com>
  10. *
  11. * derived from
  12. *
  13. * Hardware driver for the AMD 768 Random Number Generator (RNG)
  14. * (c) Copyright 2001 Red Hat Inc
  15. *
  16. * derived from
  17. *
  18. * Hardware driver for Intel i810 Random Number Generator (RNG)
  19. * Copyright 2000,2001 Jeff Garzik <jgarzik@pobox.com>
  20. * Copyright 2000,2001 Philipp Rumpf <prumpf@mandrakesoft.com>
  21. *
  22. * This file is licensed under the terms of the GNU General Public
  23. * License version 2. This program is licensed "as is" without any
  24. * warranty of any kind, whether express or implied.
  25. */
  26. #include <linux/delay.h>
  27. #include <linux/hw_random.h>
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/pci.h>
  31. #define DRV_NAME "AMD768-HWRNG"
  32. #define RNGDATA 0x00
  33. #define RNGDONE 0x04
  34. #define PMBASE_OFFSET 0xF0
  35. #define PMBASE_SIZE 8
  36. /*
  37. * Data for PCI driver interface
  38. *
  39. * This data only exists for exporting the supported
  40. * PCI ids via MODULE_DEVICE_TABLE. We do not actually
  41. * register a pci_driver, because someone else might one day
  42. * want to register another driver on the same PCI id.
  43. */
  44. static const struct pci_device_id pci_tbl[] = {
  45. { PCI_VDEVICE(AMD, 0x7443), 0, },
  46. { PCI_VDEVICE(AMD, 0x746b), 0, },
  47. { 0, }, /* terminate list */
  48. };
  49. MODULE_DEVICE_TABLE(pci, pci_tbl);
  50. struct amd768_priv {
  51. void __iomem *iobase;
  52. struct pci_dev *pcidev;
  53. };
  54. static int amd_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
  55. {
  56. u32 *data = buf;
  57. struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
  58. size_t read = 0;
  59. /* We will wait at maximum one time per read */
  60. int timeout = max / 4 + 1;
  61. /*
  62. * RNG data is available when RNGDONE is set to 1
  63. * New random numbers are generated approximately 128 microseconds
  64. * after RNGDATA is read
  65. */
  66. while (read < max) {
  67. if (ioread32(priv->iobase + RNGDONE) == 0) {
  68. if (wait) {
  69. /* Delay given by datasheet */
  70. usleep_range(128, 196);
  71. if (timeout-- == 0)
  72. return read;
  73. } else {
  74. return 0;
  75. }
  76. } else {
  77. *data = ioread32(priv->iobase + RNGDATA);
  78. data++;
  79. read += 4;
  80. }
  81. }
  82. return read;
  83. }
  84. static int amd_rng_init(struct hwrng *rng)
  85. {
  86. struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
  87. u8 rnen;
  88. pci_read_config_byte(priv->pcidev, 0x40, &rnen);
  89. rnen |= BIT(7); /* RNG on */
  90. pci_write_config_byte(priv->pcidev, 0x40, rnen);
  91. pci_read_config_byte(priv->pcidev, 0x41, &rnen);
  92. rnen |= BIT(7); /* PMIO enable */
  93. pci_write_config_byte(priv->pcidev, 0x41, rnen);
  94. return 0;
  95. }
  96. static void amd_rng_cleanup(struct hwrng *rng)
  97. {
  98. struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
  99. u8 rnen;
  100. pci_read_config_byte(priv->pcidev, 0x40, &rnen);
  101. rnen &= ~BIT(7); /* RNG off */
  102. pci_write_config_byte(priv->pcidev, 0x40, rnen);
  103. }
  104. static struct hwrng amd_rng = {
  105. .name = "amd",
  106. .init = amd_rng_init,
  107. .cleanup = amd_rng_cleanup,
  108. .read = amd_rng_read,
  109. };
  110. static int __init mod_init(void)
  111. {
  112. int err = -ENODEV;
  113. struct pci_dev *pdev = NULL;
  114. const struct pci_device_id *ent;
  115. u32 pmbase;
  116. struct amd768_priv *priv;
  117. for_each_pci_dev(pdev) {
  118. ent = pci_match_id(pci_tbl, pdev);
  119. if (ent)
  120. goto found;
  121. }
  122. /* Device not found. */
  123. return -ENODEV;
  124. found:
  125. err = pci_read_config_dword(pdev, 0x58, &pmbase);
  126. if (err)
  127. return err;
  128. pmbase &= 0x0000FF00;
  129. if (pmbase == 0)
  130. return -EIO;
  131. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  132. if (!priv)
  133. return -ENOMEM;
  134. if (!devm_request_region(&pdev->dev, pmbase + PMBASE_OFFSET,
  135. PMBASE_SIZE, DRV_NAME)) {
  136. dev_err(&pdev->dev, DRV_NAME " region 0x%x already in use!\n",
  137. pmbase + 0xF0);
  138. return -EBUSY;
  139. }
  140. priv->iobase = devm_ioport_map(&pdev->dev, pmbase + PMBASE_OFFSET,
  141. PMBASE_SIZE);
  142. if (!priv->iobase) {
  143. pr_err(DRV_NAME "Cannot map ioport\n");
  144. return -ENOMEM;
  145. }
  146. amd_rng.priv = (unsigned long)priv;
  147. priv->pcidev = pdev;
  148. pr_info(DRV_NAME " detected\n");
  149. return devm_hwrng_register(&pdev->dev, &amd_rng);
  150. }
  151. static void __exit mod_exit(void)
  152. {
  153. }
  154. module_init(mod_init);
  155. module_exit(mod_exit);
  156. MODULE_AUTHOR("The Linux Kernel team");
  157. MODULE_DESCRIPTION("H/W RNG driver for AMD chipsets");
  158. MODULE_LICENSE("GPL");