tlb_uv.c 58 KB

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  1. /*
  2. * SGI UltraViolet TLB flush routines.
  3. *
  4. * (c) 2008-2014 Cliff Wickman <cpw@sgi.com>, SGI.
  5. *
  6. * This code is released under the GNU General Public License version 2 or
  7. * later.
  8. */
  9. #include <linux/seq_file.h>
  10. #include <linux/proc_fs.h>
  11. #include <linux/debugfs.h>
  12. #include <linux/kernel.h>
  13. #include <linux/slab.h>
  14. #include <linux/delay.h>
  15. #include <asm/mmu_context.h>
  16. #include <asm/uv/uv.h>
  17. #include <asm/uv/uv_mmrs.h>
  18. #include <asm/uv/uv_hub.h>
  19. #include <asm/uv/uv_bau.h>
  20. #include <asm/apic.h>
  21. #include <asm/tsc.h>
  22. #include <asm/irq_vectors.h>
  23. #include <asm/timer.h>
  24. static struct bau_operations ops;
  25. static struct bau_operations uv123_bau_ops = {
  26. .bau_gpa_to_offset = uv_gpa_to_offset,
  27. .read_l_sw_ack = read_mmr_sw_ack,
  28. .read_g_sw_ack = read_gmmr_sw_ack,
  29. .write_l_sw_ack = write_mmr_sw_ack,
  30. .write_g_sw_ack = write_gmmr_sw_ack,
  31. .write_payload_first = write_mmr_payload_first,
  32. .write_payload_last = write_mmr_payload_last,
  33. };
  34. static struct bau_operations uv4_bau_ops = {
  35. .bau_gpa_to_offset = uv_gpa_to_soc_phys_ram,
  36. .read_l_sw_ack = read_mmr_proc_sw_ack,
  37. .read_g_sw_ack = read_gmmr_proc_sw_ack,
  38. .write_l_sw_ack = write_mmr_proc_sw_ack,
  39. .write_g_sw_ack = write_gmmr_proc_sw_ack,
  40. .write_payload_first = write_mmr_proc_payload_first,
  41. .write_payload_last = write_mmr_proc_payload_last,
  42. };
  43. /* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
  44. static int timeout_base_ns[] = {
  45. 20,
  46. 160,
  47. 1280,
  48. 10240,
  49. 81920,
  50. 655360,
  51. 5242880,
  52. 167772160
  53. };
  54. static int timeout_us;
  55. static bool nobau = true;
  56. static int nobau_perm;
  57. static cycles_t congested_cycles;
  58. /* tunables: */
  59. static int max_concurr = MAX_BAU_CONCURRENT;
  60. static int max_concurr_const = MAX_BAU_CONCURRENT;
  61. static int plugged_delay = PLUGGED_DELAY;
  62. static int plugsb4reset = PLUGSB4RESET;
  63. static int giveup_limit = GIVEUP_LIMIT;
  64. static int timeoutsb4reset = TIMEOUTSB4RESET;
  65. static int ipi_reset_limit = IPI_RESET_LIMIT;
  66. static int complete_threshold = COMPLETE_THRESHOLD;
  67. static int congested_respns_us = CONGESTED_RESPONSE_US;
  68. static int congested_reps = CONGESTED_REPS;
  69. static int disabled_period = DISABLED_PERIOD;
  70. static struct tunables tunables[] = {
  71. {&max_concurr, MAX_BAU_CONCURRENT}, /* must be [0] */
  72. {&plugged_delay, PLUGGED_DELAY},
  73. {&plugsb4reset, PLUGSB4RESET},
  74. {&timeoutsb4reset, TIMEOUTSB4RESET},
  75. {&ipi_reset_limit, IPI_RESET_LIMIT},
  76. {&complete_threshold, COMPLETE_THRESHOLD},
  77. {&congested_respns_us, CONGESTED_RESPONSE_US},
  78. {&congested_reps, CONGESTED_REPS},
  79. {&disabled_period, DISABLED_PERIOD},
  80. {&giveup_limit, GIVEUP_LIMIT}
  81. };
  82. static struct dentry *tunables_dir;
  83. static struct dentry *tunables_file;
  84. /* these correspond to the statistics printed by ptc_seq_show() */
  85. static char *stat_description[] = {
  86. "sent: number of shootdown messages sent",
  87. "stime: time spent sending messages",
  88. "numuvhubs: number of hubs targeted with shootdown",
  89. "numuvhubs16: number times 16 or more hubs targeted",
  90. "numuvhubs8: number times 8 or more hubs targeted",
  91. "numuvhubs4: number times 4 or more hubs targeted",
  92. "numuvhubs2: number times 2 or more hubs targeted",
  93. "numuvhubs1: number times 1 hub targeted",
  94. "numcpus: number of cpus targeted with shootdown",
  95. "dto: number of destination timeouts",
  96. "retries: destination timeout retries sent",
  97. "rok: : destination timeouts successfully retried",
  98. "resetp: ipi-style resource resets for plugs",
  99. "resett: ipi-style resource resets for timeouts",
  100. "giveup: fall-backs to ipi-style shootdowns",
  101. "sto: number of source timeouts",
  102. "bz: number of stay-busy's",
  103. "throt: number times spun in throttle",
  104. "swack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE",
  105. "recv: shootdown messages received",
  106. "rtime: time spent processing messages",
  107. "all: shootdown all-tlb messages",
  108. "one: shootdown one-tlb messages",
  109. "mult: interrupts that found multiple messages",
  110. "none: interrupts that found no messages",
  111. "retry: number of retry messages processed",
  112. "canc: number messages canceled by retries",
  113. "nocan: number retries that found nothing to cancel",
  114. "reset: number of ipi-style reset requests processed",
  115. "rcan: number messages canceled by reset requests",
  116. "disable: number times use of the BAU was disabled",
  117. "enable: number times use of the BAU was re-enabled"
  118. };
  119. static int __init setup_bau(char *arg)
  120. {
  121. int result;
  122. if (!arg)
  123. return -EINVAL;
  124. result = strtobool(arg, &nobau);
  125. if (result)
  126. return result;
  127. /* we need to flip the logic here, so that bau=y sets nobau to false */
  128. nobau = !nobau;
  129. if (!nobau)
  130. pr_info("UV BAU Enabled\n");
  131. else
  132. pr_info("UV BAU Disabled\n");
  133. return 0;
  134. }
  135. early_param("bau", setup_bau);
  136. /* base pnode in this partition */
  137. static int uv_base_pnode __read_mostly;
  138. static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
  139. static DEFINE_PER_CPU(struct bau_control, bau_control);
  140. static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
  141. static void
  142. set_bau_on(void)
  143. {
  144. int cpu;
  145. struct bau_control *bcp;
  146. if (nobau_perm) {
  147. pr_info("BAU not initialized; cannot be turned on\n");
  148. return;
  149. }
  150. nobau = false;
  151. for_each_present_cpu(cpu) {
  152. bcp = &per_cpu(bau_control, cpu);
  153. bcp->nobau = false;
  154. }
  155. pr_info("BAU turned on\n");
  156. return;
  157. }
  158. static void
  159. set_bau_off(void)
  160. {
  161. int cpu;
  162. struct bau_control *bcp;
  163. nobau = true;
  164. for_each_present_cpu(cpu) {
  165. bcp = &per_cpu(bau_control, cpu);
  166. bcp->nobau = true;
  167. }
  168. pr_info("BAU turned off\n");
  169. return;
  170. }
  171. /*
  172. * Determine the first node on a uvhub. 'Nodes' are used for kernel
  173. * memory allocation.
  174. */
  175. static int __init uvhub_to_first_node(int uvhub)
  176. {
  177. int node, b;
  178. for_each_online_node(node) {
  179. b = uv_node_to_blade_id(node);
  180. if (uvhub == b)
  181. return node;
  182. }
  183. return -1;
  184. }
  185. /*
  186. * Determine the apicid of the first cpu on a uvhub.
  187. */
  188. static int __init uvhub_to_first_apicid(int uvhub)
  189. {
  190. int cpu;
  191. for_each_present_cpu(cpu)
  192. if (uvhub == uv_cpu_to_blade_id(cpu))
  193. return per_cpu(x86_cpu_to_apicid, cpu);
  194. return -1;
  195. }
  196. /*
  197. * Free a software acknowledge hardware resource by clearing its Pending
  198. * bit. This will return a reply to the sender.
  199. * If the message has timed out, a reply has already been sent by the
  200. * hardware but the resource has not been released. In that case our
  201. * clear of the Timeout bit (as well) will free the resource. No reply will
  202. * be sent (the hardware will only do one reply per message).
  203. */
  204. static void reply_to_message(struct msg_desc *mdp, struct bau_control *bcp,
  205. int do_acknowledge)
  206. {
  207. unsigned long dw;
  208. struct bau_pq_entry *msg;
  209. msg = mdp->msg;
  210. if (!msg->canceled && do_acknowledge) {
  211. dw = (msg->swack_vec << UV_SW_ACK_NPENDING) | msg->swack_vec;
  212. ops.write_l_sw_ack(dw);
  213. }
  214. msg->replied_to = 1;
  215. msg->swack_vec = 0;
  216. }
  217. /*
  218. * Process the receipt of a RETRY message
  219. */
  220. static void bau_process_retry_msg(struct msg_desc *mdp,
  221. struct bau_control *bcp)
  222. {
  223. int i;
  224. int cancel_count = 0;
  225. unsigned long msg_res;
  226. unsigned long mmr = 0;
  227. struct bau_pq_entry *msg = mdp->msg;
  228. struct bau_pq_entry *msg2;
  229. struct ptc_stats *stat = bcp->statp;
  230. stat->d_retries++;
  231. /*
  232. * cancel any message from msg+1 to the retry itself
  233. */
  234. for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
  235. if (msg2 > mdp->queue_last)
  236. msg2 = mdp->queue_first;
  237. if (msg2 == msg)
  238. break;
  239. /* same conditions for cancellation as do_reset */
  240. if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
  241. (msg2->swack_vec) && ((msg2->swack_vec &
  242. msg->swack_vec) == 0) &&
  243. (msg2->sending_cpu == msg->sending_cpu) &&
  244. (msg2->msg_type != MSG_NOOP)) {
  245. mmr = ops.read_l_sw_ack();
  246. msg_res = msg2->swack_vec;
  247. /*
  248. * This is a message retry; clear the resources held
  249. * by the previous message only if they timed out.
  250. * If it has not timed out we have an unexpected
  251. * situation to report.
  252. */
  253. if (mmr & (msg_res << UV_SW_ACK_NPENDING)) {
  254. unsigned long mr;
  255. /*
  256. * Is the resource timed out?
  257. * Make everyone ignore the cancelled message.
  258. */
  259. msg2->canceled = 1;
  260. stat->d_canceled++;
  261. cancel_count++;
  262. mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
  263. ops.write_l_sw_ack(mr);
  264. }
  265. }
  266. }
  267. if (!cancel_count)
  268. stat->d_nocanceled++;
  269. }
  270. /*
  271. * Do all the things a cpu should do for a TLB shootdown message.
  272. * Other cpu's may come here at the same time for this message.
  273. */
  274. static void bau_process_message(struct msg_desc *mdp, struct bau_control *bcp,
  275. int do_acknowledge)
  276. {
  277. short socket_ack_count = 0;
  278. short *sp;
  279. struct atomic_short *asp;
  280. struct ptc_stats *stat = bcp->statp;
  281. struct bau_pq_entry *msg = mdp->msg;
  282. struct bau_control *smaster = bcp->socket_master;
  283. /*
  284. * This must be a normal message, or retry of a normal message
  285. */
  286. if (msg->address == TLB_FLUSH_ALL) {
  287. local_flush_tlb();
  288. stat->d_alltlb++;
  289. } else {
  290. __flush_tlb_one(msg->address);
  291. stat->d_onetlb++;
  292. }
  293. stat->d_requestee++;
  294. /*
  295. * One cpu on each uvhub has the additional job on a RETRY
  296. * of releasing the resource held by the message that is
  297. * being retried. That message is identified by sending
  298. * cpu number.
  299. */
  300. if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
  301. bau_process_retry_msg(mdp, bcp);
  302. /*
  303. * This is a swack message, so we have to reply to it.
  304. * Count each responding cpu on the socket. This avoids
  305. * pinging the count's cache line back and forth between
  306. * the sockets.
  307. */
  308. sp = &smaster->socket_acknowledge_count[mdp->msg_slot];
  309. asp = (struct atomic_short *)sp;
  310. socket_ack_count = atom_asr(1, asp);
  311. if (socket_ack_count == bcp->cpus_in_socket) {
  312. int msg_ack_count;
  313. /*
  314. * Both sockets dump their completed count total into
  315. * the message's count.
  316. */
  317. *sp = 0;
  318. asp = (struct atomic_short *)&msg->acknowledge_count;
  319. msg_ack_count = atom_asr(socket_ack_count, asp);
  320. if (msg_ack_count == bcp->cpus_in_uvhub) {
  321. /*
  322. * All cpus in uvhub saw it; reply
  323. * (unless we are in the UV2 workaround)
  324. */
  325. reply_to_message(mdp, bcp, do_acknowledge);
  326. }
  327. }
  328. return;
  329. }
  330. /*
  331. * Determine the first cpu on a pnode.
  332. */
  333. static int pnode_to_first_cpu(int pnode, struct bau_control *smaster)
  334. {
  335. int cpu;
  336. struct hub_and_pnode *hpp;
  337. for_each_present_cpu(cpu) {
  338. hpp = &smaster->thp[cpu];
  339. if (pnode == hpp->pnode)
  340. return cpu;
  341. }
  342. return -1;
  343. }
  344. /*
  345. * Last resort when we get a large number of destination timeouts is
  346. * to clear resources held by a given cpu.
  347. * Do this with IPI so that all messages in the BAU message queue
  348. * can be identified by their nonzero swack_vec field.
  349. *
  350. * This is entered for a single cpu on the uvhub.
  351. * The sender want's this uvhub to free a specific message's
  352. * swack resources.
  353. */
  354. static void do_reset(void *ptr)
  355. {
  356. int i;
  357. struct bau_control *bcp = &per_cpu(bau_control, smp_processor_id());
  358. struct reset_args *rap = (struct reset_args *)ptr;
  359. struct bau_pq_entry *msg;
  360. struct ptc_stats *stat = bcp->statp;
  361. stat->d_resets++;
  362. /*
  363. * We're looking for the given sender, and
  364. * will free its swack resource.
  365. * If all cpu's finally responded after the timeout, its
  366. * message 'replied_to' was set.
  367. */
  368. for (msg = bcp->queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
  369. unsigned long msg_res;
  370. /* do_reset: same conditions for cancellation as
  371. bau_process_retry_msg() */
  372. if ((msg->replied_to == 0) &&
  373. (msg->canceled == 0) &&
  374. (msg->sending_cpu == rap->sender) &&
  375. (msg->swack_vec) &&
  376. (msg->msg_type != MSG_NOOP)) {
  377. unsigned long mmr;
  378. unsigned long mr;
  379. /*
  380. * make everyone else ignore this message
  381. */
  382. msg->canceled = 1;
  383. /*
  384. * only reset the resource if it is still pending
  385. */
  386. mmr = ops.read_l_sw_ack();
  387. msg_res = msg->swack_vec;
  388. mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
  389. if (mmr & msg_res) {
  390. stat->d_rcanceled++;
  391. ops.write_l_sw_ack(mr);
  392. }
  393. }
  394. }
  395. return;
  396. }
  397. /*
  398. * Use IPI to get all target uvhubs to release resources held by
  399. * a given sending cpu number.
  400. */
  401. static void reset_with_ipi(struct pnmask *distribution, struct bau_control *bcp)
  402. {
  403. int pnode;
  404. int apnode;
  405. int maskbits;
  406. int sender = bcp->cpu;
  407. cpumask_t *mask = bcp->uvhub_master->cpumask;
  408. struct bau_control *smaster = bcp->socket_master;
  409. struct reset_args reset_args;
  410. reset_args.sender = sender;
  411. cpumask_clear(mask);
  412. /* find a single cpu for each uvhub in this distribution mask */
  413. maskbits = sizeof(struct pnmask) * BITSPERBYTE;
  414. /* each bit is a pnode relative to the partition base pnode */
  415. for (pnode = 0; pnode < maskbits; pnode++) {
  416. int cpu;
  417. if (!bau_uvhub_isset(pnode, distribution))
  418. continue;
  419. apnode = pnode + bcp->partition_base_pnode;
  420. cpu = pnode_to_first_cpu(apnode, smaster);
  421. cpumask_set_cpu(cpu, mask);
  422. }
  423. /* IPI all cpus; preemption is already disabled */
  424. smp_call_function_many(mask, do_reset, (void *)&reset_args, 1);
  425. return;
  426. }
  427. /*
  428. * Not to be confused with cycles_2_ns() from tsc.c; this gives a relative
  429. * number, not an absolute. It converts a duration in cycles to a duration in
  430. * ns.
  431. */
  432. static inline unsigned long long cycles_2_ns(unsigned long long cyc)
  433. {
  434. struct cyc2ns_data *data = cyc2ns_read_begin();
  435. unsigned long long ns;
  436. ns = mul_u64_u32_shr(cyc, data->cyc2ns_mul, data->cyc2ns_shift);
  437. cyc2ns_read_end(data);
  438. return ns;
  439. }
  440. /*
  441. * The reverse of the above; converts a duration in ns to a duration in cycles.
  442. */
  443. static inline unsigned long long ns_2_cycles(unsigned long long ns)
  444. {
  445. struct cyc2ns_data *data = cyc2ns_read_begin();
  446. unsigned long long cyc;
  447. cyc = (ns << data->cyc2ns_shift) / data->cyc2ns_mul;
  448. cyc2ns_read_end(data);
  449. return cyc;
  450. }
  451. static inline unsigned long cycles_2_us(unsigned long long cyc)
  452. {
  453. return cycles_2_ns(cyc) / NSEC_PER_USEC;
  454. }
  455. static inline cycles_t sec_2_cycles(unsigned long sec)
  456. {
  457. return ns_2_cycles(sec * NSEC_PER_SEC);
  458. }
  459. static inline unsigned long long usec_2_cycles(unsigned long usec)
  460. {
  461. return ns_2_cycles(usec * NSEC_PER_USEC);
  462. }
  463. /*
  464. * wait for all cpus on this hub to finish their sends and go quiet
  465. * leaves uvhub_quiesce set so that no new broadcasts are started by
  466. * bau_flush_send_and_wait()
  467. */
  468. static inline void quiesce_local_uvhub(struct bau_control *hmaster)
  469. {
  470. atom_asr(1, (struct atomic_short *)&hmaster->uvhub_quiesce);
  471. }
  472. /*
  473. * mark this quiet-requestor as done
  474. */
  475. static inline void end_uvhub_quiesce(struct bau_control *hmaster)
  476. {
  477. atom_asr(-1, (struct atomic_short *)&hmaster->uvhub_quiesce);
  478. }
  479. static unsigned long uv1_read_status(unsigned long mmr_offset, int right_shift)
  480. {
  481. unsigned long descriptor_status;
  482. descriptor_status = uv_read_local_mmr(mmr_offset);
  483. descriptor_status >>= right_shift;
  484. descriptor_status &= UV_ACT_STATUS_MASK;
  485. return descriptor_status;
  486. }
  487. /*
  488. * Wait for completion of a broadcast software ack message
  489. * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
  490. */
  491. static int uv1_wait_completion(struct bau_desc *bau_desc,
  492. unsigned long mmr_offset, int right_shift,
  493. struct bau_control *bcp, long try)
  494. {
  495. unsigned long descriptor_status;
  496. cycles_t ttm;
  497. struct ptc_stats *stat = bcp->statp;
  498. descriptor_status = uv1_read_status(mmr_offset, right_shift);
  499. /* spin on the status MMR, waiting for it to go idle */
  500. while ((descriptor_status != DS_IDLE)) {
  501. /*
  502. * Our software ack messages may be blocked because
  503. * there are no swack resources available. As long
  504. * as none of them has timed out hardware will NACK
  505. * our message and its state will stay IDLE.
  506. */
  507. if (descriptor_status == DS_SOURCE_TIMEOUT) {
  508. stat->s_stimeout++;
  509. return FLUSH_GIVEUP;
  510. } else if (descriptor_status == DS_DESTINATION_TIMEOUT) {
  511. stat->s_dtimeout++;
  512. ttm = get_cycles();
  513. /*
  514. * Our retries may be blocked by all destination
  515. * swack resources being consumed, and a timeout
  516. * pending. In that case hardware returns the
  517. * ERROR that looks like a destination timeout.
  518. */
  519. if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
  520. bcp->conseccompletes = 0;
  521. return FLUSH_RETRY_PLUGGED;
  522. }
  523. bcp->conseccompletes = 0;
  524. return FLUSH_RETRY_TIMEOUT;
  525. } else {
  526. /*
  527. * descriptor_status is still BUSY
  528. */
  529. cpu_relax();
  530. }
  531. descriptor_status = uv1_read_status(mmr_offset, right_shift);
  532. }
  533. bcp->conseccompletes++;
  534. return FLUSH_COMPLETE;
  535. }
  536. /*
  537. * UV2 could have an extra bit of status in the ACTIVATION_STATUS_2 register.
  538. * But not currently used.
  539. */
  540. static unsigned long uv2_3_read_status(unsigned long offset, int rshft, int desc)
  541. {
  542. return ((read_lmmr(offset) >> rshft) & UV_ACT_STATUS_MASK) << 1;
  543. }
  544. /*
  545. * Return whether the status of the descriptor that is normally used for this
  546. * cpu (the one indexed by its hub-relative cpu number) is busy.
  547. * The status of the original 32 descriptors is always reflected in the 64
  548. * bits of UVH_LB_BAU_SB_ACTIVATION_STATUS_0.
  549. * The bit provided by the activation_status_2 register is irrelevant to
  550. * the status if it is only being tested for busy or not busy.
  551. */
  552. int normal_busy(struct bau_control *bcp)
  553. {
  554. int cpu = bcp->uvhub_cpu;
  555. int mmr_offset;
  556. int right_shift;
  557. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
  558. right_shift = cpu * UV_ACT_STATUS_SIZE;
  559. return (((((read_lmmr(mmr_offset) >> right_shift) &
  560. UV_ACT_STATUS_MASK)) << 1) == UV2H_DESC_BUSY);
  561. }
  562. /*
  563. * Entered when a bau descriptor has gone into a permanent busy wait because
  564. * of a hardware bug.
  565. * Workaround the bug.
  566. */
  567. int handle_uv2_busy(struct bau_control *bcp)
  568. {
  569. struct ptc_stats *stat = bcp->statp;
  570. stat->s_uv2_wars++;
  571. bcp->busy = 1;
  572. return FLUSH_GIVEUP;
  573. }
  574. static int uv2_3_wait_completion(struct bau_desc *bau_desc,
  575. unsigned long mmr_offset, int right_shift,
  576. struct bau_control *bcp, long try)
  577. {
  578. unsigned long descriptor_stat;
  579. cycles_t ttm;
  580. int desc = bcp->uvhub_cpu;
  581. long busy_reps = 0;
  582. struct ptc_stats *stat = bcp->statp;
  583. descriptor_stat = uv2_3_read_status(mmr_offset, right_shift, desc);
  584. /* spin on the status MMR, waiting for it to go idle */
  585. while (descriptor_stat != UV2H_DESC_IDLE) {
  586. if ((descriptor_stat == UV2H_DESC_SOURCE_TIMEOUT)) {
  587. /*
  588. * A h/w bug on the destination side may
  589. * have prevented the message being marked
  590. * pending, thus it doesn't get replied to
  591. * and gets continually nacked until it times
  592. * out with a SOURCE_TIMEOUT.
  593. */
  594. stat->s_stimeout++;
  595. return FLUSH_GIVEUP;
  596. } else if (descriptor_stat == UV2H_DESC_DEST_TIMEOUT) {
  597. ttm = get_cycles();
  598. /*
  599. * Our retries may be blocked by all destination
  600. * swack resources being consumed, and a timeout
  601. * pending. In that case hardware returns the
  602. * ERROR that looks like a destination timeout.
  603. * Without using the extended status we have to
  604. * deduce from the short time that this was a
  605. * strong nack.
  606. */
  607. if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
  608. bcp->conseccompletes = 0;
  609. stat->s_plugged++;
  610. /* FLUSH_RETRY_PLUGGED causes hang on boot */
  611. return FLUSH_GIVEUP;
  612. }
  613. stat->s_dtimeout++;
  614. bcp->conseccompletes = 0;
  615. /* FLUSH_RETRY_TIMEOUT causes hang on boot */
  616. return FLUSH_GIVEUP;
  617. } else {
  618. busy_reps++;
  619. if (busy_reps > 1000000) {
  620. /* not to hammer on the clock */
  621. busy_reps = 0;
  622. ttm = get_cycles();
  623. if ((ttm - bcp->send_message) > bcp->timeout_interval)
  624. return handle_uv2_busy(bcp);
  625. }
  626. /*
  627. * descriptor_stat is still BUSY
  628. */
  629. cpu_relax();
  630. }
  631. descriptor_stat = uv2_3_read_status(mmr_offset, right_shift, desc);
  632. }
  633. bcp->conseccompletes++;
  634. return FLUSH_COMPLETE;
  635. }
  636. /*
  637. * There are 2 status registers; each and array[32] of 2 bits. Set up for
  638. * which register to read and position in that register based on cpu in
  639. * current hub.
  640. */
  641. static int wait_completion(struct bau_desc *bau_desc, struct bau_control *bcp, long try)
  642. {
  643. int right_shift;
  644. unsigned long mmr_offset;
  645. int desc = bcp->uvhub_cpu;
  646. if (desc < UV_CPUS_PER_AS) {
  647. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
  648. right_shift = desc * UV_ACT_STATUS_SIZE;
  649. } else {
  650. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
  651. right_shift = ((desc - UV_CPUS_PER_AS) * UV_ACT_STATUS_SIZE);
  652. }
  653. if (bcp->uvhub_version == 1)
  654. return uv1_wait_completion(bau_desc, mmr_offset, right_shift, bcp, try);
  655. else
  656. return uv2_3_wait_completion(bau_desc, mmr_offset, right_shift, bcp, try);
  657. }
  658. /*
  659. * Our retries are blocked by all destination sw ack resources being
  660. * in use, and a timeout is pending. In that case hardware immediately
  661. * returns the ERROR that looks like a destination timeout.
  662. */
  663. static void destination_plugged(struct bau_desc *bau_desc,
  664. struct bau_control *bcp,
  665. struct bau_control *hmaster, struct ptc_stats *stat)
  666. {
  667. udelay(bcp->plugged_delay);
  668. bcp->plugged_tries++;
  669. if (bcp->plugged_tries >= bcp->plugsb4reset) {
  670. bcp->plugged_tries = 0;
  671. quiesce_local_uvhub(hmaster);
  672. spin_lock(&hmaster->queue_lock);
  673. reset_with_ipi(&bau_desc->distribution, bcp);
  674. spin_unlock(&hmaster->queue_lock);
  675. end_uvhub_quiesce(hmaster);
  676. bcp->ipi_attempts++;
  677. stat->s_resets_plug++;
  678. }
  679. }
  680. static void destination_timeout(struct bau_desc *bau_desc,
  681. struct bau_control *bcp, struct bau_control *hmaster,
  682. struct ptc_stats *stat)
  683. {
  684. hmaster->max_concurr = 1;
  685. bcp->timeout_tries++;
  686. if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
  687. bcp->timeout_tries = 0;
  688. quiesce_local_uvhub(hmaster);
  689. spin_lock(&hmaster->queue_lock);
  690. reset_with_ipi(&bau_desc->distribution, bcp);
  691. spin_unlock(&hmaster->queue_lock);
  692. end_uvhub_quiesce(hmaster);
  693. bcp->ipi_attempts++;
  694. stat->s_resets_timeout++;
  695. }
  696. }
  697. /*
  698. * Stop all cpus on a uvhub from using the BAU for a period of time.
  699. * This is reversed by check_enable.
  700. */
  701. static void disable_for_period(struct bau_control *bcp, struct ptc_stats *stat)
  702. {
  703. int tcpu;
  704. struct bau_control *tbcp;
  705. struct bau_control *hmaster;
  706. cycles_t tm1;
  707. hmaster = bcp->uvhub_master;
  708. spin_lock(&hmaster->disable_lock);
  709. if (!bcp->baudisabled) {
  710. stat->s_bau_disabled++;
  711. tm1 = get_cycles();
  712. for_each_present_cpu(tcpu) {
  713. tbcp = &per_cpu(bau_control, tcpu);
  714. if (tbcp->uvhub_master == hmaster) {
  715. tbcp->baudisabled = 1;
  716. tbcp->set_bau_on_time =
  717. tm1 + bcp->disabled_period;
  718. }
  719. }
  720. }
  721. spin_unlock(&hmaster->disable_lock);
  722. }
  723. static void count_max_concurr(int stat, struct bau_control *bcp,
  724. struct bau_control *hmaster)
  725. {
  726. bcp->plugged_tries = 0;
  727. bcp->timeout_tries = 0;
  728. if (stat != FLUSH_COMPLETE)
  729. return;
  730. if (bcp->conseccompletes <= bcp->complete_threshold)
  731. return;
  732. if (hmaster->max_concurr >= hmaster->max_concurr_const)
  733. return;
  734. hmaster->max_concurr++;
  735. }
  736. static void record_send_stats(cycles_t time1, cycles_t time2,
  737. struct bau_control *bcp, struct ptc_stats *stat,
  738. int completion_status, int try)
  739. {
  740. cycles_t elapsed;
  741. if (time2 > time1) {
  742. elapsed = time2 - time1;
  743. stat->s_time += elapsed;
  744. if ((completion_status == FLUSH_COMPLETE) && (try == 1)) {
  745. bcp->period_requests++;
  746. bcp->period_time += elapsed;
  747. if ((elapsed > congested_cycles) &&
  748. (bcp->period_requests > bcp->cong_reps) &&
  749. ((bcp->period_time / bcp->period_requests) >
  750. congested_cycles)) {
  751. stat->s_congested++;
  752. disable_for_period(bcp, stat);
  753. }
  754. }
  755. } else
  756. stat->s_requestor--;
  757. if (completion_status == FLUSH_COMPLETE && try > 1)
  758. stat->s_retriesok++;
  759. else if (completion_status == FLUSH_GIVEUP) {
  760. stat->s_giveup++;
  761. if (get_cycles() > bcp->period_end)
  762. bcp->period_giveups = 0;
  763. bcp->period_giveups++;
  764. if (bcp->period_giveups == 1)
  765. bcp->period_end = get_cycles() + bcp->disabled_period;
  766. if (bcp->period_giveups > bcp->giveup_limit) {
  767. disable_for_period(bcp, stat);
  768. stat->s_giveuplimit++;
  769. }
  770. }
  771. }
  772. /*
  773. * Because of a uv1 hardware bug only a limited number of concurrent
  774. * requests can be made.
  775. */
  776. static void uv1_throttle(struct bau_control *hmaster, struct ptc_stats *stat)
  777. {
  778. spinlock_t *lock = &hmaster->uvhub_lock;
  779. atomic_t *v;
  780. v = &hmaster->active_descriptor_count;
  781. if (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr)) {
  782. stat->s_throttles++;
  783. do {
  784. cpu_relax();
  785. } while (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr));
  786. }
  787. }
  788. /*
  789. * Handle the completion status of a message send.
  790. */
  791. static void handle_cmplt(int completion_status, struct bau_desc *bau_desc,
  792. struct bau_control *bcp, struct bau_control *hmaster,
  793. struct ptc_stats *stat)
  794. {
  795. if (completion_status == FLUSH_RETRY_PLUGGED)
  796. destination_plugged(bau_desc, bcp, hmaster, stat);
  797. else if (completion_status == FLUSH_RETRY_TIMEOUT)
  798. destination_timeout(bau_desc, bcp, hmaster, stat);
  799. }
  800. /*
  801. * Send a broadcast and wait for it to complete.
  802. *
  803. * The flush_mask contains the cpus the broadcast is to be sent to including
  804. * cpus that are on the local uvhub.
  805. *
  806. * Returns 0 if all flushing represented in the mask was done.
  807. * Returns 1 if it gives up entirely and the original cpu mask is to be
  808. * returned to the kernel.
  809. */
  810. int uv_flush_send_and_wait(struct cpumask *flush_mask, struct bau_control *bcp,
  811. struct bau_desc *bau_desc)
  812. {
  813. int seq_number = 0;
  814. int completion_stat = 0;
  815. int uv1 = 0;
  816. long try = 0;
  817. unsigned long index;
  818. cycles_t time1;
  819. cycles_t time2;
  820. struct ptc_stats *stat = bcp->statp;
  821. struct bau_control *hmaster = bcp->uvhub_master;
  822. struct uv1_bau_msg_header *uv1_hdr = NULL;
  823. struct uv2_3_bau_msg_header *uv2_3_hdr = NULL;
  824. if (bcp->uvhub_version == 1) {
  825. uv1 = 1;
  826. uv1_throttle(hmaster, stat);
  827. }
  828. while (hmaster->uvhub_quiesce)
  829. cpu_relax();
  830. time1 = get_cycles();
  831. if (uv1)
  832. uv1_hdr = &bau_desc->header.uv1_hdr;
  833. else
  834. /* uv2 and uv3 */
  835. uv2_3_hdr = &bau_desc->header.uv2_3_hdr;
  836. do {
  837. if (try == 0) {
  838. if (uv1)
  839. uv1_hdr->msg_type = MSG_REGULAR;
  840. else
  841. uv2_3_hdr->msg_type = MSG_REGULAR;
  842. seq_number = bcp->message_number++;
  843. } else {
  844. if (uv1)
  845. uv1_hdr->msg_type = MSG_RETRY;
  846. else
  847. uv2_3_hdr->msg_type = MSG_RETRY;
  848. stat->s_retry_messages++;
  849. }
  850. if (uv1)
  851. uv1_hdr->sequence = seq_number;
  852. else
  853. uv2_3_hdr->sequence = seq_number;
  854. index = (1UL << AS_PUSH_SHIFT) | bcp->uvhub_cpu;
  855. bcp->send_message = get_cycles();
  856. write_mmr_activation(index);
  857. try++;
  858. completion_stat = wait_completion(bau_desc, bcp, try);
  859. handle_cmplt(completion_stat, bau_desc, bcp, hmaster, stat);
  860. if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
  861. bcp->ipi_attempts = 0;
  862. stat->s_overipilimit++;
  863. completion_stat = FLUSH_GIVEUP;
  864. break;
  865. }
  866. cpu_relax();
  867. } while ((completion_stat == FLUSH_RETRY_PLUGGED) ||
  868. (completion_stat == FLUSH_RETRY_TIMEOUT));
  869. time2 = get_cycles();
  870. count_max_concurr(completion_stat, bcp, hmaster);
  871. while (hmaster->uvhub_quiesce)
  872. cpu_relax();
  873. atomic_dec(&hmaster->active_descriptor_count);
  874. record_send_stats(time1, time2, bcp, stat, completion_stat, try);
  875. if (completion_stat == FLUSH_GIVEUP)
  876. /* FLUSH_GIVEUP will fall back to using IPI's for tlb flush */
  877. return 1;
  878. return 0;
  879. }
  880. /*
  881. * The BAU is disabled for this uvhub. When the disabled time period has
  882. * expired re-enable it.
  883. * Return 0 if it is re-enabled for all cpus on this uvhub.
  884. */
  885. static int check_enable(struct bau_control *bcp, struct ptc_stats *stat)
  886. {
  887. int tcpu;
  888. struct bau_control *tbcp;
  889. struct bau_control *hmaster;
  890. hmaster = bcp->uvhub_master;
  891. spin_lock(&hmaster->disable_lock);
  892. if (bcp->baudisabled && (get_cycles() >= bcp->set_bau_on_time)) {
  893. stat->s_bau_reenabled++;
  894. for_each_present_cpu(tcpu) {
  895. tbcp = &per_cpu(bau_control, tcpu);
  896. if (tbcp->uvhub_master == hmaster) {
  897. tbcp->baudisabled = 0;
  898. tbcp->period_requests = 0;
  899. tbcp->period_time = 0;
  900. tbcp->period_giveups = 0;
  901. }
  902. }
  903. spin_unlock(&hmaster->disable_lock);
  904. return 0;
  905. }
  906. spin_unlock(&hmaster->disable_lock);
  907. return -1;
  908. }
  909. static void record_send_statistics(struct ptc_stats *stat, int locals, int hubs,
  910. int remotes, struct bau_desc *bau_desc)
  911. {
  912. stat->s_requestor++;
  913. stat->s_ntargcpu += remotes + locals;
  914. stat->s_ntargremotes += remotes;
  915. stat->s_ntarglocals += locals;
  916. /* uvhub statistics */
  917. hubs = bau_uvhub_weight(&bau_desc->distribution);
  918. if (locals) {
  919. stat->s_ntarglocaluvhub++;
  920. stat->s_ntargremoteuvhub += (hubs - 1);
  921. } else
  922. stat->s_ntargremoteuvhub += hubs;
  923. stat->s_ntarguvhub += hubs;
  924. if (hubs >= 16)
  925. stat->s_ntarguvhub16++;
  926. else if (hubs >= 8)
  927. stat->s_ntarguvhub8++;
  928. else if (hubs >= 4)
  929. stat->s_ntarguvhub4++;
  930. else if (hubs >= 2)
  931. stat->s_ntarguvhub2++;
  932. else
  933. stat->s_ntarguvhub1++;
  934. }
  935. /*
  936. * Translate a cpu mask to the uvhub distribution mask in the BAU
  937. * activation descriptor.
  938. */
  939. static int set_distrib_bits(struct cpumask *flush_mask, struct bau_control *bcp,
  940. struct bau_desc *bau_desc, int *localsp, int *remotesp)
  941. {
  942. int cpu;
  943. int pnode;
  944. int cnt = 0;
  945. struct hub_and_pnode *hpp;
  946. for_each_cpu(cpu, flush_mask) {
  947. /*
  948. * The distribution vector is a bit map of pnodes, relative
  949. * to the partition base pnode (and the partition base nasid
  950. * in the header).
  951. * Translate cpu to pnode and hub using a local memory array.
  952. */
  953. hpp = &bcp->socket_master->thp[cpu];
  954. pnode = hpp->pnode - bcp->partition_base_pnode;
  955. bau_uvhub_set(pnode, &bau_desc->distribution);
  956. cnt++;
  957. if (hpp->uvhub == bcp->uvhub)
  958. (*localsp)++;
  959. else
  960. (*remotesp)++;
  961. }
  962. if (!cnt)
  963. return 1;
  964. return 0;
  965. }
  966. /*
  967. * globally purge translation cache of a virtual address or all TLB's
  968. * @cpumask: mask of all cpu's in which the address is to be removed
  969. * @mm: mm_struct containing virtual address range
  970. * @start: start virtual address to be removed from TLB
  971. * @end: end virtual address to be remove from TLB
  972. * @cpu: the current cpu
  973. *
  974. * This is the entry point for initiating any UV global TLB shootdown.
  975. *
  976. * Purges the translation caches of all specified processors of the given
  977. * virtual address, or purges all TLB's on specified processors.
  978. *
  979. * The caller has derived the cpumask from the mm_struct. This function
  980. * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
  981. *
  982. * The cpumask is converted into a uvhubmask of the uvhubs containing
  983. * those cpus.
  984. *
  985. * Note that this function should be called with preemption disabled.
  986. *
  987. * Returns NULL if all remote flushing was done.
  988. * Returns pointer to cpumask if some remote flushing remains to be
  989. * done. The returned pointer is valid till preemption is re-enabled.
  990. */
  991. const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
  992. struct mm_struct *mm,
  993. unsigned long start,
  994. unsigned long end,
  995. unsigned int cpu)
  996. {
  997. int locals = 0;
  998. int remotes = 0;
  999. int hubs = 0;
  1000. struct bau_desc *bau_desc;
  1001. struct cpumask *flush_mask;
  1002. struct ptc_stats *stat;
  1003. struct bau_control *bcp;
  1004. unsigned long descriptor_status;
  1005. unsigned long status;
  1006. bcp = &per_cpu(bau_control, cpu);
  1007. if (bcp->nobau)
  1008. return cpumask;
  1009. stat = bcp->statp;
  1010. stat->s_enters++;
  1011. if (bcp->busy) {
  1012. descriptor_status =
  1013. read_lmmr(UVH_LB_BAU_SB_ACTIVATION_STATUS_0);
  1014. status = ((descriptor_status >> (bcp->uvhub_cpu *
  1015. UV_ACT_STATUS_SIZE)) & UV_ACT_STATUS_MASK) << 1;
  1016. if (status == UV2H_DESC_BUSY)
  1017. return cpumask;
  1018. bcp->busy = 0;
  1019. }
  1020. /* bau was disabled due to slow response */
  1021. if (bcp->baudisabled) {
  1022. if (check_enable(bcp, stat)) {
  1023. stat->s_ipifordisabled++;
  1024. return cpumask;
  1025. }
  1026. }
  1027. /*
  1028. * Each sending cpu has a per-cpu mask which it fills from the caller's
  1029. * cpu mask. All cpus are converted to uvhubs and copied to the
  1030. * activation descriptor.
  1031. */
  1032. flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
  1033. /* don't actually do a shootdown of the local cpu */
  1034. cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
  1035. if (cpumask_test_cpu(cpu, cpumask))
  1036. stat->s_ntargself++;
  1037. bau_desc = bcp->descriptor_base;
  1038. bau_desc += (ITEMS_PER_DESC * bcp->uvhub_cpu);
  1039. bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
  1040. if (set_distrib_bits(flush_mask, bcp, bau_desc, &locals, &remotes))
  1041. return NULL;
  1042. record_send_statistics(stat, locals, hubs, remotes, bau_desc);
  1043. if (!end || (end - start) <= PAGE_SIZE)
  1044. bau_desc->payload.address = start;
  1045. else
  1046. bau_desc->payload.address = TLB_FLUSH_ALL;
  1047. bau_desc->payload.sending_cpu = cpu;
  1048. /*
  1049. * uv_flush_send_and_wait returns 0 if all cpu's were messaged,
  1050. * or 1 if it gave up and the original cpumask should be returned.
  1051. */
  1052. if (!uv_flush_send_and_wait(flush_mask, bcp, bau_desc))
  1053. return NULL;
  1054. else
  1055. return cpumask;
  1056. }
  1057. /*
  1058. * Search the message queue for any 'other' unprocessed message with the
  1059. * same software acknowledge resource bit vector as the 'msg' message.
  1060. */
  1061. struct bau_pq_entry *find_another_by_swack(struct bau_pq_entry *msg,
  1062. struct bau_control *bcp)
  1063. {
  1064. struct bau_pq_entry *msg_next = msg + 1;
  1065. unsigned char swack_vec = msg->swack_vec;
  1066. if (msg_next > bcp->queue_last)
  1067. msg_next = bcp->queue_first;
  1068. while (msg_next != msg) {
  1069. if ((msg_next->canceled == 0) && (msg_next->replied_to == 0) &&
  1070. (msg_next->swack_vec == swack_vec))
  1071. return msg_next;
  1072. msg_next++;
  1073. if (msg_next > bcp->queue_last)
  1074. msg_next = bcp->queue_first;
  1075. }
  1076. return NULL;
  1077. }
  1078. /*
  1079. * UV2 needs to work around a bug in which an arriving message has not
  1080. * set a bit in the UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE register.
  1081. * Such a message must be ignored.
  1082. */
  1083. void process_uv2_message(struct msg_desc *mdp, struct bau_control *bcp)
  1084. {
  1085. unsigned long mmr_image;
  1086. unsigned char swack_vec;
  1087. struct bau_pq_entry *msg = mdp->msg;
  1088. struct bau_pq_entry *other_msg;
  1089. mmr_image = ops.read_l_sw_ack();
  1090. swack_vec = msg->swack_vec;
  1091. if ((swack_vec & mmr_image) == 0) {
  1092. /*
  1093. * This message was assigned a swack resource, but no
  1094. * reserved acknowlegment is pending.
  1095. * The bug has prevented this message from setting the MMR.
  1096. */
  1097. /*
  1098. * Some message has set the MMR 'pending' bit; it might have
  1099. * been another message. Look for that message.
  1100. */
  1101. other_msg = find_another_by_swack(msg, bcp);
  1102. if (other_msg) {
  1103. /*
  1104. * There is another. Process this one but do not
  1105. * ack it.
  1106. */
  1107. bau_process_message(mdp, bcp, 0);
  1108. /*
  1109. * Let the natural processing of that other message
  1110. * acknowledge it. Don't get the processing of sw_ack's
  1111. * out of order.
  1112. */
  1113. return;
  1114. }
  1115. }
  1116. /*
  1117. * Either the MMR shows this one pending a reply or there is no
  1118. * other message using this sw_ack, so it is safe to acknowledge it.
  1119. */
  1120. bau_process_message(mdp, bcp, 1);
  1121. return;
  1122. }
  1123. /*
  1124. * The BAU message interrupt comes here. (registered by set_intr_gate)
  1125. * See entry_64.S
  1126. *
  1127. * We received a broadcast assist message.
  1128. *
  1129. * Interrupts are disabled; this interrupt could represent
  1130. * the receipt of several messages.
  1131. *
  1132. * All cores/threads on this hub get this interrupt.
  1133. * The last one to see it does the software ack.
  1134. * (the resource will not be freed until noninterruptable cpus see this
  1135. * interrupt; hardware may timeout the s/w ack and reply ERROR)
  1136. */
  1137. void uv_bau_message_interrupt(struct pt_regs *regs)
  1138. {
  1139. int count = 0;
  1140. cycles_t time_start;
  1141. struct bau_pq_entry *msg;
  1142. struct bau_control *bcp;
  1143. struct ptc_stats *stat;
  1144. struct msg_desc msgdesc;
  1145. ack_APIC_irq();
  1146. time_start = get_cycles();
  1147. bcp = &per_cpu(bau_control, smp_processor_id());
  1148. stat = bcp->statp;
  1149. msgdesc.queue_first = bcp->queue_first;
  1150. msgdesc.queue_last = bcp->queue_last;
  1151. msg = bcp->bau_msg_head;
  1152. while (msg->swack_vec) {
  1153. count++;
  1154. msgdesc.msg_slot = msg - msgdesc.queue_first;
  1155. msgdesc.msg = msg;
  1156. if (bcp->uvhub_version == 2)
  1157. process_uv2_message(&msgdesc, bcp);
  1158. else
  1159. /* no error workaround for uv1 or uv3 */
  1160. bau_process_message(&msgdesc, bcp, 1);
  1161. msg++;
  1162. if (msg > msgdesc.queue_last)
  1163. msg = msgdesc.queue_first;
  1164. bcp->bau_msg_head = msg;
  1165. }
  1166. stat->d_time += (get_cycles() - time_start);
  1167. if (!count)
  1168. stat->d_nomsg++;
  1169. else if (count > 1)
  1170. stat->d_multmsg++;
  1171. }
  1172. /*
  1173. * Each target uvhub (i.e. a uvhub that has cpu's) needs to have
  1174. * shootdown message timeouts enabled. The timeout does not cause
  1175. * an interrupt, but causes an error message to be returned to
  1176. * the sender.
  1177. */
  1178. static void __init enable_timeouts(void)
  1179. {
  1180. int uvhub;
  1181. int nuvhubs;
  1182. int pnode;
  1183. unsigned long mmr_image;
  1184. nuvhubs = uv_num_possible_blades();
  1185. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  1186. if (!uv_blade_nr_possible_cpus(uvhub))
  1187. continue;
  1188. pnode = uv_blade_to_pnode(uvhub);
  1189. mmr_image = read_mmr_misc_control(pnode);
  1190. /*
  1191. * Set the timeout period and then lock it in, in three
  1192. * steps; captures and locks in the period.
  1193. *
  1194. * To program the period, the SOFT_ACK_MODE must be off.
  1195. */
  1196. mmr_image &= ~(1L << SOFTACK_MSHIFT);
  1197. write_mmr_misc_control(pnode, mmr_image);
  1198. /*
  1199. * Set the 4-bit period.
  1200. */
  1201. mmr_image &= ~((unsigned long)0xf << SOFTACK_PSHIFT);
  1202. mmr_image |= (SOFTACK_TIMEOUT_PERIOD << SOFTACK_PSHIFT);
  1203. write_mmr_misc_control(pnode, mmr_image);
  1204. /*
  1205. * UV1:
  1206. * Subsequent reversals of the timebase bit (3) cause an
  1207. * immediate timeout of one or all INTD resources as
  1208. * indicated in bits 2:0 (7 causes all of them to timeout).
  1209. */
  1210. mmr_image |= (1L << SOFTACK_MSHIFT);
  1211. if (is_uv2_hub()) {
  1212. /* do not touch the legacy mode bit */
  1213. /* hw bug workaround; do not use extended status */
  1214. mmr_image &= ~(1L << UV2_EXT_SHFT);
  1215. } else if (is_uv3_hub()) {
  1216. mmr_image &= ~(1L << PREFETCH_HINT_SHFT);
  1217. mmr_image |= (1L << SB_STATUS_SHFT);
  1218. }
  1219. write_mmr_misc_control(pnode, mmr_image);
  1220. }
  1221. }
  1222. static void *ptc_seq_start(struct seq_file *file, loff_t *offset)
  1223. {
  1224. if (*offset < num_possible_cpus())
  1225. return offset;
  1226. return NULL;
  1227. }
  1228. static void *ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
  1229. {
  1230. (*offset)++;
  1231. if (*offset < num_possible_cpus())
  1232. return offset;
  1233. return NULL;
  1234. }
  1235. static void ptc_seq_stop(struct seq_file *file, void *data)
  1236. {
  1237. }
  1238. /*
  1239. * Display the statistics thru /proc/sgi_uv/ptc_statistics
  1240. * 'data' points to the cpu number
  1241. * Note: see the descriptions in stat_description[].
  1242. */
  1243. static int ptc_seq_show(struct seq_file *file, void *data)
  1244. {
  1245. struct ptc_stats *stat;
  1246. struct bau_control *bcp;
  1247. int cpu;
  1248. cpu = *(loff_t *)data;
  1249. if (!cpu) {
  1250. seq_puts(file,
  1251. "# cpu bauoff sent stime self locals remotes ncpus localhub ");
  1252. seq_puts(file, "remotehub numuvhubs numuvhubs16 numuvhubs8 ");
  1253. seq_puts(file,
  1254. "numuvhubs4 numuvhubs2 numuvhubs1 dto snacks retries ");
  1255. seq_puts(file,
  1256. "rok resetp resett giveup sto bz throt disable ");
  1257. seq_puts(file,
  1258. "enable wars warshw warwaits enters ipidis plugged ");
  1259. seq_puts(file,
  1260. "ipiover glim cong swack recv rtime all one mult ");
  1261. seq_puts(file, "none retry canc nocan reset rcan\n");
  1262. }
  1263. if (cpu < num_possible_cpus() && cpu_online(cpu)) {
  1264. bcp = &per_cpu(bau_control, cpu);
  1265. if (bcp->nobau) {
  1266. seq_printf(file, "cpu %d bau disabled\n", cpu);
  1267. return 0;
  1268. }
  1269. stat = bcp->statp;
  1270. /* source side statistics */
  1271. seq_printf(file,
  1272. "cpu %d %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
  1273. cpu, bcp->nobau, stat->s_requestor,
  1274. cycles_2_us(stat->s_time),
  1275. stat->s_ntargself, stat->s_ntarglocals,
  1276. stat->s_ntargremotes, stat->s_ntargcpu,
  1277. stat->s_ntarglocaluvhub, stat->s_ntargremoteuvhub,
  1278. stat->s_ntarguvhub, stat->s_ntarguvhub16);
  1279. seq_printf(file, "%ld %ld %ld %ld %ld %ld ",
  1280. stat->s_ntarguvhub8, stat->s_ntarguvhub4,
  1281. stat->s_ntarguvhub2, stat->s_ntarguvhub1,
  1282. stat->s_dtimeout, stat->s_strongnacks);
  1283. seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
  1284. stat->s_retry_messages, stat->s_retriesok,
  1285. stat->s_resets_plug, stat->s_resets_timeout,
  1286. stat->s_giveup, stat->s_stimeout,
  1287. stat->s_busy, stat->s_throttles);
  1288. seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
  1289. stat->s_bau_disabled, stat->s_bau_reenabled,
  1290. stat->s_uv2_wars, stat->s_uv2_wars_hw,
  1291. stat->s_uv2_war_waits, stat->s_enters,
  1292. stat->s_ipifordisabled, stat->s_plugged,
  1293. stat->s_overipilimit, stat->s_giveuplimit,
  1294. stat->s_congested);
  1295. /* destination side statistics */
  1296. seq_printf(file,
  1297. "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld\n",
  1298. ops.read_g_sw_ack(uv_cpu_to_pnode(cpu)),
  1299. stat->d_requestee, cycles_2_us(stat->d_time),
  1300. stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
  1301. stat->d_nomsg, stat->d_retries, stat->d_canceled,
  1302. stat->d_nocanceled, stat->d_resets,
  1303. stat->d_rcanceled);
  1304. }
  1305. return 0;
  1306. }
  1307. /*
  1308. * Display the tunables thru debugfs
  1309. */
  1310. static ssize_t tunables_read(struct file *file, char __user *userbuf,
  1311. size_t count, loff_t *ppos)
  1312. {
  1313. char *buf;
  1314. int ret;
  1315. buf = kasprintf(GFP_KERNEL, "%s %s %s\n%d %d %d %d %d %d %d %d %d %d\n",
  1316. "max_concur plugged_delay plugsb4reset timeoutsb4reset",
  1317. "ipi_reset_limit complete_threshold congested_response_us",
  1318. "congested_reps disabled_period giveup_limit",
  1319. max_concurr, plugged_delay, plugsb4reset,
  1320. timeoutsb4reset, ipi_reset_limit, complete_threshold,
  1321. congested_respns_us, congested_reps, disabled_period,
  1322. giveup_limit);
  1323. if (!buf)
  1324. return -ENOMEM;
  1325. ret = simple_read_from_buffer(userbuf, count, ppos, buf, strlen(buf));
  1326. kfree(buf);
  1327. return ret;
  1328. }
  1329. /*
  1330. * handle a write to /proc/sgi_uv/ptc_statistics
  1331. * -1: reset the statistics
  1332. * 0: display meaning of the statistics
  1333. */
  1334. static ssize_t ptc_proc_write(struct file *file, const char __user *user,
  1335. size_t count, loff_t *data)
  1336. {
  1337. int cpu;
  1338. int i;
  1339. int elements;
  1340. long input_arg;
  1341. char optstr[64];
  1342. struct ptc_stats *stat;
  1343. if (count == 0 || count > sizeof(optstr))
  1344. return -EINVAL;
  1345. if (copy_from_user(optstr, user, count))
  1346. return -EFAULT;
  1347. optstr[count - 1] = '\0';
  1348. if (!strcmp(optstr, "on")) {
  1349. set_bau_on();
  1350. return count;
  1351. } else if (!strcmp(optstr, "off")) {
  1352. set_bau_off();
  1353. return count;
  1354. }
  1355. if (kstrtol(optstr, 10, &input_arg) < 0) {
  1356. pr_debug("%s is invalid\n", optstr);
  1357. return -EINVAL;
  1358. }
  1359. if (input_arg == 0) {
  1360. elements = ARRAY_SIZE(stat_description);
  1361. pr_debug("# cpu: cpu number\n");
  1362. pr_debug("Sender statistics:\n");
  1363. for (i = 0; i < elements; i++)
  1364. pr_debug("%s\n", stat_description[i]);
  1365. } else if (input_arg == -1) {
  1366. for_each_present_cpu(cpu) {
  1367. stat = &per_cpu(ptcstats, cpu);
  1368. memset(stat, 0, sizeof(struct ptc_stats));
  1369. }
  1370. }
  1371. return count;
  1372. }
  1373. static int local_atoi(const char *name)
  1374. {
  1375. int val = 0;
  1376. for (;; name++) {
  1377. switch (*name) {
  1378. case '0' ... '9':
  1379. val = 10*val+(*name-'0');
  1380. break;
  1381. default:
  1382. return val;
  1383. }
  1384. }
  1385. }
  1386. /*
  1387. * Parse the values written to /sys/kernel/debug/sgi_uv/bau_tunables.
  1388. * Zero values reset them to defaults.
  1389. */
  1390. static int parse_tunables_write(struct bau_control *bcp, char *instr,
  1391. int count)
  1392. {
  1393. char *p;
  1394. char *q;
  1395. int cnt = 0;
  1396. int val;
  1397. int e = ARRAY_SIZE(tunables);
  1398. p = instr + strspn(instr, WHITESPACE);
  1399. q = p;
  1400. for (; *p; p = q + strspn(q, WHITESPACE)) {
  1401. q = p + strcspn(p, WHITESPACE);
  1402. cnt++;
  1403. if (q == p)
  1404. break;
  1405. }
  1406. if (cnt != e) {
  1407. pr_info("bau tunable error: should be %d values\n", e);
  1408. return -EINVAL;
  1409. }
  1410. p = instr + strspn(instr, WHITESPACE);
  1411. q = p;
  1412. for (cnt = 0; *p; p = q + strspn(q, WHITESPACE), cnt++) {
  1413. q = p + strcspn(p, WHITESPACE);
  1414. val = local_atoi(p);
  1415. switch (cnt) {
  1416. case 0:
  1417. if (val == 0) {
  1418. max_concurr = MAX_BAU_CONCURRENT;
  1419. max_concurr_const = MAX_BAU_CONCURRENT;
  1420. continue;
  1421. }
  1422. if (val < 1 || val > bcp->cpus_in_uvhub) {
  1423. pr_debug(
  1424. "Error: BAU max concurrent %d is invalid\n",
  1425. val);
  1426. return -EINVAL;
  1427. }
  1428. max_concurr = val;
  1429. max_concurr_const = val;
  1430. continue;
  1431. default:
  1432. if (val == 0)
  1433. *tunables[cnt].tunp = tunables[cnt].deflt;
  1434. else
  1435. *tunables[cnt].tunp = val;
  1436. continue;
  1437. }
  1438. if (q == p)
  1439. break;
  1440. }
  1441. return 0;
  1442. }
  1443. /*
  1444. * Handle a write to debugfs. (/sys/kernel/debug/sgi_uv/bau_tunables)
  1445. */
  1446. static ssize_t tunables_write(struct file *file, const char __user *user,
  1447. size_t count, loff_t *data)
  1448. {
  1449. int cpu;
  1450. int ret;
  1451. char instr[100];
  1452. struct bau_control *bcp;
  1453. if (count == 0 || count > sizeof(instr)-1)
  1454. return -EINVAL;
  1455. if (copy_from_user(instr, user, count))
  1456. return -EFAULT;
  1457. instr[count] = '\0';
  1458. cpu = get_cpu();
  1459. bcp = &per_cpu(bau_control, cpu);
  1460. ret = parse_tunables_write(bcp, instr, count);
  1461. put_cpu();
  1462. if (ret)
  1463. return ret;
  1464. for_each_present_cpu(cpu) {
  1465. bcp = &per_cpu(bau_control, cpu);
  1466. bcp->max_concurr = max_concurr;
  1467. bcp->max_concurr_const = max_concurr;
  1468. bcp->plugged_delay = plugged_delay;
  1469. bcp->plugsb4reset = plugsb4reset;
  1470. bcp->timeoutsb4reset = timeoutsb4reset;
  1471. bcp->ipi_reset_limit = ipi_reset_limit;
  1472. bcp->complete_threshold = complete_threshold;
  1473. bcp->cong_response_us = congested_respns_us;
  1474. bcp->cong_reps = congested_reps;
  1475. bcp->disabled_period = sec_2_cycles(disabled_period);
  1476. bcp->giveup_limit = giveup_limit;
  1477. }
  1478. return count;
  1479. }
  1480. static const struct seq_operations uv_ptc_seq_ops = {
  1481. .start = ptc_seq_start,
  1482. .next = ptc_seq_next,
  1483. .stop = ptc_seq_stop,
  1484. .show = ptc_seq_show
  1485. };
  1486. static int ptc_proc_open(struct inode *inode, struct file *file)
  1487. {
  1488. return seq_open(file, &uv_ptc_seq_ops);
  1489. }
  1490. static int tunables_open(struct inode *inode, struct file *file)
  1491. {
  1492. return 0;
  1493. }
  1494. static const struct file_operations proc_uv_ptc_operations = {
  1495. .open = ptc_proc_open,
  1496. .read = seq_read,
  1497. .write = ptc_proc_write,
  1498. .llseek = seq_lseek,
  1499. .release = seq_release,
  1500. };
  1501. static const struct file_operations tunables_fops = {
  1502. .open = tunables_open,
  1503. .read = tunables_read,
  1504. .write = tunables_write,
  1505. .llseek = default_llseek,
  1506. };
  1507. static int __init uv_ptc_init(void)
  1508. {
  1509. struct proc_dir_entry *proc_uv_ptc;
  1510. if (!is_uv_system())
  1511. return 0;
  1512. proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
  1513. &proc_uv_ptc_operations);
  1514. if (!proc_uv_ptc) {
  1515. pr_err("unable to create %s proc entry\n",
  1516. UV_PTC_BASENAME);
  1517. return -EINVAL;
  1518. }
  1519. tunables_dir = debugfs_create_dir(UV_BAU_TUNABLES_DIR, NULL);
  1520. if (!tunables_dir) {
  1521. pr_err("unable to create debugfs directory %s\n",
  1522. UV_BAU_TUNABLES_DIR);
  1523. return -EINVAL;
  1524. }
  1525. tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
  1526. tunables_dir, NULL, &tunables_fops);
  1527. if (!tunables_file) {
  1528. pr_err("unable to create debugfs file %s\n",
  1529. UV_BAU_TUNABLES_FILE);
  1530. return -EINVAL;
  1531. }
  1532. return 0;
  1533. }
  1534. /*
  1535. * Initialize the sending side's sending buffers.
  1536. */
  1537. static void activation_descriptor_init(int node, int pnode, int base_pnode)
  1538. {
  1539. int i;
  1540. int cpu;
  1541. int uv1 = 0;
  1542. unsigned long gpa;
  1543. unsigned long m;
  1544. unsigned long n;
  1545. size_t dsize;
  1546. struct bau_desc *bau_desc;
  1547. struct bau_desc *bd2;
  1548. struct uv1_bau_msg_header *uv1_hdr;
  1549. struct uv2_3_bau_msg_header *uv2_3_hdr;
  1550. struct bau_control *bcp;
  1551. /*
  1552. * each bau_desc is 64 bytes; there are 8 (ITEMS_PER_DESC)
  1553. * per cpu; and one per cpu on the uvhub (ADP_SZ)
  1554. */
  1555. dsize = sizeof(struct bau_desc) * ADP_SZ * ITEMS_PER_DESC;
  1556. bau_desc = kmalloc_node(dsize, GFP_KERNEL, node);
  1557. BUG_ON(!bau_desc);
  1558. gpa = uv_gpa(bau_desc);
  1559. n = uv_gpa_to_gnode(gpa);
  1560. m = ops.bau_gpa_to_offset(gpa);
  1561. if (is_uv1_hub())
  1562. uv1 = 1;
  1563. /* the 14-bit pnode */
  1564. write_mmr_descriptor_base(pnode, (n << UV_DESC_PSHIFT | m));
  1565. /*
  1566. * Initializing all 8 (ITEMS_PER_DESC) descriptors for each
  1567. * cpu even though we only use the first one; one descriptor can
  1568. * describe a broadcast to 256 uv hubs.
  1569. */
  1570. for (i = 0, bd2 = bau_desc; i < (ADP_SZ * ITEMS_PER_DESC); i++, bd2++) {
  1571. memset(bd2, 0, sizeof(struct bau_desc));
  1572. if (uv1) {
  1573. uv1_hdr = &bd2->header.uv1_hdr;
  1574. uv1_hdr->swack_flag = 1;
  1575. /*
  1576. * The base_dest_nasid set in the message header
  1577. * is the nasid of the first uvhub in the partition.
  1578. * The bit map will indicate destination pnode numbers
  1579. * relative to that base. They may not be consecutive
  1580. * if nasid striding is being used.
  1581. */
  1582. uv1_hdr->base_dest_nasid =
  1583. UV_PNODE_TO_NASID(base_pnode);
  1584. uv1_hdr->dest_subnodeid = UV_LB_SUBNODEID;
  1585. uv1_hdr->command = UV_NET_ENDPOINT_INTD;
  1586. uv1_hdr->int_both = 1;
  1587. /*
  1588. * all others need to be set to zero:
  1589. * fairness chaining multilevel count replied_to
  1590. */
  1591. } else {
  1592. /*
  1593. * BIOS uses legacy mode, but uv2 and uv3 hardware always
  1594. * uses native mode for selective broadcasts.
  1595. */
  1596. uv2_3_hdr = &bd2->header.uv2_3_hdr;
  1597. uv2_3_hdr->swack_flag = 1;
  1598. uv2_3_hdr->base_dest_nasid =
  1599. UV_PNODE_TO_NASID(base_pnode);
  1600. uv2_3_hdr->dest_subnodeid = UV_LB_SUBNODEID;
  1601. uv2_3_hdr->command = UV_NET_ENDPOINT_INTD;
  1602. }
  1603. }
  1604. for_each_present_cpu(cpu) {
  1605. if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
  1606. continue;
  1607. bcp = &per_cpu(bau_control, cpu);
  1608. bcp->descriptor_base = bau_desc;
  1609. }
  1610. }
  1611. /*
  1612. * initialize the destination side's receiving buffers
  1613. * entered for each uvhub in the partition
  1614. * - node is first node (kernel memory notion) on the uvhub
  1615. * - pnode is the uvhub's physical identifier
  1616. */
  1617. static void pq_init(int node, int pnode)
  1618. {
  1619. int cpu;
  1620. size_t plsize;
  1621. char *cp;
  1622. void *vp;
  1623. unsigned long gnode, first, last, tail;
  1624. struct bau_pq_entry *pqp;
  1625. struct bau_control *bcp;
  1626. plsize = (DEST_Q_SIZE + 1) * sizeof(struct bau_pq_entry);
  1627. vp = kmalloc_node(plsize, GFP_KERNEL, node);
  1628. pqp = (struct bau_pq_entry *)vp;
  1629. BUG_ON(!pqp);
  1630. cp = (char *)pqp + 31;
  1631. pqp = (struct bau_pq_entry *)(((unsigned long)cp >> 5) << 5);
  1632. for_each_present_cpu(cpu) {
  1633. if (pnode != uv_cpu_to_pnode(cpu))
  1634. continue;
  1635. /* for every cpu on this pnode: */
  1636. bcp = &per_cpu(bau_control, cpu);
  1637. bcp->queue_first = pqp;
  1638. bcp->bau_msg_head = pqp;
  1639. bcp->queue_last = pqp + (DEST_Q_SIZE - 1);
  1640. }
  1641. first = ops.bau_gpa_to_offset(uv_gpa(pqp));
  1642. last = ops.bau_gpa_to_offset(uv_gpa(pqp + (DEST_Q_SIZE - 1)));
  1643. /*
  1644. * Pre UV4, the gnode is required to locate the payload queue
  1645. * and the payload queue tail must be maintained by the kernel.
  1646. */
  1647. bcp = &per_cpu(bau_control, smp_processor_id());
  1648. if (bcp->uvhub_version <= 3) {
  1649. tail = first;
  1650. gnode = uv_gpa_to_gnode(uv_gpa(pqp));
  1651. first = (gnode << UV_PAYLOADQ_GNODE_SHIFT) | tail;
  1652. write_mmr_payload_tail(pnode, tail);
  1653. }
  1654. ops.write_payload_first(pnode, first);
  1655. ops.write_payload_last(pnode, last);
  1656. ops.write_g_sw_ack(pnode, 0xffffUL);
  1657. /* in effect, all msg_type's are set to MSG_NOOP */
  1658. memset(pqp, 0, sizeof(struct bau_pq_entry) * DEST_Q_SIZE);
  1659. }
  1660. /*
  1661. * Initialization of each UV hub's structures
  1662. */
  1663. static void __init init_uvhub(int uvhub, int vector, int base_pnode)
  1664. {
  1665. int node;
  1666. int pnode;
  1667. unsigned long apicid;
  1668. node = uvhub_to_first_node(uvhub);
  1669. pnode = uv_blade_to_pnode(uvhub);
  1670. activation_descriptor_init(node, pnode, base_pnode);
  1671. pq_init(node, pnode);
  1672. /*
  1673. * The below initialization can't be in firmware because the
  1674. * messaging IRQ will be determined by the OS.
  1675. */
  1676. apicid = uvhub_to_first_apicid(uvhub) | uv_apicid_hibits;
  1677. write_mmr_data_config(pnode, ((apicid << 32) | vector));
  1678. }
  1679. /*
  1680. * We will set BAU_MISC_CONTROL with a timeout period.
  1681. * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
  1682. * So the destination timeout period has to be calculated from them.
  1683. */
  1684. static int calculate_destination_timeout(void)
  1685. {
  1686. unsigned long mmr_image;
  1687. int mult1;
  1688. int mult2;
  1689. int index;
  1690. int base;
  1691. int ret;
  1692. unsigned long ts_ns;
  1693. if (is_uv1_hub()) {
  1694. mult1 = SOFTACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
  1695. mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
  1696. index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
  1697. mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
  1698. mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
  1699. ts_ns = timeout_base_ns[index];
  1700. ts_ns *= (mult1 * mult2);
  1701. ret = ts_ns / 1000;
  1702. } else {
  1703. /* same destination timeout for uv2 and uv3 */
  1704. /* 4 bits 0/1 for 10/80us base, 3 bits of multiplier */
  1705. mmr_image = uv_read_local_mmr(UVH_LB_BAU_MISC_CONTROL);
  1706. mmr_image = (mmr_image & UV_SA_MASK) >> UV_SA_SHFT;
  1707. if (mmr_image & (1L << UV2_ACK_UNITS_SHFT))
  1708. base = 80;
  1709. else
  1710. base = 10;
  1711. mult1 = mmr_image & UV2_ACK_MASK;
  1712. ret = mult1 * base;
  1713. }
  1714. return ret;
  1715. }
  1716. static void __init init_per_cpu_tunables(void)
  1717. {
  1718. int cpu;
  1719. struct bau_control *bcp;
  1720. for_each_present_cpu(cpu) {
  1721. bcp = &per_cpu(bau_control, cpu);
  1722. bcp->baudisabled = 0;
  1723. if (nobau)
  1724. bcp->nobau = true;
  1725. bcp->statp = &per_cpu(ptcstats, cpu);
  1726. /* time interval to catch a hardware stay-busy bug */
  1727. bcp->timeout_interval = usec_2_cycles(2*timeout_us);
  1728. bcp->max_concurr = max_concurr;
  1729. bcp->max_concurr_const = max_concurr;
  1730. bcp->plugged_delay = plugged_delay;
  1731. bcp->plugsb4reset = plugsb4reset;
  1732. bcp->timeoutsb4reset = timeoutsb4reset;
  1733. bcp->ipi_reset_limit = ipi_reset_limit;
  1734. bcp->complete_threshold = complete_threshold;
  1735. bcp->cong_response_us = congested_respns_us;
  1736. bcp->cong_reps = congested_reps;
  1737. bcp->disabled_period = sec_2_cycles(disabled_period);
  1738. bcp->giveup_limit = giveup_limit;
  1739. spin_lock_init(&bcp->queue_lock);
  1740. spin_lock_init(&bcp->uvhub_lock);
  1741. spin_lock_init(&bcp->disable_lock);
  1742. }
  1743. }
  1744. /*
  1745. * Scan all cpus to collect blade and socket summaries.
  1746. */
  1747. static int __init get_cpu_topology(int base_pnode,
  1748. struct uvhub_desc *uvhub_descs,
  1749. unsigned char *uvhub_mask)
  1750. {
  1751. int cpu;
  1752. int pnode;
  1753. int uvhub;
  1754. int socket;
  1755. struct bau_control *bcp;
  1756. struct uvhub_desc *bdp;
  1757. struct socket_desc *sdp;
  1758. for_each_present_cpu(cpu) {
  1759. bcp = &per_cpu(bau_control, cpu);
  1760. memset(bcp, 0, sizeof(struct bau_control));
  1761. pnode = uv_cpu_hub_info(cpu)->pnode;
  1762. if ((pnode - base_pnode) >= UV_DISTRIBUTION_SIZE) {
  1763. pr_emerg(
  1764. "cpu %d pnode %d-%d beyond %d; BAU disabled\n",
  1765. cpu, pnode, base_pnode, UV_DISTRIBUTION_SIZE);
  1766. return 1;
  1767. }
  1768. bcp->osnode = cpu_to_node(cpu);
  1769. bcp->partition_base_pnode = base_pnode;
  1770. uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
  1771. *(uvhub_mask + (uvhub/8)) |= (1 << (uvhub%8));
  1772. bdp = &uvhub_descs[uvhub];
  1773. bdp->num_cpus++;
  1774. bdp->uvhub = uvhub;
  1775. bdp->pnode = pnode;
  1776. /* kludge: 'assuming' one node per socket, and assuming that
  1777. disabling a socket just leaves a gap in node numbers */
  1778. socket = bcp->osnode & 1;
  1779. bdp->socket_mask |= (1 << socket);
  1780. sdp = &bdp->socket[socket];
  1781. sdp->cpu_number[sdp->num_cpus] = cpu;
  1782. sdp->num_cpus++;
  1783. if (sdp->num_cpus > MAX_CPUS_PER_SOCKET) {
  1784. pr_emerg("%d cpus per socket invalid\n",
  1785. sdp->num_cpus);
  1786. return 1;
  1787. }
  1788. }
  1789. return 0;
  1790. }
  1791. /*
  1792. * Each socket is to get a local array of pnodes/hubs.
  1793. */
  1794. static void make_per_cpu_thp(struct bau_control *smaster)
  1795. {
  1796. int cpu;
  1797. size_t hpsz = sizeof(struct hub_and_pnode) * num_possible_cpus();
  1798. smaster->thp = kmalloc_node(hpsz, GFP_KERNEL, smaster->osnode);
  1799. memset(smaster->thp, 0, hpsz);
  1800. for_each_present_cpu(cpu) {
  1801. smaster->thp[cpu].pnode = uv_cpu_hub_info(cpu)->pnode;
  1802. smaster->thp[cpu].uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
  1803. }
  1804. }
  1805. /*
  1806. * Each uvhub is to get a local cpumask.
  1807. */
  1808. static void make_per_hub_cpumask(struct bau_control *hmaster)
  1809. {
  1810. int sz = sizeof(cpumask_t);
  1811. hmaster->cpumask = kzalloc_node(sz, GFP_KERNEL, hmaster->osnode);
  1812. }
  1813. /*
  1814. * Initialize all the per_cpu information for the cpu's on a given socket,
  1815. * given what has been gathered into the socket_desc struct.
  1816. * And reports the chosen hub and socket masters back to the caller.
  1817. */
  1818. static int scan_sock(struct socket_desc *sdp, struct uvhub_desc *bdp,
  1819. struct bau_control **smasterp,
  1820. struct bau_control **hmasterp)
  1821. {
  1822. int i;
  1823. int cpu;
  1824. struct bau_control *bcp;
  1825. for (i = 0; i < sdp->num_cpus; i++) {
  1826. cpu = sdp->cpu_number[i];
  1827. bcp = &per_cpu(bau_control, cpu);
  1828. bcp->cpu = cpu;
  1829. if (i == 0) {
  1830. *smasterp = bcp;
  1831. if (!(*hmasterp))
  1832. *hmasterp = bcp;
  1833. }
  1834. bcp->cpus_in_uvhub = bdp->num_cpus;
  1835. bcp->cpus_in_socket = sdp->num_cpus;
  1836. bcp->socket_master = *smasterp;
  1837. bcp->uvhub = bdp->uvhub;
  1838. if (is_uv1_hub())
  1839. bcp->uvhub_version = 1;
  1840. else if (is_uv2_hub())
  1841. bcp->uvhub_version = 2;
  1842. else if (is_uv3_hub())
  1843. bcp->uvhub_version = 3;
  1844. else if (is_uv4_hub())
  1845. bcp->uvhub_version = 4;
  1846. else {
  1847. pr_emerg("uvhub version not 1, 2, 3, or 4\n");
  1848. return 1;
  1849. }
  1850. bcp->uvhub_master = *hmasterp;
  1851. bcp->uvhub_cpu = uv_cpu_blade_processor_id(cpu);
  1852. if (bcp->uvhub_cpu >= MAX_CPUS_PER_UVHUB) {
  1853. pr_emerg("%d cpus per uvhub invalid\n",
  1854. bcp->uvhub_cpu);
  1855. return 1;
  1856. }
  1857. }
  1858. return 0;
  1859. }
  1860. /*
  1861. * Summarize the blade and socket topology into the per_cpu structures.
  1862. */
  1863. static int __init summarize_uvhub_sockets(int nuvhubs,
  1864. struct uvhub_desc *uvhub_descs,
  1865. unsigned char *uvhub_mask)
  1866. {
  1867. int socket;
  1868. int uvhub;
  1869. unsigned short socket_mask;
  1870. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  1871. struct uvhub_desc *bdp;
  1872. struct bau_control *smaster = NULL;
  1873. struct bau_control *hmaster = NULL;
  1874. if (!(*(uvhub_mask + (uvhub/8)) & (1 << (uvhub%8))))
  1875. continue;
  1876. bdp = &uvhub_descs[uvhub];
  1877. socket_mask = bdp->socket_mask;
  1878. socket = 0;
  1879. while (socket_mask) {
  1880. struct socket_desc *sdp;
  1881. if ((socket_mask & 1)) {
  1882. sdp = &bdp->socket[socket];
  1883. if (scan_sock(sdp, bdp, &smaster, &hmaster))
  1884. return 1;
  1885. make_per_cpu_thp(smaster);
  1886. }
  1887. socket++;
  1888. socket_mask = (socket_mask >> 1);
  1889. }
  1890. make_per_hub_cpumask(hmaster);
  1891. }
  1892. return 0;
  1893. }
  1894. /*
  1895. * initialize the bau_control structure for each cpu
  1896. */
  1897. static int __init init_per_cpu(int nuvhubs, int base_part_pnode)
  1898. {
  1899. unsigned char *uvhub_mask;
  1900. void *vp;
  1901. struct uvhub_desc *uvhub_descs;
  1902. if (is_uv3_hub() || is_uv2_hub() || is_uv1_hub())
  1903. timeout_us = calculate_destination_timeout();
  1904. vp = kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
  1905. uvhub_descs = (struct uvhub_desc *)vp;
  1906. memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
  1907. uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL);
  1908. if (get_cpu_topology(base_part_pnode, uvhub_descs, uvhub_mask))
  1909. goto fail;
  1910. if (summarize_uvhub_sockets(nuvhubs, uvhub_descs, uvhub_mask))
  1911. goto fail;
  1912. kfree(uvhub_descs);
  1913. kfree(uvhub_mask);
  1914. init_per_cpu_tunables();
  1915. return 0;
  1916. fail:
  1917. kfree(uvhub_descs);
  1918. kfree(uvhub_mask);
  1919. return 1;
  1920. }
  1921. /*
  1922. * Initialization of BAU-related structures
  1923. */
  1924. static int __init uv_bau_init(void)
  1925. {
  1926. int uvhub;
  1927. int pnode;
  1928. int nuvhubs;
  1929. int cur_cpu;
  1930. int cpus;
  1931. int vector;
  1932. cpumask_var_t *mask;
  1933. if (!is_uv_system())
  1934. return 0;
  1935. if (is_uv4_hub())
  1936. ops = uv4_bau_ops;
  1937. else if (is_uv3_hub())
  1938. ops = uv123_bau_ops;
  1939. else if (is_uv2_hub())
  1940. ops = uv123_bau_ops;
  1941. else if (is_uv1_hub())
  1942. ops = uv123_bau_ops;
  1943. for_each_possible_cpu(cur_cpu) {
  1944. mask = &per_cpu(uv_flush_tlb_mask, cur_cpu);
  1945. zalloc_cpumask_var_node(mask, GFP_KERNEL, cpu_to_node(cur_cpu));
  1946. }
  1947. nuvhubs = uv_num_possible_blades();
  1948. congested_cycles = usec_2_cycles(congested_respns_us);
  1949. uv_base_pnode = 0x7fffffff;
  1950. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  1951. cpus = uv_blade_nr_possible_cpus(uvhub);
  1952. if (cpus && (uv_blade_to_pnode(uvhub) < uv_base_pnode))
  1953. uv_base_pnode = uv_blade_to_pnode(uvhub);
  1954. }
  1955. /* software timeouts are not supported on UV4 */
  1956. if (is_uv3_hub() || is_uv2_hub() || is_uv1_hub())
  1957. enable_timeouts();
  1958. if (init_per_cpu(nuvhubs, uv_base_pnode)) {
  1959. set_bau_off();
  1960. nobau_perm = 1;
  1961. return 0;
  1962. }
  1963. vector = UV_BAU_MESSAGE;
  1964. for_each_possible_blade(uvhub) {
  1965. if (uv_blade_nr_possible_cpus(uvhub))
  1966. init_uvhub(uvhub, vector, uv_base_pnode);
  1967. }
  1968. alloc_intr_gate(vector, uv_bau_message_intr1);
  1969. for_each_possible_blade(uvhub) {
  1970. if (uv_blade_nr_possible_cpus(uvhub)) {
  1971. unsigned long val;
  1972. unsigned long mmr;
  1973. pnode = uv_blade_to_pnode(uvhub);
  1974. /* INIT the bau */
  1975. val = 1L << 63;
  1976. write_gmmr_activation(pnode, val);
  1977. mmr = 1; /* should be 1 to broadcast to both sockets */
  1978. if (!is_uv1_hub())
  1979. write_mmr_data_broadcast(pnode, mmr);
  1980. }
  1981. }
  1982. return 0;
  1983. }
  1984. core_initcall(uv_bau_init);
  1985. fs_initcall(uv_ptc_init);