bpf_jit_comp.c 31 KB

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  1. /* bpf_jit_comp.c : BPF JIT compiler
  2. *
  3. * Copyright (C) 2011-2013 Eric Dumazet (eric.dumazet@gmail.com)
  4. * Internal BPF Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; version 2
  9. * of the License.
  10. */
  11. #include <linux/netdevice.h>
  12. #include <linux/filter.h>
  13. #include <linux/if_vlan.h>
  14. #include <asm/cacheflush.h>
  15. #include <linux/bpf.h>
  16. int bpf_jit_enable __read_mostly;
  17. /*
  18. * assembly code in arch/x86/net/bpf_jit.S
  19. */
  20. extern u8 sk_load_word[], sk_load_half[], sk_load_byte[];
  21. extern u8 sk_load_word_positive_offset[], sk_load_half_positive_offset[];
  22. extern u8 sk_load_byte_positive_offset[];
  23. extern u8 sk_load_word_negative_offset[], sk_load_half_negative_offset[];
  24. extern u8 sk_load_byte_negative_offset[];
  25. static u8 *emit_code(u8 *ptr, u32 bytes, unsigned int len)
  26. {
  27. if (len == 1)
  28. *ptr = bytes;
  29. else if (len == 2)
  30. *(u16 *)ptr = bytes;
  31. else {
  32. *(u32 *)ptr = bytes;
  33. barrier();
  34. }
  35. return ptr + len;
  36. }
  37. #define EMIT(bytes, len) \
  38. do { prog = emit_code(prog, bytes, len); cnt += len; } while (0)
  39. #define EMIT1(b1) EMIT(b1, 1)
  40. #define EMIT2(b1, b2) EMIT((b1) + ((b2) << 8), 2)
  41. #define EMIT3(b1, b2, b3) EMIT((b1) + ((b2) << 8) + ((b3) << 16), 3)
  42. #define EMIT4(b1, b2, b3, b4) EMIT((b1) + ((b2) << 8) + ((b3) << 16) + ((b4) << 24), 4)
  43. #define EMIT1_off32(b1, off) \
  44. do {EMIT1(b1); EMIT(off, 4); } while (0)
  45. #define EMIT2_off32(b1, b2, off) \
  46. do {EMIT2(b1, b2); EMIT(off, 4); } while (0)
  47. #define EMIT3_off32(b1, b2, b3, off) \
  48. do {EMIT3(b1, b2, b3); EMIT(off, 4); } while (0)
  49. #define EMIT4_off32(b1, b2, b3, b4, off) \
  50. do {EMIT4(b1, b2, b3, b4); EMIT(off, 4); } while (0)
  51. static bool is_imm8(int value)
  52. {
  53. return value <= 127 && value >= -128;
  54. }
  55. static bool is_simm32(s64 value)
  56. {
  57. return value == (s64) (s32) value;
  58. }
  59. /* mov dst, src */
  60. #define EMIT_mov(DST, SRC) \
  61. do {if (DST != SRC) \
  62. EMIT3(add_2mod(0x48, DST, SRC), 0x89, add_2reg(0xC0, DST, SRC)); \
  63. } while (0)
  64. static int bpf_size_to_x86_bytes(int bpf_size)
  65. {
  66. if (bpf_size == BPF_W)
  67. return 4;
  68. else if (bpf_size == BPF_H)
  69. return 2;
  70. else if (bpf_size == BPF_B)
  71. return 1;
  72. else if (bpf_size == BPF_DW)
  73. return 4; /* imm32 */
  74. else
  75. return 0;
  76. }
  77. /* list of x86 cond jumps opcodes (. + s8)
  78. * Add 0x10 (and an extra 0x0f) to generate far jumps (. + s32)
  79. */
  80. #define X86_JB 0x72
  81. #define X86_JAE 0x73
  82. #define X86_JE 0x74
  83. #define X86_JNE 0x75
  84. #define X86_JBE 0x76
  85. #define X86_JA 0x77
  86. #define X86_JGE 0x7D
  87. #define X86_JG 0x7F
  88. static void bpf_flush_icache(void *start, void *end)
  89. {
  90. mm_segment_t old_fs = get_fs();
  91. set_fs(KERNEL_DS);
  92. smp_wmb();
  93. flush_icache_range((unsigned long)start, (unsigned long)end);
  94. set_fs(old_fs);
  95. }
  96. #define CHOOSE_LOAD_FUNC(K, func) \
  97. ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
  98. /* pick a register outside of BPF range for JIT internal work */
  99. #define AUX_REG (MAX_BPF_JIT_REG + 1)
  100. /* The following table maps BPF registers to x64 registers.
  101. *
  102. * x64 register r12 is unused, since if used as base address
  103. * register in load/store instructions, it always needs an
  104. * extra byte of encoding and is callee saved.
  105. *
  106. * r9 caches skb->len - skb->data_len
  107. * r10 caches skb->data, and used for blinding (if enabled)
  108. */
  109. static const int reg2hex[] = {
  110. [BPF_REG_0] = 0, /* rax */
  111. [BPF_REG_1] = 7, /* rdi */
  112. [BPF_REG_2] = 6, /* rsi */
  113. [BPF_REG_3] = 2, /* rdx */
  114. [BPF_REG_4] = 1, /* rcx */
  115. [BPF_REG_5] = 0, /* r8 */
  116. [BPF_REG_6] = 3, /* rbx callee saved */
  117. [BPF_REG_7] = 5, /* r13 callee saved */
  118. [BPF_REG_8] = 6, /* r14 callee saved */
  119. [BPF_REG_9] = 7, /* r15 callee saved */
  120. [BPF_REG_FP] = 5, /* rbp readonly */
  121. [BPF_REG_AX] = 2, /* r10 temp register */
  122. [AUX_REG] = 3, /* r11 temp register */
  123. };
  124. /* is_ereg() == true if BPF register 'reg' maps to x64 r8..r15
  125. * which need extra byte of encoding.
  126. * rax,rcx,...,rbp have simpler encoding
  127. */
  128. static bool is_ereg(u32 reg)
  129. {
  130. return (1 << reg) & (BIT(BPF_REG_5) |
  131. BIT(AUX_REG) |
  132. BIT(BPF_REG_7) |
  133. BIT(BPF_REG_8) |
  134. BIT(BPF_REG_9) |
  135. BIT(BPF_REG_AX));
  136. }
  137. /* add modifiers if 'reg' maps to x64 registers r8..r15 */
  138. static u8 add_1mod(u8 byte, u32 reg)
  139. {
  140. if (is_ereg(reg))
  141. byte |= 1;
  142. return byte;
  143. }
  144. static u8 add_2mod(u8 byte, u32 r1, u32 r2)
  145. {
  146. if (is_ereg(r1))
  147. byte |= 1;
  148. if (is_ereg(r2))
  149. byte |= 4;
  150. return byte;
  151. }
  152. /* encode 'dst_reg' register into x64 opcode 'byte' */
  153. static u8 add_1reg(u8 byte, u32 dst_reg)
  154. {
  155. return byte + reg2hex[dst_reg];
  156. }
  157. /* encode 'dst_reg' and 'src_reg' registers into x64 opcode 'byte' */
  158. static u8 add_2reg(u8 byte, u32 dst_reg, u32 src_reg)
  159. {
  160. return byte + reg2hex[dst_reg] + (reg2hex[src_reg] << 3);
  161. }
  162. static void jit_fill_hole(void *area, unsigned int size)
  163. {
  164. /* fill whole space with int3 instructions */
  165. memset(area, 0xcc, size);
  166. }
  167. struct jit_context {
  168. int cleanup_addr; /* epilogue code offset */
  169. bool seen_ld_abs;
  170. bool seen_ax_reg;
  171. };
  172. /* maximum number of bytes emitted while JITing one eBPF insn */
  173. #define BPF_MAX_INSN_SIZE 128
  174. #define BPF_INSN_SAFETY 64
  175. #define STACKSIZE \
  176. (MAX_BPF_STACK + \
  177. 32 /* space for rbx, r13, r14, r15 */ + \
  178. 8 /* space for skb_copy_bits() buffer */)
  179. #define PROLOGUE_SIZE 48
  180. /* emit x64 prologue code for BPF program and check it's size.
  181. * bpf_tail_call helper will skip it while jumping into another program
  182. */
  183. static void emit_prologue(u8 **pprog)
  184. {
  185. u8 *prog = *pprog;
  186. int cnt = 0;
  187. EMIT1(0x55); /* push rbp */
  188. EMIT3(0x48, 0x89, 0xE5); /* mov rbp,rsp */
  189. /* sub rsp, STACKSIZE */
  190. EMIT3_off32(0x48, 0x81, 0xEC, STACKSIZE);
  191. /* all classic BPF filters use R6(rbx) save it */
  192. /* mov qword ptr [rbp-X],rbx */
  193. EMIT3_off32(0x48, 0x89, 0x9D, -STACKSIZE);
  194. /* bpf_convert_filter() maps classic BPF register X to R7 and uses R8
  195. * as temporary, so all tcpdump filters need to spill/fill R7(r13) and
  196. * R8(r14). R9(r15) spill could be made conditional, but there is only
  197. * one 'bpf_error' return path out of helper functions inside bpf_jit.S
  198. * The overhead of extra spill is negligible for any filter other
  199. * than synthetic ones. Therefore not worth adding complexity.
  200. */
  201. /* mov qword ptr [rbp-X],r13 */
  202. EMIT3_off32(0x4C, 0x89, 0xAD, -STACKSIZE + 8);
  203. /* mov qword ptr [rbp-X],r14 */
  204. EMIT3_off32(0x4C, 0x89, 0xB5, -STACKSIZE + 16);
  205. /* mov qword ptr [rbp-X],r15 */
  206. EMIT3_off32(0x4C, 0x89, 0xBD, -STACKSIZE + 24);
  207. /* Clear the tail call counter (tail_call_cnt): for eBPF tail calls
  208. * we need to reset the counter to 0. It's done in two instructions,
  209. * resetting rax register to 0 (xor on eax gets 0 extended), and
  210. * moving it to the counter location.
  211. */
  212. /* xor eax, eax */
  213. EMIT2(0x31, 0xc0);
  214. /* mov qword ptr [rbp-X], rax */
  215. EMIT3_off32(0x48, 0x89, 0x85, -STACKSIZE + 32);
  216. BUILD_BUG_ON(cnt != PROLOGUE_SIZE);
  217. *pprog = prog;
  218. }
  219. /* generate the following code:
  220. * ... bpf_tail_call(void *ctx, struct bpf_array *array, u64 index) ...
  221. * if (index >= array->map.max_entries)
  222. * goto out;
  223. * if (++tail_call_cnt > MAX_TAIL_CALL_CNT)
  224. * goto out;
  225. * prog = array->ptrs[index];
  226. * if (prog == NULL)
  227. * goto out;
  228. * goto *(prog->bpf_func + prologue_size);
  229. * out:
  230. */
  231. static void emit_bpf_tail_call(u8 **pprog)
  232. {
  233. u8 *prog = *pprog;
  234. int label1, label2, label3;
  235. int cnt = 0;
  236. /* rdi - pointer to ctx
  237. * rsi - pointer to bpf_array
  238. * rdx - index in bpf_array
  239. */
  240. /* if (index >= array->map.max_entries)
  241. * goto out;
  242. */
  243. EMIT4(0x48, 0x8B, 0x46, /* mov rax, qword ptr [rsi + 16] */
  244. offsetof(struct bpf_array, map.max_entries));
  245. EMIT3(0x48, 0x39, 0xD0); /* cmp rax, rdx */
  246. #define OFFSET1 47 /* number of bytes to jump */
  247. EMIT2(X86_JBE, OFFSET1); /* jbe out */
  248. label1 = cnt;
  249. /* if (tail_call_cnt > MAX_TAIL_CALL_CNT)
  250. * goto out;
  251. */
  252. EMIT2_off32(0x8B, 0x85, -STACKSIZE + 36); /* mov eax, dword ptr [rbp - 516] */
  253. EMIT3(0x83, 0xF8, MAX_TAIL_CALL_CNT); /* cmp eax, MAX_TAIL_CALL_CNT */
  254. #define OFFSET2 36
  255. EMIT2(X86_JA, OFFSET2); /* ja out */
  256. label2 = cnt;
  257. EMIT3(0x83, 0xC0, 0x01); /* add eax, 1 */
  258. EMIT2_off32(0x89, 0x85, -STACKSIZE + 36); /* mov dword ptr [rbp - 516], eax */
  259. /* prog = array->ptrs[index]; */
  260. EMIT4_off32(0x48, 0x8D, 0x84, 0xD6, /* lea rax, [rsi + rdx * 8 + offsetof(...)] */
  261. offsetof(struct bpf_array, ptrs));
  262. EMIT3(0x48, 0x8B, 0x00); /* mov rax, qword ptr [rax] */
  263. /* if (prog == NULL)
  264. * goto out;
  265. */
  266. EMIT4(0x48, 0x83, 0xF8, 0x00); /* cmp rax, 0 */
  267. #define OFFSET3 10
  268. EMIT2(X86_JE, OFFSET3); /* je out */
  269. label3 = cnt;
  270. /* goto *(prog->bpf_func + prologue_size); */
  271. EMIT4(0x48, 0x8B, 0x40, /* mov rax, qword ptr [rax + 32] */
  272. offsetof(struct bpf_prog, bpf_func));
  273. EMIT4(0x48, 0x83, 0xC0, PROLOGUE_SIZE); /* add rax, prologue_size */
  274. /* now we're ready to jump into next BPF program
  275. * rdi == ctx (1st arg)
  276. * rax == prog->bpf_func + prologue_size
  277. */
  278. EMIT2(0xFF, 0xE0); /* jmp rax */
  279. /* out: */
  280. BUILD_BUG_ON(cnt - label1 != OFFSET1);
  281. BUILD_BUG_ON(cnt - label2 != OFFSET2);
  282. BUILD_BUG_ON(cnt - label3 != OFFSET3);
  283. *pprog = prog;
  284. }
  285. static void emit_load_skb_data_hlen(u8 **pprog)
  286. {
  287. u8 *prog = *pprog;
  288. int cnt = 0;
  289. /* r9d = skb->len - skb->data_len (headlen)
  290. * r10 = skb->data
  291. */
  292. /* mov %r9d, off32(%rdi) */
  293. EMIT3_off32(0x44, 0x8b, 0x8f, offsetof(struct sk_buff, len));
  294. /* sub %r9d, off32(%rdi) */
  295. EMIT3_off32(0x44, 0x2b, 0x8f, offsetof(struct sk_buff, data_len));
  296. /* mov %r10, off32(%rdi) */
  297. EMIT3_off32(0x4c, 0x8b, 0x97, offsetof(struct sk_buff, data));
  298. *pprog = prog;
  299. }
  300. static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,
  301. int oldproglen, struct jit_context *ctx)
  302. {
  303. struct bpf_insn *insn = bpf_prog->insnsi;
  304. int insn_cnt = bpf_prog->len;
  305. bool seen_ld_abs = ctx->seen_ld_abs | (oldproglen == 0);
  306. bool seen_ax_reg = ctx->seen_ax_reg | (oldproglen == 0);
  307. bool seen_exit = false;
  308. u8 temp[BPF_MAX_INSN_SIZE + BPF_INSN_SAFETY];
  309. int i, cnt = 0;
  310. int proglen = 0;
  311. u8 *prog = temp;
  312. emit_prologue(&prog);
  313. if (seen_ld_abs)
  314. emit_load_skb_data_hlen(&prog);
  315. for (i = 0; i < insn_cnt; i++, insn++) {
  316. const s32 imm32 = insn->imm;
  317. u32 dst_reg = insn->dst_reg;
  318. u32 src_reg = insn->src_reg;
  319. u8 b1 = 0, b2 = 0, b3 = 0;
  320. s64 jmp_offset;
  321. u8 jmp_cond;
  322. bool reload_skb_data;
  323. int ilen;
  324. u8 *func;
  325. if (dst_reg == BPF_REG_AX || src_reg == BPF_REG_AX)
  326. ctx->seen_ax_reg = seen_ax_reg = true;
  327. switch (insn->code) {
  328. /* ALU */
  329. case BPF_ALU | BPF_ADD | BPF_X:
  330. case BPF_ALU | BPF_SUB | BPF_X:
  331. case BPF_ALU | BPF_AND | BPF_X:
  332. case BPF_ALU | BPF_OR | BPF_X:
  333. case BPF_ALU | BPF_XOR | BPF_X:
  334. case BPF_ALU64 | BPF_ADD | BPF_X:
  335. case BPF_ALU64 | BPF_SUB | BPF_X:
  336. case BPF_ALU64 | BPF_AND | BPF_X:
  337. case BPF_ALU64 | BPF_OR | BPF_X:
  338. case BPF_ALU64 | BPF_XOR | BPF_X:
  339. switch (BPF_OP(insn->code)) {
  340. case BPF_ADD: b2 = 0x01; break;
  341. case BPF_SUB: b2 = 0x29; break;
  342. case BPF_AND: b2 = 0x21; break;
  343. case BPF_OR: b2 = 0x09; break;
  344. case BPF_XOR: b2 = 0x31; break;
  345. }
  346. if (BPF_CLASS(insn->code) == BPF_ALU64)
  347. EMIT1(add_2mod(0x48, dst_reg, src_reg));
  348. else if (is_ereg(dst_reg) || is_ereg(src_reg))
  349. EMIT1(add_2mod(0x40, dst_reg, src_reg));
  350. EMIT2(b2, add_2reg(0xC0, dst_reg, src_reg));
  351. break;
  352. /* mov dst, src */
  353. case BPF_ALU64 | BPF_MOV | BPF_X:
  354. EMIT_mov(dst_reg, src_reg);
  355. break;
  356. /* mov32 dst, src */
  357. case BPF_ALU | BPF_MOV | BPF_X:
  358. if (is_ereg(dst_reg) || is_ereg(src_reg))
  359. EMIT1(add_2mod(0x40, dst_reg, src_reg));
  360. EMIT2(0x89, add_2reg(0xC0, dst_reg, src_reg));
  361. break;
  362. /* neg dst */
  363. case BPF_ALU | BPF_NEG:
  364. case BPF_ALU64 | BPF_NEG:
  365. if (BPF_CLASS(insn->code) == BPF_ALU64)
  366. EMIT1(add_1mod(0x48, dst_reg));
  367. else if (is_ereg(dst_reg))
  368. EMIT1(add_1mod(0x40, dst_reg));
  369. EMIT2(0xF7, add_1reg(0xD8, dst_reg));
  370. break;
  371. case BPF_ALU | BPF_ADD | BPF_K:
  372. case BPF_ALU | BPF_SUB | BPF_K:
  373. case BPF_ALU | BPF_AND | BPF_K:
  374. case BPF_ALU | BPF_OR | BPF_K:
  375. case BPF_ALU | BPF_XOR | BPF_K:
  376. case BPF_ALU64 | BPF_ADD | BPF_K:
  377. case BPF_ALU64 | BPF_SUB | BPF_K:
  378. case BPF_ALU64 | BPF_AND | BPF_K:
  379. case BPF_ALU64 | BPF_OR | BPF_K:
  380. case BPF_ALU64 | BPF_XOR | BPF_K:
  381. if (BPF_CLASS(insn->code) == BPF_ALU64)
  382. EMIT1(add_1mod(0x48, dst_reg));
  383. else if (is_ereg(dst_reg))
  384. EMIT1(add_1mod(0x40, dst_reg));
  385. switch (BPF_OP(insn->code)) {
  386. case BPF_ADD: b3 = 0xC0; break;
  387. case BPF_SUB: b3 = 0xE8; break;
  388. case BPF_AND: b3 = 0xE0; break;
  389. case BPF_OR: b3 = 0xC8; break;
  390. case BPF_XOR: b3 = 0xF0; break;
  391. }
  392. if (is_imm8(imm32))
  393. EMIT3(0x83, add_1reg(b3, dst_reg), imm32);
  394. else
  395. EMIT2_off32(0x81, add_1reg(b3, dst_reg), imm32);
  396. break;
  397. case BPF_ALU64 | BPF_MOV | BPF_K:
  398. /* optimization: if imm32 is positive,
  399. * use 'mov eax, imm32' (which zero-extends imm32)
  400. * to save 2 bytes
  401. */
  402. if (imm32 < 0) {
  403. /* 'mov rax, imm32' sign extends imm32 */
  404. b1 = add_1mod(0x48, dst_reg);
  405. b2 = 0xC7;
  406. b3 = 0xC0;
  407. EMIT3_off32(b1, b2, add_1reg(b3, dst_reg), imm32);
  408. break;
  409. }
  410. case BPF_ALU | BPF_MOV | BPF_K:
  411. /* optimization: if imm32 is zero, use 'xor <dst>,<dst>'
  412. * to save 3 bytes.
  413. */
  414. if (imm32 == 0) {
  415. if (is_ereg(dst_reg))
  416. EMIT1(add_2mod(0x40, dst_reg, dst_reg));
  417. b2 = 0x31; /* xor */
  418. b3 = 0xC0;
  419. EMIT2(b2, add_2reg(b3, dst_reg, dst_reg));
  420. break;
  421. }
  422. /* mov %eax, imm32 */
  423. if (is_ereg(dst_reg))
  424. EMIT1(add_1mod(0x40, dst_reg));
  425. EMIT1_off32(add_1reg(0xB8, dst_reg), imm32);
  426. break;
  427. case BPF_LD | BPF_IMM | BPF_DW:
  428. if (insn[1].code != 0 || insn[1].src_reg != 0 ||
  429. insn[1].dst_reg != 0 || insn[1].off != 0) {
  430. /* verifier must catch invalid insns */
  431. pr_err("invalid BPF_LD_IMM64 insn\n");
  432. return -EINVAL;
  433. }
  434. /* optimization: if imm64 is zero, use 'xor <dst>,<dst>'
  435. * to save 7 bytes.
  436. */
  437. if (insn[0].imm == 0 && insn[1].imm == 0) {
  438. b1 = add_2mod(0x48, dst_reg, dst_reg);
  439. b2 = 0x31; /* xor */
  440. b3 = 0xC0;
  441. EMIT3(b1, b2, add_2reg(b3, dst_reg, dst_reg));
  442. insn++;
  443. i++;
  444. break;
  445. }
  446. /* movabsq %rax, imm64 */
  447. EMIT2(add_1mod(0x48, dst_reg), add_1reg(0xB8, dst_reg));
  448. EMIT(insn[0].imm, 4);
  449. EMIT(insn[1].imm, 4);
  450. insn++;
  451. i++;
  452. break;
  453. /* dst %= src, dst /= src, dst %= imm32, dst /= imm32 */
  454. case BPF_ALU | BPF_MOD | BPF_X:
  455. case BPF_ALU | BPF_DIV | BPF_X:
  456. case BPF_ALU | BPF_MOD | BPF_K:
  457. case BPF_ALU | BPF_DIV | BPF_K:
  458. case BPF_ALU64 | BPF_MOD | BPF_X:
  459. case BPF_ALU64 | BPF_DIV | BPF_X:
  460. case BPF_ALU64 | BPF_MOD | BPF_K:
  461. case BPF_ALU64 | BPF_DIV | BPF_K:
  462. EMIT1(0x50); /* push rax */
  463. EMIT1(0x52); /* push rdx */
  464. if (BPF_SRC(insn->code) == BPF_X)
  465. /* mov r11, src_reg */
  466. EMIT_mov(AUX_REG, src_reg);
  467. else
  468. /* mov r11, imm32 */
  469. EMIT3_off32(0x49, 0xC7, 0xC3, imm32);
  470. /* mov rax, dst_reg */
  471. EMIT_mov(BPF_REG_0, dst_reg);
  472. /* xor edx, edx
  473. * equivalent to 'xor rdx, rdx', but one byte less
  474. */
  475. EMIT2(0x31, 0xd2);
  476. if (BPF_SRC(insn->code) == BPF_X) {
  477. /* if (src_reg == 0) return 0 */
  478. /* cmp r11, 0 */
  479. EMIT4(0x49, 0x83, 0xFB, 0x00);
  480. /* jne .+9 (skip over pop, pop, xor and jmp) */
  481. EMIT2(X86_JNE, 1 + 1 + 2 + 5);
  482. EMIT1(0x5A); /* pop rdx */
  483. EMIT1(0x58); /* pop rax */
  484. EMIT2(0x31, 0xc0); /* xor eax, eax */
  485. /* jmp cleanup_addr
  486. * addrs[i] - 11, because there are 11 bytes
  487. * after this insn: div, mov, pop, pop, mov
  488. */
  489. jmp_offset = ctx->cleanup_addr - (addrs[i] - 11);
  490. EMIT1_off32(0xE9, jmp_offset);
  491. }
  492. if (BPF_CLASS(insn->code) == BPF_ALU64)
  493. /* div r11 */
  494. EMIT3(0x49, 0xF7, 0xF3);
  495. else
  496. /* div r11d */
  497. EMIT3(0x41, 0xF7, 0xF3);
  498. if (BPF_OP(insn->code) == BPF_MOD)
  499. /* mov r11, rdx */
  500. EMIT3(0x49, 0x89, 0xD3);
  501. else
  502. /* mov r11, rax */
  503. EMIT3(0x49, 0x89, 0xC3);
  504. EMIT1(0x5A); /* pop rdx */
  505. EMIT1(0x58); /* pop rax */
  506. /* mov dst_reg, r11 */
  507. EMIT_mov(dst_reg, AUX_REG);
  508. break;
  509. case BPF_ALU | BPF_MUL | BPF_K:
  510. case BPF_ALU | BPF_MUL | BPF_X:
  511. case BPF_ALU64 | BPF_MUL | BPF_K:
  512. case BPF_ALU64 | BPF_MUL | BPF_X:
  513. EMIT1(0x50); /* push rax */
  514. EMIT1(0x52); /* push rdx */
  515. /* mov r11, dst_reg */
  516. EMIT_mov(AUX_REG, dst_reg);
  517. if (BPF_SRC(insn->code) == BPF_X)
  518. /* mov rax, src_reg */
  519. EMIT_mov(BPF_REG_0, src_reg);
  520. else
  521. /* mov rax, imm32 */
  522. EMIT3_off32(0x48, 0xC7, 0xC0, imm32);
  523. if (BPF_CLASS(insn->code) == BPF_ALU64)
  524. EMIT1(add_1mod(0x48, AUX_REG));
  525. else if (is_ereg(AUX_REG))
  526. EMIT1(add_1mod(0x40, AUX_REG));
  527. /* mul(q) r11 */
  528. EMIT2(0xF7, add_1reg(0xE0, AUX_REG));
  529. /* mov r11, rax */
  530. EMIT_mov(AUX_REG, BPF_REG_0);
  531. EMIT1(0x5A); /* pop rdx */
  532. EMIT1(0x58); /* pop rax */
  533. /* mov dst_reg, r11 */
  534. EMIT_mov(dst_reg, AUX_REG);
  535. break;
  536. /* shifts */
  537. case BPF_ALU | BPF_LSH | BPF_K:
  538. case BPF_ALU | BPF_RSH | BPF_K:
  539. case BPF_ALU | BPF_ARSH | BPF_K:
  540. case BPF_ALU64 | BPF_LSH | BPF_K:
  541. case BPF_ALU64 | BPF_RSH | BPF_K:
  542. case BPF_ALU64 | BPF_ARSH | BPF_K:
  543. if (BPF_CLASS(insn->code) == BPF_ALU64)
  544. EMIT1(add_1mod(0x48, dst_reg));
  545. else if (is_ereg(dst_reg))
  546. EMIT1(add_1mod(0x40, dst_reg));
  547. switch (BPF_OP(insn->code)) {
  548. case BPF_LSH: b3 = 0xE0; break;
  549. case BPF_RSH: b3 = 0xE8; break;
  550. case BPF_ARSH: b3 = 0xF8; break;
  551. }
  552. EMIT3(0xC1, add_1reg(b3, dst_reg), imm32);
  553. break;
  554. case BPF_ALU | BPF_LSH | BPF_X:
  555. case BPF_ALU | BPF_RSH | BPF_X:
  556. case BPF_ALU | BPF_ARSH | BPF_X:
  557. case BPF_ALU64 | BPF_LSH | BPF_X:
  558. case BPF_ALU64 | BPF_RSH | BPF_X:
  559. case BPF_ALU64 | BPF_ARSH | BPF_X:
  560. /* check for bad case when dst_reg == rcx */
  561. if (dst_reg == BPF_REG_4) {
  562. /* mov r11, dst_reg */
  563. EMIT_mov(AUX_REG, dst_reg);
  564. dst_reg = AUX_REG;
  565. }
  566. if (src_reg != BPF_REG_4) { /* common case */
  567. EMIT1(0x51); /* push rcx */
  568. /* mov rcx, src_reg */
  569. EMIT_mov(BPF_REG_4, src_reg);
  570. }
  571. /* shl %rax, %cl | shr %rax, %cl | sar %rax, %cl */
  572. if (BPF_CLASS(insn->code) == BPF_ALU64)
  573. EMIT1(add_1mod(0x48, dst_reg));
  574. else if (is_ereg(dst_reg))
  575. EMIT1(add_1mod(0x40, dst_reg));
  576. switch (BPF_OP(insn->code)) {
  577. case BPF_LSH: b3 = 0xE0; break;
  578. case BPF_RSH: b3 = 0xE8; break;
  579. case BPF_ARSH: b3 = 0xF8; break;
  580. }
  581. EMIT2(0xD3, add_1reg(b3, dst_reg));
  582. if (src_reg != BPF_REG_4)
  583. EMIT1(0x59); /* pop rcx */
  584. if (insn->dst_reg == BPF_REG_4)
  585. /* mov dst_reg, r11 */
  586. EMIT_mov(insn->dst_reg, AUX_REG);
  587. break;
  588. case BPF_ALU | BPF_END | BPF_FROM_BE:
  589. switch (imm32) {
  590. case 16:
  591. /* emit 'ror %ax, 8' to swap lower 2 bytes */
  592. EMIT1(0x66);
  593. if (is_ereg(dst_reg))
  594. EMIT1(0x41);
  595. EMIT3(0xC1, add_1reg(0xC8, dst_reg), 8);
  596. /* emit 'movzwl eax, ax' */
  597. if (is_ereg(dst_reg))
  598. EMIT3(0x45, 0x0F, 0xB7);
  599. else
  600. EMIT2(0x0F, 0xB7);
  601. EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
  602. break;
  603. case 32:
  604. /* emit 'bswap eax' to swap lower 4 bytes */
  605. if (is_ereg(dst_reg))
  606. EMIT2(0x41, 0x0F);
  607. else
  608. EMIT1(0x0F);
  609. EMIT1(add_1reg(0xC8, dst_reg));
  610. break;
  611. case 64:
  612. /* emit 'bswap rax' to swap 8 bytes */
  613. EMIT3(add_1mod(0x48, dst_reg), 0x0F,
  614. add_1reg(0xC8, dst_reg));
  615. break;
  616. }
  617. break;
  618. case BPF_ALU | BPF_END | BPF_FROM_LE:
  619. switch (imm32) {
  620. case 16:
  621. /* emit 'movzwl eax, ax' to zero extend 16-bit
  622. * into 64 bit
  623. */
  624. if (is_ereg(dst_reg))
  625. EMIT3(0x45, 0x0F, 0xB7);
  626. else
  627. EMIT2(0x0F, 0xB7);
  628. EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
  629. break;
  630. case 32:
  631. /* emit 'mov eax, eax' to clear upper 32-bits */
  632. if (is_ereg(dst_reg))
  633. EMIT1(0x45);
  634. EMIT2(0x89, add_2reg(0xC0, dst_reg, dst_reg));
  635. break;
  636. case 64:
  637. /* nop */
  638. break;
  639. }
  640. break;
  641. /* ST: *(u8*)(dst_reg + off) = imm */
  642. case BPF_ST | BPF_MEM | BPF_B:
  643. if (is_ereg(dst_reg))
  644. EMIT2(0x41, 0xC6);
  645. else
  646. EMIT1(0xC6);
  647. goto st;
  648. case BPF_ST | BPF_MEM | BPF_H:
  649. if (is_ereg(dst_reg))
  650. EMIT3(0x66, 0x41, 0xC7);
  651. else
  652. EMIT2(0x66, 0xC7);
  653. goto st;
  654. case BPF_ST | BPF_MEM | BPF_W:
  655. if (is_ereg(dst_reg))
  656. EMIT2(0x41, 0xC7);
  657. else
  658. EMIT1(0xC7);
  659. goto st;
  660. case BPF_ST | BPF_MEM | BPF_DW:
  661. EMIT2(add_1mod(0x48, dst_reg), 0xC7);
  662. st: if (is_imm8(insn->off))
  663. EMIT2(add_1reg(0x40, dst_reg), insn->off);
  664. else
  665. EMIT1_off32(add_1reg(0x80, dst_reg), insn->off);
  666. EMIT(imm32, bpf_size_to_x86_bytes(BPF_SIZE(insn->code)));
  667. break;
  668. /* STX: *(u8*)(dst_reg + off) = src_reg */
  669. case BPF_STX | BPF_MEM | BPF_B:
  670. /* emit 'mov byte ptr [rax + off], al' */
  671. if (is_ereg(dst_reg) || is_ereg(src_reg) ||
  672. /* have to add extra byte for x86 SIL, DIL regs */
  673. src_reg == BPF_REG_1 || src_reg == BPF_REG_2)
  674. EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88);
  675. else
  676. EMIT1(0x88);
  677. goto stx;
  678. case BPF_STX | BPF_MEM | BPF_H:
  679. if (is_ereg(dst_reg) || is_ereg(src_reg))
  680. EMIT3(0x66, add_2mod(0x40, dst_reg, src_reg), 0x89);
  681. else
  682. EMIT2(0x66, 0x89);
  683. goto stx;
  684. case BPF_STX | BPF_MEM | BPF_W:
  685. if (is_ereg(dst_reg) || is_ereg(src_reg))
  686. EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x89);
  687. else
  688. EMIT1(0x89);
  689. goto stx;
  690. case BPF_STX | BPF_MEM | BPF_DW:
  691. EMIT2(add_2mod(0x48, dst_reg, src_reg), 0x89);
  692. stx: if (is_imm8(insn->off))
  693. EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
  694. else
  695. EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
  696. insn->off);
  697. break;
  698. /* LDX: dst_reg = *(u8*)(src_reg + off) */
  699. case BPF_LDX | BPF_MEM | BPF_B:
  700. /* emit 'movzx rax, byte ptr [rax + off]' */
  701. EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB6);
  702. goto ldx;
  703. case BPF_LDX | BPF_MEM | BPF_H:
  704. /* emit 'movzx rax, word ptr [rax + off]' */
  705. EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB7);
  706. goto ldx;
  707. case BPF_LDX | BPF_MEM | BPF_W:
  708. /* emit 'mov eax, dword ptr [rax+0x14]' */
  709. if (is_ereg(dst_reg) || is_ereg(src_reg))
  710. EMIT2(add_2mod(0x40, src_reg, dst_reg), 0x8B);
  711. else
  712. EMIT1(0x8B);
  713. goto ldx;
  714. case BPF_LDX | BPF_MEM | BPF_DW:
  715. /* emit 'mov rax, qword ptr [rax+0x14]' */
  716. EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x8B);
  717. ldx: /* if insn->off == 0 we can save one extra byte, but
  718. * special case of x86 r13 which always needs an offset
  719. * is not worth the hassle
  720. */
  721. if (is_imm8(insn->off))
  722. EMIT2(add_2reg(0x40, src_reg, dst_reg), insn->off);
  723. else
  724. EMIT1_off32(add_2reg(0x80, src_reg, dst_reg),
  725. insn->off);
  726. break;
  727. /* STX XADD: lock *(u32*)(dst_reg + off) += src_reg */
  728. case BPF_STX | BPF_XADD | BPF_W:
  729. /* emit 'lock add dword ptr [rax + off], eax' */
  730. if (is_ereg(dst_reg) || is_ereg(src_reg))
  731. EMIT3(0xF0, add_2mod(0x40, dst_reg, src_reg), 0x01);
  732. else
  733. EMIT2(0xF0, 0x01);
  734. goto xadd;
  735. case BPF_STX | BPF_XADD | BPF_DW:
  736. EMIT3(0xF0, add_2mod(0x48, dst_reg, src_reg), 0x01);
  737. xadd: if (is_imm8(insn->off))
  738. EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
  739. else
  740. EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
  741. insn->off);
  742. break;
  743. /* call */
  744. case BPF_JMP | BPF_CALL:
  745. func = (u8 *) __bpf_call_base + imm32;
  746. jmp_offset = func - (image + addrs[i]);
  747. if (seen_ld_abs) {
  748. reload_skb_data = bpf_helper_changes_pkt_data(func);
  749. if (reload_skb_data) {
  750. EMIT1(0x57); /* push %rdi */
  751. jmp_offset += 22; /* pop, mov, sub, mov */
  752. } else {
  753. EMIT2(0x41, 0x52); /* push %r10 */
  754. EMIT2(0x41, 0x51); /* push %r9 */
  755. /* need to adjust jmp offset, since
  756. * pop %r9, pop %r10 take 4 bytes after call insn
  757. */
  758. jmp_offset += 4;
  759. }
  760. }
  761. if (!imm32 || !is_simm32(jmp_offset)) {
  762. pr_err("unsupported bpf func %d addr %p image %p\n",
  763. imm32, func, image);
  764. return -EINVAL;
  765. }
  766. EMIT1_off32(0xE8, jmp_offset);
  767. if (seen_ld_abs) {
  768. if (reload_skb_data) {
  769. EMIT1(0x5F); /* pop %rdi */
  770. emit_load_skb_data_hlen(&prog);
  771. } else {
  772. EMIT2(0x41, 0x59); /* pop %r9 */
  773. EMIT2(0x41, 0x5A); /* pop %r10 */
  774. }
  775. }
  776. break;
  777. case BPF_JMP | BPF_CALL | BPF_X:
  778. emit_bpf_tail_call(&prog);
  779. break;
  780. /* cond jump */
  781. case BPF_JMP | BPF_JEQ | BPF_X:
  782. case BPF_JMP | BPF_JNE | BPF_X:
  783. case BPF_JMP | BPF_JGT | BPF_X:
  784. case BPF_JMP | BPF_JGE | BPF_X:
  785. case BPF_JMP | BPF_JSGT | BPF_X:
  786. case BPF_JMP | BPF_JSGE | BPF_X:
  787. /* cmp dst_reg, src_reg */
  788. EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x39,
  789. add_2reg(0xC0, dst_reg, src_reg));
  790. goto emit_cond_jmp;
  791. case BPF_JMP | BPF_JSET | BPF_X:
  792. /* test dst_reg, src_reg */
  793. EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x85,
  794. add_2reg(0xC0, dst_reg, src_reg));
  795. goto emit_cond_jmp;
  796. case BPF_JMP | BPF_JSET | BPF_K:
  797. /* test dst_reg, imm32 */
  798. EMIT1(add_1mod(0x48, dst_reg));
  799. EMIT2_off32(0xF7, add_1reg(0xC0, dst_reg), imm32);
  800. goto emit_cond_jmp;
  801. case BPF_JMP | BPF_JEQ | BPF_K:
  802. case BPF_JMP | BPF_JNE | BPF_K:
  803. case BPF_JMP | BPF_JGT | BPF_K:
  804. case BPF_JMP | BPF_JGE | BPF_K:
  805. case BPF_JMP | BPF_JSGT | BPF_K:
  806. case BPF_JMP | BPF_JSGE | BPF_K:
  807. /* cmp dst_reg, imm8/32 */
  808. EMIT1(add_1mod(0x48, dst_reg));
  809. if (is_imm8(imm32))
  810. EMIT3(0x83, add_1reg(0xF8, dst_reg), imm32);
  811. else
  812. EMIT2_off32(0x81, add_1reg(0xF8, dst_reg), imm32);
  813. emit_cond_jmp: /* convert BPF opcode to x86 */
  814. switch (BPF_OP(insn->code)) {
  815. case BPF_JEQ:
  816. jmp_cond = X86_JE;
  817. break;
  818. case BPF_JSET:
  819. case BPF_JNE:
  820. jmp_cond = X86_JNE;
  821. break;
  822. case BPF_JGT:
  823. /* GT is unsigned '>', JA in x86 */
  824. jmp_cond = X86_JA;
  825. break;
  826. case BPF_JGE:
  827. /* GE is unsigned '>=', JAE in x86 */
  828. jmp_cond = X86_JAE;
  829. break;
  830. case BPF_JSGT:
  831. /* signed '>', GT in x86 */
  832. jmp_cond = X86_JG;
  833. break;
  834. case BPF_JSGE:
  835. /* signed '>=', GE in x86 */
  836. jmp_cond = X86_JGE;
  837. break;
  838. default: /* to silence gcc warning */
  839. return -EFAULT;
  840. }
  841. jmp_offset = addrs[i + insn->off] - addrs[i];
  842. if (is_imm8(jmp_offset)) {
  843. EMIT2(jmp_cond, jmp_offset);
  844. } else if (is_simm32(jmp_offset)) {
  845. EMIT2_off32(0x0F, jmp_cond + 0x10, jmp_offset);
  846. } else {
  847. pr_err("cond_jmp gen bug %llx\n", jmp_offset);
  848. return -EFAULT;
  849. }
  850. break;
  851. case BPF_JMP | BPF_JA:
  852. jmp_offset = addrs[i + insn->off] - addrs[i];
  853. if (!jmp_offset)
  854. /* optimize out nop jumps */
  855. break;
  856. emit_jmp:
  857. if (is_imm8(jmp_offset)) {
  858. EMIT2(0xEB, jmp_offset);
  859. } else if (is_simm32(jmp_offset)) {
  860. EMIT1_off32(0xE9, jmp_offset);
  861. } else {
  862. pr_err("jmp gen bug %llx\n", jmp_offset);
  863. return -EFAULT;
  864. }
  865. break;
  866. case BPF_LD | BPF_IND | BPF_W:
  867. func = sk_load_word;
  868. goto common_load;
  869. case BPF_LD | BPF_ABS | BPF_W:
  870. func = CHOOSE_LOAD_FUNC(imm32, sk_load_word);
  871. common_load:
  872. ctx->seen_ld_abs = seen_ld_abs = true;
  873. jmp_offset = func - (image + addrs[i]);
  874. if (!func || !is_simm32(jmp_offset)) {
  875. pr_err("unsupported bpf func %d addr %p image %p\n",
  876. imm32, func, image);
  877. return -EINVAL;
  878. }
  879. if (BPF_MODE(insn->code) == BPF_ABS) {
  880. /* mov %esi, imm32 */
  881. EMIT1_off32(0xBE, imm32);
  882. } else {
  883. /* mov %rsi, src_reg */
  884. EMIT_mov(BPF_REG_2, src_reg);
  885. if (imm32) {
  886. if (is_imm8(imm32))
  887. /* add %esi, imm8 */
  888. EMIT3(0x83, 0xC6, imm32);
  889. else
  890. /* add %esi, imm32 */
  891. EMIT2_off32(0x81, 0xC6, imm32);
  892. }
  893. }
  894. /* skb pointer is in R6 (%rbx), it will be copied into
  895. * %rdi if skb_copy_bits() call is necessary.
  896. * sk_load_* helpers also use %r10 and %r9d.
  897. * See bpf_jit.S
  898. */
  899. if (seen_ax_reg)
  900. /* r10 = skb->data, mov %r10, off32(%rbx) */
  901. EMIT3_off32(0x4c, 0x8b, 0x93,
  902. offsetof(struct sk_buff, data));
  903. EMIT1_off32(0xE8, jmp_offset); /* call */
  904. break;
  905. case BPF_LD | BPF_IND | BPF_H:
  906. func = sk_load_half;
  907. goto common_load;
  908. case BPF_LD | BPF_ABS | BPF_H:
  909. func = CHOOSE_LOAD_FUNC(imm32, sk_load_half);
  910. goto common_load;
  911. case BPF_LD | BPF_IND | BPF_B:
  912. func = sk_load_byte;
  913. goto common_load;
  914. case BPF_LD | BPF_ABS | BPF_B:
  915. func = CHOOSE_LOAD_FUNC(imm32, sk_load_byte);
  916. goto common_load;
  917. case BPF_JMP | BPF_EXIT:
  918. if (seen_exit) {
  919. jmp_offset = ctx->cleanup_addr - addrs[i];
  920. goto emit_jmp;
  921. }
  922. seen_exit = true;
  923. /* update cleanup_addr */
  924. ctx->cleanup_addr = proglen;
  925. /* mov rbx, qword ptr [rbp-X] */
  926. EMIT3_off32(0x48, 0x8B, 0x9D, -STACKSIZE);
  927. /* mov r13, qword ptr [rbp-X] */
  928. EMIT3_off32(0x4C, 0x8B, 0xAD, -STACKSIZE + 8);
  929. /* mov r14, qword ptr [rbp-X] */
  930. EMIT3_off32(0x4C, 0x8B, 0xB5, -STACKSIZE + 16);
  931. /* mov r15, qword ptr [rbp-X] */
  932. EMIT3_off32(0x4C, 0x8B, 0xBD, -STACKSIZE + 24);
  933. EMIT1(0xC9); /* leave */
  934. EMIT1(0xC3); /* ret */
  935. break;
  936. default:
  937. /* By design x64 JIT should support all BPF instructions
  938. * This error will be seen if new instruction was added
  939. * to interpreter, but not to JIT
  940. * or if there is junk in bpf_prog
  941. */
  942. pr_err("bpf_jit: unknown opcode %02x\n", insn->code);
  943. return -EINVAL;
  944. }
  945. ilen = prog - temp;
  946. if (ilen > BPF_MAX_INSN_SIZE) {
  947. pr_err("bpf_jit_compile fatal insn size error\n");
  948. return -EFAULT;
  949. }
  950. if (image) {
  951. if (unlikely(proglen + ilen > oldproglen)) {
  952. pr_err("bpf_jit_compile fatal error\n");
  953. return -EFAULT;
  954. }
  955. memcpy(image + proglen, temp, ilen);
  956. }
  957. proglen += ilen;
  958. addrs[i] = proglen;
  959. prog = temp;
  960. }
  961. return proglen;
  962. }
  963. void bpf_jit_compile(struct bpf_prog *prog)
  964. {
  965. }
  966. struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
  967. {
  968. struct bpf_binary_header *header = NULL;
  969. struct bpf_prog *tmp, *orig_prog = prog;
  970. int proglen, oldproglen = 0;
  971. struct jit_context ctx = {};
  972. bool tmp_blinded = false;
  973. u8 *image = NULL;
  974. int *addrs;
  975. int pass;
  976. int i;
  977. if (!bpf_jit_enable)
  978. return orig_prog;
  979. tmp = bpf_jit_blind_constants(prog);
  980. /* If blinding was requested and we failed during blinding,
  981. * we must fall back to the interpreter.
  982. */
  983. if (IS_ERR(tmp))
  984. return orig_prog;
  985. if (tmp != prog) {
  986. tmp_blinded = true;
  987. prog = tmp;
  988. }
  989. addrs = kmalloc(prog->len * sizeof(*addrs), GFP_KERNEL);
  990. if (!addrs) {
  991. prog = orig_prog;
  992. goto out;
  993. }
  994. /* Before first pass, make a rough estimation of addrs[]
  995. * each bpf instruction is translated to less than 64 bytes
  996. */
  997. for (proglen = 0, i = 0; i < prog->len; i++) {
  998. proglen += 64;
  999. addrs[i] = proglen;
  1000. }
  1001. ctx.cleanup_addr = proglen;
  1002. /* JITed image shrinks with every pass and the loop iterates
  1003. * until the image stops shrinking. Very large bpf programs
  1004. * may converge on the last pass. In such case do one more
  1005. * pass to emit the final image
  1006. */
  1007. for (pass = 0; pass < 10 || image; pass++) {
  1008. proglen = do_jit(prog, addrs, image, oldproglen, &ctx);
  1009. if (proglen <= 0) {
  1010. image = NULL;
  1011. if (header)
  1012. bpf_jit_binary_free(header);
  1013. prog = orig_prog;
  1014. goto out_addrs;
  1015. }
  1016. if (image) {
  1017. if (proglen != oldproglen) {
  1018. pr_err("bpf_jit: proglen=%d != oldproglen=%d\n",
  1019. proglen, oldproglen);
  1020. prog = orig_prog;
  1021. goto out_addrs;
  1022. }
  1023. break;
  1024. }
  1025. if (proglen == oldproglen) {
  1026. header = bpf_jit_binary_alloc(proglen, &image,
  1027. 1, jit_fill_hole);
  1028. if (!header) {
  1029. prog = orig_prog;
  1030. goto out_addrs;
  1031. }
  1032. }
  1033. oldproglen = proglen;
  1034. }
  1035. if (bpf_jit_enable > 1)
  1036. bpf_jit_dump(prog->len, proglen, pass + 1, image);
  1037. if (image) {
  1038. bpf_flush_icache(header, image + proglen);
  1039. set_memory_ro((unsigned long)header, header->pages);
  1040. prog->bpf_func = (void *)image;
  1041. prog->jited = 1;
  1042. } else {
  1043. prog = orig_prog;
  1044. }
  1045. out_addrs:
  1046. kfree(addrs);
  1047. out:
  1048. if (tmp_blinded)
  1049. bpf_jit_prog_release_other(prog, prog == orig_prog ?
  1050. tmp : orig_prog);
  1051. return prog;
  1052. }
  1053. void bpf_jit_free(struct bpf_prog *fp)
  1054. {
  1055. unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK;
  1056. struct bpf_binary_header *header = (void *)addr;
  1057. if (!fp->jited)
  1058. goto free_filter;
  1059. set_memory_rw(addr, header->pages);
  1060. bpf_jit_binary_free(header);
  1061. free_filter:
  1062. bpf_prog_unlock_free(fp);
  1063. }