init_64.c 32 KB

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  1. /*
  2. * linux/arch/x86_64/mm/init.c
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz>
  6. * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de>
  7. */
  8. #include <linux/signal.h>
  9. #include <linux/sched.h>
  10. #include <linux/kernel.h>
  11. #include <linux/errno.h>
  12. #include <linux/string.h>
  13. #include <linux/types.h>
  14. #include <linux/ptrace.h>
  15. #include <linux/mman.h>
  16. #include <linux/mm.h>
  17. #include <linux/swap.h>
  18. #include <linux/smp.h>
  19. #include <linux/init.h>
  20. #include <linux/initrd.h>
  21. #include <linux/pagemap.h>
  22. #include <linux/bootmem.h>
  23. #include <linux/memblock.h>
  24. #include <linux/proc_fs.h>
  25. #include <linux/pci.h>
  26. #include <linux/pfn.h>
  27. #include <linux/poison.h>
  28. #include <linux/dma-mapping.h>
  29. #include <linux/memory.h>
  30. #include <linux/memory_hotplug.h>
  31. #include <linux/memremap.h>
  32. #include <linux/nmi.h>
  33. #include <linux/gfp.h>
  34. #include <linux/kcore.h>
  35. #include <asm/processor.h>
  36. #include <asm/bios_ebda.h>
  37. #include <linux/uaccess.h>
  38. #include <asm/pgtable.h>
  39. #include <asm/pgalloc.h>
  40. #include <asm/dma.h>
  41. #include <asm/fixmap.h>
  42. #include <asm/e820.h>
  43. #include <asm/apic.h>
  44. #include <asm/tlb.h>
  45. #include <asm/mmu_context.h>
  46. #include <asm/proto.h>
  47. #include <asm/smp.h>
  48. #include <asm/sections.h>
  49. #include <asm/kdebug.h>
  50. #include <asm/numa.h>
  51. #include <asm/cacheflush.h>
  52. #include <asm/init.h>
  53. #include <asm/uv/uv.h>
  54. #include <asm/setup.h>
  55. #include "mm_internal.h"
  56. #include "ident_map.c"
  57. /*
  58. * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the
  59. * physical space so we can cache the place of the first one and move
  60. * around without checking the pgd every time.
  61. */
  62. pteval_t __supported_pte_mask __read_mostly = ~0;
  63. EXPORT_SYMBOL_GPL(__supported_pte_mask);
  64. int force_personality32;
  65. /*
  66. * noexec32=on|off
  67. * Control non executable heap for 32bit processes.
  68. * To control the stack too use noexec=off
  69. *
  70. * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default)
  71. * off PROT_READ implies PROT_EXEC
  72. */
  73. static int __init nonx32_setup(char *str)
  74. {
  75. if (!strcmp(str, "on"))
  76. force_personality32 &= ~READ_IMPLIES_EXEC;
  77. else if (!strcmp(str, "off"))
  78. force_personality32 |= READ_IMPLIES_EXEC;
  79. return 1;
  80. }
  81. __setup("noexec32=", nonx32_setup);
  82. /*
  83. * When memory was added make sure all the processes MM have
  84. * suitable PGD entries in the local PGD level page.
  85. */
  86. void sync_global_pgds(unsigned long start, unsigned long end)
  87. {
  88. unsigned long address;
  89. for (address = start; address <= end; address += PGDIR_SIZE) {
  90. const pgd_t *pgd_ref = pgd_offset_k(address);
  91. struct page *page;
  92. if (pgd_none(*pgd_ref))
  93. continue;
  94. spin_lock(&pgd_lock);
  95. list_for_each_entry(page, &pgd_list, lru) {
  96. pgd_t *pgd;
  97. spinlock_t *pgt_lock;
  98. pgd = (pgd_t *)page_address(page) + pgd_index(address);
  99. /* the pgt_lock only for Xen */
  100. pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
  101. spin_lock(pgt_lock);
  102. if (!pgd_none(*pgd_ref) && !pgd_none(*pgd))
  103. BUG_ON(pgd_page_vaddr(*pgd)
  104. != pgd_page_vaddr(*pgd_ref));
  105. if (pgd_none(*pgd))
  106. set_pgd(pgd, *pgd_ref);
  107. spin_unlock(pgt_lock);
  108. }
  109. spin_unlock(&pgd_lock);
  110. }
  111. }
  112. /*
  113. * NOTE: This function is marked __ref because it calls __init function
  114. * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0.
  115. */
  116. static __ref void *spp_getpage(void)
  117. {
  118. void *ptr;
  119. if (after_bootmem)
  120. ptr = (void *) get_zeroed_page(GFP_ATOMIC | __GFP_NOTRACK);
  121. else
  122. ptr = alloc_bootmem_pages(PAGE_SIZE);
  123. if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) {
  124. panic("set_pte_phys: cannot allocate page data %s\n",
  125. after_bootmem ? "after bootmem" : "");
  126. }
  127. pr_debug("spp_getpage %p\n", ptr);
  128. return ptr;
  129. }
  130. static pud_t *fill_pud(pgd_t *pgd, unsigned long vaddr)
  131. {
  132. if (pgd_none(*pgd)) {
  133. pud_t *pud = (pud_t *)spp_getpage();
  134. pgd_populate(&init_mm, pgd, pud);
  135. if (pud != pud_offset(pgd, 0))
  136. printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n",
  137. pud, pud_offset(pgd, 0));
  138. }
  139. return pud_offset(pgd, vaddr);
  140. }
  141. static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr)
  142. {
  143. if (pud_none(*pud)) {
  144. pmd_t *pmd = (pmd_t *) spp_getpage();
  145. pud_populate(&init_mm, pud, pmd);
  146. if (pmd != pmd_offset(pud, 0))
  147. printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n",
  148. pmd, pmd_offset(pud, 0));
  149. }
  150. return pmd_offset(pud, vaddr);
  151. }
  152. static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr)
  153. {
  154. if (pmd_none(*pmd)) {
  155. pte_t *pte = (pte_t *) spp_getpage();
  156. pmd_populate_kernel(&init_mm, pmd, pte);
  157. if (pte != pte_offset_kernel(pmd, 0))
  158. printk(KERN_ERR "PAGETABLE BUG #02!\n");
  159. }
  160. return pte_offset_kernel(pmd, vaddr);
  161. }
  162. void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
  163. {
  164. pud_t *pud;
  165. pmd_t *pmd;
  166. pte_t *pte;
  167. pud = pud_page + pud_index(vaddr);
  168. pmd = fill_pmd(pud, vaddr);
  169. pte = fill_pte(pmd, vaddr);
  170. set_pte(pte, new_pte);
  171. /*
  172. * It's enough to flush this one mapping.
  173. * (PGE mappings get flushed as well)
  174. */
  175. __flush_tlb_one(vaddr);
  176. }
  177. void set_pte_vaddr(unsigned long vaddr, pte_t pteval)
  178. {
  179. pgd_t *pgd;
  180. pud_t *pud_page;
  181. pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval));
  182. pgd = pgd_offset_k(vaddr);
  183. if (pgd_none(*pgd)) {
  184. printk(KERN_ERR
  185. "PGD FIXMAP MISSING, it should be setup in head.S!\n");
  186. return;
  187. }
  188. pud_page = (pud_t*)pgd_page_vaddr(*pgd);
  189. set_pte_vaddr_pud(pud_page, vaddr, pteval);
  190. }
  191. pmd_t * __init populate_extra_pmd(unsigned long vaddr)
  192. {
  193. pgd_t *pgd;
  194. pud_t *pud;
  195. pgd = pgd_offset_k(vaddr);
  196. pud = fill_pud(pgd, vaddr);
  197. return fill_pmd(pud, vaddr);
  198. }
  199. pte_t * __init populate_extra_pte(unsigned long vaddr)
  200. {
  201. pmd_t *pmd;
  202. pmd = populate_extra_pmd(vaddr);
  203. return fill_pte(pmd, vaddr);
  204. }
  205. /*
  206. * Create large page table mappings for a range of physical addresses.
  207. */
  208. static void __init __init_extra_mapping(unsigned long phys, unsigned long size,
  209. enum page_cache_mode cache)
  210. {
  211. pgd_t *pgd;
  212. pud_t *pud;
  213. pmd_t *pmd;
  214. pgprot_t prot;
  215. pgprot_val(prot) = pgprot_val(PAGE_KERNEL_LARGE) |
  216. pgprot_val(pgprot_4k_2_large(cachemode2pgprot(cache)));
  217. BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK));
  218. for (; size; phys += PMD_SIZE, size -= PMD_SIZE) {
  219. pgd = pgd_offset_k((unsigned long)__va(phys));
  220. if (pgd_none(*pgd)) {
  221. pud = (pud_t *) spp_getpage();
  222. set_pgd(pgd, __pgd(__pa(pud) | _KERNPG_TABLE |
  223. _PAGE_USER));
  224. }
  225. pud = pud_offset(pgd, (unsigned long)__va(phys));
  226. if (pud_none(*pud)) {
  227. pmd = (pmd_t *) spp_getpage();
  228. set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE |
  229. _PAGE_USER));
  230. }
  231. pmd = pmd_offset(pud, phys);
  232. BUG_ON(!pmd_none(*pmd));
  233. set_pmd(pmd, __pmd(phys | pgprot_val(prot)));
  234. }
  235. }
  236. void __init init_extra_mapping_wb(unsigned long phys, unsigned long size)
  237. {
  238. __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_WB);
  239. }
  240. void __init init_extra_mapping_uc(unsigned long phys, unsigned long size)
  241. {
  242. __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_UC);
  243. }
  244. /*
  245. * The head.S code sets up the kernel high mapping:
  246. *
  247. * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text)
  248. *
  249. * phys_base holds the negative offset to the kernel, which is added
  250. * to the compile time generated pmds. This results in invalid pmds up
  251. * to the point where we hit the physaddr 0 mapping.
  252. *
  253. * We limit the mappings to the region from _text to _brk_end. _brk_end
  254. * is rounded up to the 2MB boundary. This catches the invalid pmds as
  255. * well, as they are located before _text:
  256. */
  257. void __init cleanup_highmap(void)
  258. {
  259. unsigned long vaddr = __START_KERNEL_map;
  260. unsigned long vaddr_end = __START_KERNEL_map + KERNEL_IMAGE_SIZE;
  261. unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
  262. pmd_t *pmd = level2_kernel_pgt;
  263. /*
  264. * Native path, max_pfn_mapped is not set yet.
  265. * Xen has valid max_pfn_mapped set in
  266. * arch/x86/xen/mmu.c:xen_setup_kernel_pagetable().
  267. */
  268. if (max_pfn_mapped)
  269. vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT);
  270. for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) {
  271. if (pmd_none(*pmd))
  272. continue;
  273. if (vaddr < (unsigned long) _text || vaddr > end)
  274. set_pmd(pmd, __pmd(0));
  275. }
  276. }
  277. /*
  278. * Create PTE level page table mapping for physical addresses.
  279. * It returns the last physical address mapped.
  280. */
  281. static unsigned long __meminit
  282. phys_pte_init(pte_t *pte_page, unsigned long paddr, unsigned long paddr_end,
  283. pgprot_t prot)
  284. {
  285. unsigned long pages = 0, paddr_next;
  286. unsigned long paddr_last = paddr_end;
  287. pte_t *pte;
  288. int i;
  289. pte = pte_page + pte_index(paddr);
  290. i = pte_index(paddr);
  291. for (; i < PTRS_PER_PTE; i++, paddr = paddr_next, pte++) {
  292. paddr_next = (paddr & PAGE_MASK) + PAGE_SIZE;
  293. if (paddr >= paddr_end) {
  294. if (!after_bootmem &&
  295. !e820_any_mapped(paddr & PAGE_MASK, paddr_next,
  296. E820_RAM) &&
  297. !e820_any_mapped(paddr & PAGE_MASK, paddr_next,
  298. E820_RESERVED_KERN))
  299. set_pte(pte, __pte(0));
  300. continue;
  301. }
  302. /*
  303. * We will re-use the existing mapping.
  304. * Xen for example has some special requirements, like mapping
  305. * pagetable pages as RO. So assume someone who pre-setup
  306. * these mappings are more intelligent.
  307. */
  308. if (!pte_none(*pte)) {
  309. if (!after_bootmem)
  310. pages++;
  311. continue;
  312. }
  313. if (0)
  314. pr_info(" pte=%p addr=%lx pte=%016lx\n", pte, paddr,
  315. pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL).pte);
  316. pages++;
  317. set_pte(pte, pfn_pte(paddr >> PAGE_SHIFT, prot));
  318. paddr_last = (paddr & PAGE_MASK) + PAGE_SIZE;
  319. }
  320. update_page_count(PG_LEVEL_4K, pages);
  321. return paddr_last;
  322. }
  323. /*
  324. * Create PMD level page table mapping for physical addresses. The virtual
  325. * and physical address have to be aligned at this level.
  326. * It returns the last physical address mapped.
  327. */
  328. static unsigned long __meminit
  329. phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, unsigned long paddr_end,
  330. unsigned long page_size_mask, pgprot_t prot)
  331. {
  332. unsigned long pages = 0, paddr_next;
  333. unsigned long paddr_last = paddr_end;
  334. int i = pmd_index(paddr);
  335. for (; i < PTRS_PER_PMD; i++, paddr = paddr_next) {
  336. pmd_t *pmd = pmd_page + pmd_index(paddr);
  337. pte_t *pte;
  338. pgprot_t new_prot = prot;
  339. paddr_next = (paddr & PMD_MASK) + PMD_SIZE;
  340. if (paddr >= paddr_end) {
  341. if (!after_bootmem &&
  342. !e820_any_mapped(paddr & PMD_MASK, paddr_next,
  343. E820_RAM) &&
  344. !e820_any_mapped(paddr & PMD_MASK, paddr_next,
  345. E820_RESERVED_KERN))
  346. set_pmd(pmd, __pmd(0));
  347. continue;
  348. }
  349. if (!pmd_none(*pmd)) {
  350. if (!pmd_large(*pmd)) {
  351. spin_lock(&init_mm.page_table_lock);
  352. pte = (pte_t *)pmd_page_vaddr(*pmd);
  353. paddr_last = phys_pte_init(pte, paddr,
  354. paddr_end, prot);
  355. spin_unlock(&init_mm.page_table_lock);
  356. continue;
  357. }
  358. /*
  359. * If we are ok with PG_LEVEL_2M mapping, then we will
  360. * use the existing mapping,
  361. *
  362. * Otherwise, we will split the large page mapping but
  363. * use the same existing protection bits except for
  364. * large page, so that we don't violate Intel's TLB
  365. * Application note (317080) which says, while changing
  366. * the page sizes, new and old translations should
  367. * not differ with respect to page frame and
  368. * attributes.
  369. */
  370. if (page_size_mask & (1 << PG_LEVEL_2M)) {
  371. if (!after_bootmem)
  372. pages++;
  373. paddr_last = paddr_next;
  374. continue;
  375. }
  376. new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd));
  377. }
  378. if (page_size_mask & (1<<PG_LEVEL_2M)) {
  379. pages++;
  380. spin_lock(&init_mm.page_table_lock);
  381. set_pte((pte_t *)pmd,
  382. pfn_pte((paddr & PMD_MASK) >> PAGE_SHIFT,
  383. __pgprot(pgprot_val(prot) | _PAGE_PSE)));
  384. spin_unlock(&init_mm.page_table_lock);
  385. paddr_last = paddr_next;
  386. continue;
  387. }
  388. pte = alloc_low_page();
  389. paddr_last = phys_pte_init(pte, paddr, paddr_end, new_prot);
  390. spin_lock(&init_mm.page_table_lock);
  391. pmd_populate_kernel(&init_mm, pmd, pte);
  392. spin_unlock(&init_mm.page_table_lock);
  393. }
  394. update_page_count(PG_LEVEL_2M, pages);
  395. return paddr_last;
  396. }
  397. /*
  398. * Create PUD level page table mapping for physical addresses. The virtual
  399. * and physical address do not have to be aligned at this level. KASLR can
  400. * randomize virtual addresses up to this level.
  401. * It returns the last physical address mapped.
  402. */
  403. static unsigned long __meminit
  404. phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_end,
  405. unsigned long page_size_mask)
  406. {
  407. unsigned long pages = 0, paddr_next;
  408. unsigned long paddr_last = paddr_end;
  409. unsigned long vaddr = (unsigned long)__va(paddr);
  410. int i = pud_index(vaddr);
  411. for (; i < PTRS_PER_PUD; i++, paddr = paddr_next) {
  412. pud_t *pud;
  413. pmd_t *pmd;
  414. pgprot_t prot = PAGE_KERNEL;
  415. vaddr = (unsigned long)__va(paddr);
  416. pud = pud_page + pud_index(vaddr);
  417. paddr_next = (paddr & PUD_MASK) + PUD_SIZE;
  418. if (paddr >= paddr_end) {
  419. if (!after_bootmem &&
  420. !e820_any_mapped(paddr & PUD_MASK, paddr_next,
  421. E820_RAM) &&
  422. !e820_any_mapped(paddr & PUD_MASK, paddr_next,
  423. E820_RESERVED_KERN))
  424. set_pud(pud, __pud(0));
  425. continue;
  426. }
  427. if (!pud_none(*pud)) {
  428. if (!pud_large(*pud)) {
  429. pmd = pmd_offset(pud, 0);
  430. paddr_last = phys_pmd_init(pmd, paddr,
  431. paddr_end,
  432. page_size_mask,
  433. prot);
  434. __flush_tlb_all();
  435. continue;
  436. }
  437. /*
  438. * If we are ok with PG_LEVEL_1G mapping, then we will
  439. * use the existing mapping.
  440. *
  441. * Otherwise, we will split the gbpage mapping but use
  442. * the same existing protection bits except for large
  443. * page, so that we don't violate Intel's TLB
  444. * Application note (317080) which says, while changing
  445. * the page sizes, new and old translations should
  446. * not differ with respect to page frame and
  447. * attributes.
  448. */
  449. if (page_size_mask & (1 << PG_LEVEL_1G)) {
  450. if (!after_bootmem)
  451. pages++;
  452. paddr_last = paddr_next;
  453. continue;
  454. }
  455. prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud));
  456. }
  457. if (page_size_mask & (1<<PG_LEVEL_1G)) {
  458. pages++;
  459. spin_lock(&init_mm.page_table_lock);
  460. set_pte((pte_t *)pud,
  461. pfn_pte((paddr & PUD_MASK) >> PAGE_SHIFT,
  462. PAGE_KERNEL_LARGE));
  463. spin_unlock(&init_mm.page_table_lock);
  464. paddr_last = paddr_next;
  465. continue;
  466. }
  467. pmd = alloc_low_page();
  468. paddr_last = phys_pmd_init(pmd, paddr, paddr_end,
  469. page_size_mask, prot);
  470. spin_lock(&init_mm.page_table_lock);
  471. pud_populate(&init_mm, pud, pmd);
  472. spin_unlock(&init_mm.page_table_lock);
  473. }
  474. __flush_tlb_all();
  475. update_page_count(PG_LEVEL_1G, pages);
  476. return paddr_last;
  477. }
  478. /*
  479. * Create page table mapping for the physical memory for specific physical
  480. * addresses. The virtual and physical addresses have to be aligned on PMD level
  481. * down. It returns the last physical address mapped.
  482. */
  483. unsigned long __meminit
  484. kernel_physical_mapping_init(unsigned long paddr_start,
  485. unsigned long paddr_end,
  486. unsigned long page_size_mask)
  487. {
  488. bool pgd_changed = false;
  489. unsigned long vaddr, vaddr_start, vaddr_end, vaddr_next, paddr_last;
  490. paddr_last = paddr_end;
  491. vaddr = (unsigned long)__va(paddr_start);
  492. vaddr_end = (unsigned long)__va(paddr_end);
  493. vaddr_start = vaddr;
  494. for (; vaddr < vaddr_end; vaddr = vaddr_next) {
  495. pgd_t *pgd = pgd_offset_k(vaddr);
  496. pud_t *pud;
  497. vaddr_next = (vaddr & PGDIR_MASK) + PGDIR_SIZE;
  498. if (pgd_val(*pgd)) {
  499. pud = (pud_t *)pgd_page_vaddr(*pgd);
  500. paddr_last = phys_pud_init(pud, __pa(vaddr),
  501. __pa(vaddr_end),
  502. page_size_mask);
  503. continue;
  504. }
  505. pud = alloc_low_page();
  506. paddr_last = phys_pud_init(pud, __pa(vaddr), __pa(vaddr_end),
  507. page_size_mask);
  508. spin_lock(&init_mm.page_table_lock);
  509. pgd_populate(&init_mm, pgd, pud);
  510. spin_unlock(&init_mm.page_table_lock);
  511. pgd_changed = true;
  512. }
  513. if (pgd_changed)
  514. sync_global_pgds(vaddr_start, vaddr_end - 1);
  515. __flush_tlb_all();
  516. return paddr_last;
  517. }
  518. #ifndef CONFIG_NUMA
  519. void __init initmem_init(void)
  520. {
  521. memblock_set_node(0, (phys_addr_t)ULLONG_MAX, &memblock.memory, 0);
  522. }
  523. #endif
  524. void __init paging_init(void)
  525. {
  526. sparse_memory_present_with_active_regions(MAX_NUMNODES);
  527. sparse_init();
  528. /*
  529. * clear the default setting with node 0
  530. * note: don't use nodes_clear here, that is really clearing when
  531. * numa support is not compiled in, and later node_set_state
  532. * will not set it back.
  533. */
  534. node_clear_state(0, N_MEMORY);
  535. if (N_MEMORY != N_NORMAL_MEMORY)
  536. node_clear_state(0, N_NORMAL_MEMORY);
  537. zone_sizes_init();
  538. }
  539. /*
  540. * Memory hotplug specific functions
  541. */
  542. #ifdef CONFIG_MEMORY_HOTPLUG
  543. /*
  544. * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need
  545. * updating.
  546. */
  547. static void update_end_of_memory_vars(u64 start, u64 size)
  548. {
  549. unsigned long end_pfn = PFN_UP(start + size);
  550. if (end_pfn > max_pfn) {
  551. max_pfn = end_pfn;
  552. max_low_pfn = end_pfn;
  553. high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
  554. }
  555. }
  556. /*
  557. * Memory is added always to NORMAL zone. This means you will never get
  558. * additional DMA/DMA32 memory.
  559. */
  560. int arch_add_memory(int nid, u64 start, u64 size, bool for_device)
  561. {
  562. struct pglist_data *pgdat = NODE_DATA(nid);
  563. struct zone *zone = pgdat->node_zones +
  564. zone_for_memory(nid, start, size, ZONE_NORMAL, for_device);
  565. unsigned long start_pfn = start >> PAGE_SHIFT;
  566. unsigned long nr_pages = size >> PAGE_SHIFT;
  567. int ret;
  568. init_memory_mapping(start, start + size);
  569. ret = __add_pages(nid, zone, start_pfn, nr_pages);
  570. WARN_ON_ONCE(ret);
  571. /* update max_pfn, max_low_pfn and high_memory */
  572. update_end_of_memory_vars(start, size);
  573. return ret;
  574. }
  575. EXPORT_SYMBOL_GPL(arch_add_memory);
  576. #define PAGE_INUSE 0xFD
  577. static void __meminit free_pagetable(struct page *page, int order)
  578. {
  579. unsigned long magic;
  580. unsigned int nr_pages = 1 << order;
  581. struct vmem_altmap *altmap = to_vmem_altmap((unsigned long) page);
  582. if (altmap) {
  583. vmem_altmap_free(altmap, nr_pages);
  584. return;
  585. }
  586. /* bootmem page has reserved flag */
  587. if (PageReserved(page)) {
  588. __ClearPageReserved(page);
  589. magic = (unsigned long)page->lru.next;
  590. if (magic == SECTION_INFO || magic == MIX_SECTION_INFO) {
  591. while (nr_pages--)
  592. put_page_bootmem(page++);
  593. } else
  594. while (nr_pages--)
  595. free_reserved_page(page++);
  596. } else
  597. free_pages((unsigned long)page_address(page), order);
  598. }
  599. static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd)
  600. {
  601. pte_t *pte;
  602. int i;
  603. for (i = 0; i < PTRS_PER_PTE; i++) {
  604. pte = pte_start + i;
  605. if (!pte_none(*pte))
  606. return;
  607. }
  608. /* free a pte talbe */
  609. free_pagetable(pmd_page(*pmd), 0);
  610. spin_lock(&init_mm.page_table_lock);
  611. pmd_clear(pmd);
  612. spin_unlock(&init_mm.page_table_lock);
  613. }
  614. static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud)
  615. {
  616. pmd_t *pmd;
  617. int i;
  618. for (i = 0; i < PTRS_PER_PMD; i++) {
  619. pmd = pmd_start + i;
  620. if (!pmd_none(*pmd))
  621. return;
  622. }
  623. /* free a pmd talbe */
  624. free_pagetable(pud_page(*pud), 0);
  625. spin_lock(&init_mm.page_table_lock);
  626. pud_clear(pud);
  627. spin_unlock(&init_mm.page_table_lock);
  628. }
  629. static void __meminit
  630. remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end,
  631. bool direct)
  632. {
  633. unsigned long next, pages = 0;
  634. pte_t *pte;
  635. void *page_addr;
  636. phys_addr_t phys_addr;
  637. pte = pte_start + pte_index(addr);
  638. for (; addr < end; addr = next, pte++) {
  639. next = (addr + PAGE_SIZE) & PAGE_MASK;
  640. if (next > end)
  641. next = end;
  642. if (!pte_present(*pte))
  643. continue;
  644. /*
  645. * We mapped [0,1G) memory as identity mapping when
  646. * initializing, in arch/x86/kernel/head_64.S. These
  647. * pagetables cannot be removed.
  648. */
  649. phys_addr = pte_val(*pte) + (addr & PAGE_MASK);
  650. if (phys_addr < (phys_addr_t)0x40000000)
  651. return;
  652. if (PAGE_ALIGNED(addr) && PAGE_ALIGNED(next)) {
  653. /*
  654. * Do not free direct mapping pages since they were
  655. * freed when offlining, or simplely not in use.
  656. */
  657. if (!direct)
  658. free_pagetable(pte_page(*pte), 0);
  659. spin_lock(&init_mm.page_table_lock);
  660. pte_clear(&init_mm, addr, pte);
  661. spin_unlock(&init_mm.page_table_lock);
  662. /* For non-direct mapping, pages means nothing. */
  663. pages++;
  664. } else {
  665. /*
  666. * If we are here, we are freeing vmemmap pages since
  667. * direct mapped memory ranges to be freed are aligned.
  668. *
  669. * If we are not removing the whole page, it means
  670. * other page structs in this page are being used and
  671. * we canot remove them. So fill the unused page_structs
  672. * with 0xFD, and remove the page when it is wholly
  673. * filled with 0xFD.
  674. */
  675. memset((void *)addr, PAGE_INUSE, next - addr);
  676. page_addr = page_address(pte_page(*pte));
  677. if (!memchr_inv(page_addr, PAGE_INUSE, PAGE_SIZE)) {
  678. free_pagetable(pte_page(*pte), 0);
  679. spin_lock(&init_mm.page_table_lock);
  680. pte_clear(&init_mm, addr, pte);
  681. spin_unlock(&init_mm.page_table_lock);
  682. }
  683. }
  684. }
  685. /* Call free_pte_table() in remove_pmd_table(). */
  686. flush_tlb_all();
  687. if (direct)
  688. update_page_count(PG_LEVEL_4K, -pages);
  689. }
  690. static void __meminit
  691. remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end,
  692. bool direct)
  693. {
  694. unsigned long next, pages = 0;
  695. pte_t *pte_base;
  696. pmd_t *pmd;
  697. void *page_addr;
  698. pmd = pmd_start + pmd_index(addr);
  699. for (; addr < end; addr = next, pmd++) {
  700. next = pmd_addr_end(addr, end);
  701. if (!pmd_present(*pmd))
  702. continue;
  703. if (pmd_large(*pmd)) {
  704. if (IS_ALIGNED(addr, PMD_SIZE) &&
  705. IS_ALIGNED(next, PMD_SIZE)) {
  706. if (!direct)
  707. free_pagetable(pmd_page(*pmd),
  708. get_order(PMD_SIZE));
  709. spin_lock(&init_mm.page_table_lock);
  710. pmd_clear(pmd);
  711. spin_unlock(&init_mm.page_table_lock);
  712. pages++;
  713. } else {
  714. /* If here, we are freeing vmemmap pages. */
  715. memset((void *)addr, PAGE_INUSE, next - addr);
  716. page_addr = page_address(pmd_page(*pmd));
  717. if (!memchr_inv(page_addr, PAGE_INUSE,
  718. PMD_SIZE)) {
  719. free_pagetable(pmd_page(*pmd),
  720. get_order(PMD_SIZE));
  721. spin_lock(&init_mm.page_table_lock);
  722. pmd_clear(pmd);
  723. spin_unlock(&init_mm.page_table_lock);
  724. }
  725. }
  726. continue;
  727. }
  728. pte_base = (pte_t *)pmd_page_vaddr(*pmd);
  729. remove_pte_table(pte_base, addr, next, direct);
  730. free_pte_table(pte_base, pmd);
  731. }
  732. /* Call free_pmd_table() in remove_pud_table(). */
  733. if (direct)
  734. update_page_count(PG_LEVEL_2M, -pages);
  735. }
  736. static void __meminit
  737. remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end,
  738. bool direct)
  739. {
  740. unsigned long next, pages = 0;
  741. pmd_t *pmd_base;
  742. pud_t *pud;
  743. void *page_addr;
  744. pud = pud_start + pud_index(addr);
  745. for (; addr < end; addr = next, pud++) {
  746. next = pud_addr_end(addr, end);
  747. if (!pud_present(*pud))
  748. continue;
  749. if (pud_large(*pud)) {
  750. if (IS_ALIGNED(addr, PUD_SIZE) &&
  751. IS_ALIGNED(next, PUD_SIZE)) {
  752. if (!direct)
  753. free_pagetable(pud_page(*pud),
  754. get_order(PUD_SIZE));
  755. spin_lock(&init_mm.page_table_lock);
  756. pud_clear(pud);
  757. spin_unlock(&init_mm.page_table_lock);
  758. pages++;
  759. } else {
  760. /* If here, we are freeing vmemmap pages. */
  761. memset((void *)addr, PAGE_INUSE, next - addr);
  762. page_addr = page_address(pud_page(*pud));
  763. if (!memchr_inv(page_addr, PAGE_INUSE,
  764. PUD_SIZE)) {
  765. free_pagetable(pud_page(*pud),
  766. get_order(PUD_SIZE));
  767. spin_lock(&init_mm.page_table_lock);
  768. pud_clear(pud);
  769. spin_unlock(&init_mm.page_table_lock);
  770. }
  771. }
  772. continue;
  773. }
  774. pmd_base = (pmd_t *)pud_page_vaddr(*pud);
  775. remove_pmd_table(pmd_base, addr, next, direct);
  776. free_pmd_table(pmd_base, pud);
  777. }
  778. if (direct)
  779. update_page_count(PG_LEVEL_1G, -pages);
  780. }
  781. /* start and end are both virtual address. */
  782. static void __meminit
  783. remove_pagetable(unsigned long start, unsigned long end, bool direct)
  784. {
  785. unsigned long next;
  786. unsigned long addr;
  787. pgd_t *pgd;
  788. pud_t *pud;
  789. for (addr = start; addr < end; addr = next) {
  790. next = pgd_addr_end(addr, end);
  791. pgd = pgd_offset_k(addr);
  792. if (!pgd_present(*pgd))
  793. continue;
  794. pud = (pud_t *)pgd_page_vaddr(*pgd);
  795. remove_pud_table(pud, addr, next, direct);
  796. }
  797. flush_tlb_all();
  798. }
  799. void __ref vmemmap_free(unsigned long start, unsigned long end)
  800. {
  801. remove_pagetable(start, end, false);
  802. }
  803. #ifdef CONFIG_MEMORY_HOTREMOVE
  804. static void __meminit
  805. kernel_physical_mapping_remove(unsigned long start, unsigned long end)
  806. {
  807. start = (unsigned long)__va(start);
  808. end = (unsigned long)__va(end);
  809. remove_pagetable(start, end, true);
  810. }
  811. int __ref arch_remove_memory(u64 start, u64 size)
  812. {
  813. unsigned long start_pfn = start >> PAGE_SHIFT;
  814. unsigned long nr_pages = size >> PAGE_SHIFT;
  815. struct page *page = pfn_to_page(start_pfn);
  816. struct vmem_altmap *altmap;
  817. struct zone *zone;
  818. int ret;
  819. /* With altmap the first mapped page is offset from @start */
  820. altmap = to_vmem_altmap((unsigned long) page);
  821. if (altmap)
  822. page += vmem_altmap_offset(altmap);
  823. zone = page_zone(page);
  824. ret = __remove_pages(zone, start_pfn, nr_pages);
  825. WARN_ON_ONCE(ret);
  826. kernel_physical_mapping_remove(start, start + size);
  827. return ret;
  828. }
  829. #endif
  830. #endif /* CONFIG_MEMORY_HOTPLUG */
  831. static struct kcore_list kcore_vsyscall;
  832. static void __init register_page_bootmem_info(void)
  833. {
  834. #ifdef CONFIG_NUMA
  835. int i;
  836. for_each_online_node(i)
  837. register_page_bootmem_info_node(NODE_DATA(i));
  838. #endif
  839. }
  840. void __init mem_init(void)
  841. {
  842. pci_iommu_alloc();
  843. /* clear_bss() already clear the empty_zero_page */
  844. register_page_bootmem_info();
  845. /* this will put all memory onto the freelists */
  846. free_all_bootmem();
  847. after_bootmem = 1;
  848. /* Register memory areas for /proc/kcore */
  849. kclist_add(&kcore_vsyscall, (void *)VSYSCALL_ADDR,
  850. PAGE_SIZE, KCORE_OTHER);
  851. mem_init_print_info(NULL);
  852. }
  853. const int rodata_test_data = 0xC3;
  854. EXPORT_SYMBOL_GPL(rodata_test_data);
  855. int kernel_set_to_readonly;
  856. void set_kernel_text_rw(void)
  857. {
  858. unsigned long start = PFN_ALIGN(_text);
  859. unsigned long end = PFN_ALIGN(__stop___ex_table);
  860. if (!kernel_set_to_readonly)
  861. return;
  862. pr_debug("Set kernel text: %lx - %lx for read write\n",
  863. start, end);
  864. /*
  865. * Make the kernel identity mapping for text RW. Kernel text
  866. * mapping will always be RO. Refer to the comment in
  867. * static_protections() in pageattr.c
  868. */
  869. set_memory_rw(start, (end - start) >> PAGE_SHIFT);
  870. }
  871. void set_kernel_text_ro(void)
  872. {
  873. unsigned long start = PFN_ALIGN(_text);
  874. unsigned long end = PFN_ALIGN(__stop___ex_table);
  875. if (!kernel_set_to_readonly)
  876. return;
  877. pr_debug("Set kernel text: %lx - %lx for read only\n",
  878. start, end);
  879. /*
  880. * Set the kernel identity mapping for text RO.
  881. */
  882. set_memory_ro(start, (end - start) >> PAGE_SHIFT);
  883. }
  884. void mark_rodata_ro(void)
  885. {
  886. unsigned long start = PFN_ALIGN(_text);
  887. unsigned long rodata_start = PFN_ALIGN(__start_rodata);
  888. unsigned long end = (unsigned long) &__end_rodata_hpage_align;
  889. unsigned long text_end = PFN_ALIGN(&__stop___ex_table);
  890. unsigned long rodata_end = PFN_ALIGN(&__end_rodata);
  891. unsigned long all_end;
  892. printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n",
  893. (end - start) >> 10);
  894. set_memory_ro(start, (end - start) >> PAGE_SHIFT);
  895. kernel_set_to_readonly = 1;
  896. /*
  897. * The rodata/data/bss/brk section (but not the kernel text!)
  898. * should also be not-executable.
  899. *
  900. * We align all_end to PMD_SIZE because the existing mapping
  901. * is a full PMD. If we would align _brk_end to PAGE_SIZE we
  902. * split the PMD and the reminder between _brk_end and the end
  903. * of the PMD will remain mapped executable.
  904. *
  905. * Any PMD which was setup after the one which covers _brk_end
  906. * has been zapped already via cleanup_highmem().
  907. */
  908. all_end = roundup((unsigned long)_brk_end, PMD_SIZE);
  909. set_memory_nx(text_end, (all_end - text_end) >> PAGE_SHIFT);
  910. rodata_test();
  911. #ifdef CONFIG_CPA_DEBUG
  912. printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end);
  913. set_memory_rw(start, (end-start) >> PAGE_SHIFT);
  914. printk(KERN_INFO "Testing CPA: again\n");
  915. set_memory_ro(start, (end-start) >> PAGE_SHIFT);
  916. #endif
  917. free_init_pages("unused kernel",
  918. (unsigned long) __va(__pa_symbol(text_end)),
  919. (unsigned long) __va(__pa_symbol(rodata_start)));
  920. free_init_pages("unused kernel",
  921. (unsigned long) __va(__pa_symbol(rodata_end)),
  922. (unsigned long) __va(__pa_symbol(_sdata)));
  923. debug_checkwx();
  924. }
  925. int kern_addr_valid(unsigned long addr)
  926. {
  927. unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT;
  928. pgd_t *pgd;
  929. pud_t *pud;
  930. pmd_t *pmd;
  931. pte_t *pte;
  932. if (above != 0 && above != -1UL)
  933. return 0;
  934. pgd = pgd_offset_k(addr);
  935. if (pgd_none(*pgd))
  936. return 0;
  937. pud = pud_offset(pgd, addr);
  938. if (pud_none(*pud))
  939. return 0;
  940. if (pud_large(*pud))
  941. return pfn_valid(pud_pfn(*pud));
  942. pmd = pmd_offset(pud, addr);
  943. if (pmd_none(*pmd))
  944. return 0;
  945. if (pmd_large(*pmd))
  946. return pfn_valid(pmd_pfn(*pmd));
  947. pte = pte_offset_kernel(pmd, addr);
  948. if (pte_none(*pte))
  949. return 0;
  950. return pfn_valid(pte_pfn(*pte));
  951. }
  952. static unsigned long probe_memory_block_size(void)
  953. {
  954. unsigned long bz = MIN_MEMORY_BLOCK_SIZE;
  955. /* if system is UV or has 64GB of RAM or more, use large blocks */
  956. if (is_uv_system() || ((max_pfn << PAGE_SHIFT) >= (64UL << 30)))
  957. bz = 2UL << 30; /* 2GB */
  958. pr_info("x86/mm: Memory block size: %ldMB\n", bz >> 20);
  959. return bz;
  960. }
  961. static unsigned long memory_block_size_probed;
  962. unsigned long memory_block_size_bytes(void)
  963. {
  964. if (!memory_block_size_probed)
  965. memory_block_size_probed = probe_memory_block_size();
  966. return memory_block_size_probed;
  967. }
  968. #ifdef CONFIG_SPARSEMEM_VMEMMAP
  969. /*
  970. * Initialise the sparsemem vmemmap using huge-pages at the PMD level.
  971. */
  972. static long __meminitdata addr_start, addr_end;
  973. static void __meminitdata *p_start, *p_end;
  974. static int __meminitdata node_start;
  975. static int __meminit vmemmap_populate_hugepages(unsigned long start,
  976. unsigned long end, int node, struct vmem_altmap *altmap)
  977. {
  978. unsigned long addr;
  979. unsigned long next;
  980. pgd_t *pgd;
  981. pud_t *pud;
  982. pmd_t *pmd;
  983. for (addr = start; addr < end; addr = next) {
  984. next = pmd_addr_end(addr, end);
  985. pgd = vmemmap_pgd_populate(addr, node);
  986. if (!pgd)
  987. return -ENOMEM;
  988. pud = vmemmap_pud_populate(pgd, addr, node);
  989. if (!pud)
  990. return -ENOMEM;
  991. pmd = pmd_offset(pud, addr);
  992. if (pmd_none(*pmd)) {
  993. void *p;
  994. p = __vmemmap_alloc_block_buf(PMD_SIZE, node, altmap);
  995. if (p) {
  996. pte_t entry;
  997. entry = pfn_pte(__pa(p) >> PAGE_SHIFT,
  998. PAGE_KERNEL_LARGE);
  999. set_pmd(pmd, __pmd(pte_val(entry)));
  1000. /* check to see if we have contiguous blocks */
  1001. if (p_end != p || node_start != node) {
  1002. if (p_start)
  1003. pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n",
  1004. addr_start, addr_end-1, p_start, p_end-1, node_start);
  1005. addr_start = addr;
  1006. node_start = node;
  1007. p_start = p;
  1008. }
  1009. addr_end = addr + PMD_SIZE;
  1010. p_end = p + PMD_SIZE;
  1011. continue;
  1012. } else if (altmap)
  1013. return -ENOMEM; /* no fallback */
  1014. } else if (pmd_large(*pmd)) {
  1015. vmemmap_verify((pte_t *)pmd, node, addr, next);
  1016. continue;
  1017. }
  1018. pr_warn_once("vmemmap: falling back to regular page backing\n");
  1019. if (vmemmap_populate_basepages(addr, next, node))
  1020. return -ENOMEM;
  1021. }
  1022. return 0;
  1023. }
  1024. int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
  1025. {
  1026. struct vmem_altmap *altmap = to_vmem_altmap(start);
  1027. int err;
  1028. if (boot_cpu_has(X86_FEATURE_PSE))
  1029. err = vmemmap_populate_hugepages(start, end, node, altmap);
  1030. else if (altmap) {
  1031. pr_err_once("%s: no cpu support for altmap allocations\n",
  1032. __func__);
  1033. err = -ENOMEM;
  1034. } else
  1035. err = vmemmap_populate_basepages(start, end, node);
  1036. if (!err)
  1037. sync_global_pgds(start, end - 1);
  1038. return err;
  1039. }
  1040. #if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_HAVE_BOOTMEM_INFO_NODE)
  1041. void register_page_bootmem_memmap(unsigned long section_nr,
  1042. struct page *start_page, unsigned long size)
  1043. {
  1044. unsigned long addr = (unsigned long)start_page;
  1045. unsigned long end = (unsigned long)(start_page + size);
  1046. unsigned long next;
  1047. pgd_t *pgd;
  1048. pud_t *pud;
  1049. pmd_t *pmd;
  1050. unsigned int nr_pages;
  1051. struct page *page;
  1052. for (; addr < end; addr = next) {
  1053. pte_t *pte = NULL;
  1054. pgd = pgd_offset_k(addr);
  1055. if (pgd_none(*pgd)) {
  1056. next = (addr + PAGE_SIZE) & PAGE_MASK;
  1057. continue;
  1058. }
  1059. get_page_bootmem(section_nr, pgd_page(*pgd), MIX_SECTION_INFO);
  1060. pud = pud_offset(pgd, addr);
  1061. if (pud_none(*pud)) {
  1062. next = (addr + PAGE_SIZE) & PAGE_MASK;
  1063. continue;
  1064. }
  1065. get_page_bootmem(section_nr, pud_page(*pud), MIX_SECTION_INFO);
  1066. if (!boot_cpu_has(X86_FEATURE_PSE)) {
  1067. next = (addr + PAGE_SIZE) & PAGE_MASK;
  1068. pmd = pmd_offset(pud, addr);
  1069. if (pmd_none(*pmd))
  1070. continue;
  1071. get_page_bootmem(section_nr, pmd_page(*pmd),
  1072. MIX_SECTION_INFO);
  1073. pte = pte_offset_kernel(pmd, addr);
  1074. if (pte_none(*pte))
  1075. continue;
  1076. get_page_bootmem(section_nr, pte_page(*pte),
  1077. SECTION_INFO);
  1078. } else {
  1079. next = pmd_addr_end(addr, end);
  1080. pmd = pmd_offset(pud, addr);
  1081. if (pmd_none(*pmd))
  1082. continue;
  1083. nr_pages = 1 << (get_order(PMD_SIZE));
  1084. page = pmd_page(*pmd);
  1085. while (nr_pages--)
  1086. get_page_bootmem(section_nr, page++,
  1087. SECTION_INFO);
  1088. }
  1089. }
  1090. }
  1091. #endif
  1092. void __meminit vmemmap_populate_print_last(void)
  1093. {
  1094. if (p_start) {
  1095. pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n",
  1096. addr_start, addr_end-1, p_start, p_end-1, node_start);
  1097. p_start = NULL;
  1098. p_end = NULL;
  1099. node_start = 0;
  1100. }
  1101. }
  1102. #endif