smp.c 29 KB

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  1. /*
  2. * SMP related functions
  3. *
  4. * Copyright IBM Corp. 1999, 2012
  5. * Author(s): Denis Joseph Barrow,
  6. * Martin Schwidefsky <schwidefsky@de.ibm.com>,
  7. * Heiko Carstens <heiko.carstens@de.ibm.com>,
  8. *
  9. * based on other smp stuff by
  10. * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
  11. * (c) 1998 Ingo Molnar
  12. *
  13. * The code outside of smp.c uses logical cpu numbers, only smp.c does
  14. * the translation of logical to physical cpu ids. All new code that
  15. * operates on physical cpu numbers needs to go into smp.c.
  16. */
  17. #define KMSG_COMPONENT "cpu"
  18. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  19. #include <linux/workqueue.h>
  20. #include <linux/bootmem.h>
  21. #include <linux/module.h>
  22. #include <linux/init.h>
  23. #include <linux/mm.h>
  24. #include <linux/err.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/kernel_stat.h>
  27. #include <linux/delay.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/irqflags.h>
  30. #include <linux/cpu.h>
  31. #include <linux/slab.h>
  32. #include <linux/crash_dump.h>
  33. #include <linux/memblock.h>
  34. #include <asm/asm-offsets.h>
  35. #include <asm/diag.h>
  36. #include <asm/switch_to.h>
  37. #include <asm/facility.h>
  38. #include <asm/ipl.h>
  39. #include <asm/setup.h>
  40. #include <asm/irq.h>
  41. #include <asm/tlbflush.h>
  42. #include <asm/vtimer.h>
  43. #include <asm/lowcore.h>
  44. #include <asm/sclp.h>
  45. #include <asm/vdso.h>
  46. #include <asm/debug.h>
  47. #include <asm/os_info.h>
  48. #include <asm/sigp.h>
  49. #include <asm/idle.h>
  50. #include "entry.h"
  51. enum {
  52. ec_schedule = 0,
  53. ec_call_function_single,
  54. ec_stop_cpu,
  55. };
  56. enum {
  57. CPU_STATE_STANDBY,
  58. CPU_STATE_CONFIGURED,
  59. };
  60. static DEFINE_PER_CPU(struct cpu *, cpu_device);
  61. struct pcpu {
  62. struct lowcore *lowcore; /* lowcore page(s) for the cpu */
  63. unsigned long ec_mask; /* bit mask for ec_xxx functions */
  64. unsigned long ec_clk; /* sigp timestamp for ec_xxx */
  65. signed char state; /* physical cpu state */
  66. signed char polarization; /* physical polarization */
  67. u16 address; /* physical cpu address */
  68. };
  69. static u8 boot_core_type;
  70. static struct pcpu pcpu_devices[NR_CPUS];
  71. unsigned int smp_cpu_mt_shift;
  72. EXPORT_SYMBOL(smp_cpu_mt_shift);
  73. unsigned int smp_cpu_mtid;
  74. EXPORT_SYMBOL(smp_cpu_mtid);
  75. #ifdef CONFIG_CRASH_DUMP
  76. __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
  77. #endif
  78. static unsigned int smp_max_threads __initdata = -1U;
  79. static int __init early_nosmt(char *s)
  80. {
  81. smp_max_threads = 1;
  82. return 0;
  83. }
  84. early_param("nosmt", early_nosmt);
  85. static int __init early_smt(char *s)
  86. {
  87. get_option(&s, &smp_max_threads);
  88. return 0;
  89. }
  90. early_param("smt", early_smt);
  91. /*
  92. * The smp_cpu_state_mutex must be held when changing the state or polarization
  93. * member of a pcpu data structure within the pcpu_devices arreay.
  94. */
  95. DEFINE_MUTEX(smp_cpu_state_mutex);
  96. /*
  97. * Signal processor helper functions.
  98. */
  99. static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm)
  100. {
  101. int cc;
  102. while (1) {
  103. cc = __pcpu_sigp(addr, order, parm, NULL);
  104. if (cc != SIGP_CC_BUSY)
  105. return cc;
  106. cpu_relax();
  107. }
  108. }
  109. static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
  110. {
  111. int cc, retry;
  112. for (retry = 0; ; retry++) {
  113. cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
  114. if (cc != SIGP_CC_BUSY)
  115. break;
  116. if (retry >= 3)
  117. udelay(10);
  118. }
  119. return cc;
  120. }
  121. static inline int pcpu_stopped(struct pcpu *pcpu)
  122. {
  123. u32 uninitialized_var(status);
  124. if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
  125. 0, &status) != SIGP_CC_STATUS_STORED)
  126. return 0;
  127. return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
  128. }
  129. static inline int pcpu_running(struct pcpu *pcpu)
  130. {
  131. if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
  132. 0, NULL) != SIGP_CC_STATUS_STORED)
  133. return 1;
  134. /* Status stored condition code is equivalent to cpu not running. */
  135. return 0;
  136. }
  137. /*
  138. * Find struct pcpu by cpu address.
  139. */
  140. static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
  141. {
  142. int cpu;
  143. for_each_cpu(cpu, mask)
  144. if (pcpu_devices[cpu].address == address)
  145. return pcpu_devices + cpu;
  146. return NULL;
  147. }
  148. static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
  149. {
  150. int order;
  151. if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
  152. return;
  153. order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
  154. pcpu->ec_clk = get_tod_clock_fast();
  155. pcpu_sigp_retry(pcpu, order, 0);
  156. }
  157. #define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
  158. #define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
  159. static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
  160. {
  161. unsigned long async_stack, panic_stack;
  162. struct lowcore *lc;
  163. if (pcpu != &pcpu_devices[0]) {
  164. pcpu->lowcore = (struct lowcore *)
  165. __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
  166. async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
  167. panic_stack = __get_free_page(GFP_KERNEL);
  168. if (!pcpu->lowcore || !panic_stack || !async_stack)
  169. goto out;
  170. } else {
  171. async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET;
  172. panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET;
  173. }
  174. lc = pcpu->lowcore;
  175. memcpy(lc, &S390_lowcore, 512);
  176. memset((char *) lc + 512, 0, sizeof(*lc) - 512);
  177. lc->async_stack = async_stack + ASYNC_FRAME_OFFSET;
  178. lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET;
  179. lc->cpu_nr = cpu;
  180. lc->spinlock_lockval = arch_spin_lockval(cpu);
  181. if (MACHINE_HAS_VX)
  182. lc->vector_save_area_addr =
  183. (unsigned long) &lc->vector_save_area;
  184. if (vdso_alloc_per_cpu(lc))
  185. goto out;
  186. lowcore_ptr[cpu] = lc;
  187. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
  188. return 0;
  189. out:
  190. if (pcpu != &pcpu_devices[0]) {
  191. free_page(panic_stack);
  192. free_pages(async_stack, ASYNC_ORDER);
  193. free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
  194. }
  195. return -ENOMEM;
  196. }
  197. #ifdef CONFIG_HOTPLUG_CPU
  198. static void pcpu_free_lowcore(struct pcpu *pcpu)
  199. {
  200. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
  201. lowcore_ptr[pcpu - pcpu_devices] = NULL;
  202. vdso_free_per_cpu(pcpu->lowcore);
  203. if (pcpu == &pcpu_devices[0])
  204. return;
  205. free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET);
  206. free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER);
  207. free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
  208. }
  209. #endif /* CONFIG_HOTPLUG_CPU */
  210. static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
  211. {
  212. struct lowcore *lc = pcpu->lowcore;
  213. cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
  214. cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
  215. lc->cpu_nr = cpu;
  216. lc->spinlock_lockval = arch_spin_lockval(cpu);
  217. lc->percpu_offset = __per_cpu_offset[cpu];
  218. lc->kernel_asce = S390_lowcore.kernel_asce;
  219. lc->machine_flags = S390_lowcore.machine_flags;
  220. lc->user_timer = lc->system_timer = lc->steal_timer = 0;
  221. __ctl_store(lc->cregs_save_area, 0, 15);
  222. save_access_regs((unsigned int *) lc->access_regs_save_area);
  223. memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
  224. MAX_FACILITY_BIT/8);
  225. }
  226. static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
  227. {
  228. struct lowcore *lc = pcpu->lowcore;
  229. lc->kernel_stack = (unsigned long) task_stack_page(tsk)
  230. + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
  231. lc->current_task = (unsigned long) tsk;
  232. lc->lpp = LPP_MAGIC;
  233. lc->current_pid = tsk->pid;
  234. lc->user_timer = tsk->thread.user_timer;
  235. lc->system_timer = tsk->thread.system_timer;
  236. lc->steal_timer = 0;
  237. }
  238. static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
  239. {
  240. struct lowcore *lc = pcpu->lowcore;
  241. lc->restart_stack = lc->kernel_stack;
  242. lc->restart_fn = (unsigned long) func;
  243. lc->restart_data = (unsigned long) data;
  244. lc->restart_source = -1UL;
  245. pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
  246. }
  247. /*
  248. * Call function via PSW restart on pcpu and stop the current cpu.
  249. */
  250. static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *),
  251. void *data, unsigned long stack)
  252. {
  253. struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
  254. unsigned long source_cpu = stap();
  255. __load_psw_mask(PSW_KERNEL_BITS);
  256. if (pcpu->address == source_cpu)
  257. func(data); /* should not return */
  258. /* Stop target cpu (if func returns this stops the current cpu). */
  259. pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
  260. /* Restart func on the target cpu and stop the current cpu. */
  261. mem_assign_absolute(lc->restart_stack, stack);
  262. mem_assign_absolute(lc->restart_fn, (unsigned long) func);
  263. mem_assign_absolute(lc->restart_data, (unsigned long) data);
  264. mem_assign_absolute(lc->restart_source, source_cpu);
  265. asm volatile(
  266. "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
  267. " brc 2,0b # busy, try again\n"
  268. "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
  269. " brc 2,1b # busy, try again\n"
  270. : : "d" (pcpu->address), "d" (source_cpu),
  271. "K" (SIGP_RESTART), "K" (SIGP_STOP)
  272. : "0", "1", "cc");
  273. for (;;) ;
  274. }
  275. /*
  276. * Enable additional logical cpus for multi-threading.
  277. */
  278. static int pcpu_set_smt(unsigned int mtid)
  279. {
  280. int cc;
  281. if (smp_cpu_mtid == mtid)
  282. return 0;
  283. cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL);
  284. if (cc == 0) {
  285. smp_cpu_mtid = mtid;
  286. smp_cpu_mt_shift = 0;
  287. while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
  288. smp_cpu_mt_shift++;
  289. pcpu_devices[0].address = stap();
  290. }
  291. return cc;
  292. }
  293. /*
  294. * Call function on an online CPU.
  295. */
  296. void smp_call_online_cpu(void (*func)(void *), void *data)
  297. {
  298. struct pcpu *pcpu;
  299. /* Use the current cpu if it is online. */
  300. pcpu = pcpu_find_address(cpu_online_mask, stap());
  301. if (!pcpu)
  302. /* Use the first online cpu. */
  303. pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
  304. pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
  305. }
  306. /*
  307. * Call function on the ipl CPU.
  308. */
  309. void smp_call_ipl_cpu(void (*func)(void *), void *data)
  310. {
  311. pcpu_delegate(&pcpu_devices[0], func, data,
  312. pcpu_devices->lowcore->panic_stack -
  313. PANIC_FRAME_OFFSET + PAGE_SIZE);
  314. }
  315. int smp_find_processor_id(u16 address)
  316. {
  317. int cpu;
  318. for_each_present_cpu(cpu)
  319. if (pcpu_devices[cpu].address == address)
  320. return cpu;
  321. return -1;
  322. }
  323. bool arch_vcpu_is_preempted(int cpu)
  324. {
  325. if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
  326. return false;
  327. if (pcpu_running(pcpu_devices + cpu))
  328. return false;
  329. return true;
  330. }
  331. EXPORT_SYMBOL(arch_vcpu_is_preempted);
  332. void smp_yield_cpu(int cpu)
  333. {
  334. if (MACHINE_HAS_DIAG9C) {
  335. diag_stat_inc_norecursion(DIAG_STAT_X09C);
  336. asm volatile("diag %0,0,0x9c"
  337. : : "d" (pcpu_devices[cpu].address));
  338. } else if (MACHINE_HAS_DIAG44) {
  339. diag_stat_inc_norecursion(DIAG_STAT_X044);
  340. asm volatile("diag 0,0,0x44");
  341. }
  342. }
  343. /*
  344. * Send cpus emergency shutdown signal. This gives the cpus the
  345. * opportunity to complete outstanding interrupts.
  346. */
  347. static void smp_emergency_stop(cpumask_t *cpumask)
  348. {
  349. u64 end;
  350. int cpu;
  351. end = get_tod_clock() + (1000000UL << 12);
  352. for_each_cpu(cpu, cpumask) {
  353. struct pcpu *pcpu = pcpu_devices + cpu;
  354. set_bit(ec_stop_cpu, &pcpu->ec_mask);
  355. while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
  356. 0, NULL) == SIGP_CC_BUSY &&
  357. get_tod_clock() < end)
  358. cpu_relax();
  359. }
  360. while (get_tod_clock() < end) {
  361. for_each_cpu(cpu, cpumask)
  362. if (pcpu_stopped(pcpu_devices + cpu))
  363. cpumask_clear_cpu(cpu, cpumask);
  364. if (cpumask_empty(cpumask))
  365. break;
  366. cpu_relax();
  367. }
  368. }
  369. /*
  370. * Stop all cpus but the current one.
  371. */
  372. void smp_send_stop(void)
  373. {
  374. cpumask_t cpumask;
  375. int cpu;
  376. /* Disable all interrupts/machine checks */
  377. __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
  378. trace_hardirqs_off();
  379. debug_set_critical();
  380. cpumask_copy(&cpumask, cpu_online_mask);
  381. cpumask_clear_cpu(smp_processor_id(), &cpumask);
  382. if (oops_in_progress)
  383. smp_emergency_stop(&cpumask);
  384. /* stop all processors */
  385. for_each_cpu(cpu, &cpumask) {
  386. struct pcpu *pcpu = pcpu_devices + cpu;
  387. pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
  388. while (!pcpu_stopped(pcpu))
  389. cpu_relax();
  390. }
  391. }
  392. /*
  393. * This is the main routine where commands issued by other
  394. * cpus are handled.
  395. */
  396. static void smp_handle_ext_call(void)
  397. {
  398. unsigned long bits;
  399. /* handle bit signal external calls */
  400. bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
  401. if (test_bit(ec_stop_cpu, &bits))
  402. smp_stop_cpu();
  403. if (test_bit(ec_schedule, &bits))
  404. scheduler_ipi();
  405. if (test_bit(ec_call_function_single, &bits))
  406. generic_smp_call_function_single_interrupt();
  407. }
  408. static void do_ext_call_interrupt(struct ext_code ext_code,
  409. unsigned int param32, unsigned long param64)
  410. {
  411. inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
  412. smp_handle_ext_call();
  413. }
  414. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  415. {
  416. int cpu;
  417. for_each_cpu(cpu, mask)
  418. pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
  419. }
  420. void arch_send_call_function_single_ipi(int cpu)
  421. {
  422. pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
  423. }
  424. /*
  425. * this function sends a 'reschedule' IPI to another CPU.
  426. * it goes straight through and wastes no time serializing
  427. * anything. Worst case is that we lose a reschedule ...
  428. */
  429. void smp_send_reschedule(int cpu)
  430. {
  431. pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
  432. }
  433. /*
  434. * parameter area for the set/clear control bit callbacks
  435. */
  436. struct ec_creg_mask_parms {
  437. unsigned long orval;
  438. unsigned long andval;
  439. int cr;
  440. };
  441. /*
  442. * callback for setting/clearing control bits
  443. */
  444. static void smp_ctl_bit_callback(void *info)
  445. {
  446. struct ec_creg_mask_parms *pp = info;
  447. unsigned long cregs[16];
  448. __ctl_store(cregs, 0, 15);
  449. cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
  450. __ctl_load(cregs, 0, 15);
  451. }
  452. /*
  453. * Set a bit in a control register of all cpus
  454. */
  455. void smp_ctl_set_bit(int cr, int bit)
  456. {
  457. struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
  458. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  459. }
  460. EXPORT_SYMBOL(smp_ctl_set_bit);
  461. /*
  462. * Clear a bit in a control register of all cpus
  463. */
  464. void smp_ctl_clear_bit(int cr, int bit)
  465. {
  466. struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
  467. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  468. }
  469. EXPORT_SYMBOL(smp_ctl_clear_bit);
  470. #ifdef CONFIG_CRASH_DUMP
  471. int smp_store_status(int cpu)
  472. {
  473. struct pcpu *pcpu = pcpu_devices + cpu;
  474. unsigned long pa;
  475. pa = __pa(&pcpu->lowcore->floating_pt_save_area);
  476. if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS,
  477. pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
  478. return -EIO;
  479. if (!MACHINE_HAS_VX)
  480. return 0;
  481. pa = __pa(pcpu->lowcore->vector_save_area_addr);
  482. if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
  483. pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
  484. return -EIO;
  485. return 0;
  486. }
  487. /*
  488. * Collect CPU state of the previous, crashed system.
  489. * There are four cases:
  490. * 1) standard zfcp dump
  491. * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
  492. * The state for all CPUs except the boot CPU needs to be collected
  493. * with sigp stop-and-store-status. The boot CPU state is located in
  494. * the absolute lowcore of the memory stored in the HSA. The zcore code
  495. * will copy the boot CPU state from the HSA.
  496. * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory)
  497. * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
  498. * The state for all CPUs except the boot CPU needs to be collected
  499. * with sigp stop-and-store-status. The firmware or the boot-loader
  500. * stored the registers of the boot CPU in the absolute lowcore in the
  501. * memory of the old system.
  502. * 3) kdump and the old kernel did not store the CPU state,
  503. * or stand-alone kdump for DASD
  504. * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
  505. * The state for all CPUs except the boot CPU needs to be collected
  506. * with sigp stop-and-store-status. The kexec code or the boot-loader
  507. * stored the registers of the boot CPU in the memory of the old system.
  508. * 4) kdump and the old kernel stored the CPU state
  509. * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
  510. * This case does not exist for s390 anymore, setup_arch explicitly
  511. * deactivates the elfcorehdr= kernel parameter
  512. */
  513. static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr,
  514. bool is_boot_cpu, unsigned long page)
  515. {
  516. __vector128 *vxrs = (__vector128 *) page;
  517. if (is_boot_cpu)
  518. vxrs = boot_cpu_vector_save_area;
  519. else
  520. __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page);
  521. save_area_add_vxrs(sa, vxrs);
  522. }
  523. static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr,
  524. bool is_boot_cpu, unsigned long page)
  525. {
  526. void *regs = (void *) page;
  527. if (is_boot_cpu)
  528. copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512);
  529. else
  530. __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page);
  531. save_area_add_regs(sa, regs);
  532. }
  533. void __init smp_save_dump_cpus(void)
  534. {
  535. int addr, boot_cpu_addr, max_cpu_addr;
  536. struct save_area *sa;
  537. unsigned long page;
  538. bool is_boot_cpu;
  539. if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP))
  540. /* No previous system present, normal boot. */
  541. return;
  542. /* Allocate a page as dumping area for the store status sigps */
  543. page = memblock_alloc_base(PAGE_SIZE, PAGE_SIZE, 1UL << 31);
  544. /* Set multi-threading state to the previous system. */
  545. pcpu_set_smt(sclp.mtid_prev);
  546. boot_cpu_addr = stap();
  547. max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
  548. for (addr = 0; addr <= max_cpu_addr; addr++) {
  549. if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) ==
  550. SIGP_CC_NOT_OPERATIONAL)
  551. continue;
  552. is_boot_cpu = (addr == boot_cpu_addr);
  553. /* Allocate save area */
  554. sa = save_area_alloc(is_boot_cpu);
  555. if (!sa)
  556. panic("could not allocate memory for save area\n");
  557. if (MACHINE_HAS_VX)
  558. /* Get the vector registers */
  559. smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page);
  560. /*
  561. * For a zfcp dump OLDMEM_BASE == NULL and the registers
  562. * of the boot CPU are stored in the HSA. To retrieve
  563. * these registers an SCLP request is required which is
  564. * done by drivers/s390/char/zcore.c:init_cpu_info()
  565. */
  566. if (!is_boot_cpu || OLDMEM_BASE)
  567. /* Get the CPU registers */
  568. smp_save_cpu_regs(sa, addr, is_boot_cpu, page);
  569. }
  570. memblock_free(page, PAGE_SIZE);
  571. diag308_reset();
  572. pcpu_set_smt(0);
  573. }
  574. #endif /* CONFIG_CRASH_DUMP */
  575. void smp_cpu_set_polarization(int cpu, int val)
  576. {
  577. pcpu_devices[cpu].polarization = val;
  578. }
  579. int smp_cpu_get_polarization(int cpu)
  580. {
  581. return pcpu_devices[cpu].polarization;
  582. }
  583. static void __ref smp_get_core_info(struct sclp_core_info *info, int early)
  584. {
  585. static int use_sigp_detection;
  586. int address;
  587. if (use_sigp_detection || sclp_get_core_info(info, early)) {
  588. use_sigp_detection = 1;
  589. for (address = 0;
  590. address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
  591. address += (1U << smp_cpu_mt_shift)) {
  592. if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) ==
  593. SIGP_CC_NOT_OPERATIONAL)
  594. continue;
  595. info->core[info->configured].core_id =
  596. address >> smp_cpu_mt_shift;
  597. info->configured++;
  598. }
  599. info->combined = info->configured;
  600. }
  601. }
  602. static int smp_add_present_cpu(int cpu);
  603. static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add)
  604. {
  605. struct pcpu *pcpu;
  606. cpumask_t avail;
  607. int cpu, nr, i, j;
  608. u16 address;
  609. nr = 0;
  610. cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
  611. cpu = cpumask_first(&avail);
  612. for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) {
  613. if (sclp.has_core_type && info->core[i].type != boot_core_type)
  614. continue;
  615. address = info->core[i].core_id << smp_cpu_mt_shift;
  616. for (j = 0; j <= smp_cpu_mtid; j++) {
  617. if (pcpu_find_address(cpu_present_mask, address + j))
  618. continue;
  619. pcpu = pcpu_devices + cpu;
  620. pcpu->address = address + j;
  621. pcpu->state =
  622. (cpu >= info->configured*(smp_cpu_mtid + 1)) ?
  623. CPU_STATE_STANDBY : CPU_STATE_CONFIGURED;
  624. smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
  625. set_cpu_present(cpu, true);
  626. if (sysfs_add && smp_add_present_cpu(cpu) != 0)
  627. set_cpu_present(cpu, false);
  628. else
  629. nr++;
  630. cpu = cpumask_next(cpu, &avail);
  631. if (cpu >= nr_cpu_ids)
  632. break;
  633. }
  634. }
  635. return nr;
  636. }
  637. void __init smp_detect_cpus(void)
  638. {
  639. unsigned int cpu, mtid, c_cpus, s_cpus;
  640. struct sclp_core_info *info;
  641. u16 address;
  642. /* Get CPU information */
  643. info = memblock_virt_alloc(sizeof(*info), 8);
  644. smp_get_core_info(info, 1);
  645. /* Find boot CPU type */
  646. if (sclp.has_core_type) {
  647. address = stap();
  648. for (cpu = 0; cpu < info->combined; cpu++)
  649. if (info->core[cpu].core_id == address) {
  650. /* The boot cpu dictates the cpu type. */
  651. boot_core_type = info->core[cpu].type;
  652. break;
  653. }
  654. if (cpu >= info->combined)
  655. panic("Could not find boot CPU type");
  656. }
  657. /* Set multi-threading state for the current system */
  658. mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
  659. mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
  660. pcpu_set_smt(mtid);
  661. /* Print number of CPUs */
  662. c_cpus = s_cpus = 0;
  663. for (cpu = 0; cpu < info->combined; cpu++) {
  664. if (sclp.has_core_type &&
  665. info->core[cpu].type != boot_core_type)
  666. continue;
  667. if (cpu < info->configured)
  668. c_cpus += smp_cpu_mtid + 1;
  669. else
  670. s_cpus += smp_cpu_mtid + 1;
  671. }
  672. pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
  673. /* Add CPUs present at boot */
  674. get_online_cpus();
  675. __smp_rescan_cpus(info, 0);
  676. put_online_cpus();
  677. memblock_free_early((unsigned long)info, sizeof(*info));
  678. }
  679. /*
  680. * Activate a secondary processor.
  681. */
  682. static void smp_start_secondary(void *cpuvoid)
  683. {
  684. S390_lowcore.last_update_clock = get_tod_clock();
  685. S390_lowcore.restart_stack = (unsigned long) restart_stack;
  686. S390_lowcore.restart_fn = (unsigned long) do_restart;
  687. S390_lowcore.restart_data = 0;
  688. S390_lowcore.restart_source = -1UL;
  689. restore_access_regs(S390_lowcore.access_regs_save_area);
  690. __ctl_load(S390_lowcore.cregs_save_area, 0, 15);
  691. __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
  692. cpu_init();
  693. preempt_disable();
  694. init_cpu_timer();
  695. vtime_init();
  696. pfault_init();
  697. notify_cpu_starting(smp_processor_id());
  698. set_cpu_online(smp_processor_id(), true);
  699. inc_irq_stat(CPU_RST);
  700. local_irq_enable();
  701. cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
  702. }
  703. /* Upping and downing of CPUs */
  704. int __cpu_up(unsigned int cpu, struct task_struct *tidle)
  705. {
  706. struct pcpu *pcpu;
  707. int base, i, rc;
  708. pcpu = pcpu_devices + cpu;
  709. if (pcpu->state != CPU_STATE_CONFIGURED)
  710. return -EIO;
  711. base = smp_get_base_cpu(cpu);
  712. for (i = 0; i <= smp_cpu_mtid; i++) {
  713. if (base + i < nr_cpu_ids)
  714. if (cpu_online(base + i))
  715. break;
  716. }
  717. /*
  718. * If this is the first CPU of the core to get online
  719. * do an initial CPU reset.
  720. */
  721. if (i > smp_cpu_mtid &&
  722. pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) !=
  723. SIGP_CC_ORDER_CODE_ACCEPTED)
  724. return -EIO;
  725. rc = pcpu_alloc_lowcore(pcpu, cpu);
  726. if (rc)
  727. return rc;
  728. pcpu_prepare_secondary(pcpu, cpu);
  729. pcpu_attach_task(pcpu, tidle);
  730. pcpu_start_fn(pcpu, smp_start_secondary, NULL);
  731. /* Wait until cpu puts itself in the online & active maps */
  732. while (!cpu_online(cpu))
  733. cpu_relax();
  734. return 0;
  735. }
  736. static unsigned int setup_possible_cpus __initdata;
  737. static int __init _setup_possible_cpus(char *s)
  738. {
  739. get_option(&s, &setup_possible_cpus);
  740. return 0;
  741. }
  742. early_param("possible_cpus", _setup_possible_cpus);
  743. #ifdef CONFIG_HOTPLUG_CPU
  744. int __cpu_disable(void)
  745. {
  746. unsigned long cregs[16];
  747. /* Handle possible pending IPIs */
  748. smp_handle_ext_call();
  749. set_cpu_online(smp_processor_id(), false);
  750. /* Disable pseudo page faults on this cpu. */
  751. pfault_fini();
  752. /* Disable interrupt sources via control register. */
  753. __ctl_store(cregs, 0, 15);
  754. cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
  755. cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
  756. cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
  757. __ctl_load(cregs, 0, 15);
  758. clear_cpu_flag(CIF_NOHZ_DELAY);
  759. return 0;
  760. }
  761. void __cpu_die(unsigned int cpu)
  762. {
  763. struct pcpu *pcpu;
  764. /* Wait until target cpu is down */
  765. pcpu = pcpu_devices + cpu;
  766. while (!pcpu_stopped(pcpu))
  767. cpu_relax();
  768. pcpu_free_lowcore(pcpu);
  769. cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
  770. cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
  771. }
  772. void __noreturn cpu_die(void)
  773. {
  774. idle_task_exit();
  775. pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
  776. for (;;) ;
  777. }
  778. #endif /* CONFIG_HOTPLUG_CPU */
  779. void __init smp_fill_possible_mask(void)
  780. {
  781. unsigned int possible, sclp_max, cpu;
  782. sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
  783. sclp_max = min(smp_max_threads, sclp_max);
  784. sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids;
  785. possible = setup_possible_cpus ?: nr_cpu_ids;
  786. possible = min(possible, sclp_max);
  787. for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
  788. set_cpu_possible(cpu, true);
  789. }
  790. void __init smp_prepare_cpus(unsigned int max_cpus)
  791. {
  792. /* request the 0x1201 emergency signal external interrupt */
  793. if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
  794. panic("Couldn't request external interrupt 0x1201");
  795. /* request the 0x1202 external call external interrupt */
  796. if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
  797. panic("Couldn't request external interrupt 0x1202");
  798. }
  799. void __init smp_prepare_boot_cpu(void)
  800. {
  801. struct pcpu *pcpu = pcpu_devices;
  802. pcpu->state = CPU_STATE_CONFIGURED;
  803. pcpu->address = stap();
  804. pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix();
  805. S390_lowcore.percpu_offset = __per_cpu_offset[0];
  806. smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
  807. set_cpu_present(0, true);
  808. set_cpu_online(0, true);
  809. }
  810. void __init smp_cpus_done(unsigned int max_cpus)
  811. {
  812. }
  813. void __init smp_setup_processor_id(void)
  814. {
  815. S390_lowcore.cpu_nr = 0;
  816. S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
  817. }
  818. /*
  819. * the frequency of the profiling timer can be changed
  820. * by writing a multiplier value into /proc/profile.
  821. *
  822. * usually you want to run this on all CPUs ;)
  823. */
  824. int setup_profiling_timer(unsigned int multiplier)
  825. {
  826. return 0;
  827. }
  828. #ifdef CONFIG_HOTPLUG_CPU
  829. static ssize_t cpu_configure_show(struct device *dev,
  830. struct device_attribute *attr, char *buf)
  831. {
  832. ssize_t count;
  833. mutex_lock(&smp_cpu_state_mutex);
  834. count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
  835. mutex_unlock(&smp_cpu_state_mutex);
  836. return count;
  837. }
  838. static ssize_t cpu_configure_store(struct device *dev,
  839. struct device_attribute *attr,
  840. const char *buf, size_t count)
  841. {
  842. struct pcpu *pcpu;
  843. int cpu, val, rc, i;
  844. char delim;
  845. if (sscanf(buf, "%d %c", &val, &delim) != 1)
  846. return -EINVAL;
  847. if (val != 0 && val != 1)
  848. return -EINVAL;
  849. get_online_cpus();
  850. mutex_lock(&smp_cpu_state_mutex);
  851. rc = -EBUSY;
  852. /* disallow configuration changes of online cpus and cpu 0 */
  853. cpu = dev->id;
  854. cpu = smp_get_base_cpu(cpu);
  855. if (cpu == 0)
  856. goto out;
  857. for (i = 0; i <= smp_cpu_mtid; i++)
  858. if (cpu_online(cpu + i))
  859. goto out;
  860. pcpu = pcpu_devices + cpu;
  861. rc = 0;
  862. switch (val) {
  863. case 0:
  864. if (pcpu->state != CPU_STATE_CONFIGURED)
  865. break;
  866. rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
  867. if (rc)
  868. break;
  869. for (i = 0; i <= smp_cpu_mtid; i++) {
  870. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  871. continue;
  872. pcpu[i].state = CPU_STATE_STANDBY;
  873. smp_cpu_set_polarization(cpu + i,
  874. POLARIZATION_UNKNOWN);
  875. }
  876. topology_expect_change();
  877. break;
  878. case 1:
  879. if (pcpu->state != CPU_STATE_STANDBY)
  880. break;
  881. rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
  882. if (rc)
  883. break;
  884. for (i = 0; i <= smp_cpu_mtid; i++) {
  885. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  886. continue;
  887. pcpu[i].state = CPU_STATE_CONFIGURED;
  888. smp_cpu_set_polarization(cpu + i,
  889. POLARIZATION_UNKNOWN);
  890. }
  891. topology_expect_change();
  892. break;
  893. default:
  894. break;
  895. }
  896. out:
  897. mutex_unlock(&smp_cpu_state_mutex);
  898. put_online_cpus();
  899. return rc ? rc : count;
  900. }
  901. static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
  902. #endif /* CONFIG_HOTPLUG_CPU */
  903. static ssize_t show_cpu_address(struct device *dev,
  904. struct device_attribute *attr, char *buf)
  905. {
  906. return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
  907. }
  908. static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
  909. static struct attribute *cpu_common_attrs[] = {
  910. #ifdef CONFIG_HOTPLUG_CPU
  911. &dev_attr_configure.attr,
  912. #endif
  913. &dev_attr_address.attr,
  914. NULL,
  915. };
  916. static struct attribute_group cpu_common_attr_group = {
  917. .attrs = cpu_common_attrs,
  918. };
  919. static struct attribute *cpu_online_attrs[] = {
  920. &dev_attr_idle_count.attr,
  921. &dev_attr_idle_time_us.attr,
  922. NULL,
  923. };
  924. static struct attribute_group cpu_online_attr_group = {
  925. .attrs = cpu_online_attrs,
  926. };
  927. static int smp_cpu_online(unsigned int cpu)
  928. {
  929. struct device *s = &per_cpu(cpu_device, cpu)->dev;
  930. return sysfs_create_group(&s->kobj, &cpu_online_attr_group);
  931. }
  932. static int smp_cpu_pre_down(unsigned int cpu)
  933. {
  934. struct device *s = &per_cpu(cpu_device, cpu)->dev;
  935. sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
  936. return 0;
  937. }
  938. static int smp_add_present_cpu(int cpu)
  939. {
  940. struct device *s;
  941. struct cpu *c;
  942. int rc;
  943. c = kzalloc(sizeof(*c), GFP_KERNEL);
  944. if (!c)
  945. return -ENOMEM;
  946. per_cpu(cpu_device, cpu) = c;
  947. s = &c->dev;
  948. c->hotpluggable = 1;
  949. rc = register_cpu(c, cpu);
  950. if (rc)
  951. goto out;
  952. rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
  953. if (rc)
  954. goto out_cpu;
  955. rc = topology_cpu_init(c);
  956. if (rc)
  957. goto out_topology;
  958. return 0;
  959. out_topology:
  960. sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
  961. out_cpu:
  962. #ifdef CONFIG_HOTPLUG_CPU
  963. unregister_cpu(c);
  964. #endif
  965. out:
  966. return rc;
  967. }
  968. #ifdef CONFIG_HOTPLUG_CPU
  969. int __ref smp_rescan_cpus(void)
  970. {
  971. struct sclp_core_info *info;
  972. int nr;
  973. info = kzalloc(sizeof(*info), GFP_KERNEL);
  974. if (!info)
  975. return -ENOMEM;
  976. smp_get_core_info(info, 0);
  977. get_online_cpus();
  978. mutex_lock(&smp_cpu_state_mutex);
  979. nr = __smp_rescan_cpus(info, 1);
  980. mutex_unlock(&smp_cpu_state_mutex);
  981. put_online_cpus();
  982. kfree(info);
  983. if (nr)
  984. topology_schedule_update();
  985. return 0;
  986. }
  987. static ssize_t __ref rescan_store(struct device *dev,
  988. struct device_attribute *attr,
  989. const char *buf,
  990. size_t count)
  991. {
  992. int rc;
  993. rc = smp_rescan_cpus();
  994. return rc ? rc : count;
  995. }
  996. static DEVICE_ATTR(rescan, 0200, NULL, rescan_store);
  997. #endif /* CONFIG_HOTPLUG_CPU */
  998. static int __init s390_smp_init(void)
  999. {
  1000. int cpu, rc = 0;
  1001. #ifdef CONFIG_HOTPLUG_CPU
  1002. rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
  1003. if (rc)
  1004. return rc;
  1005. #endif
  1006. for_each_present_cpu(cpu) {
  1007. rc = smp_add_present_cpu(cpu);
  1008. if (rc)
  1009. goto out;
  1010. }
  1011. rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online",
  1012. smp_cpu_online, smp_cpu_pre_down);
  1013. out:
  1014. return rc;
  1015. }
  1016. subsys_initcall(s390_smp_init);