processor.h 9.5 KB

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  1. /*
  2. * S390 version
  3. * Copyright IBM Corp. 1999
  4. * Author(s): Hartmut Penner (hp@de.ibm.com),
  5. * Martin Schwidefsky (schwidefsky@de.ibm.com)
  6. *
  7. * Derived from "include/asm-i386/processor.h"
  8. * Copyright (C) 1994, Linus Torvalds
  9. */
  10. #ifndef __ASM_S390_PROCESSOR_H
  11. #define __ASM_S390_PROCESSOR_H
  12. #include <linux/const.h>
  13. #define CIF_MCCK_PENDING 0 /* machine check handling is pending */
  14. #define CIF_ASCE 1 /* user asce needs fixup / uaccess */
  15. #define CIF_NOHZ_DELAY 2 /* delay HZ disable for a tick */
  16. #define CIF_FPU 3 /* restore FPU registers */
  17. #define CIF_IGNORE_IRQ 4 /* ignore interrupt (for udelay) */
  18. #define CIF_ENABLED_WAIT 5 /* in enabled wait state */
  19. #define _CIF_MCCK_PENDING _BITUL(CIF_MCCK_PENDING)
  20. #define _CIF_ASCE _BITUL(CIF_ASCE)
  21. #define _CIF_NOHZ_DELAY _BITUL(CIF_NOHZ_DELAY)
  22. #define _CIF_FPU _BITUL(CIF_FPU)
  23. #define _CIF_IGNORE_IRQ _BITUL(CIF_IGNORE_IRQ)
  24. #define _CIF_ENABLED_WAIT _BITUL(CIF_ENABLED_WAIT)
  25. #ifndef __ASSEMBLY__
  26. #include <linux/linkage.h>
  27. #include <linux/irqflags.h>
  28. #include <asm/cpu.h>
  29. #include <asm/page.h>
  30. #include <asm/ptrace.h>
  31. #include <asm/setup.h>
  32. #include <asm/runtime_instr.h>
  33. #include <asm/fpu/types.h>
  34. #include <asm/fpu/internal.h>
  35. static inline void set_cpu_flag(int flag)
  36. {
  37. S390_lowcore.cpu_flags |= (1UL << flag);
  38. }
  39. static inline void clear_cpu_flag(int flag)
  40. {
  41. S390_lowcore.cpu_flags &= ~(1UL << flag);
  42. }
  43. static inline int test_cpu_flag(int flag)
  44. {
  45. return !!(S390_lowcore.cpu_flags & (1UL << flag));
  46. }
  47. /*
  48. * Test CIF flag of another CPU. The caller needs to ensure that
  49. * CPU hotplug can not happen, e.g. by disabling preemption.
  50. */
  51. static inline int test_cpu_flag_of(int flag, int cpu)
  52. {
  53. struct lowcore *lc = lowcore_ptr[cpu];
  54. return !!(lc->cpu_flags & (1UL << flag));
  55. }
  56. #define arch_needs_cpu() test_cpu_flag(CIF_NOHZ_DELAY)
  57. /*
  58. * Default implementation of macro that returns current
  59. * instruction pointer ("program counter").
  60. */
  61. #define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
  62. static inline void get_cpu_id(struct cpuid *ptr)
  63. {
  64. asm volatile("stidp %0" : "=Q" (*ptr));
  65. }
  66. void s390_adjust_jiffies(void);
  67. void s390_update_cpu_mhz(void);
  68. void cpu_detect_mhz_feature(void);
  69. extern const struct seq_operations cpuinfo_op;
  70. extern int sysctl_ieee_emulation_warnings;
  71. extern void execve_tail(void);
  72. /*
  73. * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
  74. */
  75. #define TASK_SIZE_OF(tsk) ((tsk)->mm->context.asce_limit)
  76. #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
  77. (1UL << 30) : (1UL << 41))
  78. #define TASK_SIZE TASK_SIZE_OF(current)
  79. #define TASK_MAX_SIZE (1UL << 53)
  80. #define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
  81. #define STACK_TOP_MAX (1UL << 42)
  82. #define HAVE_ARCH_PICK_MMAP_LAYOUT
  83. typedef struct {
  84. __u32 ar4;
  85. } mm_segment_t;
  86. /*
  87. * Thread structure
  88. */
  89. struct thread_struct {
  90. unsigned int acrs[NUM_ACRS];
  91. unsigned long ksp; /* kernel stack pointer */
  92. unsigned long user_timer; /* task cputime in user space */
  93. unsigned long system_timer; /* task cputime in kernel space */
  94. unsigned long sys_call_table; /* system call table address */
  95. mm_segment_t mm_segment;
  96. unsigned long gmap_addr; /* address of last gmap fault. */
  97. unsigned int gmap_write_flag; /* gmap fault write indication */
  98. unsigned int gmap_int_code; /* int code of last gmap fault */
  99. unsigned int gmap_pfault; /* signal of a pending guest pfault */
  100. /* Per-thread information related to debugging */
  101. struct per_regs per_user; /* User specified PER registers */
  102. struct per_event per_event; /* Cause of the last PER trap */
  103. unsigned long per_flags; /* Flags to control debug behavior */
  104. unsigned int system_call; /* system call number in signal */
  105. unsigned long last_break; /* last breaking-event-address. */
  106. /* pfault_wait is used to block the process on a pfault event */
  107. unsigned long pfault_wait;
  108. struct list_head list;
  109. /* cpu runtime instrumentation */
  110. struct runtime_instr_cb *ri_cb;
  111. unsigned char trap_tdb[256]; /* Transaction abort diagnose block */
  112. /*
  113. * Warning: 'fpu' is dynamically-sized. It *MUST* be at
  114. * the end.
  115. */
  116. struct fpu fpu; /* FP and VX register save area */
  117. };
  118. /* Flag to disable transactions. */
  119. #define PER_FLAG_NO_TE 1UL
  120. /* Flag to enable random transaction aborts. */
  121. #define PER_FLAG_TE_ABORT_RAND 2UL
  122. /* Flag to specify random transaction abort mode:
  123. * - abort each transaction at a random instruction before TEND if set.
  124. * - abort random transactions at a random instruction if cleared.
  125. */
  126. #define PER_FLAG_TE_ABORT_RAND_TEND 4UL
  127. typedef struct thread_struct thread_struct;
  128. /*
  129. * Stack layout of a C stack frame.
  130. */
  131. #ifndef __PACK_STACK
  132. struct stack_frame {
  133. unsigned long back_chain;
  134. unsigned long empty1[5];
  135. unsigned long gprs[10];
  136. unsigned int empty2[8];
  137. };
  138. #else
  139. struct stack_frame {
  140. unsigned long empty1[5];
  141. unsigned int empty2[8];
  142. unsigned long gprs[10];
  143. unsigned long back_chain;
  144. };
  145. #endif
  146. #define ARCH_MIN_TASKALIGN 8
  147. #define INIT_THREAD { \
  148. .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \
  149. .fpu.regs = (void *) init_task.thread.fpu.fprs, \
  150. }
  151. /*
  152. * Do necessary setup to start up a new thread.
  153. */
  154. #define start_thread(regs, new_psw, new_stackp) do { \
  155. regs->psw.mask = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA; \
  156. regs->psw.addr = new_psw; \
  157. regs->gprs[15] = new_stackp; \
  158. execve_tail(); \
  159. } while (0)
  160. #define start_thread31(regs, new_psw, new_stackp) do { \
  161. regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \
  162. regs->psw.addr = new_psw; \
  163. regs->gprs[15] = new_stackp; \
  164. crst_table_downgrade(current->mm); \
  165. execve_tail(); \
  166. } while (0)
  167. /* Forward declaration, a strange C thing */
  168. struct task_struct;
  169. struct mm_struct;
  170. struct seq_file;
  171. typedef int (*dump_trace_func_t)(void *data, unsigned long address, int reliable);
  172. void dump_trace(dump_trace_func_t func, void *data,
  173. struct task_struct *task, unsigned long sp);
  174. void show_cacheinfo(struct seq_file *m);
  175. /* Free all resources held by a thread. */
  176. extern void release_thread(struct task_struct *);
  177. /*
  178. * Return saved PC of a blocked thread.
  179. */
  180. extern unsigned long thread_saved_pc(struct task_struct *t);
  181. unsigned long get_wchan(struct task_struct *p);
  182. #define task_pt_regs(tsk) ((struct pt_regs *) \
  183. (task_stack_page(tsk) + THREAD_SIZE) - 1)
  184. #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr)
  185. #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15])
  186. /* Has task runtime instrumentation enabled ? */
  187. #define is_ri_task(tsk) (!!(tsk)->thread.ri_cb)
  188. static inline unsigned long current_stack_pointer(void)
  189. {
  190. unsigned long sp;
  191. asm volatile("la %0,0(15)" : "=a" (sp));
  192. return sp;
  193. }
  194. static inline unsigned short stap(void)
  195. {
  196. unsigned short cpu_address;
  197. asm volatile("stap %0" : "=m" (cpu_address));
  198. return cpu_address;
  199. }
  200. /*
  201. * Give up the time slice of the virtual PU.
  202. */
  203. #define cpu_relax_yield cpu_relax_yield
  204. void cpu_relax_yield(void);
  205. #define cpu_relax() barrier()
  206. #define ECAG_CACHE_ATTRIBUTE 0
  207. #define ECAG_CPU_ATTRIBUTE 1
  208. static inline unsigned long __ecag(unsigned int asi, unsigned char parm)
  209. {
  210. unsigned long val;
  211. asm volatile(".insn rsy,0xeb000000004c,%0,0,0(%1)" /* ecag */
  212. : "=d" (val) : "a" (asi << 8 | parm));
  213. return val;
  214. }
  215. static inline void psw_set_key(unsigned int key)
  216. {
  217. asm volatile("spka 0(%0)" : : "d" (key));
  218. }
  219. /*
  220. * Set PSW to specified value.
  221. */
  222. static inline void __load_psw(psw_t psw)
  223. {
  224. asm volatile("lpswe %0" : : "Q" (psw) : "cc");
  225. }
  226. /*
  227. * Set PSW mask to specified value, while leaving the
  228. * PSW addr pointing to the next instruction.
  229. */
  230. static inline void __load_psw_mask(unsigned long mask)
  231. {
  232. unsigned long addr;
  233. psw_t psw;
  234. psw.mask = mask;
  235. asm volatile(
  236. " larl %0,1f\n"
  237. " stg %0,%O1+8(%R1)\n"
  238. " lpswe %1\n"
  239. "1:"
  240. : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
  241. }
  242. /*
  243. * Extract current PSW mask
  244. */
  245. static inline unsigned long __extract_psw(void)
  246. {
  247. unsigned int reg1, reg2;
  248. asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2));
  249. return (((unsigned long) reg1) << 32) | ((unsigned long) reg2);
  250. }
  251. static inline void local_mcck_enable(void)
  252. {
  253. __load_psw_mask(__extract_psw() | PSW_MASK_MCHECK);
  254. }
  255. static inline void local_mcck_disable(void)
  256. {
  257. __load_psw_mask(__extract_psw() & ~PSW_MASK_MCHECK);
  258. }
  259. /*
  260. * Rewind PSW instruction address by specified number of bytes.
  261. */
  262. static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc)
  263. {
  264. unsigned long mask;
  265. mask = (psw.mask & PSW_MASK_EA) ? -1UL :
  266. (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 :
  267. (1UL << 24) - 1;
  268. return (psw.addr - ilc) & mask;
  269. }
  270. /*
  271. * Function to stop a processor until the next interrupt occurs
  272. */
  273. void enabled_wait(void);
  274. /*
  275. * Function to drop a processor into disabled wait state
  276. */
  277. static inline void __noreturn disabled_wait(unsigned long code)
  278. {
  279. psw_t psw;
  280. psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA;
  281. psw.addr = code;
  282. __load_psw(psw);
  283. while (1);
  284. }
  285. /*
  286. * Basic Machine Check/Program Check Handler.
  287. */
  288. extern void s390_base_mcck_handler(void);
  289. extern void s390_base_pgm_handler(void);
  290. extern void s390_base_ext_handler(void);
  291. extern void (*s390_base_mcck_handler_fn)(void);
  292. extern void (*s390_base_pgm_handler_fn)(void);
  293. extern void (*s390_base_ext_handler_fn)(void);
  294. #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL
  295. extern int memcpy_real(void *, void *, size_t);
  296. extern void memcpy_absolute(void *, void *, size_t);
  297. #define mem_assign_absolute(dest, val) { \
  298. __typeof__(dest) __tmp = (val); \
  299. \
  300. BUILD_BUG_ON(sizeof(__tmp) != sizeof(val)); \
  301. memcpy_absolute(&(dest), &__tmp, sizeof(__tmp)); \
  302. }
  303. #endif /* __ASSEMBLY__ */
  304. #endif /* __ASM_S390_PROCESSOR_H */