platform.c 6.1 KB

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  1. /*
  2. * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
  3. * JZ4740 platform devices
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the
  7. * Free Software Foundation; either version 2 of the License, or (at your
  8. * option) any later version.
  9. *
  10. * You should have received a copy of the GNU General Public License along
  11. * with this program; if not, write to the Free Software Foundation, Inc.,
  12. * 675 Mass Ave, Cambridge, MA 02139, USA.
  13. *
  14. */
  15. #include <linux/clk.h>
  16. #include <linux/device.h>
  17. #include <linux/kernel.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/resource.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/usb/musb.h>
  22. #include <asm/mach-jz4740/platform.h>
  23. #include <asm/mach-jz4740/base.h>
  24. #include <asm/mach-jz4740/irq.h>
  25. #include <linux/serial_core.h>
  26. #include <linux/serial_8250.h>
  27. #include "clock.h"
  28. /* USB Device Controller */
  29. struct platform_device jz4740_udc_xceiv_device = {
  30. .name = "usb_phy_generic",
  31. .id = 0,
  32. };
  33. static struct resource jz4740_udc_resources[] = {
  34. [0] = {
  35. .start = JZ4740_UDC_BASE_ADDR,
  36. .end = JZ4740_UDC_BASE_ADDR + 0x10000 - 1,
  37. .flags = IORESOURCE_MEM,
  38. },
  39. [1] = {
  40. .start = JZ4740_IRQ_UDC,
  41. .end = JZ4740_IRQ_UDC,
  42. .flags = IORESOURCE_IRQ,
  43. .name = "mc",
  44. },
  45. };
  46. struct platform_device jz4740_udc_device = {
  47. .name = "musb-jz4740",
  48. .id = -1,
  49. .dev = {
  50. .dma_mask = &jz4740_udc_device.dev.coherent_dma_mask,
  51. .coherent_dma_mask = DMA_BIT_MASK(32),
  52. },
  53. .num_resources = ARRAY_SIZE(jz4740_udc_resources),
  54. .resource = jz4740_udc_resources,
  55. };
  56. /* MMC/SD controller */
  57. static struct resource jz4740_mmc_resources[] = {
  58. {
  59. .start = JZ4740_MSC_BASE_ADDR,
  60. .end = JZ4740_MSC_BASE_ADDR + 0x1000 - 1,
  61. .flags = IORESOURCE_MEM,
  62. },
  63. {
  64. .start = JZ4740_IRQ_MSC,
  65. .end = JZ4740_IRQ_MSC,
  66. .flags = IORESOURCE_IRQ,
  67. }
  68. };
  69. struct platform_device jz4740_mmc_device = {
  70. .name = "jz4740-mmc",
  71. .id = 0,
  72. .dev = {
  73. .dma_mask = &jz4740_mmc_device.dev.coherent_dma_mask,
  74. .coherent_dma_mask = DMA_BIT_MASK(32),
  75. },
  76. .num_resources = ARRAY_SIZE(jz4740_mmc_resources),
  77. .resource = jz4740_mmc_resources,
  78. };
  79. /* I2C controller */
  80. static struct resource jz4740_i2c_resources[] = {
  81. {
  82. .start = JZ4740_I2C_BASE_ADDR,
  83. .end = JZ4740_I2C_BASE_ADDR + 0x1000 - 1,
  84. .flags = IORESOURCE_MEM,
  85. },
  86. {
  87. .start = JZ4740_IRQ_I2C,
  88. .end = JZ4740_IRQ_I2C,
  89. .flags = IORESOURCE_IRQ,
  90. }
  91. };
  92. struct platform_device jz4740_i2c_device = {
  93. .name = "jz4740-i2c",
  94. .id = 0,
  95. .num_resources = ARRAY_SIZE(jz4740_i2c_resources),
  96. .resource = jz4740_i2c_resources,
  97. };
  98. /* NAND controller */
  99. static struct resource jz4740_nand_resources[] = {
  100. {
  101. .name = "mmio",
  102. .start = JZ4740_EMC_BASE_ADDR,
  103. .end = JZ4740_EMC_BASE_ADDR + 0x1000 - 1,
  104. .flags = IORESOURCE_MEM,
  105. },
  106. {
  107. .name = "bank1",
  108. .start = 0x18000000,
  109. .end = 0x180C0000 - 1,
  110. .flags = IORESOURCE_MEM,
  111. },
  112. {
  113. .name = "bank2",
  114. .start = 0x14000000,
  115. .end = 0x140C0000 - 1,
  116. .flags = IORESOURCE_MEM,
  117. },
  118. {
  119. .name = "bank3",
  120. .start = 0x0C000000,
  121. .end = 0x0C0C0000 - 1,
  122. .flags = IORESOURCE_MEM,
  123. },
  124. {
  125. .name = "bank4",
  126. .start = 0x08000000,
  127. .end = 0x080C0000 - 1,
  128. .flags = IORESOURCE_MEM,
  129. },
  130. };
  131. struct platform_device jz4740_nand_device = {
  132. .name = "jz4740-nand",
  133. .num_resources = ARRAY_SIZE(jz4740_nand_resources),
  134. .resource = jz4740_nand_resources,
  135. };
  136. /* LCD controller */
  137. static struct resource jz4740_framebuffer_resources[] = {
  138. {
  139. .start = JZ4740_LCD_BASE_ADDR,
  140. .end = JZ4740_LCD_BASE_ADDR + 0x1000 - 1,
  141. .flags = IORESOURCE_MEM,
  142. },
  143. };
  144. struct platform_device jz4740_framebuffer_device = {
  145. .name = "jz4740-fb",
  146. .id = -1,
  147. .num_resources = ARRAY_SIZE(jz4740_framebuffer_resources),
  148. .resource = jz4740_framebuffer_resources,
  149. .dev = {
  150. .dma_mask = &jz4740_framebuffer_device.dev.coherent_dma_mask,
  151. .coherent_dma_mask = DMA_BIT_MASK(32),
  152. },
  153. };
  154. /* I2S controller */
  155. static struct resource jz4740_i2s_resources[] = {
  156. {
  157. .start = JZ4740_AIC_BASE_ADDR,
  158. .end = JZ4740_AIC_BASE_ADDR + 0x38 - 1,
  159. .flags = IORESOURCE_MEM,
  160. },
  161. };
  162. struct platform_device jz4740_i2s_device = {
  163. .name = "jz4740-i2s",
  164. .id = -1,
  165. .num_resources = ARRAY_SIZE(jz4740_i2s_resources),
  166. .resource = jz4740_i2s_resources,
  167. };
  168. /* PCM */
  169. struct platform_device jz4740_pcm_device = {
  170. .name = "jz4740-pcm-audio",
  171. .id = -1,
  172. };
  173. /* Codec */
  174. static struct resource jz4740_codec_resources[] = {
  175. {
  176. .start = JZ4740_AIC_BASE_ADDR + 0x80,
  177. .end = JZ4740_AIC_BASE_ADDR + 0x88 - 1,
  178. .flags = IORESOURCE_MEM,
  179. },
  180. };
  181. struct platform_device jz4740_codec_device = {
  182. .name = "jz4740-codec",
  183. .id = -1,
  184. .num_resources = ARRAY_SIZE(jz4740_codec_resources),
  185. .resource = jz4740_codec_resources,
  186. };
  187. /* ADC controller */
  188. static struct resource jz4740_adc_resources[] = {
  189. {
  190. .start = JZ4740_SADC_BASE_ADDR,
  191. .end = JZ4740_SADC_BASE_ADDR + 0x30,
  192. .flags = IORESOURCE_MEM,
  193. },
  194. {
  195. .start = JZ4740_IRQ_SADC,
  196. .end = JZ4740_IRQ_SADC,
  197. .flags = IORESOURCE_IRQ,
  198. },
  199. {
  200. .start = JZ4740_IRQ_ADC_BASE,
  201. .end = JZ4740_IRQ_ADC_BASE,
  202. .flags = IORESOURCE_IRQ,
  203. },
  204. };
  205. struct platform_device jz4740_adc_device = {
  206. .name = "jz4740-adc",
  207. .id = -1,
  208. .num_resources = ARRAY_SIZE(jz4740_adc_resources),
  209. .resource = jz4740_adc_resources,
  210. };
  211. /* Watchdog */
  212. static struct resource jz4740_wdt_resources[] = {
  213. {
  214. .start = JZ4740_WDT_BASE_ADDR,
  215. .end = JZ4740_WDT_BASE_ADDR + 0x10 - 1,
  216. .flags = IORESOURCE_MEM,
  217. },
  218. };
  219. struct platform_device jz4740_wdt_device = {
  220. .name = "jz4740-wdt",
  221. .id = -1,
  222. .num_resources = ARRAY_SIZE(jz4740_wdt_resources),
  223. .resource = jz4740_wdt_resources,
  224. };
  225. /* PWM */
  226. struct platform_device jz4740_pwm_device = {
  227. .name = "jz4740-pwm",
  228. .id = -1,
  229. };
  230. /* DMA */
  231. static struct resource jz4740_dma_resources[] = {
  232. {
  233. .start = JZ4740_DMAC_BASE_ADDR,
  234. .end = JZ4740_DMAC_BASE_ADDR + 0x400 - 1,
  235. .flags = IORESOURCE_MEM,
  236. },
  237. {
  238. .start = JZ4740_IRQ_DMAC,
  239. .end = JZ4740_IRQ_DMAC,
  240. .flags = IORESOURCE_IRQ,
  241. },
  242. };
  243. struct platform_device jz4740_dma_device = {
  244. .name = "jz4740-dma",
  245. .id = -1,
  246. .num_resources = ARRAY_SIZE(jz4740_dma_resources),
  247. .resource = jz4740_dma_resources,
  248. };