cm_bf548.c 27 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/irq.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/usb/musb.h>
  19. #include <linux/gpio.h>
  20. #include <asm/bfin5xx_spi.h>
  21. #include <asm/dma.h>
  22. #include <asm/nand.h>
  23. #include <asm/portmux.h>
  24. #include <asm/bfin_sdh.h>
  25. #include <mach/bf54x_keys.h>
  26. #include <asm/dpmc.h>
  27. #include <linux/input.h>
  28. #include <linux/spi/ad7877.h>
  29. /*
  30. * Name the Board for the /proc/cpuinfo
  31. */
  32. const char bfin_board_name[] = "Bluetechnix CM-BF548";
  33. /*
  34. * Driver needs to know address, irq and flag pin.
  35. */
  36. #if IS_ENABLED(CONFIG_FB_BF54X_LQ043)
  37. #include <mach/bf54x-lq043.h>
  38. static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
  39. .width = 480,
  40. .height = 272,
  41. .xres = {480, 480, 480},
  42. .yres = {272, 272, 272},
  43. .bpp = {24, 24, 24},
  44. .disp = GPIO_PE3,
  45. };
  46. static struct resource bf54x_lq043_resources[] = {
  47. {
  48. .start = IRQ_EPPI0_ERR,
  49. .end = IRQ_EPPI0_ERR,
  50. .flags = IORESOURCE_IRQ,
  51. },
  52. };
  53. static struct platform_device bf54x_lq043_device = {
  54. .name = "bf54x-lq043",
  55. .id = -1,
  56. .num_resources = ARRAY_SIZE(bf54x_lq043_resources),
  57. .resource = bf54x_lq043_resources,
  58. .dev = {
  59. .platform_data = &bf54x_lq043_data,
  60. },
  61. };
  62. #endif
  63. #if IS_ENABLED(CONFIG_KEYBOARD_BFIN)
  64. static unsigned int bf548_keymap[] = {
  65. KEYVAL(0, 0, KEY_ENTER),
  66. KEYVAL(0, 1, KEY_HELP),
  67. KEYVAL(0, 2, KEY_0),
  68. KEYVAL(0, 3, KEY_BACKSPACE),
  69. KEYVAL(1, 0, KEY_TAB),
  70. KEYVAL(1, 1, KEY_9),
  71. KEYVAL(1, 2, KEY_8),
  72. KEYVAL(1, 3, KEY_7),
  73. KEYVAL(2, 0, KEY_DOWN),
  74. KEYVAL(2, 1, KEY_6),
  75. KEYVAL(2, 2, KEY_5),
  76. KEYVAL(2, 3, KEY_4),
  77. KEYVAL(3, 0, KEY_UP),
  78. KEYVAL(3, 1, KEY_3),
  79. KEYVAL(3, 2, KEY_2),
  80. KEYVAL(3, 3, KEY_1),
  81. };
  82. static struct bfin_kpad_platform_data bf54x_kpad_data = {
  83. .rows = 4,
  84. .cols = 4,
  85. .keymap = bf548_keymap,
  86. .keymapsize = ARRAY_SIZE(bf548_keymap),
  87. .repeat = 0,
  88. .debounce_time = 5000, /* ns (5ms) */
  89. .coldrive_time = 1000, /* ns (1ms) */
  90. .keyup_test_interval = 50, /* ms (50ms) */
  91. };
  92. static struct resource bf54x_kpad_resources[] = {
  93. {
  94. .start = IRQ_KEY,
  95. .end = IRQ_KEY,
  96. .flags = IORESOURCE_IRQ,
  97. },
  98. };
  99. static struct platform_device bf54x_kpad_device = {
  100. .name = "bf54x-keys",
  101. .id = -1,
  102. .num_resources = ARRAY_SIZE(bf54x_kpad_resources),
  103. .resource = bf54x_kpad_resources,
  104. .dev = {
  105. .platform_data = &bf54x_kpad_data,
  106. },
  107. };
  108. #endif
  109. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  110. static struct platform_device rtc_device = {
  111. .name = "rtc-bfin",
  112. .id = -1,
  113. };
  114. #endif
  115. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  116. #ifdef CONFIG_SERIAL_BFIN_UART0
  117. static struct resource bfin_uart0_resources[] = {
  118. {
  119. .start = UART0_DLL,
  120. .end = UART0_RBR+2,
  121. .flags = IORESOURCE_MEM,
  122. },
  123. {
  124. .start = IRQ_UART0_TX,
  125. .end = IRQ_UART0_TX,
  126. .flags = IORESOURCE_IRQ,
  127. },
  128. {
  129. .start = IRQ_UART0_RX,
  130. .end = IRQ_UART0_RX,
  131. .flags = IORESOURCE_IRQ,
  132. },
  133. {
  134. .start = IRQ_UART0_ERROR,
  135. .end = IRQ_UART0_ERROR,
  136. .flags = IORESOURCE_IRQ,
  137. },
  138. {
  139. .start = CH_UART0_TX,
  140. .end = CH_UART0_TX,
  141. .flags = IORESOURCE_DMA,
  142. },
  143. {
  144. .start = CH_UART0_RX,
  145. .end = CH_UART0_RX,
  146. .flags = IORESOURCE_DMA,
  147. },
  148. };
  149. static unsigned short bfin_uart0_peripherals[] = {
  150. P_UART0_TX, P_UART0_RX, 0
  151. };
  152. static struct platform_device bfin_uart0_device = {
  153. .name = "bfin-uart",
  154. .id = 0,
  155. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  156. .resource = bfin_uart0_resources,
  157. .dev = {
  158. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  159. },
  160. };
  161. #endif
  162. #ifdef CONFIG_SERIAL_BFIN_UART1
  163. static struct resource bfin_uart1_resources[] = {
  164. {
  165. .start = UART1_DLL,
  166. .end = UART1_RBR+2,
  167. .flags = IORESOURCE_MEM,
  168. },
  169. {
  170. .start = IRQ_UART1_TX,
  171. .end = IRQ_UART1_TX,
  172. .flags = IORESOURCE_IRQ,
  173. },
  174. {
  175. .start = IRQ_UART1_RX,
  176. .end = IRQ_UART1_RX,
  177. .flags = IORESOURCE_IRQ,
  178. },
  179. {
  180. .start = IRQ_UART1_ERROR,
  181. .end = IRQ_UART1_ERROR,
  182. .flags = IORESOURCE_IRQ,
  183. },
  184. {
  185. .start = CH_UART1_TX,
  186. .end = CH_UART1_TX,
  187. .flags = IORESOURCE_DMA,
  188. },
  189. {
  190. .start = CH_UART1_RX,
  191. .end = CH_UART1_RX,
  192. .flags = IORESOURCE_DMA,
  193. },
  194. #ifdef CONFIG_BFIN_UART1_CTSRTS
  195. { /* CTS pin -- 0 means not supported */
  196. .start = GPIO_PE10,
  197. .end = GPIO_PE10,
  198. .flags = IORESOURCE_IO,
  199. },
  200. { /* RTS pin -- 0 means not supported */
  201. .start = GPIO_PE9,
  202. .end = GPIO_PE9,
  203. .flags = IORESOURCE_IO,
  204. },
  205. #endif
  206. };
  207. static unsigned short bfin_uart1_peripherals[] = {
  208. P_UART1_TX, P_UART1_RX,
  209. #ifdef CONFIG_BFIN_UART1_CTSRTS
  210. P_UART1_RTS, P_UART1_CTS,
  211. #endif
  212. 0
  213. };
  214. static struct platform_device bfin_uart1_device = {
  215. .name = "bfin-uart",
  216. .id = 1,
  217. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  218. .resource = bfin_uart1_resources,
  219. .dev = {
  220. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  221. },
  222. };
  223. #endif
  224. #ifdef CONFIG_SERIAL_BFIN_UART2
  225. static struct resource bfin_uart2_resources[] = {
  226. {
  227. .start = UART2_DLL,
  228. .end = UART2_RBR+2,
  229. .flags = IORESOURCE_MEM,
  230. },
  231. {
  232. .start = IRQ_UART2_TX,
  233. .end = IRQ_UART2_TX,
  234. .flags = IORESOURCE_IRQ,
  235. },
  236. {
  237. .start = IRQ_UART2_RX,
  238. .end = IRQ_UART2_RX,
  239. .flags = IORESOURCE_IRQ,
  240. },
  241. {
  242. .start = IRQ_UART2_ERROR,
  243. .end = IRQ_UART2_ERROR,
  244. .flags = IORESOURCE_IRQ,
  245. },
  246. {
  247. .start = CH_UART2_TX,
  248. .end = CH_UART2_TX,
  249. .flags = IORESOURCE_DMA,
  250. },
  251. {
  252. .start = CH_UART2_RX,
  253. .end = CH_UART2_RX,
  254. .flags = IORESOURCE_DMA,
  255. },
  256. };
  257. static unsigned short bfin_uart2_peripherals[] = {
  258. P_UART2_TX, P_UART2_RX, 0
  259. };
  260. static struct platform_device bfin_uart2_device = {
  261. .name = "bfin-uart",
  262. .id = 2,
  263. .num_resources = ARRAY_SIZE(bfin_uart2_resources),
  264. .resource = bfin_uart2_resources,
  265. .dev = {
  266. .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
  267. },
  268. };
  269. #endif
  270. #ifdef CONFIG_SERIAL_BFIN_UART3
  271. static struct resource bfin_uart3_resources[] = {
  272. {
  273. .start = UART3_DLL,
  274. .end = UART3_RBR+2,
  275. .flags = IORESOURCE_MEM,
  276. },
  277. {
  278. .start = IRQ_UART3_TX,
  279. .end = IRQ_UART3_TX,
  280. .flags = IORESOURCE_IRQ,
  281. },
  282. {
  283. .start = IRQ_UART3_RX,
  284. .end = IRQ_UART3_RX,
  285. .flags = IORESOURCE_IRQ,
  286. },
  287. {
  288. .start = IRQ_UART3_ERROR,
  289. .end = IRQ_UART3_ERROR,
  290. .flags = IORESOURCE_IRQ,
  291. },
  292. {
  293. .start = CH_UART3_TX,
  294. .end = CH_UART3_TX,
  295. .flags = IORESOURCE_DMA,
  296. },
  297. {
  298. .start = CH_UART3_RX,
  299. .end = CH_UART3_RX,
  300. .flags = IORESOURCE_DMA,
  301. },
  302. #ifdef CONFIG_BFIN_UART3_CTSRTS
  303. { /* CTS pin -- 0 means not supported */
  304. .start = GPIO_PB3,
  305. .end = GPIO_PB3,
  306. .flags = IORESOURCE_IO,
  307. },
  308. { /* RTS pin -- 0 means not supported */
  309. .start = GPIO_PB2,
  310. .end = GPIO_PB2,
  311. .flags = IORESOURCE_IO,
  312. },
  313. #endif
  314. };
  315. static unsigned short bfin_uart3_peripherals[] = {
  316. P_UART3_TX, P_UART3_RX,
  317. #ifdef CONFIG_BFIN_UART3_CTSRTS
  318. P_UART3_RTS, P_UART3_CTS,
  319. #endif
  320. 0
  321. };
  322. static struct platform_device bfin_uart3_device = {
  323. .name = "bfin-uart",
  324. .id = 3,
  325. .num_resources = ARRAY_SIZE(bfin_uart3_resources),
  326. .resource = bfin_uart3_resources,
  327. .dev = {
  328. .platform_data = &bfin_uart3_peripherals, /* Passed to driver */
  329. },
  330. };
  331. #endif
  332. #endif
  333. #if IS_ENABLED(CONFIG_BFIN_SIR)
  334. #ifdef CONFIG_BFIN_SIR0
  335. static struct resource bfin_sir0_resources[] = {
  336. {
  337. .start = 0xFFC00400,
  338. .end = 0xFFC004FF,
  339. .flags = IORESOURCE_MEM,
  340. },
  341. {
  342. .start = IRQ_UART0_RX,
  343. .end = IRQ_UART0_RX+1,
  344. .flags = IORESOURCE_IRQ,
  345. },
  346. {
  347. .start = CH_UART0_RX,
  348. .end = CH_UART0_RX+1,
  349. .flags = IORESOURCE_DMA,
  350. },
  351. };
  352. static struct platform_device bfin_sir0_device = {
  353. .name = "bfin_sir",
  354. .id = 0,
  355. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  356. .resource = bfin_sir0_resources,
  357. };
  358. #endif
  359. #ifdef CONFIG_BFIN_SIR1
  360. static struct resource bfin_sir1_resources[] = {
  361. {
  362. .start = 0xFFC02000,
  363. .end = 0xFFC020FF,
  364. .flags = IORESOURCE_MEM,
  365. },
  366. {
  367. .start = IRQ_UART1_RX,
  368. .end = IRQ_UART1_RX+1,
  369. .flags = IORESOURCE_IRQ,
  370. },
  371. {
  372. .start = CH_UART1_RX,
  373. .end = CH_UART1_RX+1,
  374. .flags = IORESOURCE_DMA,
  375. },
  376. };
  377. static struct platform_device bfin_sir1_device = {
  378. .name = "bfin_sir",
  379. .id = 1,
  380. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  381. .resource = bfin_sir1_resources,
  382. };
  383. #endif
  384. #ifdef CONFIG_BFIN_SIR2
  385. static struct resource bfin_sir2_resources[] = {
  386. {
  387. .start = 0xFFC02100,
  388. .end = 0xFFC021FF,
  389. .flags = IORESOURCE_MEM,
  390. },
  391. {
  392. .start = IRQ_UART2_RX,
  393. .end = IRQ_UART2_RX+1,
  394. .flags = IORESOURCE_IRQ,
  395. },
  396. {
  397. .start = CH_UART2_RX,
  398. .end = CH_UART2_RX+1,
  399. .flags = IORESOURCE_DMA,
  400. },
  401. };
  402. static struct platform_device bfin_sir2_device = {
  403. .name = "bfin_sir",
  404. .id = 2,
  405. .num_resources = ARRAY_SIZE(bfin_sir2_resources),
  406. .resource = bfin_sir2_resources,
  407. };
  408. #endif
  409. #ifdef CONFIG_BFIN_SIR3
  410. static struct resource bfin_sir3_resources[] = {
  411. {
  412. .start = 0xFFC03100,
  413. .end = 0xFFC031FF,
  414. .flags = IORESOURCE_MEM,
  415. },
  416. {
  417. .start = IRQ_UART3_RX,
  418. .end = IRQ_UART3_RX+1,
  419. .flags = IORESOURCE_IRQ,
  420. },
  421. {
  422. .start = CH_UART3_RX,
  423. .end = CH_UART3_RX+1,
  424. .flags = IORESOURCE_DMA,
  425. },
  426. };
  427. static struct platform_device bfin_sir3_device = {
  428. .name = "bfin_sir",
  429. .id = 3,
  430. .num_resources = ARRAY_SIZE(bfin_sir3_resources),
  431. .resource = bfin_sir3_resources,
  432. };
  433. #endif
  434. #endif
  435. #if IS_ENABLED(CONFIG_SMSC911X)
  436. #include <linux/smsc911x.h>
  437. static struct resource smsc911x_resources[] = {
  438. {
  439. .name = "smsc911x-memory",
  440. .start = 0x24000000,
  441. .end = 0x24000000 + 0xFF,
  442. .flags = IORESOURCE_MEM,
  443. },
  444. {
  445. .start = IRQ_PE6,
  446. .end = IRQ_PE6,
  447. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  448. },
  449. };
  450. static struct smsc911x_platform_config smsc911x_config = {
  451. .flags = SMSC911X_USE_16BIT,
  452. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  453. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  454. .phy_interface = PHY_INTERFACE_MODE_MII,
  455. };
  456. static struct platform_device smsc911x_device = {
  457. .name = "smsc911x",
  458. .id = 0,
  459. .num_resources = ARRAY_SIZE(smsc911x_resources),
  460. .resource = smsc911x_resources,
  461. .dev = {
  462. .platform_data = &smsc911x_config,
  463. },
  464. };
  465. #endif
  466. #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
  467. static struct resource musb_resources[] = {
  468. [0] = {
  469. .start = 0xFFC03C00,
  470. .end = 0xFFC040FF,
  471. .flags = IORESOURCE_MEM,
  472. },
  473. [1] = { /* general IRQ */
  474. .start = IRQ_USB_INT0,
  475. .end = IRQ_USB_INT0,
  476. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  477. .name = "mc"
  478. },
  479. [2] = { /* DMA IRQ */
  480. .start = IRQ_USB_DMA,
  481. .end = IRQ_USB_DMA,
  482. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  483. .name = "dma"
  484. },
  485. };
  486. static struct musb_hdrc_config musb_config = {
  487. .multipoint = 0,
  488. .dyn_fifo = 0,
  489. .soft_con = 1,
  490. .dma = 1,
  491. .num_eps = 8,
  492. .dma_channels = 8,
  493. .gpio_vrsel = GPIO_PH6,
  494. /* Some custom boards need to be active low, just set it to "0"
  495. * if it is the case.
  496. */
  497. .gpio_vrsel_active = 1,
  498. .clkin = 24, /* musb CLKIN in MHZ */
  499. };
  500. static struct musb_hdrc_platform_data musb_plat = {
  501. #if defined(CONFIG_USB_MUSB_OTG)
  502. .mode = MUSB_OTG,
  503. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  504. .mode = MUSB_HOST,
  505. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  506. .mode = MUSB_PERIPHERAL,
  507. #endif
  508. .config = &musb_config,
  509. };
  510. static u64 musb_dmamask = ~(u32)0;
  511. static struct platform_device musb_device = {
  512. .name = "musb-blackfin",
  513. .id = 0,
  514. .dev = {
  515. .dma_mask = &musb_dmamask,
  516. .coherent_dma_mask = 0xffffffff,
  517. .platform_data = &musb_plat,
  518. },
  519. .num_resources = ARRAY_SIZE(musb_resources),
  520. .resource = musb_resources,
  521. };
  522. #endif
  523. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  524. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  525. static struct resource bfin_sport0_uart_resources[] = {
  526. {
  527. .start = SPORT0_TCR1,
  528. .end = SPORT0_MRCS3+4,
  529. .flags = IORESOURCE_MEM,
  530. },
  531. {
  532. .start = IRQ_SPORT0_RX,
  533. .end = IRQ_SPORT0_RX+1,
  534. .flags = IORESOURCE_IRQ,
  535. },
  536. {
  537. .start = IRQ_SPORT0_ERROR,
  538. .end = IRQ_SPORT0_ERROR,
  539. .flags = IORESOURCE_IRQ,
  540. },
  541. };
  542. static unsigned short bfin_sport0_peripherals[] = {
  543. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  544. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  545. };
  546. static struct platform_device bfin_sport0_uart_device = {
  547. .name = "bfin-sport-uart",
  548. .id = 0,
  549. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  550. .resource = bfin_sport0_uart_resources,
  551. .dev = {
  552. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  553. },
  554. };
  555. #endif
  556. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  557. static struct resource bfin_sport1_uart_resources[] = {
  558. {
  559. .start = SPORT1_TCR1,
  560. .end = SPORT1_MRCS3+4,
  561. .flags = IORESOURCE_MEM,
  562. },
  563. {
  564. .start = IRQ_SPORT1_RX,
  565. .end = IRQ_SPORT1_RX+1,
  566. .flags = IORESOURCE_IRQ,
  567. },
  568. {
  569. .start = IRQ_SPORT1_ERROR,
  570. .end = IRQ_SPORT1_ERROR,
  571. .flags = IORESOURCE_IRQ,
  572. },
  573. };
  574. static unsigned short bfin_sport1_peripherals[] = {
  575. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  576. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  577. };
  578. static struct platform_device bfin_sport1_uart_device = {
  579. .name = "bfin-sport-uart",
  580. .id = 1,
  581. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  582. .resource = bfin_sport1_uart_resources,
  583. .dev = {
  584. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  585. },
  586. };
  587. #endif
  588. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  589. static struct resource bfin_sport2_uart_resources[] = {
  590. {
  591. .start = SPORT2_TCR1,
  592. .end = SPORT2_MRCS3+4,
  593. .flags = IORESOURCE_MEM,
  594. },
  595. {
  596. .start = IRQ_SPORT2_RX,
  597. .end = IRQ_SPORT2_RX+1,
  598. .flags = IORESOURCE_IRQ,
  599. },
  600. {
  601. .start = IRQ_SPORT2_ERROR,
  602. .end = IRQ_SPORT2_ERROR,
  603. .flags = IORESOURCE_IRQ,
  604. },
  605. };
  606. static unsigned short bfin_sport2_peripherals[] = {
  607. P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
  608. P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
  609. };
  610. static struct platform_device bfin_sport2_uart_device = {
  611. .name = "bfin-sport-uart",
  612. .id = 2,
  613. .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
  614. .resource = bfin_sport2_uart_resources,
  615. .dev = {
  616. .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
  617. },
  618. };
  619. #endif
  620. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  621. static struct resource bfin_sport3_uart_resources[] = {
  622. {
  623. .start = SPORT3_TCR1,
  624. .end = SPORT3_MRCS3+4,
  625. .flags = IORESOURCE_MEM,
  626. },
  627. {
  628. .start = IRQ_SPORT3_RX,
  629. .end = IRQ_SPORT3_RX+1,
  630. .flags = IORESOURCE_IRQ,
  631. },
  632. {
  633. .start = IRQ_SPORT3_ERROR,
  634. .end = IRQ_SPORT3_ERROR,
  635. .flags = IORESOURCE_IRQ,
  636. },
  637. };
  638. static unsigned short bfin_sport3_peripherals[] = {
  639. P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
  640. P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
  641. };
  642. static struct platform_device bfin_sport3_uart_device = {
  643. .name = "bfin-sport-uart",
  644. .id = 3,
  645. .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
  646. .resource = bfin_sport3_uart_resources,
  647. .dev = {
  648. .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
  649. },
  650. };
  651. #endif
  652. #endif
  653. #if IS_ENABLED(CONFIG_PATA_BF54X)
  654. static struct resource bfin_atapi_resources[] = {
  655. {
  656. .start = 0xFFC03800,
  657. .end = 0xFFC0386F,
  658. .flags = IORESOURCE_MEM,
  659. },
  660. {
  661. .start = IRQ_ATAPI_ERR,
  662. .end = IRQ_ATAPI_ERR,
  663. .flags = IORESOURCE_IRQ,
  664. },
  665. };
  666. static struct platform_device bfin_atapi_device = {
  667. .name = "pata-bf54x",
  668. .id = -1,
  669. .num_resources = ARRAY_SIZE(bfin_atapi_resources),
  670. .resource = bfin_atapi_resources,
  671. };
  672. #endif
  673. #if IS_ENABLED(CONFIG_MTD_NAND_BF5XX)
  674. static struct mtd_partition partition_info[] = {
  675. {
  676. .name = "linux kernel(nand)",
  677. .offset = 0,
  678. .size = 4 * 1024 * 1024,
  679. },
  680. {
  681. .name = "file system(nand)",
  682. .offset = 4 * 1024 * 1024,
  683. .size = (256 - 4) * 1024 * 1024,
  684. },
  685. };
  686. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  687. .data_width = NFC_NWIDTH_8,
  688. .partitions = partition_info,
  689. .nr_partitions = ARRAY_SIZE(partition_info),
  690. .rd_dly = 3,
  691. .wr_dly = 3,
  692. };
  693. static struct resource bf5xx_nand_resources[] = {
  694. {
  695. .start = 0xFFC03B00,
  696. .end = 0xFFC03B4F,
  697. .flags = IORESOURCE_MEM,
  698. },
  699. {
  700. .start = CH_NFC,
  701. .end = CH_NFC,
  702. .flags = IORESOURCE_IRQ,
  703. },
  704. };
  705. static struct platform_device bf5xx_nand_device = {
  706. .name = "bf5xx-nand",
  707. .id = 0,
  708. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  709. .resource = bf5xx_nand_resources,
  710. .dev = {
  711. .platform_data = &bf5xx_nand_platform,
  712. },
  713. };
  714. #endif
  715. #if IS_ENABLED(CONFIG_SDH_BFIN)
  716. static struct bfin_sd_host bfin_sdh_data = {
  717. .dma_chan = CH_SDH,
  718. .irq_int0 = IRQ_SDH_MASK0,
  719. .pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
  720. };
  721. static struct platform_device bf54x_sdh_device = {
  722. .name = "bfin-sdh",
  723. .id = 0,
  724. .dev = {
  725. .platform_data = &bfin_sdh_data,
  726. },
  727. };
  728. #endif
  729. #if IS_ENABLED(CONFIG_CAN_BFIN)
  730. static unsigned short bfin_can_peripherals[] = {
  731. P_CAN0_RX, P_CAN0_TX, 0
  732. };
  733. static struct resource bfin_can_resources[] = {
  734. {
  735. .start = 0xFFC02A00,
  736. .end = 0xFFC02FFF,
  737. .flags = IORESOURCE_MEM,
  738. },
  739. {
  740. .start = IRQ_CAN0_RX,
  741. .end = IRQ_CAN0_RX,
  742. .flags = IORESOURCE_IRQ,
  743. },
  744. {
  745. .start = IRQ_CAN0_TX,
  746. .end = IRQ_CAN0_TX,
  747. .flags = IORESOURCE_IRQ,
  748. },
  749. {
  750. .start = IRQ_CAN0_ERROR,
  751. .end = IRQ_CAN0_ERROR,
  752. .flags = IORESOURCE_IRQ,
  753. },
  754. };
  755. static struct platform_device bfin_can_device = {
  756. .name = "bfin_can",
  757. .num_resources = ARRAY_SIZE(bfin_can_resources),
  758. .resource = bfin_can_resources,
  759. .dev = {
  760. .platform_data = &bfin_can_peripherals, /* Passed to driver */
  761. },
  762. };
  763. #endif
  764. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  765. static struct mtd_partition para_partitions[] = {
  766. {
  767. .name = "bootloader(nor)",
  768. .size = 0x40000,
  769. .offset = 0,
  770. }, {
  771. .name = "linux kernel(nor)",
  772. .size = 0x100000,
  773. .offset = MTDPART_OFS_APPEND,
  774. }, {
  775. .name = "file system(nor)",
  776. .size = MTDPART_SIZ_FULL,
  777. .offset = MTDPART_OFS_APPEND,
  778. }
  779. };
  780. static struct physmap_flash_data para_flash_data = {
  781. .width = 2,
  782. .parts = para_partitions,
  783. .nr_parts = ARRAY_SIZE(para_partitions),
  784. };
  785. static struct resource para_flash_resource = {
  786. .start = 0x20000000,
  787. .end = 0x207fffff,
  788. .flags = IORESOURCE_MEM,
  789. };
  790. static struct platform_device para_flash_device = {
  791. .name = "physmap-flash",
  792. .id = 0,
  793. .dev = {
  794. .platform_data = &para_flash_data,
  795. },
  796. .num_resources = 1,
  797. .resource = &para_flash_resource,
  798. };
  799. #endif
  800. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  801. /* all SPI peripherals info goes here */
  802. #if IS_ENABLED(CONFIG_MTD_M25P80)
  803. /* SPI flash chip (m25p16) */
  804. static struct mtd_partition bfin_spi_flash_partitions[] = {
  805. {
  806. .name = "bootloader(spi)",
  807. .size = 0x00040000,
  808. .offset = 0,
  809. .mask_flags = MTD_CAP_ROM
  810. }, {
  811. .name = "linux kernel(spi)",
  812. .size = 0x1c0000,
  813. .offset = 0x40000
  814. }
  815. };
  816. static struct flash_platform_data bfin_spi_flash_data = {
  817. .name = "m25p80",
  818. .parts = bfin_spi_flash_partitions,
  819. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  820. .type = "m25p16",
  821. };
  822. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  823. .enable_dma = 0, /* use dma transfer with this chip*/
  824. };
  825. #endif
  826. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
  827. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  828. .model = 7877,
  829. .vref_delay_usecs = 50, /* internal, no capacitor */
  830. .x_plate_ohms = 419,
  831. .y_plate_ohms = 486,
  832. .pressure_max = 1000,
  833. .pressure_min = 0,
  834. .stopacq_polarity = 1,
  835. .first_conversion_delay = 3,
  836. .acquisition_time = 1,
  837. .averaging = 1,
  838. .pen_down_acc_interval = 1,
  839. };
  840. #endif
  841. static struct spi_board_info bf54x_spi_board_info[] __initdata = {
  842. #if IS_ENABLED(CONFIG_MTD_M25P80)
  843. {
  844. /* the modalias must be the same as spi device driver name */
  845. .modalias = "m25p80", /* Name of spi_driver for this device */
  846. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  847. .bus_num = 0, /* Framework bus number */
  848. .chip_select = 1, /* SPI_SSEL1*/
  849. .platform_data = &bfin_spi_flash_data,
  850. .controller_data = &spi_flash_chip_info,
  851. .mode = SPI_MODE_3,
  852. },
  853. #endif
  854. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
  855. {
  856. .modalias = "ad7877",
  857. .platform_data = &bfin_ad7877_ts_info,
  858. .irq = IRQ_PJ11,
  859. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  860. .bus_num = 0,
  861. .chip_select = 2,
  862. },
  863. #endif
  864. #if IS_ENABLED(CONFIG_SPI_SPIDEV)
  865. {
  866. .modalias = "spidev",
  867. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  868. .bus_num = 0,
  869. .chip_select = 1,
  870. },
  871. #endif
  872. };
  873. /* SPI (0) */
  874. static struct resource bfin_spi0_resource[] = {
  875. [0] = {
  876. .start = SPI0_REGBASE,
  877. .end = SPI0_REGBASE + 0xFF,
  878. .flags = IORESOURCE_MEM,
  879. },
  880. [1] = {
  881. .start = CH_SPI0,
  882. .end = CH_SPI0,
  883. .flags = IORESOURCE_DMA,
  884. },
  885. [2] = {
  886. .start = IRQ_SPI0,
  887. .end = IRQ_SPI0,
  888. .flags = IORESOURCE_IRQ,
  889. }
  890. };
  891. /* SPI (1) */
  892. static struct resource bfin_spi1_resource[] = {
  893. [0] = {
  894. .start = SPI1_REGBASE,
  895. .end = SPI1_REGBASE + 0xFF,
  896. .flags = IORESOURCE_MEM,
  897. },
  898. [1] = {
  899. .start = CH_SPI1,
  900. .end = CH_SPI1,
  901. .flags = IORESOURCE_DMA,
  902. },
  903. [2] = {
  904. .start = IRQ_SPI1,
  905. .end = IRQ_SPI1,
  906. .flags = IORESOURCE_IRQ,
  907. }
  908. };
  909. /* SPI controller data */
  910. static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
  911. .num_chipselect = 4,
  912. .enable_dma = 1, /* master has the ability to do dma transfer */
  913. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  914. };
  915. static struct platform_device bf54x_spi_master0 = {
  916. .name = "bfin-spi",
  917. .id = 0, /* Bus number */
  918. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  919. .resource = bfin_spi0_resource,
  920. .dev = {
  921. .platform_data = &bf54x_spi_master_info0, /* Passed to driver */
  922. },
  923. };
  924. static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
  925. .num_chipselect = 4,
  926. .enable_dma = 1, /* master has the ability to do dma transfer */
  927. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  928. };
  929. static struct platform_device bf54x_spi_master1 = {
  930. .name = "bfin-spi",
  931. .id = 1, /* Bus number */
  932. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  933. .resource = bfin_spi1_resource,
  934. .dev = {
  935. .platform_data = &bf54x_spi_master_info1, /* Passed to driver */
  936. },
  937. };
  938. #endif /* spi master and devices */
  939. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  940. static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
  941. static struct resource bfin_twi0_resource[] = {
  942. [0] = {
  943. .start = TWI0_REGBASE,
  944. .end = TWI0_REGBASE + 0xFF,
  945. .flags = IORESOURCE_MEM,
  946. },
  947. [1] = {
  948. .start = IRQ_TWI0,
  949. .end = IRQ_TWI0,
  950. .flags = IORESOURCE_IRQ,
  951. },
  952. };
  953. static struct platform_device i2c_bfin_twi0_device = {
  954. .name = "i2c-bfin-twi",
  955. .id = 0,
  956. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  957. .resource = bfin_twi0_resource,
  958. .dev = {
  959. .platform_data = &bfin_twi0_pins,
  960. },
  961. };
  962. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  963. static const u16 bfin_twi1_pins[] = {P_TWI1_SCL, P_TWI1_SDA, 0};
  964. static struct resource bfin_twi1_resource[] = {
  965. [0] = {
  966. .start = TWI1_REGBASE,
  967. .end = TWI1_REGBASE + 0xFF,
  968. .flags = IORESOURCE_MEM,
  969. },
  970. [1] = {
  971. .start = IRQ_TWI1,
  972. .end = IRQ_TWI1,
  973. .flags = IORESOURCE_IRQ,
  974. },
  975. };
  976. static struct platform_device i2c_bfin_twi1_device = {
  977. .name = "i2c-bfin-twi",
  978. .id = 1,
  979. .num_resources = ARRAY_SIZE(bfin_twi1_resource),
  980. .resource = bfin_twi1_resource,
  981. .dev = {
  982. .platform_data = &bfin_twi1_pins,
  983. },
  984. };
  985. #endif
  986. #endif
  987. #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
  988. #include <linux/gpio_keys.h>
  989. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  990. {BTN_0, GPIO_PH7, 1, "gpio-keys: BTN0"},
  991. };
  992. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  993. .buttons = bfin_gpio_keys_table,
  994. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  995. };
  996. static struct platform_device bfin_device_gpiokeys = {
  997. .name = "gpio-keys",
  998. .dev = {
  999. .platform_data = &bfin_gpio_keys_data,
  1000. },
  1001. };
  1002. #endif
  1003. static const unsigned int cclk_vlev_datasheet[] =
  1004. {
  1005. /*
  1006. * Internal VLEV BF54XSBBC1533
  1007. ****temporarily using these values until data sheet is updated
  1008. */
  1009. VRPAIR(VLEV_085, 150000000),
  1010. VRPAIR(VLEV_090, 250000000),
  1011. VRPAIR(VLEV_110, 276000000),
  1012. VRPAIR(VLEV_115, 301000000),
  1013. VRPAIR(VLEV_120, 525000000),
  1014. VRPAIR(VLEV_125, 550000000),
  1015. VRPAIR(VLEV_130, 600000000),
  1016. };
  1017. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  1018. .tuple_tab = cclk_vlev_datasheet,
  1019. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  1020. .vr_settling_time = 25 /* us */,
  1021. };
  1022. static struct platform_device bfin_dpmc = {
  1023. .name = "bfin dpmc",
  1024. .dev = {
  1025. .platform_data = &bfin_dmpc_vreg_data,
  1026. },
  1027. };
  1028. static struct platform_device *cm_bf548_devices[] __initdata = {
  1029. &bfin_dpmc,
  1030. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  1031. &rtc_device,
  1032. #endif
  1033. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  1034. #ifdef CONFIG_SERIAL_BFIN_UART0
  1035. &bfin_uart0_device,
  1036. #endif
  1037. #ifdef CONFIG_SERIAL_BFIN_UART1
  1038. &bfin_uart1_device,
  1039. #endif
  1040. #ifdef CONFIG_SERIAL_BFIN_UART2
  1041. &bfin_uart2_device,
  1042. #endif
  1043. #ifdef CONFIG_SERIAL_BFIN_UART3
  1044. &bfin_uart3_device,
  1045. #endif
  1046. #endif
  1047. #if IS_ENABLED(CONFIG_BFIN_SIR)
  1048. #ifdef CONFIG_BFIN_SIR0
  1049. &bfin_sir0_device,
  1050. #endif
  1051. #ifdef CONFIG_BFIN_SIR1
  1052. &bfin_sir1_device,
  1053. #endif
  1054. #ifdef CONFIG_BFIN_SIR2
  1055. &bfin_sir2_device,
  1056. #endif
  1057. #ifdef CONFIG_BFIN_SIR3
  1058. &bfin_sir3_device,
  1059. #endif
  1060. #endif
  1061. #if IS_ENABLED(CONFIG_FB_BF54X_LQ043)
  1062. &bf54x_lq043_device,
  1063. #endif
  1064. #if IS_ENABLED(CONFIG_SMSC911X)
  1065. &smsc911x_device,
  1066. #endif
  1067. #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
  1068. &musb_device,
  1069. #endif
  1070. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  1071. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1072. &bfin_sport0_uart_device,
  1073. #endif
  1074. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1075. &bfin_sport1_uart_device,
  1076. #endif
  1077. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  1078. &bfin_sport2_uart_device,
  1079. #endif
  1080. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  1081. &bfin_sport3_uart_device,
  1082. #endif
  1083. #endif
  1084. #if IS_ENABLED(CONFIG_PATA_BF54X)
  1085. &bfin_atapi_device,
  1086. #endif
  1087. #if IS_ENABLED(CONFIG_MTD_NAND_BF5XX)
  1088. &bf5xx_nand_device,
  1089. #endif
  1090. #if IS_ENABLED(CONFIG_SDH_BFIN)
  1091. &bf54x_sdh_device,
  1092. #endif
  1093. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  1094. &bf54x_spi_master0,
  1095. &bf54x_spi_master1,
  1096. #endif
  1097. #if IS_ENABLED(CONFIG_KEYBOARD_BFIN)
  1098. &bf54x_kpad_device,
  1099. #endif
  1100. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  1101. &i2c_bfin_twi0_device,
  1102. #if !defined(CONFIG_BF542)
  1103. &i2c_bfin_twi1_device,
  1104. #endif
  1105. #endif
  1106. #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
  1107. &bfin_device_gpiokeys,
  1108. #endif
  1109. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  1110. &para_flash_device,
  1111. #endif
  1112. #if IS_ENABLED(CONFIG_CAN_BFIN)
  1113. &bfin_can_device,
  1114. #endif
  1115. };
  1116. static int __init cm_bf548_init(void)
  1117. {
  1118. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  1119. platform_add_devices(cm_bf548_devices, ARRAY_SIZE(cm_bf548_devices));
  1120. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  1121. spi_register_board_info(bf54x_spi_board_info,
  1122. ARRAY_SIZE(bf54x_spi_board_info));
  1123. #endif
  1124. return 0;
  1125. }
  1126. arch_initcall(cm_bf548_init);
  1127. static struct platform_device *cm_bf548_early_devices[] __initdata = {
  1128. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  1129. #ifdef CONFIG_SERIAL_BFIN_UART0
  1130. &bfin_uart0_device,
  1131. #endif
  1132. #ifdef CONFIG_SERIAL_BFIN_UART1
  1133. &bfin_uart1_device,
  1134. #endif
  1135. #ifdef CONFIG_SERIAL_BFIN_UART2
  1136. &bfin_uart2_device,
  1137. #endif
  1138. #ifdef CONFIG_SERIAL_BFIN_UART3
  1139. &bfin_uart3_device,
  1140. #endif
  1141. #endif
  1142. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  1143. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1144. &bfin_sport0_uart_device,
  1145. #endif
  1146. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1147. &bfin_sport1_uart_device,
  1148. #endif
  1149. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  1150. &bfin_sport2_uart_device,
  1151. #endif
  1152. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  1153. &bfin_sport3_uart_device,
  1154. #endif
  1155. #endif
  1156. };
  1157. void __init native_machine_early_platform_add_devices(void)
  1158. {
  1159. printk(KERN_INFO "register early platform devices\n");
  1160. early_platform_add_devices(cm_bf548_early_devices,
  1161. ARRAY_SIZE(cm_bf548_early_devices));
  1162. }