ptrace.c 34 KB

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  1. /*
  2. * Based on arch/arm/kernel/ptrace.c
  3. *
  4. * By Ross Biro 1/23/92
  5. * edited by Linus Torvalds
  6. * ARM modifications Copyright (C) 2000 Russell King
  7. * Copyright (C) 2012 ARM Ltd.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  20. */
  21. #include <linux/audit.h>
  22. #include <linux/compat.h>
  23. #include <linux/kernel.h>
  24. #include <linux/sched.h>
  25. #include <linux/mm.h>
  26. #include <linux/smp.h>
  27. #include <linux/ptrace.h>
  28. #include <linux/user.h>
  29. #include <linux/seccomp.h>
  30. #include <linux/security.h>
  31. #include <linux/init.h>
  32. #include <linux/signal.h>
  33. #include <linux/uaccess.h>
  34. #include <linux/perf_event.h>
  35. #include <linux/hw_breakpoint.h>
  36. #include <linux/regset.h>
  37. #include <linux/tracehook.h>
  38. #include <linux/elf.h>
  39. #include <asm/compat.h>
  40. #include <asm/debug-monitors.h>
  41. #include <asm/pgtable.h>
  42. #include <asm/syscall.h>
  43. #include <asm/traps.h>
  44. #include <asm/system_misc.h>
  45. #define CREATE_TRACE_POINTS
  46. #include <trace/events/syscalls.h>
  47. struct pt_regs_offset {
  48. const char *name;
  49. int offset;
  50. };
  51. #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
  52. #define REG_OFFSET_END {.name = NULL, .offset = 0}
  53. #define GPR_OFFSET_NAME(r) \
  54. {.name = "x" #r, .offset = offsetof(struct pt_regs, regs[r])}
  55. static const struct pt_regs_offset regoffset_table[] = {
  56. GPR_OFFSET_NAME(0),
  57. GPR_OFFSET_NAME(1),
  58. GPR_OFFSET_NAME(2),
  59. GPR_OFFSET_NAME(3),
  60. GPR_OFFSET_NAME(4),
  61. GPR_OFFSET_NAME(5),
  62. GPR_OFFSET_NAME(6),
  63. GPR_OFFSET_NAME(7),
  64. GPR_OFFSET_NAME(8),
  65. GPR_OFFSET_NAME(9),
  66. GPR_OFFSET_NAME(10),
  67. GPR_OFFSET_NAME(11),
  68. GPR_OFFSET_NAME(12),
  69. GPR_OFFSET_NAME(13),
  70. GPR_OFFSET_NAME(14),
  71. GPR_OFFSET_NAME(15),
  72. GPR_OFFSET_NAME(16),
  73. GPR_OFFSET_NAME(17),
  74. GPR_OFFSET_NAME(18),
  75. GPR_OFFSET_NAME(19),
  76. GPR_OFFSET_NAME(20),
  77. GPR_OFFSET_NAME(21),
  78. GPR_OFFSET_NAME(22),
  79. GPR_OFFSET_NAME(23),
  80. GPR_OFFSET_NAME(24),
  81. GPR_OFFSET_NAME(25),
  82. GPR_OFFSET_NAME(26),
  83. GPR_OFFSET_NAME(27),
  84. GPR_OFFSET_NAME(28),
  85. GPR_OFFSET_NAME(29),
  86. GPR_OFFSET_NAME(30),
  87. {.name = "lr", .offset = offsetof(struct pt_regs, regs[30])},
  88. REG_OFFSET_NAME(sp),
  89. REG_OFFSET_NAME(pc),
  90. REG_OFFSET_NAME(pstate),
  91. REG_OFFSET_END,
  92. };
  93. /**
  94. * regs_query_register_offset() - query register offset from its name
  95. * @name: the name of a register
  96. *
  97. * regs_query_register_offset() returns the offset of a register in struct
  98. * pt_regs from its name. If the name is invalid, this returns -EINVAL;
  99. */
  100. int regs_query_register_offset(const char *name)
  101. {
  102. const struct pt_regs_offset *roff;
  103. for (roff = regoffset_table; roff->name != NULL; roff++)
  104. if (!strcmp(roff->name, name))
  105. return roff->offset;
  106. return -EINVAL;
  107. }
  108. /**
  109. * regs_within_kernel_stack() - check the address in the stack
  110. * @regs: pt_regs which contains kernel stack pointer.
  111. * @addr: address which is checked.
  112. *
  113. * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).
  114. * If @addr is within the kernel stack, it returns true. If not, returns false.
  115. */
  116. static bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)
  117. {
  118. return ((addr & ~(THREAD_SIZE - 1)) ==
  119. (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1))) ||
  120. on_irq_stack(addr, raw_smp_processor_id());
  121. }
  122. /**
  123. * regs_get_kernel_stack_nth() - get Nth entry of the stack
  124. * @regs: pt_regs which contains kernel stack pointer.
  125. * @n: stack entry number.
  126. *
  127. * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
  128. * is specified by @regs. If the @n th entry is NOT in the kernel stack,
  129. * this returns 0.
  130. */
  131. unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)
  132. {
  133. unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);
  134. addr += n;
  135. if (regs_within_kernel_stack(regs, (unsigned long)addr))
  136. return *addr;
  137. else
  138. return 0;
  139. }
  140. /*
  141. * TODO: does not yet catch signals sent when the child dies.
  142. * in exit.c or in signal.c.
  143. */
  144. /*
  145. * Called by kernel/ptrace.c when detaching..
  146. */
  147. void ptrace_disable(struct task_struct *child)
  148. {
  149. /*
  150. * This would be better off in core code, but PTRACE_DETACH has
  151. * grown its fair share of arch-specific worts and changing it
  152. * is likely to cause regressions on obscure architectures.
  153. */
  154. user_disable_single_step(child);
  155. }
  156. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  157. /*
  158. * Handle hitting a HW-breakpoint.
  159. */
  160. static void ptrace_hbptriggered(struct perf_event *bp,
  161. struct perf_sample_data *data,
  162. struct pt_regs *regs)
  163. {
  164. struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
  165. siginfo_t info = {
  166. .si_signo = SIGTRAP,
  167. .si_errno = 0,
  168. .si_code = TRAP_HWBKPT,
  169. .si_addr = (void __user *)(bkpt->trigger),
  170. };
  171. #ifdef CONFIG_COMPAT
  172. int i;
  173. if (!is_compat_task())
  174. goto send_sig;
  175. for (i = 0; i < ARM_MAX_BRP; ++i) {
  176. if (current->thread.debug.hbp_break[i] == bp) {
  177. info.si_errno = (i << 1) + 1;
  178. break;
  179. }
  180. }
  181. for (i = 0; i < ARM_MAX_WRP; ++i) {
  182. if (current->thread.debug.hbp_watch[i] == bp) {
  183. info.si_errno = -((i << 1) + 1);
  184. break;
  185. }
  186. }
  187. send_sig:
  188. #endif
  189. force_sig_info(SIGTRAP, &info, current);
  190. }
  191. /*
  192. * Unregister breakpoints from this task and reset the pointers in
  193. * the thread_struct.
  194. */
  195. void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
  196. {
  197. int i;
  198. struct thread_struct *t = &tsk->thread;
  199. for (i = 0; i < ARM_MAX_BRP; i++) {
  200. if (t->debug.hbp_break[i]) {
  201. unregister_hw_breakpoint(t->debug.hbp_break[i]);
  202. t->debug.hbp_break[i] = NULL;
  203. }
  204. }
  205. for (i = 0; i < ARM_MAX_WRP; i++) {
  206. if (t->debug.hbp_watch[i]) {
  207. unregister_hw_breakpoint(t->debug.hbp_watch[i]);
  208. t->debug.hbp_watch[i] = NULL;
  209. }
  210. }
  211. }
  212. void ptrace_hw_copy_thread(struct task_struct *tsk)
  213. {
  214. memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
  215. }
  216. static struct perf_event *ptrace_hbp_get_event(unsigned int note_type,
  217. struct task_struct *tsk,
  218. unsigned long idx)
  219. {
  220. struct perf_event *bp = ERR_PTR(-EINVAL);
  221. switch (note_type) {
  222. case NT_ARM_HW_BREAK:
  223. if (idx < ARM_MAX_BRP)
  224. bp = tsk->thread.debug.hbp_break[idx];
  225. break;
  226. case NT_ARM_HW_WATCH:
  227. if (idx < ARM_MAX_WRP)
  228. bp = tsk->thread.debug.hbp_watch[idx];
  229. break;
  230. }
  231. return bp;
  232. }
  233. static int ptrace_hbp_set_event(unsigned int note_type,
  234. struct task_struct *tsk,
  235. unsigned long idx,
  236. struct perf_event *bp)
  237. {
  238. int err = -EINVAL;
  239. switch (note_type) {
  240. case NT_ARM_HW_BREAK:
  241. if (idx < ARM_MAX_BRP) {
  242. tsk->thread.debug.hbp_break[idx] = bp;
  243. err = 0;
  244. }
  245. break;
  246. case NT_ARM_HW_WATCH:
  247. if (idx < ARM_MAX_WRP) {
  248. tsk->thread.debug.hbp_watch[idx] = bp;
  249. err = 0;
  250. }
  251. break;
  252. }
  253. return err;
  254. }
  255. static struct perf_event *ptrace_hbp_create(unsigned int note_type,
  256. struct task_struct *tsk,
  257. unsigned long idx)
  258. {
  259. struct perf_event *bp;
  260. struct perf_event_attr attr;
  261. int err, type;
  262. switch (note_type) {
  263. case NT_ARM_HW_BREAK:
  264. type = HW_BREAKPOINT_X;
  265. break;
  266. case NT_ARM_HW_WATCH:
  267. type = HW_BREAKPOINT_RW;
  268. break;
  269. default:
  270. return ERR_PTR(-EINVAL);
  271. }
  272. ptrace_breakpoint_init(&attr);
  273. /*
  274. * Initialise fields to sane defaults
  275. * (i.e. values that will pass validation).
  276. */
  277. attr.bp_addr = 0;
  278. attr.bp_len = HW_BREAKPOINT_LEN_4;
  279. attr.bp_type = type;
  280. attr.disabled = 1;
  281. bp = register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL, tsk);
  282. if (IS_ERR(bp))
  283. return bp;
  284. err = ptrace_hbp_set_event(note_type, tsk, idx, bp);
  285. if (err)
  286. return ERR_PTR(err);
  287. return bp;
  288. }
  289. static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type,
  290. struct arch_hw_breakpoint_ctrl ctrl,
  291. struct perf_event_attr *attr)
  292. {
  293. int err, len, type, offset, disabled = !ctrl.enabled;
  294. attr->disabled = disabled;
  295. if (disabled)
  296. return 0;
  297. err = arch_bp_generic_fields(ctrl, &len, &type, &offset);
  298. if (err)
  299. return err;
  300. switch (note_type) {
  301. case NT_ARM_HW_BREAK:
  302. if ((type & HW_BREAKPOINT_X) != type)
  303. return -EINVAL;
  304. break;
  305. case NT_ARM_HW_WATCH:
  306. if ((type & HW_BREAKPOINT_RW) != type)
  307. return -EINVAL;
  308. break;
  309. default:
  310. return -EINVAL;
  311. }
  312. attr->bp_len = len;
  313. attr->bp_type = type;
  314. attr->bp_addr += offset;
  315. return 0;
  316. }
  317. static int ptrace_hbp_get_resource_info(unsigned int note_type, u32 *info)
  318. {
  319. u8 num;
  320. u32 reg = 0;
  321. switch (note_type) {
  322. case NT_ARM_HW_BREAK:
  323. num = hw_breakpoint_slots(TYPE_INST);
  324. break;
  325. case NT_ARM_HW_WATCH:
  326. num = hw_breakpoint_slots(TYPE_DATA);
  327. break;
  328. default:
  329. return -EINVAL;
  330. }
  331. reg |= debug_monitors_arch();
  332. reg <<= 8;
  333. reg |= num;
  334. *info = reg;
  335. return 0;
  336. }
  337. static int ptrace_hbp_get_ctrl(unsigned int note_type,
  338. struct task_struct *tsk,
  339. unsigned long idx,
  340. u32 *ctrl)
  341. {
  342. struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
  343. if (IS_ERR(bp))
  344. return PTR_ERR(bp);
  345. *ctrl = bp ? encode_ctrl_reg(counter_arch_bp(bp)->ctrl) : 0;
  346. return 0;
  347. }
  348. static int ptrace_hbp_get_addr(unsigned int note_type,
  349. struct task_struct *tsk,
  350. unsigned long idx,
  351. u64 *addr)
  352. {
  353. struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
  354. if (IS_ERR(bp))
  355. return PTR_ERR(bp);
  356. *addr = bp ? counter_arch_bp(bp)->address : 0;
  357. return 0;
  358. }
  359. static struct perf_event *ptrace_hbp_get_initialised_bp(unsigned int note_type,
  360. struct task_struct *tsk,
  361. unsigned long idx)
  362. {
  363. struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
  364. if (!bp)
  365. bp = ptrace_hbp_create(note_type, tsk, idx);
  366. return bp;
  367. }
  368. static int ptrace_hbp_set_ctrl(unsigned int note_type,
  369. struct task_struct *tsk,
  370. unsigned long idx,
  371. u32 uctrl)
  372. {
  373. int err;
  374. struct perf_event *bp;
  375. struct perf_event_attr attr;
  376. struct arch_hw_breakpoint_ctrl ctrl;
  377. bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
  378. if (IS_ERR(bp)) {
  379. err = PTR_ERR(bp);
  380. return err;
  381. }
  382. attr = bp->attr;
  383. decode_ctrl_reg(uctrl, &ctrl);
  384. err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr);
  385. if (err)
  386. return err;
  387. return modify_user_hw_breakpoint(bp, &attr);
  388. }
  389. static int ptrace_hbp_set_addr(unsigned int note_type,
  390. struct task_struct *tsk,
  391. unsigned long idx,
  392. u64 addr)
  393. {
  394. int err;
  395. struct perf_event *bp;
  396. struct perf_event_attr attr;
  397. bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
  398. if (IS_ERR(bp)) {
  399. err = PTR_ERR(bp);
  400. return err;
  401. }
  402. attr = bp->attr;
  403. attr.bp_addr = addr;
  404. err = modify_user_hw_breakpoint(bp, &attr);
  405. return err;
  406. }
  407. #define PTRACE_HBP_ADDR_SZ sizeof(u64)
  408. #define PTRACE_HBP_CTRL_SZ sizeof(u32)
  409. #define PTRACE_HBP_PAD_SZ sizeof(u32)
  410. static int hw_break_get(struct task_struct *target,
  411. const struct user_regset *regset,
  412. unsigned int pos, unsigned int count,
  413. void *kbuf, void __user *ubuf)
  414. {
  415. unsigned int note_type = regset->core_note_type;
  416. int ret, idx = 0, offset, limit;
  417. u32 info, ctrl;
  418. u64 addr;
  419. /* Resource info */
  420. ret = ptrace_hbp_get_resource_info(note_type, &info);
  421. if (ret)
  422. return ret;
  423. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &info, 0,
  424. sizeof(info));
  425. if (ret)
  426. return ret;
  427. /* Pad */
  428. offset = offsetof(struct user_hwdebug_state, pad);
  429. ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, offset,
  430. offset + PTRACE_HBP_PAD_SZ);
  431. if (ret)
  432. return ret;
  433. /* (address, ctrl) registers */
  434. offset = offsetof(struct user_hwdebug_state, dbg_regs);
  435. limit = regset->n * regset->size;
  436. while (count && offset < limit) {
  437. ret = ptrace_hbp_get_addr(note_type, target, idx, &addr);
  438. if (ret)
  439. return ret;
  440. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &addr,
  441. offset, offset + PTRACE_HBP_ADDR_SZ);
  442. if (ret)
  443. return ret;
  444. offset += PTRACE_HBP_ADDR_SZ;
  445. ret = ptrace_hbp_get_ctrl(note_type, target, idx, &ctrl);
  446. if (ret)
  447. return ret;
  448. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &ctrl,
  449. offset, offset + PTRACE_HBP_CTRL_SZ);
  450. if (ret)
  451. return ret;
  452. offset += PTRACE_HBP_CTRL_SZ;
  453. ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
  454. offset,
  455. offset + PTRACE_HBP_PAD_SZ);
  456. if (ret)
  457. return ret;
  458. offset += PTRACE_HBP_PAD_SZ;
  459. idx++;
  460. }
  461. return 0;
  462. }
  463. static int hw_break_set(struct task_struct *target,
  464. const struct user_regset *regset,
  465. unsigned int pos, unsigned int count,
  466. const void *kbuf, const void __user *ubuf)
  467. {
  468. unsigned int note_type = regset->core_note_type;
  469. int ret, idx = 0, offset, limit;
  470. u32 ctrl;
  471. u64 addr;
  472. /* Resource info and pad */
  473. offset = offsetof(struct user_hwdebug_state, dbg_regs);
  474. ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset);
  475. if (ret)
  476. return ret;
  477. /* (address, ctrl) registers */
  478. limit = regset->n * regset->size;
  479. while (count && offset < limit) {
  480. if (count < PTRACE_HBP_ADDR_SZ)
  481. return -EINVAL;
  482. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &addr,
  483. offset, offset + PTRACE_HBP_ADDR_SZ);
  484. if (ret)
  485. return ret;
  486. ret = ptrace_hbp_set_addr(note_type, target, idx, addr);
  487. if (ret)
  488. return ret;
  489. offset += PTRACE_HBP_ADDR_SZ;
  490. if (!count)
  491. break;
  492. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl,
  493. offset, offset + PTRACE_HBP_CTRL_SZ);
  494. if (ret)
  495. return ret;
  496. ret = ptrace_hbp_set_ctrl(note_type, target, idx, ctrl);
  497. if (ret)
  498. return ret;
  499. offset += PTRACE_HBP_CTRL_SZ;
  500. ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
  501. offset,
  502. offset + PTRACE_HBP_PAD_SZ);
  503. if (ret)
  504. return ret;
  505. offset += PTRACE_HBP_PAD_SZ;
  506. idx++;
  507. }
  508. return 0;
  509. }
  510. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  511. static int gpr_get(struct task_struct *target,
  512. const struct user_regset *regset,
  513. unsigned int pos, unsigned int count,
  514. void *kbuf, void __user *ubuf)
  515. {
  516. struct user_pt_regs *uregs = &task_pt_regs(target)->user_regs;
  517. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
  518. }
  519. static int gpr_set(struct task_struct *target, const struct user_regset *regset,
  520. unsigned int pos, unsigned int count,
  521. const void *kbuf, const void __user *ubuf)
  522. {
  523. int ret;
  524. struct user_pt_regs newregs = task_pt_regs(target)->user_regs;
  525. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1);
  526. if (ret)
  527. return ret;
  528. if (!valid_user_regs(&newregs, target))
  529. return -EINVAL;
  530. task_pt_regs(target)->user_regs = newregs;
  531. return 0;
  532. }
  533. /*
  534. * TODO: update fp accessors for lazy context switching (sync/flush hwstate)
  535. */
  536. static int fpr_get(struct task_struct *target, const struct user_regset *regset,
  537. unsigned int pos, unsigned int count,
  538. void *kbuf, void __user *ubuf)
  539. {
  540. struct user_fpsimd_state *uregs;
  541. uregs = &target->thread.fpsimd_state.user_fpsimd;
  542. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
  543. }
  544. static int fpr_set(struct task_struct *target, const struct user_regset *regset,
  545. unsigned int pos, unsigned int count,
  546. const void *kbuf, const void __user *ubuf)
  547. {
  548. int ret;
  549. struct user_fpsimd_state newstate =
  550. target->thread.fpsimd_state.user_fpsimd;
  551. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate, 0, -1);
  552. if (ret)
  553. return ret;
  554. target->thread.fpsimd_state.user_fpsimd = newstate;
  555. fpsimd_flush_task_state(target);
  556. return ret;
  557. }
  558. static int tls_get(struct task_struct *target, const struct user_regset *regset,
  559. unsigned int pos, unsigned int count,
  560. void *kbuf, void __user *ubuf)
  561. {
  562. unsigned long *tls = &target->thread.tp_value;
  563. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, tls, 0, -1);
  564. }
  565. static int tls_set(struct task_struct *target, const struct user_regset *regset,
  566. unsigned int pos, unsigned int count,
  567. const void *kbuf, const void __user *ubuf)
  568. {
  569. int ret;
  570. unsigned long tls = target->thread.tp_value;
  571. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
  572. if (ret)
  573. return ret;
  574. target->thread.tp_value = tls;
  575. return ret;
  576. }
  577. static int system_call_get(struct task_struct *target,
  578. const struct user_regset *regset,
  579. unsigned int pos, unsigned int count,
  580. void *kbuf, void __user *ubuf)
  581. {
  582. int syscallno = task_pt_regs(target)->syscallno;
  583. return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  584. &syscallno, 0, -1);
  585. }
  586. static int system_call_set(struct task_struct *target,
  587. const struct user_regset *regset,
  588. unsigned int pos, unsigned int count,
  589. const void *kbuf, const void __user *ubuf)
  590. {
  591. int syscallno = task_pt_regs(target)->syscallno;
  592. int ret;
  593. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &syscallno, 0, -1);
  594. if (ret)
  595. return ret;
  596. task_pt_regs(target)->syscallno = syscallno;
  597. return ret;
  598. }
  599. enum aarch64_regset {
  600. REGSET_GPR,
  601. REGSET_FPR,
  602. REGSET_TLS,
  603. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  604. REGSET_HW_BREAK,
  605. REGSET_HW_WATCH,
  606. #endif
  607. REGSET_SYSTEM_CALL,
  608. };
  609. static const struct user_regset aarch64_regsets[] = {
  610. [REGSET_GPR] = {
  611. .core_note_type = NT_PRSTATUS,
  612. .n = sizeof(struct user_pt_regs) / sizeof(u64),
  613. .size = sizeof(u64),
  614. .align = sizeof(u64),
  615. .get = gpr_get,
  616. .set = gpr_set
  617. },
  618. [REGSET_FPR] = {
  619. .core_note_type = NT_PRFPREG,
  620. .n = sizeof(struct user_fpsimd_state) / sizeof(u32),
  621. /*
  622. * We pretend we have 32-bit registers because the fpsr and
  623. * fpcr are 32-bits wide.
  624. */
  625. .size = sizeof(u32),
  626. .align = sizeof(u32),
  627. .get = fpr_get,
  628. .set = fpr_set
  629. },
  630. [REGSET_TLS] = {
  631. .core_note_type = NT_ARM_TLS,
  632. .n = 1,
  633. .size = sizeof(void *),
  634. .align = sizeof(void *),
  635. .get = tls_get,
  636. .set = tls_set,
  637. },
  638. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  639. [REGSET_HW_BREAK] = {
  640. .core_note_type = NT_ARM_HW_BREAK,
  641. .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
  642. .size = sizeof(u32),
  643. .align = sizeof(u32),
  644. .get = hw_break_get,
  645. .set = hw_break_set,
  646. },
  647. [REGSET_HW_WATCH] = {
  648. .core_note_type = NT_ARM_HW_WATCH,
  649. .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
  650. .size = sizeof(u32),
  651. .align = sizeof(u32),
  652. .get = hw_break_get,
  653. .set = hw_break_set,
  654. },
  655. #endif
  656. [REGSET_SYSTEM_CALL] = {
  657. .core_note_type = NT_ARM_SYSTEM_CALL,
  658. .n = 1,
  659. .size = sizeof(int),
  660. .align = sizeof(int),
  661. .get = system_call_get,
  662. .set = system_call_set,
  663. },
  664. };
  665. static const struct user_regset_view user_aarch64_view = {
  666. .name = "aarch64", .e_machine = EM_AARCH64,
  667. .regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets)
  668. };
  669. #ifdef CONFIG_COMPAT
  670. #include <linux/compat.h>
  671. enum compat_regset {
  672. REGSET_COMPAT_GPR,
  673. REGSET_COMPAT_VFP,
  674. };
  675. static int compat_gpr_get(struct task_struct *target,
  676. const struct user_regset *regset,
  677. unsigned int pos, unsigned int count,
  678. void *kbuf, void __user *ubuf)
  679. {
  680. int ret = 0;
  681. unsigned int i, start, num_regs;
  682. /* Calculate the number of AArch32 registers contained in count */
  683. num_regs = count / regset->size;
  684. /* Convert pos into an register number */
  685. start = pos / regset->size;
  686. if (start + num_regs > regset->n)
  687. return -EIO;
  688. for (i = 0; i < num_regs; ++i) {
  689. unsigned int idx = start + i;
  690. compat_ulong_t reg;
  691. switch (idx) {
  692. case 15:
  693. reg = task_pt_regs(target)->pc;
  694. break;
  695. case 16:
  696. reg = task_pt_regs(target)->pstate;
  697. break;
  698. case 17:
  699. reg = task_pt_regs(target)->orig_x0;
  700. break;
  701. default:
  702. reg = task_pt_regs(target)->regs[idx];
  703. }
  704. if (kbuf) {
  705. memcpy(kbuf, &reg, sizeof(reg));
  706. kbuf += sizeof(reg);
  707. } else {
  708. ret = copy_to_user(ubuf, &reg, sizeof(reg));
  709. if (ret) {
  710. ret = -EFAULT;
  711. break;
  712. }
  713. ubuf += sizeof(reg);
  714. }
  715. }
  716. return ret;
  717. }
  718. static int compat_gpr_set(struct task_struct *target,
  719. const struct user_regset *regset,
  720. unsigned int pos, unsigned int count,
  721. const void *kbuf, const void __user *ubuf)
  722. {
  723. struct pt_regs newregs;
  724. int ret = 0;
  725. unsigned int i, start, num_regs;
  726. /* Calculate the number of AArch32 registers contained in count */
  727. num_regs = count / regset->size;
  728. /* Convert pos into an register number */
  729. start = pos / regset->size;
  730. if (start + num_regs > regset->n)
  731. return -EIO;
  732. newregs = *task_pt_regs(target);
  733. for (i = 0; i < num_regs; ++i) {
  734. unsigned int idx = start + i;
  735. compat_ulong_t reg;
  736. if (kbuf) {
  737. memcpy(&reg, kbuf, sizeof(reg));
  738. kbuf += sizeof(reg);
  739. } else {
  740. ret = copy_from_user(&reg, ubuf, sizeof(reg));
  741. if (ret) {
  742. ret = -EFAULT;
  743. break;
  744. }
  745. ubuf += sizeof(reg);
  746. }
  747. switch (idx) {
  748. case 15:
  749. newregs.pc = reg;
  750. break;
  751. case 16:
  752. newregs.pstate = reg;
  753. break;
  754. case 17:
  755. newregs.orig_x0 = reg;
  756. break;
  757. default:
  758. newregs.regs[idx] = reg;
  759. }
  760. }
  761. if (valid_user_regs(&newregs.user_regs, target))
  762. *task_pt_regs(target) = newregs;
  763. else
  764. ret = -EINVAL;
  765. return ret;
  766. }
  767. static int compat_vfp_get(struct task_struct *target,
  768. const struct user_regset *regset,
  769. unsigned int pos, unsigned int count,
  770. void *kbuf, void __user *ubuf)
  771. {
  772. struct user_fpsimd_state *uregs;
  773. compat_ulong_t fpscr;
  774. int ret;
  775. uregs = &target->thread.fpsimd_state.user_fpsimd;
  776. /*
  777. * The VFP registers are packed into the fpsimd_state, so they all sit
  778. * nicely together for us. We just need to create the fpscr separately.
  779. */
  780. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
  781. VFP_STATE_SIZE - sizeof(compat_ulong_t));
  782. if (count && !ret) {
  783. fpscr = (uregs->fpsr & VFP_FPSCR_STAT_MASK) |
  784. (uregs->fpcr & VFP_FPSCR_CTRL_MASK);
  785. ret = put_user(fpscr, (compat_ulong_t *)ubuf);
  786. }
  787. return ret;
  788. }
  789. static int compat_vfp_set(struct task_struct *target,
  790. const struct user_regset *regset,
  791. unsigned int pos, unsigned int count,
  792. const void *kbuf, const void __user *ubuf)
  793. {
  794. struct user_fpsimd_state *uregs;
  795. compat_ulong_t fpscr;
  796. int ret;
  797. if (pos + count > VFP_STATE_SIZE)
  798. return -EIO;
  799. uregs = &target->thread.fpsimd_state.user_fpsimd;
  800. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
  801. VFP_STATE_SIZE - sizeof(compat_ulong_t));
  802. if (count && !ret) {
  803. ret = get_user(fpscr, (compat_ulong_t *)ubuf);
  804. uregs->fpsr = fpscr & VFP_FPSCR_STAT_MASK;
  805. uregs->fpcr = fpscr & VFP_FPSCR_CTRL_MASK;
  806. }
  807. fpsimd_flush_task_state(target);
  808. return ret;
  809. }
  810. static int compat_tls_get(struct task_struct *target,
  811. const struct user_regset *regset, unsigned int pos,
  812. unsigned int count, void *kbuf, void __user *ubuf)
  813. {
  814. compat_ulong_t tls = (compat_ulong_t)target->thread.tp_value;
  815. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
  816. }
  817. static int compat_tls_set(struct task_struct *target,
  818. const struct user_regset *regset, unsigned int pos,
  819. unsigned int count, const void *kbuf,
  820. const void __user *ubuf)
  821. {
  822. int ret;
  823. compat_ulong_t tls = target->thread.tp_value;
  824. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
  825. if (ret)
  826. return ret;
  827. target->thread.tp_value = tls;
  828. return ret;
  829. }
  830. static const struct user_regset aarch32_regsets[] = {
  831. [REGSET_COMPAT_GPR] = {
  832. .core_note_type = NT_PRSTATUS,
  833. .n = COMPAT_ELF_NGREG,
  834. .size = sizeof(compat_elf_greg_t),
  835. .align = sizeof(compat_elf_greg_t),
  836. .get = compat_gpr_get,
  837. .set = compat_gpr_set
  838. },
  839. [REGSET_COMPAT_VFP] = {
  840. .core_note_type = NT_ARM_VFP,
  841. .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
  842. .size = sizeof(compat_ulong_t),
  843. .align = sizeof(compat_ulong_t),
  844. .get = compat_vfp_get,
  845. .set = compat_vfp_set
  846. },
  847. };
  848. static const struct user_regset_view user_aarch32_view = {
  849. .name = "aarch32", .e_machine = EM_ARM,
  850. .regsets = aarch32_regsets, .n = ARRAY_SIZE(aarch32_regsets)
  851. };
  852. static const struct user_regset aarch32_ptrace_regsets[] = {
  853. [REGSET_GPR] = {
  854. .core_note_type = NT_PRSTATUS,
  855. .n = COMPAT_ELF_NGREG,
  856. .size = sizeof(compat_elf_greg_t),
  857. .align = sizeof(compat_elf_greg_t),
  858. .get = compat_gpr_get,
  859. .set = compat_gpr_set
  860. },
  861. [REGSET_FPR] = {
  862. .core_note_type = NT_ARM_VFP,
  863. .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
  864. .size = sizeof(compat_ulong_t),
  865. .align = sizeof(compat_ulong_t),
  866. .get = compat_vfp_get,
  867. .set = compat_vfp_set
  868. },
  869. [REGSET_TLS] = {
  870. .core_note_type = NT_ARM_TLS,
  871. .n = 1,
  872. .size = sizeof(compat_ulong_t),
  873. .align = sizeof(compat_ulong_t),
  874. .get = compat_tls_get,
  875. .set = compat_tls_set,
  876. },
  877. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  878. [REGSET_HW_BREAK] = {
  879. .core_note_type = NT_ARM_HW_BREAK,
  880. .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
  881. .size = sizeof(u32),
  882. .align = sizeof(u32),
  883. .get = hw_break_get,
  884. .set = hw_break_set,
  885. },
  886. [REGSET_HW_WATCH] = {
  887. .core_note_type = NT_ARM_HW_WATCH,
  888. .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
  889. .size = sizeof(u32),
  890. .align = sizeof(u32),
  891. .get = hw_break_get,
  892. .set = hw_break_set,
  893. },
  894. #endif
  895. [REGSET_SYSTEM_CALL] = {
  896. .core_note_type = NT_ARM_SYSTEM_CALL,
  897. .n = 1,
  898. .size = sizeof(int),
  899. .align = sizeof(int),
  900. .get = system_call_get,
  901. .set = system_call_set,
  902. },
  903. };
  904. static const struct user_regset_view user_aarch32_ptrace_view = {
  905. .name = "aarch32", .e_machine = EM_ARM,
  906. .regsets = aarch32_ptrace_regsets, .n = ARRAY_SIZE(aarch32_ptrace_regsets)
  907. };
  908. static int compat_ptrace_read_user(struct task_struct *tsk, compat_ulong_t off,
  909. compat_ulong_t __user *ret)
  910. {
  911. compat_ulong_t tmp;
  912. if (off & 3)
  913. return -EIO;
  914. if (off == COMPAT_PT_TEXT_ADDR)
  915. tmp = tsk->mm->start_code;
  916. else if (off == COMPAT_PT_DATA_ADDR)
  917. tmp = tsk->mm->start_data;
  918. else if (off == COMPAT_PT_TEXT_END_ADDR)
  919. tmp = tsk->mm->end_code;
  920. else if (off < sizeof(compat_elf_gregset_t))
  921. return copy_regset_to_user(tsk, &user_aarch32_view,
  922. REGSET_COMPAT_GPR, off,
  923. sizeof(compat_ulong_t), ret);
  924. else if (off >= COMPAT_USER_SZ)
  925. return -EIO;
  926. else
  927. tmp = 0;
  928. return put_user(tmp, ret);
  929. }
  930. static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
  931. compat_ulong_t val)
  932. {
  933. int ret;
  934. mm_segment_t old_fs = get_fs();
  935. if (off & 3 || off >= COMPAT_USER_SZ)
  936. return -EIO;
  937. if (off >= sizeof(compat_elf_gregset_t))
  938. return 0;
  939. set_fs(KERNEL_DS);
  940. ret = copy_regset_from_user(tsk, &user_aarch32_view,
  941. REGSET_COMPAT_GPR, off,
  942. sizeof(compat_ulong_t),
  943. &val);
  944. set_fs(old_fs);
  945. return ret;
  946. }
  947. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  948. /*
  949. * Convert a virtual register number into an index for a thread_info
  950. * breakpoint array. Breakpoints are identified using positive numbers
  951. * whilst watchpoints are negative. The registers are laid out as pairs
  952. * of (address, control), each pair mapping to a unique hw_breakpoint struct.
  953. * Register 0 is reserved for describing resource information.
  954. */
  955. static int compat_ptrace_hbp_num_to_idx(compat_long_t num)
  956. {
  957. return (abs(num) - 1) >> 1;
  958. }
  959. static int compat_ptrace_hbp_get_resource_info(u32 *kdata)
  960. {
  961. u8 num_brps, num_wrps, debug_arch, wp_len;
  962. u32 reg = 0;
  963. num_brps = hw_breakpoint_slots(TYPE_INST);
  964. num_wrps = hw_breakpoint_slots(TYPE_DATA);
  965. debug_arch = debug_monitors_arch();
  966. wp_len = 8;
  967. reg |= debug_arch;
  968. reg <<= 8;
  969. reg |= wp_len;
  970. reg <<= 8;
  971. reg |= num_wrps;
  972. reg <<= 8;
  973. reg |= num_brps;
  974. *kdata = reg;
  975. return 0;
  976. }
  977. static int compat_ptrace_hbp_get(unsigned int note_type,
  978. struct task_struct *tsk,
  979. compat_long_t num,
  980. u32 *kdata)
  981. {
  982. u64 addr = 0;
  983. u32 ctrl = 0;
  984. int err, idx = compat_ptrace_hbp_num_to_idx(num);;
  985. if (num & 1) {
  986. err = ptrace_hbp_get_addr(note_type, tsk, idx, &addr);
  987. *kdata = (u32)addr;
  988. } else {
  989. err = ptrace_hbp_get_ctrl(note_type, tsk, idx, &ctrl);
  990. *kdata = ctrl;
  991. }
  992. return err;
  993. }
  994. static int compat_ptrace_hbp_set(unsigned int note_type,
  995. struct task_struct *tsk,
  996. compat_long_t num,
  997. u32 *kdata)
  998. {
  999. u64 addr;
  1000. u32 ctrl;
  1001. int err, idx = compat_ptrace_hbp_num_to_idx(num);
  1002. if (num & 1) {
  1003. addr = *kdata;
  1004. err = ptrace_hbp_set_addr(note_type, tsk, idx, addr);
  1005. } else {
  1006. ctrl = *kdata;
  1007. err = ptrace_hbp_set_ctrl(note_type, tsk, idx, ctrl);
  1008. }
  1009. return err;
  1010. }
  1011. static int compat_ptrace_gethbpregs(struct task_struct *tsk, compat_long_t num,
  1012. compat_ulong_t __user *data)
  1013. {
  1014. int ret;
  1015. u32 kdata;
  1016. mm_segment_t old_fs = get_fs();
  1017. set_fs(KERNEL_DS);
  1018. /* Watchpoint */
  1019. if (num < 0) {
  1020. ret = compat_ptrace_hbp_get(NT_ARM_HW_WATCH, tsk, num, &kdata);
  1021. /* Resource info */
  1022. } else if (num == 0) {
  1023. ret = compat_ptrace_hbp_get_resource_info(&kdata);
  1024. /* Breakpoint */
  1025. } else {
  1026. ret = compat_ptrace_hbp_get(NT_ARM_HW_BREAK, tsk, num, &kdata);
  1027. }
  1028. set_fs(old_fs);
  1029. if (!ret)
  1030. ret = put_user(kdata, data);
  1031. return ret;
  1032. }
  1033. static int compat_ptrace_sethbpregs(struct task_struct *tsk, compat_long_t num,
  1034. compat_ulong_t __user *data)
  1035. {
  1036. int ret;
  1037. u32 kdata = 0;
  1038. mm_segment_t old_fs = get_fs();
  1039. if (num == 0)
  1040. return 0;
  1041. ret = get_user(kdata, data);
  1042. if (ret)
  1043. return ret;
  1044. set_fs(KERNEL_DS);
  1045. if (num < 0)
  1046. ret = compat_ptrace_hbp_set(NT_ARM_HW_WATCH, tsk, num, &kdata);
  1047. else
  1048. ret = compat_ptrace_hbp_set(NT_ARM_HW_BREAK, tsk, num, &kdata);
  1049. set_fs(old_fs);
  1050. return ret;
  1051. }
  1052. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  1053. long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
  1054. compat_ulong_t caddr, compat_ulong_t cdata)
  1055. {
  1056. unsigned long addr = caddr;
  1057. unsigned long data = cdata;
  1058. void __user *datap = compat_ptr(data);
  1059. int ret;
  1060. switch (request) {
  1061. case PTRACE_PEEKUSR:
  1062. ret = compat_ptrace_read_user(child, addr, datap);
  1063. break;
  1064. case PTRACE_POKEUSR:
  1065. ret = compat_ptrace_write_user(child, addr, data);
  1066. break;
  1067. case COMPAT_PTRACE_GETREGS:
  1068. ret = copy_regset_to_user(child,
  1069. &user_aarch32_view,
  1070. REGSET_COMPAT_GPR,
  1071. 0, sizeof(compat_elf_gregset_t),
  1072. datap);
  1073. break;
  1074. case COMPAT_PTRACE_SETREGS:
  1075. ret = copy_regset_from_user(child,
  1076. &user_aarch32_view,
  1077. REGSET_COMPAT_GPR,
  1078. 0, sizeof(compat_elf_gregset_t),
  1079. datap);
  1080. break;
  1081. case COMPAT_PTRACE_GET_THREAD_AREA:
  1082. ret = put_user((compat_ulong_t)child->thread.tp_value,
  1083. (compat_ulong_t __user *)datap);
  1084. break;
  1085. case COMPAT_PTRACE_SET_SYSCALL:
  1086. task_pt_regs(child)->syscallno = data;
  1087. ret = 0;
  1088. break;
  1089. case COMPAT_PTRACE_GETVFPREGS:
  1090. ret = copy_regset_to_user(child,
  1091. &user_aarch32_view,
  1092. REGSET_COMPAT_VFP,
  1093. 0, VFP_STATE_SIZE,
  1094. datap);
  1095. break;
  1096. case COMPAT_PTRACE_SETVFPREGS:
  1097. ret = copy_regset_from_user(child,
  1098. &user_aarch32_view,
  1099. REGSET_COMPAT_VFP,
  1100. 0, VFP_STATE_SIZE,
  1101. datap);
  1102. break;
  1103. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  1104. case COMPAT_PTRACE_GETHBPREGS:
  1105. ret = compat_ptrace_gethbpregs(child, addr, datap);
  1106. break;
  1107. case COMPAT_PTRACE_SETHBPREGS:
  1108. ret = compat_ptrace_sethbpregs(child, addr, datap);
  1109. break;
  1110. #endif
  1111. default:
  1112. ret = compat_ptrace_request(child, request, addr,
  1113. data);
  1114. break;
  1115. }
  1116. return ret;
  1117. }
  1118. #endif /* CONFIG_COMPAT */
  1119. const struct user_regset_view *task_user_regset_view(struct task_struct *task)
  1120. {
  1121. #ifdef CONFIG_COMPAT
  1122. /*
  1123. * Core dumping of 32-bit tasks or compat ptrace requests must use the
  1124. * user_aarch32_view compatible with arm32. Native ptrace requests on
  1125. * 32-bit children use an extended user_aarch32_ptrace_view to allow
  1126. * access to the TLS register.
  1127. */
  1128. if (is_compat_task())
  1129. return &user_aarch32_view;
  1130. else if (is_compat_thread(task_thread_info(task)))
  1131. return &user_aarch32_ptrace_view;
  1132. #endif
  1133. return &user_aarch64_view;
  1134. }
  1135. long arch_ptrace(struct task_struct *child, long request,
  1136. unsigned long addr, unsigned long data)
  1137. {
  1138. return ptrace_request(child, request, addr, data);
  1139. }
  1140. enum ptrace_syscall_dir {
  1141. PTRACE_SYSCALL_ENTER = 0,
  1142. PTRACE_SYSCALL_EXIT,
  1143. };
  1144. static void tracehook_report_syscall(struct pt_regs *regs,
  1145. enum ptrace_syscall_dir dir)
  1146. {
  1147. int regno;
  1148. unsigned long saved_reg;
  1149. /*
  1150. * A scratch register (ip(r12) on AArch32, x7 on AArch64) is
  1151. * used to denote syscall entry/exit:
  1152. */
  1153. regno = (is_compat_task() ? 12 : 7);
  1154. saved_reg = regs->regs[regno];
  1155. regs->regs[regno] = dir;
  1156. if (dir == PTRACE_SYSCALL_EXIT)
  1157. tracehook_report_syscall_exit(regs, 0);
  1158. else if (tracehook_report_syscall_entry(regs))
  1159. regs->syscallno = ~0UL;
  1160. regs->regs[regno] = saved_reg;
  1161. }
  1162. asmlinkage int syscall_trace_enter(struct pt_regs *regs)
  1163. {
  1164. if (test_thread_flag(TIF_SYSCALL_TRACE))
  1165. tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
  1166. /* Do the secure computing after ptrace; failures should be fast. */
  1167. if (secure_computing(NULL) == -1)
  1168. return -1;
  1169. if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
  1170. trace_sys_enter(regs, regs->syscallno);
  1171. audit_syscall_entry(regs->syscallno, regs->orig_x0, regs->regs[1],
  1172. regs->regs[2], regs->regs[3]);
  1173. return regs->syscallno;
  1174. }
  1175. asmlinkage void syscall_trace_exit(struct pt_regs *regs)
  1176. {
  1177. audit_syscall_exit(regs);
  1178. if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
  1179. trace_sys_exit(regs, regs_return_value(regs));
  1180. if (test_thread_flag(TIF_SYSCALL_TRACE))
  1181. tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT);
  1182. }
  1183. /*
  1184. * Bits which are always architecturally RES0 per ARM DDI 0487A.h
  1185. * Userspace cannot use these until they have an architectural meaning.
  1186. * We also reserve IL for the kernel; SS is handled dynamically.
  1187. */
  1188. #define SPSR_EL1_AARCH64_RES0_BITS \
  1189. (GENMASK_ULL(63,32) | GENMASK_ULL(27, 22) | GENMASK_ULL(20, 10) | \
  1190. GENMASK_ULL(5, 5))
  1191. #define SPSR_EL1_AARCH32_RES0_BITS \
  1192. (GENMASK_ULL(63,32) | GENMASK_ULL(24, 22) | GENMASK_ULL(20,20))
  1193. static int valid_compat_regs(struct user_pt_regs *regs)
  1194. {
  1195. regs->pstate &= ~SPSR_EL1_AARCH32_RES0_BITS;
  1196. if (!system_supports_mixed_endian_el0()) {
  1197. if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
  1198. regs->pstate |= COMPAT_PSR_E_BIT;
  1199. else
  1200. regs->pstate &= ~COMPAT_PSR_E_BIT;
  1201. }
  1202. if (user_mode(regs) && (regs->pstate & PSR_MODE32_BIT) &&
  1203. (regs->pstate & COMPAT_PSR_A_BIT) == 0 &&
  1204. (regs->pstate & COMPAT_PSR_I_BIT) == 0 &&
  1205. (regs->pstate & COMPAT_PSR_F_BIT) == 0) {
  1206. return 1;
  1207. }
  1208. /*
  1209. * Force PSR to a valid 32-bit EL0t, preserving the same bits as
  1210. * arch/arm.
  1211. */
  1212. regs->pstate &= COMPAT_PSR_N_BIT | COMPAT_PSR_Z_BIT |
  1213. COMPAT_PSR_C_BIT | COMPAT_PSR_V_BIT |
  1214. COMPAT_PSR_Q_BIT | COMPAT_PSR_IT_MASK |
  1215. COMPAT_PSR_GE_MASK | COMPAT_PSR_E_BIT |
  1216. COMPAT_PSR_T_BIT;
  1217. regs->pstate |= PSR_MODE32_BIT;
  1218. return 0;
  1219. }
  1220. static int valid_native_regs(struct user_pt_regs *regs)
  1221. {
  1222. regs->pstate &= ~SPSR_EL1_AARCH64_RES0_BITS;
  1223. if (user_mode(regs) && !(regs->pstate & PSR_MODE32_BIT) &&
  1224. (regs->pstate & PSR_D_BIT) == 0 &&
  1225. (regs->pstate & PSR_A_BIT) == 0 &&
  1226. (regs->pstate & PSR_I_BIT) == 0 &&
  1227. (regs->pstate & PSR_F_BIT) == 0) {
  1228. return 1;
  1229. }
  1230. /* Force PSR to a valid 64-bit EL0t */
  1231. regs->pstate &= PSR_N_BIT | PSR_Z_BIT | PSR_C_BIT | PSR_V_BIT;
  1232. return 0;
  1233. }
  1234. /*
  1235. * Are the current registers suitable for user mode? (used to maintain
  1236. * security in signal handlers)
  1237. */
  1238. int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task)
  1239. {
  1240. if (!test_tsk_thread_flag(task, TIF_SINGLESTEP))
  1241. regs->pstate &= ~DBG_SPSR_SS;
  1242. if (is_compat_thread(task_thread_info(task)))
  1243. return valid_compat_regs(regs);
  1244. else
  1245. return valid_native_regs(regs);
  1246. }