cpufeature.h 6.0 KB

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  1. /*
  2. * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org>
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #ifndef __ASM_CPUFEATURE_H
  9. #define __ASM_CPUFEATURE_H
  10. #include <asm/cpucaps.h>
  11. #include <asm/hwcap.h>
  12. #include <asm/sysreg.h>
  13. /*
  14. * In the arm64 world (as in the ARM world), elf_hwcap is used both internally
  15. * in the kernel and for user space to keep track of which optional features
  16. * are supported by the current system. So let's map feature 'x' to HWCAP_x.
  17. * Note that HWCAP_x constants are bit fields so we need to take the log.
  18. */
  19. #define MAX_CPU_FEATURES (8 * sizeof(elf_hwcap))
  20. #define cpu_feature(x) ilog2(HWCAP_ ## x)
  21. #ifndef __ASSEMBLY__
  22. #include <linux/bug.h>
  23. #include <linux/jump_label.h>
  24. #include <linux/kernel.h>
  25. /* CPU feature register tracking */
  26. enum ftr_type {
  27. FTR_EXACT, /* Use a predefined safe value */
  28. FTR_LOWER_SAFE, /* Smaller value is safe */
  29. FTR_HIGHER_SAFE,/* Bigger value is safe */
  30. };
  31. #define FTR_STRICT true /* SANITY check strict matching required */
  32. #define FTR_NONSTRICT false /* SANITY check ignored */
  33. #define FTR_SIGNED true /* Value should be treated as signed */
  34. #define FTR_UNSIGNED false /* Value should be treated as unsigned */
  35. struct arm64_ftr_bits {
  36. bool sign; /* Value is signed ? */
  37. bool strict; /* CPU Sanity check: strict matching required ? */
  38. enum ftr_type type;
  39. u8 shift;
  40. u8 width;
  41. s64 safe_val; /* safe value for FTR_EXACT features */
  42. };
  43. /*
  44. * @arm64_ftr_reg - Feature register
  45. * @strict_mask Bits which should match across all CPUs for sanity.
  46. * @sys_val Safe value across the CPUs (system view)
  47. */
  48. struct arm64_ftr_reg {
  49. const char *name;
  50. u64 strict_mask;
  51. u64 sys_val;
  52. const struct arm64_ftr_bits *ftr_bits;
  53. };
  54. extern struct arm64_ftr_reg arm64_ftr_reg_ctrel0;
  55. /* scope of capability check */
  56. enum {
  57. SCOPE_SYSTEM,
  58. SCOPE_LOCAL_CPU,
  59. };
  60. struct arm64_cpu_capabilities {
  61. const char *desc;
  62. u16 capability;
  63. int def_scope; /* default scope */
  64. bool (*matches)(const struct arm64_cpu_capabilities *caps, int scope);
  65. int (*enable)(void *); /* Called on all active CPUs */
  66. union {
  67. struct { /* To be used for erratum handling only */
  68. u32 midr_model;
  69. u32 midr_range_min, midr_range_max;
  70. };
  71. struct { /* Feature register checking */
  72. u32 sys_reg;
  73. u8 field_pos;
  74. u8 min_field_value;
  75. u8 hwcap_type;
  76. bool sign;
  77. unsigned long hwcap;
  78. };
  79. };
  80. };
  81. extern DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS);
  82. extern struct static_key_false cpu_hwcap_keys[ARM64_NCAPS];
  83. bool this_cpu_has_cap(unsigned int cap);
  84. static inline bool cpu_have_feature(unsigned int num)
  85. {
  86. return elf_hwcap & (1UL << num);
  87. }
  88. /* System capability check for constant caps */
  89. static inline bool cpus_have_const_cap(int num)
  90. {
  91. if (num >= ARM64_NCAPS)
  92. return false;
  93. return static_branch_unlikely(&cpu_hwcap_keys[num]);
  94. }
  95. static inline bool cpus_have_cap(unsigned int num)
  96. {
  97. if (num >= ARM64_NCAPS)
  98. return false;
  99. return test_bit(num, cpu_hwcaps);
  100. }
  101. static inline void cpus_set_cap(unsigned int num)
  102. {
  103. if (num >= ARM64_NCAPS) {
  104. pr_warn("Attempt to set an illegal CPU capability (%d >= %d)\n",
  105. num, ARM64_NCAPS);
  106. } else {
  107. __set_bit(num, cpu_hwcaps);
  108. static_branch_enable(&cpu_hwcap_keys[num]);
  109. }
  110. }
  111. static inline int __attribute_const__
  112. cpuid_feature_extract_signed_field_width(u64 features, int field, int width)
  113. {
  114. return (s64)(features << (64 - width - field)) >> (64 - width);
  115. }
  116. static inline int __attribute_const__
  117. cpuid_feature_extract_signed_field(u64 features, int field)
  118. {
  119. return cpuid_feature_extract_signed_field_width(features, field, 4);
  120. }
  121. static inline unsigned int __attribute_const__
  122. cpuid_feature_extract_unsigned_field_width(u64 features, int field, int width)
  123. {
  124. return (u64)(features << (64 - width - field)) >> (64 - width);
  125. }
  126. static inline unsigned int __attribute_const__
  127. cpuid_feature_extract_unsigned_field(u64 features, int field)
  128. {
  129. return cpuid_feature_extract_unsigned_field_width(features, field, 4);
  130. }
  131. static inline u64 arm64_ftr_mask(const struct arm64_ftr_bits *ftrp)
  132. {
  133. return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift);
  134. }
  135. static inline int __attribute_const__
  136. cpuid_feature_extract_field(u64 features, int field, bool sign)
  137. {
  138. return (sign) ?
  139. cpuid_feature_extract_signed_field(features, field) :
  140. cpuid_feature_extract_unsigned_field(features, field);
  141. }
  142. static inline s64 arm64_ftr_value(const struct arm64_ftr_bits *ftrp, u64 val)
  143. {
  144. return (s64)cpuid_feature_extract_field(val, ftrp->shift, ftrp->sign);
  145. }
  146. static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0)
  147. {
  148. return cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_BIGENDEL_SHIFT) == 0x1 ||
  149. cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1;
  150. }
  151. static inline bool id_aa64pfr0_32bit_el0(u64 pfr0)
  152. {
  153. u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL0_SHIFT);
  154. return val == ID_AA64PFR0_EL0_32BIT_64BIT;
  155. }
  156. void __init setup_cpu_features(void);
  157. void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
  158. const char *info);
  159. void enable_cpu_capabilities(const struct arm64_cpu_capabilities *caps);
  160. void check_local_cpu_capabilities(void);
  161. void update_cpu_errata_workarounds(void);
  162. void __init enable_errata_workarounds(void);
  163. void verify_local_cpu_errata_workarounds(void);
  164. u64 read_system_reg(u32 id);
  165. static inline bool cpu_supports_mixed_endian_el0(void)
  166. {
  167. return id_aa64mmfr0_mixed_endian_el0(read_cpuid(ID_AA64MMFR0_EL1));
  168. }
  169. static inline bool system_supports_32bit_el0(void)
  170. {
  171. return cpus_have_const_cap(ARM64_HAS_32BIT_EL0);
  172. }
  173. static inline bool system_supports_mixed_endian_el0(void)
  174. {
  175. return id_aa64mmfr0_mixed_endian_el0(read_system_reg(SYS_ID_AA64MMFR0_EL1));
  176. }
  177. static inline bool system_supports_fpsimd(void)
  178. {
  179. return !cpus_have_const_cap(ARM64_HAS_NO_FPSIMD);
  180. }
  181. static inline bool system_uses_ttbr0_pan(void)
  182. {
  183. return IS_ENABLED(CONFIG_ARM64_SW_TTBR0_PAN) &&
  184. !cpus_have_cap(ARM64_HAS_PAN);
  185. }
  186. #endif /* __ASSEMBLY__ */
  187. #endif