meson-gxl.dtsi 6.6 KB

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  1. /*
  2. * Copyright (c) 2016 Endless Computers, Inc.
  3. * Author: Carlo Caione <carlo@endlessm.com>
  4. *
  5. * This file is dual-licensed: you can use it either under the terms
  6. * of the GPL or the X11 license, at your option. Note that this dual
  7. * licensing only applies to this file, and not this project as a
  8. * whole.
  9. *
  10. * a) This library is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of the
  13. * License, or (at your option) any later version.
  14. *
  15. * This library is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * Or, alternatively,
  21. *
  22. * b) Permission is hereby granted, free of charge, to any person
  23. * obtaining a copy of this software and associated documentation
  24. * files (the "Software"), to deal in the Software without
  25. * restriction, including without limitation the rights to use,
  26. * copy, modify, merge, publish, distribute, sublicense, and/or
  27. * sell copies of the Software, and to permit persons to whom the
  28. * Software is furnished to do so, subject to the following
  29. * conditions:
  30. *
  31. * The above copyright notice and this permission notice shall be
  32. * included in all copies or substantial portions of the Software.
  33. *
  34. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  35. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  36. * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  37. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  38. * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  39. * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  40. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  41. * OTHER DEALINGS IN THE SOFTWARE.
  42. */
  43. #include "meson-gx.dtsi"
  44. #include <dt-bindings/clock/gxbb-clkc.h>
  45. #include <dt-bindings/gpio/meson-gxl-gpio.h>
  46. / {
  47. compatible = "amlogic,meson-gxl";
  48. };
  49. &ethmac {
  50. reg = <0x0 0xc9410000 0x0 0x10000
  51. 0x0 0xc8834540 0x0 0x4>;
  52. clocks = <&clkc CLKID_ETH>,
  53. <&clkc CLKID_FCLK_DIV2>,
  54. <&clkc CLKID_MPLL2>;
  55. clock-names = "stmmaceth", "clkin0", "clkin1";
  56. mdio0: mdio {
  57. #address-cells = <1>;
  58. #size-cells = <0>;
  59. compatible = "snps,dwmac-mdio";
  60. };
  61. };
  62. &aobus {
  63. pinctrl_aobus: pinctrl@14 {
  64. compatible = "amlogic,meson-gxl-aobus-pinctrl";
  65. #address-cells = <2>;
  66. #size-cells = <2>;
  67. ranges;
  68. gpio_ao: bank@14 {
  69. reg = <0x0 0x00014 0x0 0x8>,
  70. <0x0 0x0002c 0x0 0x4>,
  71. <0x0 0x00024 0x0 0x8>;
  72. reg-names = "mux", "pull", "gpio";
  73. gpio-controller;
  74. #gpio-cells = <2>;
  75. };
  76. uart_ao_a_pins: uart_ao_a {
  77. mux {
  78. groups = "uart_tx_ao_a", "uart_rx_ao_a";
  79. function = "uart_ao";
  80. };
  81. };
  82. remote_input_ao_pins: remote_input_ao {
  83. mux {
  84. groups = "remote_input_ao";
  85. function = "remote_input_ao";
  86. };
  87. };
  88. };
  89. };
  90. &periphs {
  91. pinctrl_periphs: pinctrl@4b0 {
  92. compatible = "amlogic,meson-gxl-periphs-pinctrl";
  93. #address-cells = <2>;
  94. #size-cells = <2>;
  95. ranges;
  96. gpio: bank@4b0 {
  97. reg = <0x0 0x004b0 0x0 0x28>,
  98. <0x0 0x004e8 0x0 0x14>,
  99. <0x0 0x00120 0x0 0x14>,
  100. <0x0 0x00430 0x0 0x40>;
  101. reg-names = "mux", "pull", "pull-enable", "gpio";
  102. gpio-controller;
  103. #gpio-cells = <2>;
  104. };
  105. emmc_pins: emmc {
  106. mux {
  107. groups = "emmc_nand_d07",
  108. "emmc_cmd",
  109. "emmc_clk",
  110. "emmc_ds";
  111. function = "emmc";
  112. };
  113. };
  114. sdcard_pins: sdcard {
  115. mux {
  116. groups = "sdcard_d0",
  117. "sdcard_d1",
  118. "sdcard_d2",
  119. "sdcard_d3",
  120. "sdcard_cmd",
  121. "sdcard_clk";
  122. function = "sdcard";
  123. };
  124. };
  125. sdio_pins: sdio {
  126. mux {
  127. groups = "sdio_d0",
  128. "sdio_d1",
  129. "sdio_d2",
  130. "sdio_d3",
  131. "sdio_cmd",
  132. "sdio_clk";
  133. function = "sdio";
  134. };
  135. };
  136. sdio_irq_pins: sdio_irq {
  137. mux {
  138. groups = "sdio_irq";
  139. function = "sdio";
  140. };
  141. };
  142. uart_a_pins: uart_a {
  143. mux {
  144. groups = "uart_tx_a",
  145. "uart_rx_a";
  146. function = "uart_a";
  147. };
  148. };
  149. uart_b_pins: uart_b {
  150. mux {
  151. groups = "uart_tx_b",
  152. "uart_rx_b";
  153. function = "uart_b";
  154. };
  155. };
  156. uart_c_pins: uart_c {
  157. mux {
  158. groups = "uart_tx_c",
  159. "uart_rx_c";
  160. function = "uart_c";
  161. };
  162. };
  163. i2c_a_pins: i2c_a {
  164. mux {
  165. groups = "i2c_sck_a",
  166. "i2c_sda_a";
  167. function = "i2c_a";
  168. };
  169. };
  170. i2c_b_pins: i2c_b {
  171. mux {
  172. groups = "i2c_sck_b",
  173. "i2c_sda_b";
  174. function = "i2c_b";
  175. };
  176. };
  177. i2c_c_pins: i2c_c {
  178. mux {
  179. groups = "i2c_sck_c",
  180. "i2c_sda_c";
  181. function = "i2c_c";
  182. };
  183. };
  184. eth_pins: eth_c {
  185. mux {
  186. groups = "eth_mdio",
  187. "eth_mdc",
  188. "eth_clk_rx_clk",
  189. "eth_rx_dv",
  190. "eth_rxd0",
  191. "eth_rxd1",
  192. "eth_rxd2",
  193. "eth_rxd3",
  194. "eth_rgmii_tx_clk",
  195. "eth_tx_en",
  196. "eth_txd0",
  197. "eth_txd1",
  198. "eth_txd2",
  199. "eth_txd3";
  200. function = "eth";
  201. };
  202. };
  203. pwm_e_pins: pwm_e {
  204. mux {
  205. groups = "pwm_e";
  206. function = "pwm_e";
  207. };
  208. };
  209. };
  210. eth-phy-mux {
  211. compatible = "mdio-mux-mmioreg", "mdio-mux";
  212. #address-cells = <1>;
  213. #size-cells = <0>;
  214. reg = <0x0 0x55c 0x0 0x4>;
  215. mux-mask = <0xffffffff>;
  216. mdio-parent-bus = <&mdio0>;
  217. internal_mdio: mdio@e40908ff {
  218. reg = <0xe40908ff>;
  219. #address-cells = <1>;
  220. #size-cells = <0>;
  221. internal_phy: ethernet-phy@8 {
  222. compatible = "ethernet-phy-id0181.4400", "ethernet-phy-ieee802.3-c22";
  223. reg = <8>;
  224. max-speed = <100>;
  225. };
  226. };
  227. external_mdio: mdio@2009087f {
  228. reg = <0x2009087f>;
  229. #address-cells = <1>;
  230. #size-cells = <0>;
  231. };
  232. };
  233. };
  234. &hiubus {
  235. clkc: clock-controller@0 {
  236. compatible = "amlogic,gxl-clkc", "amlogic,gxbb-clkc";
  237. #clock-cells = <1>;
  238. reg = <0x0 0x0 0x0 0x3db>;
  239. };
  240. };
  241. &i2c_A {
  242. clocks = <&clkc CLKID_I2C>;
  243. };
  244. &i2c_B {
  245. clocks = <&clkc CLKID_I2C>;
  246. };
  247. &i2c_C {
  248. clocks = <&clkc CLKID_I2C>;
  249. };
  250. &sd_emmc_a {
  251. clocks = <&clkc CLKID_SD_EMMC_A>,
  252. <&xtal>,
  253. <&clkc CLKID_FCLK_DIV2>;
  254. clock-names = "core", "clkin0", "clkin1";
  255. };
  256. &sd_emmc_b {
  257. clocks = <&clkc CLKID_SD_EMMC_B>,
  258. <&xtal>,
  259. <&clkc CLKID_FCLK_DIV2>;
  260. clock-names = "core", "clkin0", "clkin1";
  261. };
  262. &sd_emmc_c {
  263. clocks = <&clkc CLKID_SD_EMMC_C>,
  264. <&xtal>,
  265. <&clkc CLKID_FCLK_DIV2>;
  266. clock-names = "core", "clkin0", "clkin1";
  267. };
  268. &vpu {
  269. compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
  270. };