setup-r8a7779.c 2.4 KB

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  1. /*
  2. * r8a7779 processor support
  3. *
  4. * Copyright (C) 2011, 2013 Renesas Solutions Corp.
  5. * Copyright (C) 2011 Magnus Damm
  6. * Copyright (C) 2013 Cogent Embedded, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/init.h>
  18. #include <linux/irq.h>
  19. #include <linux/irqchip.h>
  20. #include <linux/irqchip/arm-gic.h>
  21. #include <asm/mach/arch.h>
  22. #include <asm/mach/map.h>
  23. #include "common.h"
  24. #include "r8a7779.h"
  25. static struct map_desc r8a7779_io_desc[] __initdata = {
  26. /* 2M identity mapping for 0xf0000000 (MPCORE) */
  27. {
  28. .virtual = 0xf0000000,
  29. .pfn = __phys_to_pfn(0xf0000000),
  30. .length = SZ_2M,
  31. .type = MT_DEVICE_NONSHARED
  32. },
  33. /* 16M identity mapping for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
  34. {
  35. .virtual = 0xfe000000,
  36. .pfn = __phys_to_pfn(0xfe000000),
  37. .length = SZ_16M,
  38. .type = MT_DEVICE_NONSHARED
  39. },
  40. };
  41. static void __init r8a7779_map_io(void)
  42. {
  43. debug_ll_io_init();
  44. iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
  45. }
  46. /* IRQ */
  47. #define INT2SMSKCR0 IOMEM(0xfe7822a0)
  48. #define INT2SMSKCR1 IOMEM(0xfe7822a4)
  49. #define INT2SMSKCR2 IOMEM(0xfe7822a8)
  50. #define INT2SMSKCR3 IOMEM(0xfe7822ac)
  51. #define INT2SMSKCR4 IOMEM(0xfe7822b0)
  52. #define INT2NTSR0 IOMEM(0xfe700060)
  53. #define INT2NTSR1 IOMEM(0xfe700064)
  54. static void __init r8a7779_init_irq_dt(void)
  55. {
  56. irqchip_init();
  57. /* route all interrupts to ARM */
  58. __raw_writel(0xffffffff, INT2NTSR0);
  59. __raw_writel(0x3fffffff, INT2NTSR1);
  60. /* unmask all known interrupts in INTCS2 */
  61. __raw_writel(0xfffffff0, INT2SMSKCR0);
  62. __raw_writel(0xfff7ffff, INT2SMSKCR1);
  63. __raw_writel(0xfffbffdf, INT2SMSKCR2);
  64. __raw_writel(0xbffffffc, INT2SMSKCR3);
  65. __raw_writel(0x003fee3f, INT2SMSKCR4);
  66. }
  67. static const char *const r8a7779_compat_dt[] __initconst = {
  68. "renesas,r8a7779",
  69. NULL,
  70. };
  71. DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
  72. .smp = smp_ops(r8a7779_smp_ops),
  73. .map_io = r8a7779_map_io,
  74. .init_early = shmobile_init_delay,
  75. .init_irq = r8a7779_init_irq_dt,
  76. .init_late = shmobile_init_late,
  77. .dt_compat = r8a7779_compat_dt,
  78. MACHINE_END