intel_dp_mst.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620
  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. * 2014 Red Hat Inc.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22. * IN THE SOFTWARE.
  23. *
  24. */
  25. #include <drm/drmP.h>
  26. #include "i915_drv.h"
  27. #include "intel_drv.h"
  28. #include <drm/drm_atomic_helper.h>
  29. #include <drm/drm_crtc_helper.h>
  30. #include <drm/drm_edid.h>
  31. static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
  32. struct intel_crtc_state *pipe_config)
  33. {
  34. struct drm_device *dev = encoder->base.dev;
  35. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  36. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  37. struct intel_dp *intel_dp = &intel_dig_port->dp;
  38. struct drm_atomic_state *state;
  39. int bpp, i;
  40. int lane_count, slots;
  41. const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  42. struct drm_connector *drm_connector;
  43. struct intel_connector *connector, *found = NULL;
  44. struct drm_connector_state *connector_state;
  45. int mst_pbn;
  46. pipe_config->dp_encoder_is_mst = true;
  47. pipe_config->has_pch_encoder = false;
  48. pipe_config->has_dp_encoder = true;
  49. bpp = 24;
  50. /*
  51. * for MST we always configure max link bw - the spec doesn't
  52. * seem to suggest we should do otherwise.
  53. */
  54. lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
  55. pipe_config->lane_count = lane_count;
  56. pipe_config->pipe_bpp = 24;
  57. pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
  58. state = pipe_config->base.state;
  59. for_each_connector_in_state(state, drm_connector, connector_state, i) {
  60. connector = to_intel_connector(drm_connector);
  61. if (connector_state->best_encoder == &encoder->base) {
  62. found = connector;
  63. break;
  64. }
  65. }
  66. if (!found) {
  67. DRM_ERROR("can't find connector\n");
  68. return false;
  69. }
  70. if (drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, found->port))
  71. pipe_config->has_audio = true;
  72. mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
  73. pipe_config->pbn = mst_pbn;
  74. slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
  75. intel_link_compute_m_n(bpp, lane_count,
  76. adjusted_mode->crtc_clock,
  77. pipe_config->port_clock,
  78. &pipe_config->dp_m_n);
  79. pipe_config->dp_m_n.tu = slots;
  80. if (IS_HASWELL(dev) || IS_BROADWELL(dev))
  81. hsw_dp_set_ddi_pll_sel(pipe_config);
  82. return true;
  83. }
  84. static void intel_mst_disable_dp(struct intel_encoder *encoder)
  85. {
  86. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  87. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  88. struct intel_dp *intel_dp = &intel_dig_port->dp;
  89. struct drm_device *dev = encoder->base.dev;
  90. struct drm_i915_private *dev_priv = dev->dev_private;
  91. struct drm_crtc *crtc = encoder->base.crtc;
  92. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  93. int ret;
  94. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  95. drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port);
  96. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  97. if (ret) {
  98. DRM_ERROR("failed to update payload %d\n", ret);
  99. }
  100. if (intel_crtc->config->has_audio) {
  101. intel_audio_codec_disable(encoder);
  102. intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO);
  103. }
  104. }
  105. static void intel_mst_post_disable_dp(struct intel_encoder *encoder)
  106. {
  107. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  108. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  109. struct intel_dp *intel_dp = &intel_dig_port->dp;
  110. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  111. /* this can fail */
  112. drm_dp_check_act_status(&intel_dp->mst_mgr);
  113. /* and this can also fail */
  114. drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  115. drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port);
  116. intel_dp->active_mst_links--;
  117. intel_mst->port = NULL;
  118. if (intel_dp->active_mst_links == 0) {
  119. intel_dig_port->base.post_disable(&intel_dig_port->base);
  120. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
  121. }
  122. }
  123. static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
  124. {
  125. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  126. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  127. struct intel_dp *intel_dp = &intel_dig_port->dp;
  128. struct drm_device *dev = encoder->base.dev;
  129. struct drm_i915_private *dev_priv = dev->dev_private;
  130. enum port port = intel_dig_port->port;
  131. int ret;
  132. uint32_t temp;
  133. struct intel_connector *found = NULL, *connector;
  134. int slots;
  135. struct drm_crtc *crtc = encoder->base.crtc;
  136. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  137. for_each_intel_connector(dev, connector) {
  138. if (connector->base.state->best_encoder == &encoder->base) {
  139. found = connector;
  140. break;
  141. }
  142. }
  143. if (!found) {
  144. DRM_ERROR("can't find connector\n");
  145. return;
  146. }
  147. /* MST encoders are bound to a crtc, not to a connector,
  148. * force the mapping here for get_hw_state.
  149. */
  150. found->encoder = encoder;
  151. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  152. intel_mst->port = found->port;
  153. if (intel_dp->active_mst_links == 0) {
  154. intel_ddi_clk_select(encoder, intel_crtc->config);
  155. intel_dp_set_link_params(intel_dp, intel_crtc->config);
  156. intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
  157. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
  158. intel_dp_start_link_train(intel_dp);
  159. intel_dp_stop_link_train(intel_dp);
  160. }
  161. ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
  162. intel_mst->port,
  163. intel_crtc->config->pbn, &slots);
  164. if (ret == false) {
  165. DRM_ERROR("failed to allocate vcpi\n");
  166. return;
  167. }
  168. intel_dp->active_mst_links++;
  169. temp = I915_READ(DP_TP_STATUS(port));
  170. I915_WRITE(DP_TP_STATUS(port), temp);
  171. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  172. }
  173. static void intel_mst_enable_dp(struct intel_encoder *encoder)
  174. {
  175. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  176. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  177. struct intel_dp *intel_dp = &intel_dig_port->dp;
  178. struct drm_device *dev = intel_dig_port->base.base.dev;
  179. struct drm_i915_private *dev_priv = dev->dev_private;
  180. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  181. enum port port = intel_dig_port->port;
  182. int ret;
  183. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  184. if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT),
  185. 1))
  186. DRM_ERROR("Timed out waiting for ACT sent\n");
  187. ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
  188. ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  189. if (crtc->config->has_audio) {
  190. DRM_DEBUG_DRIVER("Enabling DP audio on pipe %c\n",
  191. pipe_name(crtc->pipe));
  192. intel_display_power_get(dev_priv, POWER_DOMAIN_AUDIO);
  193. intel_audio_codec_enable(encoder);
  194. }
  195. }
  196. static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
  197. enum pipe *pipe)
  198. {
  199. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  200. *pipe = intel_mst->pipe;
  201. if (intel_mst->port)
  202. return true;
  203. return false;
  204. }
  205. static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
  206. struct intel_crtc_state *pipe_config)
  207. {
  208. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  209. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  210. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  211. struct drm_device *dev = encoder->base.dev;
  212. struct drm_i915_private *dev_priv = dev->dev_private;
  213. enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
  214. u32 temp, flags = 0;
  215. pipe_config->has_dp_encoder = true;
  216. pipe_config->has_audio =
  217. intel_ddi_is_audio_enabled(dev_priv, crtc);
  218. temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
  219. if (temp & TRANS_DDI_PHSYNC)
  220. flags |= DRM_MODE_FLAG_PHSYNC;
  221. else
  222. flags |= DRM_MODE_FLAG_NHSYNC;
  223. if (temp & TRANS_DDI_PVSYNC)
  224. flags |= DRM_MODE_FLAG_PVSYNC;
  225. else
  226. flags |= DRM_MODE_FLAG_NVSYNC;
  227. switch (temp & TRANS_DDI_BPC_MASK) {
  228. case TRANS_DDI_BPC_6:
  229. pipe_config->pipe_bpp = 18;
  230. break;
  231. case TRANS_DDI_BPC_8:
  232. pipe_config->pipe_bpp = 24;
  233. break;
  234. case TRANS_DDI_BPC_10:
  235. pipe_config->pipe_bpp = 30;
  236. break;
  237. case TRANS_DDI_BPC_12:
  238. pipe_config->pipe_bpp = 36;
  239. break;
  240. default:
  241. break;
  242. }
  243. pipe_config->base.adjusted_mode.flags |= flags;
  244. pipe_config->lane_count =
  245. ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
  246. intel_dp_get_m_n(crtc, pipe_config);
  247. intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
  248. }
  249. static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
  250. {
  251. struct intel_connector *intel_connector = to_intel_connector(connector);
  252. struct intel_dp *intel_dp = intel_connector->mst_port;
  253. struct edid *edid;
  254. int ret;
  255. edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
  256. if (!edid)
  257. return 0;
  258. ret = intel_connector_update_modes(connector, edid);
  259. kfree(edid);
  260. return ret;
  261. }
  262. static enum drm_connector_status
  263. intel_dp_mst_detect(struct drm_connector *connector, bool force)
  264. {
  265. struct intel_connector *intel_connector = to_intel_connector(connector);
  266. struct intel_dp *intel_dp = intel_connector->mst_port;
  267. return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
  268. }
  269. static int
  270. intel_dp_mst_set_property(struct drm_connector *connector,
  271. struct drm_property *property,
  272. uint64_t val)
  273. {
  274. return 0;
  275. }
  276. static void
  277. intel_dp_mst_connector_destroy(struct drm_connector *connector)
  278. {
  279. struct intel_connector *intel_connector = to_intel_connector(connector);
  280. if (!IS_ERR_OR_NULL(intel_connector->edid))
  281. kfree(intel_connector->edid);
  282. drm_connector_cleanup(connector);
  283. kfree(connector);
  284. }
  285. static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
  286. .dpms = drm_atomic_helper_connector_dpms,
  287. .detect = intel_dp_mst_detect,
  288. .fill_modes = drm_helper_probe_single_connector_modes,
  289. .set_property = intel_dp_mst_set_property,
  290. .atomic_get_property = intel_connector_atomic_get_property,
  291. .destroy = intel_dp_mst_connector_destroy,
  292. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  293. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  294. };
  295. static int intel_dp_mst_get_modes(struct drm_connector *connector)
  296. {
  297. return intel_dp_mst_get_ddc_modes(connector);
  298. }
  299. static enum drm_mode_status
  300. intel_dp_mst_mode_valid(struct drm_connector *connector,
  301. struct drm_display_mode *mode)
  302. {
  303. /* TODO - validate mode against available PBN for link */
  304. if (mode->clock < 10000)
  305. return MODE_CLOCK_LOW;
  306. if (mode->flags & DRM_MODE_FLAG_DBLCLK)
  307. return MODE_H_ILLEGAL;
  308. return MODE_OK;
  309. }
  310. static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
  311. struct drm_connector_state *state)
  312. {
  313. struct intel_connector *intel_connector = to_intel_connector(connector);
  314. struct intel_dp *intel_dp = intel_connector->mst_port;
  315. struct intel_crtc *crtc = to_intel_crtc(state->crtc);
  316. return &intel_dp->mst_encoders[crtc->pipe]->base.base;
  317. }
  318. static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
  319. {
  320. struct intel_connector *intel_connector = to_intel_connector(connector);
  321. struct intel_dp *intel_dp = intel_connector->mst_port;
  322. return &intel_dp->mst_encoders[0]->base.base;
  323. }
  324. static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
  325. .get_modes = intel_dp_mst_get_modes,
  326. .mode_valid = intel_dp_mst_mode_valid,
  327. .atomic_best_encoder = intel_mst_atomic_best_encoder,
  328. .best_encoder = intel_mst_best_encoder,
  329. };
  330. static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
  331. {
  332. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  333. drm_encoder_cleanup(encoder);
  334. kfree(intel_mst);
  335. }
  336. static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
  337. .destroy = intel_dp_mst_encoder_destroy,
  338. };
  339. static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
  340. {
  341. if (connector->encoder && connector->base.state->crtc) {
  342. enum pipe pipe;
  343. if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
  344. return false;
  345. return true;
  346. }
  347. return false;
  348. }
  349. static void intel_connector_add_to_fbdev(struct intel_connector *connector)
  350. {
  351. #ifdef CONFIG_DRM_FBDEV_EMULATION
  352. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  353. if (dev_priv->fbdev)
  354. drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper,
  355. &connector->base);
  356. #endif
  357. }
  358. static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
  359. {
  360. #ifdef CONFIG_DRM_FBDEV_EMULATION
  361. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  362. if (dev_priv->fbdev)
  363. drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper,
  364. &connector->base);
  365. #endif
  366. }
  367. static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
  368. {
  369. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  370. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  371. struct drm_device *dev = intel_dig_port->base.base.dev;
  372. struct intel_connector *intel_connector;
  373. struct drm_connector *connector;
  374. int i;
  375. intel_connector = intel_connector_alloc();
  376. if (!intel_connector)
  377. return NULL;
  378. connector = &intel_connector->base;
  379. drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
  380. drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
  381. intel_connector->unregister = intel_connector_unregister;
  382. intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
  383. intel_connector->mst_port = intel_dp;
  384. intel_connector->port = port;
  385. for (i = PIPE_A; i <= PIPE_C; i++) {
  386. drm_mode_connector_attach_encoder(&intel_connector->base,
  387. &intel_dp->mst_encoders[i]->base.base);
  388. }
  389. intel_dp_add_properties(intel_dp, connector);
  390. drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
  391. drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
  392. drm_mode_connector_set_path_property(connector, pathprop);
  393. return connector;
  394. }
  395. static void intel_dp_register_mst_connector(struct drm_connector *connector)
  396. {
  397. struct intel_connector *intel_connector = to_intel_connector(connector);
  398. struct drm_device *dev = connector->dev;
  399. drm_modeset_lock_all(dev);
  400. intel_connector_add_to_fbdev(intel_connector);
  401. drm_modeset_unlock_all(dev);
  402. drm_connector_register(&intel_connector->base);
  403. }
  404. static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
  405. struct drm_connector *connector)
  406. {
  407. struct intel_connector *intel_connector = to_intel_connector(connector);
  408. struct drm_device *dev = connector->dev;
  409. /* need to nuke the connector */
  410. drm_modeset_lock_all(dev);
  411. if (connector->state->crtc) {
  412. struct drm_mode_set set;
  413. int ret;
  414. memset(&set, 0, sizeof(set));
  415. set.crtc = connector->state->crtc,
  416. ret = drm_atomic_helper_set_config(&set);
  417. WARN(ret, "Disabling mst crtc failed with %i\n", ret);
  418. }
  419. drm_modeset_unlock_all(dev);
  420. intel_connector->unregister(intel_connector);
  421. drm_modeset_lock_all(dev);
  422. intel_connector_remove_from_fbdev(intel_connector);
  423. drm_connector_cleanup(connector);
  424. drm_modeset_unlock_all(dev);
  425. kfree(intel_connector);
  426. DRM_DEBUG_KMS("\n");
  427. }
  428. static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
  429. {
  430. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  431. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  432. struct drm_device *dev = intel_dig_port->base.base.dev;
  433. drm_kms_helper_hotplug_event(dev);
  434. }
  435. static struct drm_dp_mst_topology_cbs mst_cbs = {
  436. .add_connector = intel_dp_add_mst_connector,
  437. .register_connector = intel_dp_register_mst_connector,
  438. .destroy_connector = intel_dp_destroy_mst_connector,
  439. .hotplug = intel_dp_mst_hotplug,
  440. };
  441. static struct intel_dp_mst_encoder *
  442. intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
  443. {
  444. struct intel_dp_mst_encoder *intel_mst;
  445. struct intel_encoder *intel_encoder;
  446. struct drm_device *dev = intel_dig_port->base.base.dev;
  447. intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
  448. if (!intel_mst)
  449. return NULL;
  450. intel_mst->pipe = pipe;
  451. intel_encoder = &intel_mst->base;
  452. intel_mst->primary = intel_dig_port;
  453. drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
  454. DRM_MODE_ENCODER_DPMST, NULL);
  455. intel_encoder->type = INTEL_OUTPUT_DP_MST;
  456. intel_encoder->crtc_mask = 0x7;
  457. intel_encoder->cloneable = 0;
  458. intel_encoder->compute_config = intel_dp_mst_compute_config;
  459. intel_encoder->disable = intel_mst_disable_dp;
  460. intel_encoder->post_disable = intel_mst_post_disable_dp;
  461. intel_encoder->pre_enable = intel_mst_pre_enable_dp;
  462. intel_encoder->enable = intel_mst_enable_dp;
  463. intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
  464. intel_encoder->get_config = intel_dp_mst_enc_get_config;
  465. return intel_mst;
  466. }
  467. static bool
  468. intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
  469. {
  470. int i;
  471. struct intel_dp *intel_dp = &intel_dig_port->dp;
  472. for (i = PIPE_A; i <= PIPE_C; i++)
  473. intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
  474. return true;
  475. }
  476. int
  477. intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
  478. {
  479. struct intel_dp *intel_dp = &intel_dig_port->dp;
  480. struct drm_device *dev = intel_dig_port->base.base.dev;
  481. int ret;
  482. intel_dp->can_mst = true;
  483. intel_dp->mst_mgr.cbs = &mst_cbs;
  484. /* create encoders */
  485. intel_dp_create_fake_mst_encoders(intel_dig_port);
  486. ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
  487. if (ret) {
  488. intel_dp->can_mst = false;
  489. return ret;
  490. }
  491. return 0;
  492. }
  493. void
  494. intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
  495. {
  496. struct intel_dp *intel_dp = &intel_dig_port->dp;
  497. if (!intel_dp->can_mst)
  498. return;
  499. drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
  500. /* encoders will get killed by normal cleanup */
  501. }