phy-qcom-ufs-i.h 4.0 KB

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  1. /*
  2. * Copyright (c) 2013-2015, Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. */
  14. #ifndef UFS_QCOM_PHY_I_H_
  15. #define UFS_QCOM_PHY_I_H_
  16. #include <linux/clk.h>
  17. #include <linux/slab.h>
  18. #include <linux/phy/phy.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/io.h>
  21. #include <linux/delay.h>
  22. #define UFS_QCOM_PHY_NAME_LEN 30
  23. struct ufs_qcom_phy_calibration {
  24. u32 reg_offset;
  25. u32 cfg_value;
  26. };
  27. struct ufs_qcom_phy_vreg {
  28. const char *name;
  29. struct regulator *reg;
  30. int max_uA;
  31. int min_uV;
  32. int max_uV;
  33. bool enabled;
  34. bool is_always_on;
  35. };
  36. struct ufs_qcom_phy {
  37. struct list_head list;
  38. struct device *dev;
  39. void __iomem *mmio;
  40. void __iomem *dev_ref_clk_ctrl_mmio;
  41. struct clk *tx_iface_clk;
  42. struct clk *rx_iface_clk;
  43. bool is_iface_clk_enabled;
  44. struct clk *ref_clk_src;
  45. struct clk *ref_clk_parent;
  46. struct clk *ref_clk;
  47. bool is_ref_clk_enabled;
  48. bool is_dev_ref_clk_enabled;
  49. struct ufs_qcom_phy_vreg vdda_pll;
  50. struct ufs_qcom_phy_vreg vdda_phy;
  51. struct ufs_qcom_phy_vreg vddp_ref_clk;
  52. unsigned int quirks;
  53. /*
  54. * If UFS link is put into Hibern8 and if UFS PHY analog hardware is
  55. * power collapsed (by clearing UFS_PHY_POWER_DOWN_CONTROL), Hibern8
  56. * exit might fail even after powering on UFS PHY analog hardware.
  57. * Enabling this quirk will help to solve above issue by doing
  58. * custom PHY settings just before PHY analog power collapse.
  59. */
  60. #define UFS_QCOM_PHY_QUIRK_HIBERN8_EXIT_AFTER_PHY_PWR_COLLAPSE BIT(0)
  61. u8 host_ctrl_rev_major;
  62. u16 host_ctrl_rev_minor;
  63. u16 host_ctrl_rev_step;
  64. char name[UFS_QCOM_PHY_NAME_LEN];
  65. struct ufs_qcom_phy_calibration *cached_regs;
  66. int cached_regs_table_size;
  67. bool is_powered_on;
  68. struct ufs_qcom_phy_specific_ops *phy_spec_ops;
  69. };
  70. /**
  71. * struct ufs_qcom_phy_specific_ops - set of pointers to functions which have a
  72. * specific implementation per phy. Each UFS phy, should implement
  73. * those functions according to its spec and requirements
  74. * @calibrate_phy: pointer to a function that calibrate the phy
  75. * @start_serdes: pointer to a function that starts the serdes
  76. * @is_physical_coding_sublayer_ready: pointer to a function that
  77. * checks pcs readiness. returns 0 for success and non-zero for error.
  78. * @set_tx_lane_enable: pointer to a function that enable tx lanes
  79. * @power_control: pointer to a function that controls analog rail of phy
  80. * and writes to QSERDES_RX_SIGDET_CNTRL attribute
  81. */
  82. struct ufs_qcom_phy_specific_ops {
  83. int (*calibrate_phy)(struct ufs_qcom_phy *phy, bool is_rate_B);
  84. void (*start_serdes)(struct ufs_qcom_phy *phy);
  85. int (*is_physical_coding_sublayer_ready)(struct ufs_qcom_phy *phy);
  86. void (*set_tx_lane_enable)(struct ufs_qcom_phy *phy, u32 val);
  87. void (*power_control)(struct ufs_qcom_phy *phy, bool val);
  88. };
  89. struct ufs_qcom_phy *get_ufs_qcom_phy(struct phy *generic_phy);
  90. int ufs_qcom_phy_power_on(struct phy *generic_phy);
  91. int ufs_qcom_phy_power_off(struct phy *generic_phy);
  92. int ufs_qcom_phy_exit(struct phy *generic_phy);
  93. int ufs_qcom_phy_init_clks(struct phy *generic_phy,
  94. struct ufs_qcom_phy *phy_common);
  95. int ufs_qcom_phy_init_vregulators(struct phy *generic_phy,
  96. struct ufs_qcom_phy *phy_common);
  97. int ufs_qcom_phy_remove(struct phy *generic_phy,
  98. struct ufs_qcom_phy *ufs_qcom_phy);
  99. struct phy *ufs_qcom_phy_generic_probe(struct platform_device *pdev,
  100. struct ufs_qcom_phy *common_cfg,
  101. struct phy_ops *ufs_qcom_phy_gen_ops,
  102. struct ufs_qcom_phy_specific_ops *phy_spec_ops);
  103. int ufs_qcom_phy_calibrate(struct ufs_qcom_phy *ufs_qcom_phy,
  104. struct ufs_qcom_phy_calibration *tbl_A, int tbl_size_A,
  105. struct ufs_qcom_phy_calibration *tbl_B, int tbl_size_B,
  106. bool is_rate_B);
  107. #endif