user_sdma.c 42 KB

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  1. /*
  2. * Copyright(c) 2015 - 2017 Intel Corporation.
  3. *
  4. * This file is provided under a dual BSD/GPLv2 license. When using or
  5. * redistributing this file, you may do so under either license.
  6. *
  7. * GPL LICENSE SUMMARY
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of version 2 of the GNU General Public License as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * BSD LICENSE
  19. *
  20. * Redistribution and use in source and binary forms, with or without
  21. * modification, are permitted provided that the following conditions
  22. * are met:
  23. *
  24. * - Redistributions of source code must retain the above copyright
  25. * notice, this list of conditions and the following disclaimer.
  26. * - Redistributions in binary form must reproduce the above copyright
  27. * notice, this list of conditions and the following disclaimer in
  28. * the documentation and/or other materials provided with the
  29. * distribution.
  30. * - Neither the name of Intel Corporation nor the names of its
  31. * contributors may be used to endorse or promote products derived
  32. * from this software without specific prior written permission.
  33. *
  34. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  35. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  36. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  37. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  38. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  39. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  40. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  41. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  42. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  43. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  44. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  45. *
  46. */
  47. #include <linux/mm.h>
  48. #include <linux/types.h>
  49. #include <linux/device.h>
  50. #include <linux/dmapool.h>
  51. #include <linux/slab.h>
  52. #include <linux/list.h>
  53. #include <linux/highmem.h>
  54. #include <linux/io.h>
  55. #include <linux/uio.h>
  56. #include <linux/rbtree.h>
  57. #include <linux/spinlock.h>
  58. #include <linux/delay.h>
  59. #include <linux/kthread.h>
  60. #include <linux/mmu_context.h>
  61. #include <linux/module.h>
  62. #include <linux/vmalloc.h>
  63. #include <linux/string.h>
  64. #include "hfi.h"
  65. #include "sdma.h"
  66. #include "mmu_rb.h"
  67. #include "user_sdma.h"
  68. #include "verbs.h" /* for the headers */
  69. #include "common.h" /* for struct hfi1_tid_info */
  70. #include "trace.h"
  71. static uint hfi1_sdma_comp_ring_size = 128;
  72. module_param_named(sdma_comp_size, hfi1_sdma_comp_ring_size, uint, S_IRUGO);
  73. MODULE_PARM_DESC(sdma_comp_size, "Size of User SDMA completion ring. Default: 128");
  74. static unsigned initial_pkt_count = 8;
  75. static int user_sdma_send_pkts(struct user_sdma_request *req,
  76. unsigned maxpkts);
  77. static void user_sdma_txreq_cb(struct sdma_txreq *txreq, int status);
  78. static inline void pq_update(struct hfi1_user_sdma_pkt_q *pq);
  79. static void user_sdma_free_request(struct user_sdma_request *req, bool unpin);
  80. static int pin_vector_pages(struct user_sdma_request *req,
  81. struct user_sdma_iovec *iovec);
  82. static void unpin_vector_pages(struct mm_struct *mm, struct page **pages,
  83. unsigned start, unsigned npages);
  84. static int check_header_template(struct user_sdma_request *req,
  85. struct hfi1_pkt_header *hdr, u32 lrhlen,
  86. u32 datalen);
  87. static int set_txreq_header(struct user_sdma_request *req,
  88. struct user_sdma_txreq *tx, u32 datalen);
  89. static int set_txreq_header_ahg(struct user_sdma_request *req,
  90. struct user_sdma_txreq *tx, u32 len);
  91. static inline void set_comp_state(struct hfi1_user_sdma_pkt_q *pq,
  92. struct hfi1_user_sdma_comp_q *cq,
  93. u16 idx, enum hfi1_sdma_comp_state state,
  94. int ret);
  95. static inline u32 set_pkt_bth_psn(__be32 bthpsn, u8 expct, u32 frags);
  96. static inline u32 get_lrh_len(struct hfi1_pkt_header, u32 len);
  97. static int defer_packet_queue(
  98. struct sdma_engine *sde,
  99. struct iowait *wait,
  100. struct sdma_txreq *txreq,
  101. uint seq,
  102. bool pkts_sent);
  103. static void activate_packet_queue(struct iowait *wait, int reason);
  104. static bool sdma_rb_filter(struct mmu_rb_node *node, unsigned long addr,
  105. unsigned long len);
  106. static int sdma_rb_insert(void *arg, struct mmu_rb_node *mnode);
  107. static int sdma_rb_evict(void *arg, struct mmu_rb_node *mnode,
  108. void *arg2, bool *stop);
  109. static void sdma_rb_remove(void *arg, struct mmu_rb_node *mnode);
  110. static int sdma_rb_invalidate(void *arg, struct mmu_rb_node *mnode);
  111. static struct mmu_rb_ops sdma_rb_ops = {
  112. .filter = sdma_rb_filter,
  113. .insert = sdma_rb_insert,
  114. .evict = sdma_rb_evict,
  115. .remove = sdma_rb_remove,
  116. .invalidate = sdma_rb_invalidate
  117. };
  118. static int defer_packet_queue(
  119. struct sdma_engine *sde,
  120. struct iowait *wait,
  121. struct sdma_txreq *txreq,
  122. uint seq,
  123. bool pkts_sent)
  124. {
  125. struct hfi1_user_sdma_pkt_q *pq =
  126. container_of(wait, struct hfi1_user_sdma_pkt_q, busy);
  127. struct hfi1_ibdev *dev = &pq->dd->verbs_dev;
  128. struct user_sdma_txreq *tx =
  129. container_of(txreq, struct user_sdma_txreq, txreq);
  130. if (sdma_progress(sde, seq, txreq)) {
  131. if (tx->busycount++ < MAX_DEFER_RETRY_COUNT)
  132. goto eagain;
  133. }
  134. /*
  135. * We are assuming that if the list is enqueued somewhere, it
  136. * is to the dmawait list since that is the only place where
  137. * it is supposed to be enqueued.
  138. */
  139. xchg(&pq->state, SDMA_PKT_Q_DEFERRED);
  140. write_seqlock(&dev->iowait_lock);
  141. if (list_empty(&pq->busy.list))
  142. iowait_queue(pkts_sent, &pq->busy, &sde->dmawait);
  143. write_sequnlock(&dev->iowait_lock);
  144. return -EBUSY;
  145. eagain:
  146. return -EAGAIN;
  147. }
  148. static void activate_packet_queue(struct iowait *wait, int reason)
  149. {
  150. struct hfi1_user_sdma_pkt_q *pq =
  151. container_of(wait, struct hfi1_user_sdma_pkt_q, busy);
  152. xchg(&pq->state, SDMA_PKT_Q_ACTIVE);
  153. wake_up(&wait->wait_dma);
  154. };
  155. int hfi1_user_sdma_alloc_queues(struct hfi1_ctxtdata *uctxt,
  156. struct hfi1_filedata *fd)
  157. {
  158. int ret = -ENOMEM;
  159. char buf[64];
  160. struct hfi1_devdata *dd;
  161. struct hfi1_user_sdma_comp_q *cq;
  162. struct hfi1_user_sdma_pkt_q *pq;
  163. if (!uctxt || !fd)
  164. return -EBADF;
  165. if (!hfi1_sdma_comp_ring_size)
  166. return -EINVAL;
  167. dd = uctxt->dd;
  168. pq = kzalloc(sizeof(*pq), GFP_KERNEL);
  169. if (!pq)
  170. return -ENOMEM;
  171. pq->dd = dd;
  172. pq->ctxt = uctxt->ctxt;
  173. pq->subctxt = fd->subctxt;
  174. pq->n_max_reqs = hfi1_sdma_comp_ring_size;
  175. pq->state = SDMA_PKT_Q_INACTIVE;
  176. atomic_set(&pq->n_reqs, 0);
  177. init_waitqueue_head(&pq->wait);
  178. atomic_set(&pq->n_locked, 0);
  179. pq->mm = fd->mm;
  180. iowait_init(&pq->busy, 0, NULL, defer_packet_queue,
  181. activate_packet_queue, NULL);
  182. pq->reqidx = 0;
  183. pq->reqs = kcalloc(hfi1_sdma_comp_ring_size,
  184. sizeof(*pq->reqs),
  185. GFP_KERNEL);
  186. if (!pq->reqs)
  187. goto pq_reqs_nomem;
  188. pq->req_in_use = kcalloc(BITS_TO_LONGS(hfi1_sdma_comp_ring_size),
  189. sizeof(*pq->req_in_use),
  190. GFP_KERNEL);
  191. if (!pq->req_in_use)
  192. goto pq_reqs_no_in_use;
  193. snprintf(buf, 64, "txreq-kmem-cache-%u-%u-%u", dd->unit, uctxt->ctxt,
  194. fd->subctxt);
  195. pq->txreq_cache = kmem_cache_create(buf,
  196. sizeof(struct user_sdma_txreq),
  197. L1_CACHE_BYTES,
  198. SLAB_HWCACHE_ALIGN,
  199. NULL);
  200. if (!pq->txreq_cache) {
  201. dd_dev_err(dd, "[%u] Failed to allocate TxReq cache\n",
  202. uctxt->ctxt);
  203. goto pq_txreq_nomem;
  204. }
  205. cq = kzalloc(sizeof(*cq), GFP_KERNEL);
  206. if (!cq)
  207. goto cq_nomem;
  208. cq->comps = vmalloc_user(PAGE_ALIGN(sizeof(*cq->comps)
  209. * hfi1_sdma_comp_ring_size));
  210. if (!cq->comps)
  211. goto cq_comps_nomem;
  212. cq->nentries = hfi1_sdma_comp_ring_size;
  213. ret = hfi1_mmu_rb_register(pq, pq->mm, &sdma_rb_ops, dd->pport->hfi1_wq,
  214. &pq->handler);
  215. if (ret) {
  216. dd_dev_err(dd, "Failed to register with MMU %d", ret);
  217. goto pq_mmu_fail;
  218. }
  219. fd->pq = pq;
  220. fd->cq = cq;
  221. return 0;
  222. pq_mmu_fail:
  223. vfree(cq->comps);
  224. cq_comps_nomem:
  225. kfree(cq);
  226. cq_nomem:
  227. kmem_cache_destroy(pq->txreq_cache);
  228. pq_txreq_nomem:
  229. kfree(pq->req_in_use);
  230. pq_reqs_no_in_use:
  231. kfree(pq->reqs);
  232. pq_reqs_nomem:
  233. kfree(pq);
  234. return ret;
  235. }
  236. int hfi1_user_sdma_free_queues(struct hfi1_filedata *fd,
  237. struct hfi1_ctxtdata *uctxt)
  238. {
  239. struct hfi1_user_sdma_pkt_q *pq;
  240. trace_hfi1_sdma_user_free_queues(uctxt->dd, uctxt->ctxt, fd->subctxt);
  241. pq = fd->pq;
  242. if (pq) {
  243. if (pq->handler)
  244. hfi1_mmu_rb_unregister(pq->handler);
  245. iowait_sdma_drain(&pq->busy);
  246. /* Wait until all requests have been freed. */
  247. wait_event_interruptible(
  248. pq->wait,
  249. (READ_ONCE(pq->state) == SDMA_PKT_Q_INACTIVE));
  250. kfree(pq->reqs);
  251. kfree(pq->req_in_use);
  252. kmem_cache_destroy(pq->txreq_cache);
  253. kfree(pq);
  254. fd->pq = NULL;
  255. }
  256. if (fd->cq) {
  257. vfree(fd->cq->comps);
  258. kfree(fd->cq);
  259. fd->cq = NULL;
  260. }
  261. return 0;
  262. }
  263. static u8 dlid_to_selector(u16 dlid)
  264. {
  265. static u8 mapping[256];
  266. static int initialized;
  267. static u8 next;
  268. int hash;
  269. if (!initialized) {
  270. memset(mapping, 0xFF, 256);
  271. initialized = 1;
  272. }
  273. hash = ((dlid >> 8) ^ dlid) & 0xFF;
  274. if (mapping[hash] == 0xFF) {
  275. mapping[hash] = next;
  276. next = (next + 1) & 0x7F;
  277. }
  278. return mapping[hash];
  279. }
  280. int hfi1_user_sdma_process_request(struct hfi1_filedata *fd,
  281. struct iovec *iovec, unsigned long dim,
  282. unsigned long *count)
  283. {
  284. int ret = 0, i;
  285. struct hfi1_ctxtdata *uctxt = fd->uctxt;
  286. struct hfi1_user_sdma_pkt_q *pq = fd->pq;
  287. struct hfi1_user_sdma_comp_q *cq = fd->cq;
  288. struct hfi1_devdata *dd = pq->dd;
  289. unsigned long idx = 0;
  290. u8 pcount = initial_pkt_count;
  291. struct sdma_req_info info;
  292. struct user_sdma_request *req;
  293. u8 opcode, sc, vl;
  294. u16 pkey;
  295. u32 slid;
  296. int req_queued = 0;
  297. u16 dlid;
  298. u32 selector;
  299. if (iovec[idx].iov_len < sizeof(info) + sizeof(req->hdr)) {
  300. hfi1_cdbg(
  301. SDMA,
  302. "[%u:%u:%u] First vector not big enough for header %lu/%lu",
  303. dd->unit, uctxt->ctxt, fd->subctxt,
  304. iovec[idx].iov_len, sizeof(info) + sizeof(req->hdr));
  305. return -EINVAL;
  306. }
  307. ret = copy_from_user(&info, iovec[idx].iov_base, sizeof(info));
  308. if (ret) {
  309. hfi1_cdbg(SDMA, "[%u:%u:%u] Failed to copy info QW (%d)",
  310. dd->unit, uctxt->ctxt, fd->subctxt, ret);
  311. return -EFAULT;
  312. }
  313. trace_hfi1_sdma_user_reqinfo(dd, uctxt->ctxt, fd->subctxt,
  314. (u16 *)&info);
  315. if (info.comp_idx >= hfi1_sdma_comp_ring_size) {
  316. hfi1_cdbg(SDMA,
  317. "[%u:%u:%u:%u] Invalid comp index",
  318. dd->unit, uctxt->ctxt, fd->subctxt, info.comp_idx);
  319. return -EINVAL;
  320. }
  321. /*
  322. * Sanity check the header io vector count. Need at least 1 vector
  323. * (header) and cannot be larger than the actual io vector count.
  324. */
  325. if (req_iovcnt(info.ctrl) < 1 || req_iovcnt(info.ctrl) > dim) {
  326. hfi1_cdbg(SDMA,
  327. "[%u:%u:%u:%u] Invalid iov count %d, dim %ld",
  328. dd->unit, uctxt->ctxt, fd->subctxt, info.comp_idx,
  329. req_iovcnt(info.ctrl), dim);
  330. return -EINVAL;
  331. }
  332. if (!info.fragsize) {
  333. hfi1_cdbg(SDMA,
  334. "[%u:%u:%u:%u] Request does not specify fragsize",
  335. dd->unit, uctxt->ctxt, fd->subctxt, info.comp_idx);
  336. return -EINVAL;
  337. }
  338. /* Try to claim the request. */
  339. if (test_and_set_bit(info.comp_idx, pq->req_in_use)) {
  340. hfi1_cdbg(SDMA, "[%u:%u:%u] Entry %u is in use",
  341. dd->unit, uctxt->ctxt, fd->subctxt,
  342. info.comp_idx);
  343. return -EBADSLT;
  344. }
  345. /*
  346. * All safety checks have been done and this request has been claimed.
  347. */
  348. trace_hfi1_sdma_user_process_request(dd, uctxt->ctxt, fd->subctxt,
  349. info.comp_idx);
  350. req = pq->reqs + info.comp_idx;
  351. req->data_iovs = req_iovcnt(info.ctrl) - 1; /* subtract header vector */
  352. req->data_len = 0;
  353. req->pq = pq;
  354. req->cq = cq;
  355. req->status = -1;
  356. req->ahg_idx = -1;
  357. req->iov_idx = 0;
  358. req->sent = 0;
  359. req->seqnum = 0;
  360. req->seqcomp = 0;
  361. req->seqsubmitted = 0;
  362. req->tids = NULL;
  363. req->done = 0;
  364. req->has_error = 0;
  365. INIT_LIST_HEAD(&req->txps);
  366. memcpy(&req->info, &info, sizeof(info));
  367. if (req_opcode(info.ctrl) == EXPECTED) {
  368. /* expected must have a TID info and at least one data vector */
  369. if (req->data_iovs < 2) {
  370. SDMA_DBG(req,
  371. "Not enough vectors for expected request");
  372. ret = -EINVAL;
  373. goto free_req;
  374. }
  375. req->data_iovs--;
  376. }
  377. if (!info.npkts || req->data_iovs > MAX_VECTORS_PER_REQ) {
  378. SDMA_DBG(req, "Too many vectors (%u/%u)", req->data_iovs,
  379. MAX_VECTORS_PER_REQ);
  380. ret = -EINVAL;
  381. goto free_req;
  382. }
  383. /* Copy the header from the user buffer */
  384. ret = copy_from_user(&req->hdr, iovec[idx].iov_base + sizeof(info),
  385. sizeof(req->hdr));
  386. if (ret) {
  387. SDMA_DBG(req, "Failed to copy header template (%d)", ret);
  388. ret = -EFAULT;
  389. goto free_req;
  390. }
  391. /* If Static rate control is not enabled, sanitize the header. */
  392. if (!HFI1_CAP_IS_USET(STATIC_RATE_CTRL))
  393. req->hdr.pbc[2] = 0;
  394. /* Validate the opcode. Do not trust packets from user space blindly. */
  395. opcode = (be32_to_cpu(req->hdr.bth[0]) >> 24) & 0xff;
  396. if ((opcode & USER_OPCODE_CHECK_MASK) !=
  397. USER_OPCODE_CHECK_VAL) {
  398. SDMA_DBG(req, "Invalid opcode (%d)", opcode);
  399. ret = -EINVAL;
  400. goto free_req;
  401. }
  402. /*
  403. * Validate the vl. Do not trust packets from user space blindly.
  404. * VL comes from PBC, SC comes from LRH, and the VL needs to
  405. * match the SC look up.
  406. */
  407. vl = (le16_to_cpu(req->hdr.pbc[0]) >> 12) & 0xF;
  408. sc = (((be16_to_cpu(req->hdr.lrh[0]) >> 12) & 0xF) |
  409. (((le16_to_cpu(req->hdr.pbc[1]) >> 14) & 0x1) << 4));
  410. if (vl >= dd->pport->vls_operational ||
  411. vl != sc_to_vlt(dd, sc)) {
  412. SDMA_DBG(req, "Invalid SC(%u)/VL(%u)", sc, vl);
  413. ret = -EINVAL;
  414. goto free_req;
  415. }
  416. /* Checking P_KEY for requests from user-space */
  417. pkey = (u16)be32_to_cpu(req->hdr.bth[0]);
  418. slid = be16_to_cpu(req->hdr.lrh[3]);
  419. if (egress_pkey_check(dd->pport, slid, pkey, sc, PKEY_CHECK_INVALID)) {
  420. ret = -EINVAL;
  421. goto free_req;
  422. }
  423. /*
  424. * Also should check the BTH.lnh. If it says the next header is GRH then
  425. * the RXE parsing will be off and will land in the middle of the KDETH
  426. * or miss it entirely.
  427. */
  428. if ((be16_to_cpu(req->hdr.lrh[0]) & 0x3) == HFI1_LRH_GRH) {
  429. SDMA_DBG(req, "User tried to pass in a GRH");
  430. ret = -EINVAL;
  431. goto free_req;
  432. }
  433. req->koffset = le32_to_cpu(req->hdr.kdeth.swdata[6]);
  434. /*
  435. * Calculate the initial TID offset based on the values of
  436. * KDETH.OFFSET and KDETH.OM that are passed in.
  437. */
  438. req->tidoffset = KDETH_GET(req->hdr.kdeth.ver_tid_offset, OFFSET) *
  439. (KDETH_GET(req->hdr.kdeth.ver_tid_offset, OM) ?
  440. KDETH_OM_LARGE : KDETH_OM_SMALL);
  441. trace_hfi1_sdma_user_initial_tidoffset(dd, uctxt->ctxt, fd->subctxt,
  442. info.comp_idx, req->tidoffset);
  443. idx++;
  444. /* Save all the IO vector structures */
  445. for (i = 0; i < req->data_iovs; i++) {
  446. req->iovs[i].offset = 0;
  447. INIT_LIST_HEAD(&req->iovs[i].list);
  448. memcpy(&req->iovs[i].iov,
  449. iovec + idx++,
  450. sizeof(req->iovs[i].iov));
  451. ret = pin_vector_pages(req, &req->iovs[i]);
  452. if (ret) {
  453. req->data_iovs = i;
  454. req->status = ret;
  455. goto free_req;
  456. }
  457. req->data_len += req->iovs[i].iov.iov_len;
  458. }
  459. trace_hfi1_sdma_user_data_length(dd, uctxt->ctxt, fd->subctxt,
  460. info.comp_idx, req->data_len);
  461. if (pcount > req->info.npkts)
  462. pcount = req->info.npkts;
  463. /*
  464. * Copy any TID info
  465. * User space will provide the TID info only when the
  466. * request type is EXPECTED. This is true even if there is
  467. * only one packet in the request and the header is already
  468. * setup. The reason for the singular TID case is that the
  469. * driver needs to perform safety checks.
  470. */
  471. if (req_opcode(req->info.ctrl) == EXPECTED) {
  472. u16 ntids = iovec[idx].iov_len / sizeof(*req->tids);
  473. u32 *tmp;
  474. if (!ntids || ntids > MAX_TID_PAIR_ENTRIES) {
  475. ret = -EINVAL;
  476. goto free_req;
  477. }
  478. /*
  479. * We have to copy all of the tids because they may vary
  480. * in size and, therefore, the TID count might not be
  481. * equal to the pkt count. However, there is no way to
  482. * tell at this point.
  483. */
  484. tmp = memdup_user(iovec[idx].iov_base,
  485. ntids * sizeof(*req->tids));
  486. if (IS_ERR(tmp)) {
  487. ret = PTR_ERR(tmp);
  488. SDMA_DBG(req, "Failed to copy %d TIDs (%d)",
  489. ntids, ret);
  490. goto free_req;
  491. }
  492. req->tids = tmp;
  493. req->n_tids = ntids;
  494. req->tididx = 0;
  495. idx++;
  496. }
  497. dlid = be16_to_cpu(req->hdr.lrh[1]);
  498. selector = dlid_to_selector(dlid);
  499. selector += uctxt->ctxt + fd->subctxt;
  500. req->sde = sdma_select_user_engine(dd, selector, vl);
  501. if (!req->sde || !sdma_running(req->sde)) {
  502. ret = -ECOMM;
  503. goto free_req;
  504. }
  505. /* We don't need an AHG entry if the request contains only one packet */
  506. if (req->info.npkts > 1 && HFI1_CAP_IS_USET(SDMA_AHG))
  507. req->ahg_idx = sdma_ahg_alloc(req->sde);
  508. set_comp_state(pq, cq, info.comp_idx, QUEUED, 0);
  509. atomic_inc(&pq->n_reqs);
  510. req_queued = 1;
  511. /* Send the first N packets in the request to buy us some time */
  512. ret = user_sdma_send_pkts(req, pcount);
  513. if (unlikely(ret < 0 && ret != -EBUSY)) {
  514. req->status = ret;
  515. goto free_req;
  516. }
  517. /*
  518. * It is possible that the SDMA engine would have processed all the
  519. * submitted packets by the time we get here. Therefore, only set
  520. * packet queue state to ACTIVE if there are still uncompleted
  521. * requests.
  522. */
  523. if (atomic_read(&pq->n_reqs))
  524. xchg(&pq->state, SDMA_PKT_Q_ACTIVE);
  525. /*
  526. * This is a somewhat blocking send implementation.
  527. * The driver will block the caller until all packets of the
  528. * request have been submitted to the SDMA engine. However, it
  529. * will not wait for send completions.
  530. */
  531. while (req->seqsubmitted != req->info.npkts) {
  532. ret = user_sdma_send_pkts(req, pcount);
  533. if (ret < 0) {
  534. if (ret != -EBUSY) {
  535. req->status = ret;
  536. WRITE_ONCE(req->has_error, 1);
  537. if (READ_ONCE(req->seqcomp) ==
  538. req->seqsubmitted - 1)
  539. goto free_req;
  540. return ret;
  541. }
  542. wait_event_interruptible_timeout(
  543. pq->busy.wait_dma,
  544. (pq->state == SDMA_PKT_Q_ACTIVE),
  545. msecs_to_jiffies(
  546. SDMA_IOWAIT_TIMEOUT));
  547. }
  548. }
  549. *count += idx;
  550. return 0;
  551. free_req:
  552. user_sdma_free_request(req, true);
  553. if (req_queued)
  554. pq_update(pq);
  555. set_comp_state(pq, cq, info.comp_idx, ERROR, req->status);
  556. return ret;
  557. }
  558. static inline u32 compute_data_length(struct user_sdma_request *req,
  559. struct user_sdma_txreq *tx)
  560. {
  561. /*
  562. * Determine the proper size of the packet data.
  563. * The size of the data of the first packet is in the header
  564. * template. However, it includes the header and ICRC, which need
  565. * to be subtracted.
  566. * The minimum representable packet data length in a header is 4 bytes,
  567. * therefore, when the data length request is less than 4 bytes, there's
  568. * only one packet, and the packet data length is equal to that of the
  569. * request data length.
  570. * The size of the remaining packets is the minimum of the frag
  571. * size (MTU) or remaining data in the request.
  572. */
  573. u32 len;
  574. if (!req->seqnum) {
  575. if (req->data_len < sizeof(u32))
  576. len = req->data_len;
  577. else
  578. len = ((be16_to_cpu(req->hdr.lrh[2]) << 2) -
  579. (sizeof(tx->hdr) - 4));
  580. } else if (req_opcode(req->info.ctrl) == EXPECTED) {
  581. u32 tidlen = EXP_TID_GET(req->tids[req->tididx], LEN) *
  582. PAGE_SIZE;
  583. /*
  584. * Get the data length based on the remaining space in the
  585. * TID pair.
  586. */
  587. len = min(tidlen - req->tidoffset, (u32)req->info.fragsize);
  588. /* If we've filled up the TID pair, move to the next one. */
  589. if (unlikely(!len) && ++req->tididx < req->n_tids &&
  590. req->tids[req->tididx]) {
  591. tidlen = EXP_TID_GET(req->tids[req->tididx],
  592. LEN) * PAGE_SIZE;
  593. req->tidoffset = 0;
  594. len = min_t(u32, tidlen, req->info.fragsize);
  595. }
  596. /*
  597. * Since the TID pairs map entire pages, make sure that we
  598. * are not going to try to send more data that we have
  599. * remaining.
  600. */
  601. len = min(len, req->data_len - req->sent);
  602. } else {
  603. len = min(req->data_len - req->sent, (u32)req->info.fragsize);
  604. }
  605. trace_hfi1_sdma_user_compute_length(req->pq->dd,
  606. req->pq->ctxt,
  607. req->pq->subctxt,
  608. req->info.comp_idx,
  609. len);
  610. return len;
  611. }
  612. static inline u32 pad_len(u32 len)
  613. {
  614. if (len & (sizeof(u32) - 1))
  615. len += sizeof(u32) - (len & (sizeof(u32) - 1));
  616. return len;
  617. }
  618. static inline u32 get_lrh_len(struct hfi1_pkt_header hdr, u32 len)
  619. {
  620. /* (Size of complete header - size of PBC) + 4B ICRC + data length */
  621. return ((sizeof(hdr) - sizeof(hdr.pbc)) + 4 + len);
  622. }
  623. static int user_sdma_txadd_ahg(struct user_sdma_request *req,
  624. struct user_sdma_txreq *tx,
  625. u32 datalen)
  626. {
  627. int ret;
  628. u16 pbclen = le16_to_cpu(req->hdr.pbc[0]);
  629. u32 lrhlen = get_lrh_len(req->hdr, pad_len(datalen));
  630. struct hfi1_user_sdma_pkt_q *pq = req->pq;
  631. /*
  632. * Copy the request header into the tx header
  633. * because the HW needs a cacheline-aligned
  634. * address.
  635. * This copy can be optimized out if the hdr
  636. * member of user_sdma_request were also
  637. * cacheline aligned.
  638. */
  639. memcpy(&tx->hdr, &req->hdr, sizeof(tx->hdr));
  640. if (PBC2LRH(pbclen) != lrhlen) {
  641. pbclen = (pbclen & 0xf000) | LRH2PBC(lrhlen);
  642. tx->hdr.pbc[0] = cpu_to_le16(pbclen);
  643. }
  644. ret = check_header_template(req, &tx->hdr, lrhlen, datalen);
  645. if (ret)
  646. return ret;
  647. ret = sdma_txinit_ahg(&tx->txreq, SDMA_TXREQ_F_AHG_COPY,
  648. sizeof(tx->hdr) + datalen, req->ahg_idx,
  649. 0, NULL, 0, user_sdma_txreq_cb);
  650. if (ret)
  651. return ret;
  652. ret = sdma_txadd_kvaddr(pq->dd, &tx->txreq, &tx->hdr, sizeof(tx->hdr));
  653. if (ret)
  654. sdma_txclean(pq->dd, &tx->txreq);
  655. return ret;
  656. }
  657. static int user_sdma_txadd(struct user_sdma_request *req,
  658. struct user_sdma_txreq *tx,
  659. struct user_sdma_iovec *iovec, u32 datalen,
  660. u32 *queued_ptr, u32 *data_sent_ptr,
  661. u64 *iov_offset_ptr)
  662. {
  663. int ret;
  664. unsigned int pageidx, len;
  665. unsigned long base, offset;
  666. u64 iov_offset = *iov_offset_ptr;
  667. u32 queued = *queued_ptr, data_sent = *data_sent_ptr;
  668. struct hfi1_user_sdma_pkt_q *pq = req->pq;
  669. base = (unsigned long)iovec->iov.iov_base;
  670. offset = offset_in_page(base + iovec->offset + iov_offset);
  671. pageidx = (((iovec->offset + iov_offset + base) - (base & PAGE_MASK)) >>
  672. PAGE_SHIFT);
  673. len = offset + req->info.fragsize > PAGE_SIZE ?
  674. PAGE_SIZE - offset : req->info.fragsize;
  675. len = min((datalen - queued), len);
  676. ret = sdma_txadd_page(pq->dd, &tx->txreq, iovec->pages[pageidx],
  677. offset, len);
  678. if (ret) {
  679. SDMA_DBG(req, "SDMA txreq add page failed %d\n", ret);
  680. return ret;
  681. }
  682. iov_offset += len;
  683. queued += len;
  684. data_sent += len;
  685. if (unlikely(queued < datalen && pageidx == iovec->npages &&
  686. req->iov_idx < req->data_iovs - 1)) {
  687. iovec->offset += iov_offset;
  688. iovec = &req->iovs[++req->iov_idx];
  689. iov_offset = 0;
  690. }
  691. *queued_ptr = queued;
  692. *data_sent_ptr = data_sent;
  693. *iov_offset_ptr = iov_offset;
  694. return ret;
  695. }
  696. static int user_sdma_send_pkts(struct user_sdma_request *req, unsigned maxpkts)
  697. {
  698. int ret = 0, count;
  699. unsigned npkts = 0;
  700. struct user_sdma_txreq *tx = NULL;
  701. struct hfi1_user_sdma_pkt_q *pq = NULL;
  702. struct user_sdma_iovec *iovec = NULL;
  703. if (!req->pq)
  704. return -EINVAL;
  705. pq = req->pq;
  706. /* If tx completion has reported an error, we are done. */
  707. if (READ_ONCE(req->has_error))
  708. return -EFAULT;
  709. /*
  710. * Check if we might have sent the entire request already
  711. */
  712. if (unlikely(req->seqnum == req->info.npkts)) {
  713. if (!list_empty(&req->txps))
  714. goto dosend;
  715. return ret;
  716. }
  717. if (!maxpkts || maxpkts > req->info.npkts - req->seqnum)
  718. maxpkts = req->info.npkts - req->seqnum;
  719. while (npkts < maxpkts) {
  720. u32 datalen = 0, queued = 0, data_sent = 0;
  721. u64 iov_offset = 0;
  722. /*
  723. * Check whether any of the completions have come back
  724. * with errors. If so, we are not going to process any
  725. * more packets from this request.
  726. */
  727. if (READ_ONCE(req->has_error))
  728. return -EFAULT;
  729. tx = kmem_cache_alloc(pq->txreq_cache, GFP_KERNEL);
  730. if (!tx)
  731. return -ENOMEM;
  732. tx->flags = 0;
  733. tx->req = req;
  734. tx->busycount = 0;
  735. INIT_LIST_HEAD(&tx->list);
  736. /*
  737. * For the last packet set the ACK request
  738. * and disable header suppression.
  739. */
  740. if (req->seqnum == req->info.npkts - 1)
  741. tx->flags |= (TXREQ_FLAGS_REQ_ACK |
  742. TXREQ_FLAGS_REQ_DISABLE_SH);
  743. /*
  744. * Calculate the payload size - this is min of the fragment
  745. * (MTU) size or the remaining bytes in the request but only
  746. * if we have payload data.
  747. */
  748. if (req->data_len) {
  749. iovec = &req->iovs[req->iov_idx];
  750. if (READ_ONCE(iovec->offset) == iovec->iov.iov_len) {
  751. if (++req->iov_idx == req->data_iovs) {
  752. ret = -EFAULT;
  753. goto free_txreq;
  754. }
  755. iovec = &req->iovs[req->iov_idx];
  756. WARN_ON(iovec->offset);
  757. }
  758. datalen = compute_data_length(req, tx);
  759. /*
  760. * Disable header suppression for the payload <= 8DWS.
  761. * If there is an uncorrectable error in the receive
  762. * data FIFO when the received payload size is less than
  763. * or equal to 8DWS then the RxDmaDataFifoRdUncErr is
  764. * not reported.There is set RHF.EccErr if the header
  765. * is not suppressed.
  766. */
  767. if (!datalen) {
  768. SDMA_DBG(req,
  769. "Request has data but pkt len is 0");
  770. ret = -EFAULT;
  771. goto free_tx;
  772. } else if (datalen <= 32) {
  773. tx->flags |= TXREQ_FLAGS_REQ_DISABLE_SH;
  774. }
  775. }
  776. if (req->ahg_idx >= 0) {
  777. if (!req->seqnum) {
  778. ret = user_sdma_txadd_ahg(req, tx, datalen);
  779. if (ret)
  780. goto free_tx;
  781. } else {
  782. int changes;
  783. changes = set_txreq_header_ahg(req, tx,
  784. datalen);
  785. if (changes < 0)
  786. goto free_tx;
  787. }
  788. } else {
  789. ret = sdma_txinit(&tx->txreq, 0, sizeof(req->hdr) +
  790. datalen, user_sdma_txreq_cb);
  791. if (ret)
  792. goto free_tx;
  793. /*
  794. * Modify the header for this packet. This only needs
  795. * to be done if we are not going to use AHG. Otherwise,
  796. * the HW will do it based on the changes we gave it
  797. * during sdma_txinit_ahg().
  798. */
  799. ret = set_txreq_header(req, tx, datalen);
  800. if (ret)
  801. goto free_txreq;
  802. }
  803. /*
  804. * If the request contains any data vectors, add up to
  805. * fragsize bytes to the descriptor.
  806. */
  807. while (queued < datalen &&
  808. (req->sent + data_sent) < req->data_len) {
  809. ret = user_sdma_txadd(req, tx, iovec, datalen,
  810. &queued, &data_sent, &iov_offset);
  811. if (ret)
  812. goto free_txreq;
  813. }
  814. /*
  815. * The txreq was submitted successfully so we can update
  816. * the counters.
  817. */
  818. req->koffset += datalen;
  819. if (req_opcode(req->info.ctrl) == EXPECTED)
  820. req->tidoffset += datalen;
  821. req->sent += data_sent;
  822. if (req->data_len)
  823. iovec->offset += iov_offset;
  824. list_add_tail(&tx->txreq.list, &req->txps);
  825. /*
  826. * It is important to increment this here as it is used to
  827. * generate the BTH.PSN and, therefore, can't be bulk-updated
  828. * outside of the loop.
  829. */
  830. tx->seqnum = req->seqnum++;
  831. npkts++;
  832. }
  833. dosend:
  834. ret = sdma_send_txlist(req->sde, &pq->busy, &req->txps, &count);
  835. req->seqsubmitted += count;
  836. if (req->seqsubmitted == req->info.npkts) {
  837. WRITE_ONCE(req->done, 1);
  838. /*
  839. * The txreq has already been submitted to the HW queue
  840. * so we can free the AHG entry now. Corruption will not
  841. * happen due to the sequential manner in which
  842. * descriptors are processed.
  843. */
  844. if (req->ahg_idx >= 0)
  845. sdma_ahg_free(req->sde, req->ahg_idx);
  846. }
  847. return ret;
  848. free_txreq:
  849. sdma_txclean(pq->dd, &tx->txreq);
  850. free_tx:
  851. kmem_cache_free(pq->txreq_cache, tx);
  852. return ret;
  853. }
  854. static u32 sdma_cache_evict(struct hfi1_user_sdma_pkt_q *pq, u32 npages)
  855. {
  856. struct evict_data evict_data;
  857. evict_data.cleared = 0;
  858. evict_data.target = npages;
  859. hfi1_mmu_rb_evict(pq->handler, &evict_data);
  860. return evict_data.cleared;
  861. }
  862. static int pin_sdma_pages(struct user_sdma_request *req,
  863. struct user_sdma_iovec *iovec,
  864. struct sdma_mmu_node *node,
  865. int npages)
  866. {
  867. int pinned, cleared;
  868. struct page **pages;
  869. struct hfi1_user_sdma_pkt_q *pq = req->pq;
  870. pages = kcalloc(npages, sizeof(*pages), GFP_KERNEL);
  871. if (!pages)
  872. return -ENOMEM;
  873. memcpy(pages, node->pages, node->npages * sizeof(*pages));
  874. npages -= node->npages;
  875. retry:
  876. if (!hfi1_can_pin_pages(pq->dd, pq->mm,
  877. atomic_read(&pq->n_locked), npages)) {
  878. cleared = sdma_cache_evict(pq, npages);
  879. if (cleared >= npages)
  880. goto retry;
  881. }
  882. pinned = hfi1_acquire_user_pages(pq->mm,
  883. ((unsigned long)iovec->iov.iov_base +
  884. (node->npages * PAGE_SIZE)), npages, 0,
  885. pages + node->npages);
  886. if (pinned < 0) {
  887. kfree(pages);
  888. return pinned;
  889. }
  890. if (pinned != npages) {
  891. unpin_vector_pages(pq->mm, pages, node->npages, pinned);
  892. return -EFAULT;
  893. }
  894. kfree(node->pages);
  895. node->rb.len = iovec->iov.iov_len;
  896. node->pages = pages;
  897. atomic_add(pinned, &pq->n_locked);
  898. return pinned;
  899. }
  900. static void unpin_sdma_pages(struct sdma_mmu_node *node)
  901. {
  902. if (node->npages) {
  903. unpin_vector_pages(node->pq->mm, node->pages, 0, node->npages);
  904. atomic_sub(node->npages, &node->pq->n_locked);
  905. }
  906. }
  907. static int pin_vector_pages(struct user_sdma_request *req,
  908. struct user_sdma_iovec *iovec)
  909. {
  910. int ret = 0, pinned, npages;
  911. struct hfi1_user_sdma_pkt_q *pq = req->pq;
  912. struct sdma_mmu_node *node = NULL;
  913. struct mmu_rb_node *rb_node;
  914. struct iovec *iov;
  915. bool extracted;
  916. extracted =
  917. hfi1_mmu_rb_remove_unless_exact(pq->handler,
  918. (unsigned long)
  919. iovec->iov.iov_base,
  920. iovec->iov.iov_len, &rb_node);
  921. if (rb_node) {
  922. node = container_of(rb_node, struct sdma_mmu_node, rb);
  923. if (!extracted) {
  924. atomic_inc(&node->refcount);
  925. iovec->pages = node->pages;
  926. iovec->npages = node->npages;
  927. iovec->node = node;
  928. return 0;
  929. }
  930. }
  931. if (!node) {
  932. node = kzalloc(sizeof(*node), GFP_KERNEL);
  933. if (!node)
  934. return -ENOMEM;
  935. node->rb.addr = (unsigned long)iovec->iov.iov_base;
  936. node->pq = pq;
  937. atomic_set(&node->refcount, 0);
  938. }
  939. iov = &iovec->iov;
  940. npages = num_user_pages((unsigned long)iov->iov_base, iov->iov_len);
  941. if (node->npages < npages) {
  942. pinned = pin_sdma_pages(req, iovec, node, npages);
  943. if (pinned < 0) {
  944. ret = pinned;
  945. goto bail;
  946. }
  947. node->npages += pinned;
  948. npages = node->npages;
  949. }
  950. iovec->pages = node->pages;
  951. iovec->npages = npages;
  952. iovec->node = node;
  953. ret = hfi1_mmu_rb_insert(req->pq->handler, &node->rb);
  954. if (ret) {
  955. iovec->node = NULL;
  956. goto bail;
  957. }
  958. return 0;
  959. bail:
  960. unpin_sdma_pages(node);
  961. kfree(node);
  962. return ret;
  963. }
  964. static void unpin_vector_pages(struct mm_struct *mm, struct page **pages,
  965. unsigned start, unsigned npages)
  966. {
  967. hfi1_release_user_pages(mm, pages + start, npages, false);
  968. kfree(pages);
  969. }
  970. static int check_header_template(struct user_sdma_request *req,
  971. struct hfi1_pkt_header *hdr, u32 lrhlen,
  972. u32 datalen)
  973. {
  974. /*
  975. * Perform safety checks for any type of packet:
  976. * - transfer size is multiple of 64bytes
  977. * - packet length is multiple of 4 bytes
  978. * - packet length is not larger than MTU size
  979. *
  980. * These checks are only done for the first packet of the
  981. * transfer since the header is "given" to us by user space.
  982. * For the remainder of the packets we compute the values.
  983. */
  984. if (req->info.fragsize % PIO_BLOCK_SIZE || lrhlen & 0x3 ||
  985. lrhlen > get_lrh_len(*hdr, req->info.fragsize))
  986. return -EINVAL;
  987. if (req_opcode(req->info.ctrl) == EXPECTED) {
  988. /*
  989. * The header is checked only on the first packet. Furthermore,
  990. * we ensure that at least one TID entry is copied when the
  991. * request is submitted. Therefore, we don't have to verify that
  992. * tididx points to something sane.
  993. */
  994. u32 tidval = req->tids[req->tididx],
  995. tidlen = EXP_TID_GET(tidval, LEN) * PAGE_SIZE,
  996. tididx = EXP_TID_GET(tidval, IDX),
  997. tidctrl = EXP_TID_GET(tidval, CTRL),
  998. tidoff;
  999. __le32 kval = hdr->kdeth.ver_tid_offset;
  1000. tidoff = KDETH_GET(kval, OFFSET) *
  1001. (KDETH_GET(req->hdr.kdeth.ver_tid_offset, OM) ?
  1002. KDETH_OM_LARGE : KDETH_OM_SMALL);
  1003. /*
  1004. * Expected receive packets have the following
  1005. * additional checks:
  1006. * - offset is not larger than the TID size
  1007. * - TIDCtrl values match between header and TID array
  1008. * - TID indexes match between header and TID array
  1009. */
  1010. if ((tidoff + datalen > tidlen) ||
  1011. KDETH_GET(kval, TIDCTRL) != tidctrl ||
  1012. KDETH_GET(kval, TID) != tididx)
  1013. return -EINVAL;
  1014. }
  1015. return 0;
  1016. }
  1017. /*
  1018. * Correctly set the BTH.PSN field based on type of
  1019. * transfer - eager packets can just increment the PSN but
  1020. * expected packets encode generation and sequence in the
  1021. * BTH.PSN field so just incrementing will result in errors.
  1022. */
  1023. static inline u32 set_pkt_bth_psn(__be32 bthpsn, u8 expct, u32 frags)
  1024. {
  1025. u32 val = be32_to_cpu(bthpsn),
  1026. mask = (HFI1_CAP_IS_KSET(EXTENDED_PSN) ? 0x7fffffffull :
  1027. 0xffffffull),
  1028. psn = val & mask;
  1029. if (expct)
  1030. psn = (psn & ~BTH_SEQ_MASK) | ((psn + frags) & BTH_SEQ_MASK);
  1031. else
  1032. psn = psn + frags;
  1033. return psn & mask;
  1034. }
  1035. static int set_txreq_header(struct user_sdma_request *req,
  1036. struct user_sdma_txreq *tx, u32 datalen)
  1037. {
  1038. struct hfi1_user_sdma_pkt_q *pq = req->pq;
  1039. struct hfi1_pkt_header *hdr = &tx->hdr;
  1040. u8 omfactor; /* KDETH.OM */
  1041. u16 pbclen;
  1042. int ret;
  1043. u32 tidval = 0, lrhlen = get_lrh_len(*hdr, pad_len(datalen));
  1044. /* Copy the header template to the request before modification */
  1045. memcpy(hdr, &req->hdr, sizeof(*hdr));
  1046. /*
  1047. * Check if the PBC and LRH length are mismatched. If so
  1048. * adjust both in the header.
  1049. */
  1050. pbclen = le16_to_cpu(hdr->pbc[0]);
  1051. if (PBC2LRH(pbclen) != lrhlen) {
  1052. pbclen = (pbclen & 0xf000) | LRH2PBC(lrhlen);
  1053. hdr->pbc[0] = cpu_to_le16(pbclen);
  1054. hdr->lrh[2] = cpu_to_be16(lrhlen >> 2);
  1055. /*
  1056. * Third packet
  1057. * This is the first packet in the sequence that has
  1058. * a "static" size that can be used for the rest of
  1059. * the packets (besides the last one).
  1060. */
  1061. if (unlikely(req->seqnum == 2)) {
  1062. /*
  1063. * From this point on the lengths in both the
  1064. * PBC and LRH are the same until the last
  1065. * packet.
  1066. * Adjust the template so we don't have to update
  1067. * every packet
  1068. */
  1069. req->hdr.pbc[0] = hdr->pbc[0];
  1070. req->hdr.lrh[2] = hdr->lrh[2];
  1071. }
  1072. }
  1073. /*
  1074. * We only have to modify the header if this is not the
  1075. * first packet in the request. Otherwise, we use the
  1076. * header given to us.
  1077. */
  1078. if (unlikely(!req->seqnum)) {
  1079. ret = check_header_template(req, hdr, lrhlen, datalen);
  1080. if (ret)
  1081. return ret;
  1082. goto done;
  1083. }
  1084. hdr->bth[2] = cpu_to_be32(
  1085. set_pkt_bth_psn(hdr->bth[2],
  1086. (req_opcode(req->info.ctrl) == EXPECTED),
  1087. req->seqnum));
  1088. /* Set ACK request on last packet */
  1089. if (unlikely(tx->flags & TXREQ_FLAGS_REQ_ACK))
  1090. hdr->bth[2] |= cpu_to_be32(1UL << 31);
  1091. /* Set the new offset */
  1092. hdr->kdeth.swdata[6] = cpu_to_le32(req->koffset);
  1093. /* Expected packets have to fill in the new TID information */
  1094. if (req_opcode(req->info.ctrl) == EXPECTED) {
  1095. tidval = req->tids[req->tididx];
  1096. /*
  1097. * If the offset puts us at the end of the current TID,
  1098. * advance everything.
  1099. */
  1100. if ((req->tidoffset) == (EXP_TID_GET(tidval, LEN) *
  1101. PAGE_SIZE)) {
  1102. req->tidoffset = 0;
  1103. /*
  1104. * Since we don't copy all the TIDs, all at once,
  1105. * we have to check again.
  1106. */
  1107. if (++req->tididx > req->n_tids - 1 ||
  1108. !req->tids[req->tididx]) {
  1109. return -EINVAL;
  1110. }
  1111. tidval = req->tids[req->tididx];
  1112. }
  1113. omfactor = EXP_TID_GET(tidval, LEN) * PAGE_SIZE >=
  1114. KDETH_OM_MAX_SIZE ? KDETH_OM_LARGE_SHIFT :
  1115. KDETH_OM_SMALL_SHIFT;
  1116. /* Set KDETH.TIDCtrl based on value for this TID. */
  1117. KDETH_SET(hdr->kdeth.ver_tid_offset, TIDCTRL,
  1118. EXP_TID_GET(tidval, CTRL));
  1119. /* Set KDETH.TID based on value for this TID */
  1120. KDETH_SET(hdr->kdeth.ver_tid_offset, TID,
  1121. EXP_TID_GET(tidval, IDX));
  1122. /* Clear KDETH.SH when DISABLE_SH flag is set */
  1123. if (unlikely(tx->flags & TXREQ_FLAGS_REQ_DISABLE_SH))
  1124. KDETH_SET(hdr->kdeth.ver_tid_offset, SH, 0);
  1125. /*
  1126. * Set the KDETH.OFFSET and KDETH.OM based on size of
  1127. * transfer.
  1128. */
  1129. trace_hfi1_sdma_user_tid_info(
  1130. pq->dd, pq->ctxt, pq->subctxt, req->info.comp_idx,
  1131. req->tidoffset, req->tidoffset >> omfactor,
  1132. omfactor != KDETH_OM_SMALL_SHIFT);
  1133. KDETH_SET(hdr->kdeth.ver_tid_offset, OFFSET,
  1134. req->tidoffset >> omfactor);
  1135. KDETH_SET(hdr->kdeth.ver_tid_offset, OM,
  1136. omfactor != KDETH_OM_SMALL_SHIFT);
  1137. }
  1138. done:
  1139. trace_hfi1_sdma_user_header(pq->dd, pq->ctxt, pq->subctxt,
  1140. req->info.comp_idx, hdr, tidval);
  1141. return sdma_txadd_kvaddr(pq->dd, &tx->txreq, hdr, sizeof(*hdr));
  1142. }
  1143. static int set_txreq_header_ahg(struct user_sdma_request *req,
  1144. struct user_sdma_txreq *tx, u32 datalen)
  1145. {
  1146. u32 ahg[AHG_KDETH_ARRAY_SIZE];
  1147. int idx = 0;
  1148. u8 omfactor; /* KDETH.OM */
  1149. struct hfi1_user_sdma_pkt_q *pq = req->pq;
  1150. struct hfi1_pkt_header *hdr = &req->hdr;
  1151. u16 pbclen = le16_to_cpu(hdr->pbc[0]);
  1152. u32 val32, tidval = 0, lrhlen = get_lrh_len(*hdr, pad_len(datalen));
  1153. size_t array_size = ARRAY_SIZE(ahg);
  1154. if (PBC2LRH(pbclen) != lrhlen) {
  1155. /* PBC.PbcLengthDWs */
  1156. idx = ahg_header_set(ahg, idx, array_size, 0, 0, 12,
  1157. (__force u16)cpu_to_le16(LRH2PBC(lrhlen)));
  1158. if (idx < 0)
  1159. return idx;
  1160. /* LRH.PktLen (we need the full 16 bits due to byte swap) */
  1161. idx = ahg_header_set(ahg, idx, array_size, 3, 0, 16,
  1162. (__force u16)cpu_to_be16(lrhlen >> 2));
  1163. if (idx < 0)
  1164. return idx;
  1165. }
  1166. /*
  1167. * Do the common updates
  1168. */
  1169. /* BTH.PSN and BTH.A */
  1170. val32 = (be32_to_cpu(hdr->bth[2]) + req->seqnum) &
  1171. (HFI1_CAP_IS_KSET(EXTENDED_PSN) ? 0x7fffffff : 0xffffff);
  1172. if (unlikely(tx->flags & TXREQ_FLAGS_REQ_ACK))
  1173. val32 |= 1UL << 31;
  1174. idx = ahg_header_set(ahg, idx, array_size, 6, 0, 16,
  1175. (__force u16)cpu_to_be16(val32 >> 16));
  1176. if (idx < 0)
  1177. return idx;
  1178. idx = ahg_header_set(ahg, idx, array_size, 6, 16, 16,
  1179. (__force u16)cpu_to_be16(val32 & 0xffff));
  1180. if (idx < 0)
  1181. return idx;
  1182. /* KDETH.Offset */
  1183. idx = ahg_header_set(ahg, idx, array_size, 15, 0, 16,
  1184. (__force u16)cpu_to_le16(req->koffset & 0xffff));
  1185. if (idx < 0)
  1186. return idx;
  1187. idx = ahg_header_set(ahg, idx, array_size, 15, 16, 16,
  1188. (__force u16)cpu_to_le16(req->koffset >> 16));
  1189. if (idx < 0)
  1190. return idx;
  1191. if (req_opcode(req->info.ctrl) == EXPECTED) {
  1192. __le16 val;
  1193. tidval = req->tids[req->tididx];
  1194. /*
  1195. * If the offset puts us at the end of the current TID,
  1196. * advance everything.
  1197. */
  1198. if ((req->tidoffset) == (EXP_TID_GET(tidval, LEN) *
  1199. PAGE_SIZE)) {
  1200. req->tidoffset = 0;
  1201. /*
  1202. * Since we don't copy all the TIDs, all at once,
  1203. * we have to check again.
  1204. */
  1205. if (++req->tididx > req->n_tids - 1 ||
  1206. !req->tids[req->tididx])
  1207. return -EINVAL;
  1208. tidval = req->tids[req->tididx];
  1209. }
  1210. omfactor = ((EXP_TID_GET(tidval, LEN) *
  1211. PAGE_SIZE) >=
  1212. KDETH_OM_MAX_SIZE) ? KDETH_OM_LARGE_SHIFT :
  1213. KDETH_OM_SMALL_SHIFT;
  1214. /* KDETH.OM and KDETH.OFFSET (TID) */
  1215. idx = ahg_header_set(
  1216. ahg, idx, array_size, 7, 0, 16,
  1217. ((!!(omfactor - KDETH_OM_SMALL_SHIFT)) << 15 |
  1218. ((req->tidoffset >> omfactor)
  1219. & 0x7fff)));
  1220. if (idx < 0)
  1221. return idx;
  1222. /* KDETH.TIDCtrl, KDETH.TID, KDETH.Intr, KDETH.SH */
  1223. val = cpu_to_le16(((EXP_TID_GET(tidval, CTRL) & 0x3) << 10) |
  1224. (EXP_TID_GET(tidval, IDX) & 0x3ff));
  1225. if (unlikely(tx->flags & TXREQ_FLAGS_REQ_DISABLE_SH)) {
  1226. val |= cpu_to_le16((KDETH_GET(hdr->kdeth.ver_tid_offset,
  1227. INTR) <<
  1228. AHG_KDETH_INTR_SHIFT));
  1229. } else {
  1230. val |= KDETH_GET(hdr->kdeth.ver_tid_offset, SH) ?
  1231. cpu_to_le16(0x1 << AHG_KDETH_SH_SHIFT) :
  1232. cpu_to_le16((KDETH_GET(hdr->kdeth.ver_tid_offset,
  1233. INTR) <<
  1234. AHG_KDETH_INTR_SHIFT));
  1235. }
  1236. idx = ahg_header_set(ahg, idx, array_size,
  1237. 7, 16, 14, (__force u16)val);
  1238. if (idx < 0)
  1239. return idx;
  1240. }
  1241. trace_hfi1_sdma_user_header_ahg(pq->dd, pq->ctxt, pq->subctxt,
  1242. req->info.comp_idx, req->sde->this_idx,
  1243. req->ahg_idx, ahg, idx, tidval);
  1244. sdma_txinit_ahg(&tx->txreq,
  1245. SDMA_TXREQ_F_USE_AHG,
  1246. datalen, req->ahg_idx, idx,
  1247. ahg, sizeof(req->hdr),
  1248. user_sdma_txreq_cb);
  1249. return idx;
  1250. }
  1251. /*
  1252. * SDMA tx request completion callback. Called when the SDMA progress
  1253. * state machine gets notification that the SDMA descriptors for this
  1254. * tx request have been processed by the DMA engine. Called in
  1255. * interrupt context.
  1256. */
  1257. static void user_sdma_txreq_cb(struct sdma_txreq *txreq, int status)
  1258. {
  1259. struct user_sdma_txreq *tx =
  1260. container_of(txreq, struct user_sdma_txreq, txreq);
  1261. struct user_sdma_request *req;
  1262. struct hfi1_user_sdma_pkt_q *pq;
  1263. struct hfi1_user_sdma_comp_q *cq;
  1264. u16 idx;
  1265. if (!tx->req)
  1266. return;
  1267. req = tx->req;
  1268. pq = req->pq;
  1269. cq = req->cq;
  1270. if (status != SDMA_TXREQ_S_OK) {
  1271. SDMA_DBG(req, "SDMA completion with error %d",
  1272. status);
  1273. WRITE_ONCE(req->has_error, 1);
  1274. }
  1275. req->seqcomp = tx->seqnum;
  1276. kmem_cache_free(pq->txreq_cache, tx);
  1277. tx = NULL;
  1278. idx = req->info.comp_idx;
  1279. if (req->status == -1 && status == SDMA_TXREQ_S_OK) {
  1280. if (req->seqcomp == req->info.npkts - 1) {
  1281. req->status = 0;
  1282. user_sdma_free_request(req, false);
  1283. pq_update(pq);
  1284. set_comp_state(pq, cq, idx, COMPLETE, 0);
  1285. }
  1286. } else {
  1287. if (status != SDMA_TXREQ_S_OK)
  1288. req->status = status;
  1289. if (req->seqcomp == (READ_ONCE(req->seqsubmitted) - 1) &&
  1290. (READ_ONCE(req->done) ||
  1291. READ_ONCE(req->has_error))) {
  1292. user_sdma_free_request(req, false);
  1293. pq_update(pq);
  1294. set_comp_state(pq, cq, idx, ERROR, req->status);
  1295. }
  1296. }
  1297. }
  1298. static inline void pq_update(struct hfi1_user_sdma_pkt_q *pq)
  1299. {
  1300. if (atomic_dec_and_test(&pq->n_reqs)) {
  1301. xchg(&pq->state, SDMA_PKT_Q_INACTIVE);
  1302. wake_up(&pq->wait);
  1303. }
  1304. }
  1305. static void user_sdma_free_request(struct user_sdma_request *req, bool unpin)
  1306. {
  1307. int i;
  1308. if (!list_empty(&req->txps)) {
  1309. struct sdma_txreq *t, *p;
  1310. list_for_each_entry_safe(t, p, &req->txps, list) {
  1311. struct user_sdma_txreq *tx =
  1312. container_of(t, struct user_sdma_txreq, txreq);
  1313. list_del_init(&t->list);
  1314. sdma_txclean(req->pq->dd, t);
  1315. kmem_cache_free(req->pq->txreq_cache, tx);
  1316. }
  1317. }
  1318. for (i = 0; i < req->data_iovs; i++) {
  1319. struct sdma_mmu_node *node = req->iovs[i].node;
  1320. if (!node)
  1321. continue;
  1322. if (unpin)
  1323. hfi1_mmu_rb_remove(req->pq->handler,
  1324. &node->rb);
  1325. else
  1326. atomic_dec(&node->refcount);
  1327. }
  1328. kfree(req->tids);
  1329. clear_bit(req->info.comp_idx, req->pq->req_in_use);
  1330. }
  1331. static inline void set_comp_state(struct hfi1_user_sdma_pkt_q *pq,
  1332. struct hfi1_user_sdma_comp_q *cq,
  1333. u16 idx, enum hfi1_sdma_comp_state state,
  1334. int ret)
  1335. {
  1336. if (state == ERROR)
  1337. cq->comps[idx].errcode = -ret;
  1338. smp_wmb(); /* make sure errcode is visible first */
  1339. cq->comps[idx].status = state;
  1340. trace_hfi1_sdma_user_completion(pq->dd, pq->ctxt, pq->subctxt,
  1341. idx, state, ret);
  1342. }
  1343. static bool sdma_rb_filter(struct mmu_rb_node *node, unsigned long addr,
  1344. unsigned long len)
  1345. {
  1346. return (bool)(node->addr == addr);
  1347. }
  1348. static int sdma_rb_insert(void *arg, struct mmu_rb_node *mnode)
  1349. {
  1350. struct sdma_mmu_node *node =
  1351. container_of(mnode, struct sdma_mmu_node, rb);
  1352. atomic_inc(&node->refcount);
  1353. return 0;
  1354. }
  1355. /*
  1356. * Return 1 to remove the node from the rb tree and call the remove op.
  1357. *
  1358. * Called with the rb tree lock held.
  1359. */
  1360. static int sdma_rb_evict(void *arg, struct mmu_rb_node *mnode,
  1361. void *evict_arg, bool *stop)
  1362. {
  1363. struct sdma_mmu_node *node =
  1364. container_of(mnode, struct sdma_mmu_node, rb);
  1365. struct evict_data *evict_data = evict_arg;
  1366. /* is this node still being used? */
  1367. if (atomic_read(&node->refcount))
  1368. return 0; /* keep this node */
  1369. /* this node will be evicted, add its pages to our count */
  1370. evict_data->cleared += node->npages;
  1371. /* have enough pages been cleared? */
  1372. if (evict_data->cleared >= evict_data->target)
  1373. *stop = true;
  1374. return 1; /* remove this node */
  1375. }
  1376. static void sdma_rb_remove(void *arg, struct mmu_rb_node *mnode)
  1377. {
  1378. struct sdma_mmu_node *node =
  1379. container_of(mnode, struct sdma_mmu_node, rb);
  1380. unpin_sdma_pages(node);
  1381. kfree(node);
  1382. }
  1383. static int sdma_rb_invalidate(void *arg, struct mmu_rb_node *mnode)
  1384. {
  1385. struct sdma_mmu_node *node =
  1386. container_of(mnode, struct sdma_mmu_node, rb);
  1387. if (!atomic_read(&node->refcount))
  1388. return 1;
  1389. return 0;
  1390. }