rc.c 67 KB

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  1. /*
  2. * Copyright(c) 2015, 2016 Intel Corporation.
  3. *
  4. * This file is provided under a dual BSD/GPLv2 license. When using or
  5. * redistributing this file, you may do so under either license.
  6. *
  7. * GPL LICENSE SUMMARY
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of version 2 of the GNU General Public License as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * BSD LICENSE
  19. *
  20. * Redistribution and use in source and binary forms, with or without
  21. * modification, are permitted provided that the following conditions
  22. * are met:
  23. *
  24. * - Redistributions of source code must retain the above copyright
  25. * notice, this list of conditions and the following disclaimer.
  26. * - Redistributions in binary form must reproduce the above copyright
  27. * notice, this list of conditions and the following disclaimer in
  28. * the documentation and/or other materials provided with the
  29. * distribution.
  30. * - Neither the name of Intel Corporation nor the names of its
  31. * contributors may be used to endorse or promote products derived
  32. * from this software without specific prior written permission.
  33. *
  34. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  35. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  36. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  37. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  38. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  39. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  40. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  41. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  42. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  43. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  44. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  45. *
  46. */
  47. #include <linux/io.h>
  48. #include <rdma/rdma_vt.h>
  49. #include <rdma/rdmavt_qp.h>
  50. #include "hfi.h"
  51. #include "qp.h"
  52. #include "verbs_txreq.h"
  53. #include "trace.h"
  54. /* cut down ridiculously long IB macro names */
  55. #define OP(x) RC_OP(x)
  56. static u32 restart_sge(struct rvt_sge_state *ss, struct rvt_swqe *wqe,
  57. u32 psn, u32 pmtu)
  58. {
  59. u32 len;
  60. len = delta_psn(psn, wqe->psn) * pmtu;
  61. ss->sge = wqe->sg_list[0];
  62. ss->sg_list = wqe->sg_list + 1;
  63. ss->num_sge = wqe->wr.num_sge;
  64. ss->total_len = wqe->length;
  65. rvt_skip_sge(ss, len, false);
  66. return wqe->length - len;
  67. }
  68. /**
  69. * make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
  70. * @dev: the device for this QP
  71. * @qp: a pointer to the QP
  72. * @ohdr: a pointer to the IB header being constructed
  73. * @ps: the xmit packet state
  74. *
  75. * Return 1 if constructed; otherwise, return 0.
  76. * Note that we are in the responder's side of the QP context.
  77. * Note the QP s_lock must be held.
  78. */
  79. static int make_rc_ack(struct hfi1_ibdev *dev, struct rvt_qp *qp,
  80. struct ib_other_headers *ohdr,
  81. struct hfi1_pkt_state *ps)
  82. {
  83. struct rvt_ack_entry *e;
  84. u32 hwords;
  85. u32 len;
  86. u32 bth0;
  87. u32 bth2;
  88. int middle = 0;
  89. u32 pmtu = qp->pmtu;
  90. struct hfi1_qp_priv *priv = qp->priv;
  91. lockdep_assert_held(&qp->s_lock);
  92. /* Don't send an ACK if we aren't supposed to. */
  93. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
  94. goto bail;
  95. if (priv->hdr_type == HFI1_PKT_TYPE_9B)
  96. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  97. hwords = 5;
  98. else
  99. /* header size in 32-bit words 16B LRH+BTH = (16+12)/4. */
  100. hwords = 7;
  101. switch (qp->s_ack_state) {
  102. case OP(RDMA_READ_RESPONSE_LAST):
  103. case OP(RDMA_READ_RESPONSE_ONLY):
  104. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  105. if (e->rdma_sge.mr) {
  106. rvt_put_mr(e->rdma_sge.mr);
  107. e->rdma_sge.mr = NULL;
  108. }
  109. /* FALLTHROUGH */
  110. case OP(ATOMIC_ACKNOWLEDGE):
  111. /*
  112. * We can increment the tail pointer now that the last
  113. * response has been sent instead of only being
  114. * constructed.
  115. */
  116. if (++qp->s_tail_ack_queue > HFI1_MAX_RDMA_ATOMIC)
  117. qp->s_tail_ack_queue = 0;
  118. /* FALLTHROUGH */
  119. case OP(SEND_ONLY):
  120. case OP(ACKNOWLEDGE):
  121. /* Check for no next entry in the queue. */
  122. if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
  123. if (qp->s_flags & RVT_S_ACK_PENDING)
  124. goto normal;
  125. goto bail;
  126. }
  127. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  128. if (e->opcode == OP(RDMA_READ_REQUEST)) {
  129. /*
  130. * If a RDMA read response is being resent and
  131. * we haven't seen the duplicate request yet,
  132. * then stop sending the remaining responses the
  133. * responder has seen until the requester re-sends it.
  134. */
  135. len = e->rdma_sge.sge_length;
  136. if (len && !e->rdma_sge.mr) {
  137. qp->s_tail_ack_queue = qp->r_head_ack_queue;
  138. goto bail;
  139. }
  140. /* Copy SGE state in case we need to resend */
  141. ps->s_txreq->mr = e->rdma_sge.mr;
  142. if (ps->s_txreq->mr)
  143. rvt_get_mr(ps->s_txreq->mr);
  144. qp->s_ack_rdma_sge.sge = e->rdma_sge;
  145. qp->s_ack_rdma_sge.num_sge = 1;
  146. ps->s_txreq->ss = &qp->s_ack_rdma_sge;
  147. if (len > pmtu) {
  148. len = pmtu;
  149. qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
  150. } else {
  151. qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
  152. e->sent = 1;
  153. }
  154. ohdr->u.aeth = rvt_compute_aeth(qp);
  155. hwords++;
  156. qp->s_ack_rdma_psn = e->psn;
  157. bth2 = mask_psn(qp->s_ack_rdma_psn++);
  158. } else {
  159. /* COMPARE_SWAP or FETCH_ADD */
  160. ps->s_txreq->ss = NULL;
  161. len = 0;
  162. qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
  163. ohdr->u.at.aeth = rvt_compute_aeth(qp);
  164. ib_u64_put(e->atomic_data, &ohdr->u.at.atomic_ack_eth);
  165. hwords += sizeof(ohdr->u.at) / sizeof(u32);
  166. bth2 = mask_psn(e->psn);
  167. e->sent = 1;
  168. }
  169. bth0 = qp->s_ack_state << 24;
  170. break;
  171. case OP(RDMA_READ_RESPONSE_FIRST):
  172. qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  173. /* FALLTHROUGH */
  174. case OP(RDMA_READ_RESPONSE_MIDDLE):
  175. ps->s_txreq->ss = &qp->s_ack_rdma_sge;
  176. ps->s_txreq->mr = qp->s_ack_rdma_sge.sge.mr;
  177. if (ps->s_txreq->mr)
  178. rvt_get_mr(ps->s_txreq->mr);
  179. len = qp->s_ack_rdma_sge.sge.sge_length;
  180. if (len > pmtu) {
  181. len = pmtu;
  182. middle = HFI1_CAP_IS_KSET(SDMA_AHG);
  183. } else {
  184. ohdr->u.aeth = rvt_compute_aeth(qp);
  185. hwords++;
  186. qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
  187. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  188. e->sent = 1;
  189. }
  190. bth0 = qp->s_ack_state << 24;
  191. bth2 = mask_psn(qp->s_ack_rdma_psn++);
  192. break;
  193. default:
  194. normal:
  195. /*
  196. * Send a regular ACK.
  197. * Set the s_ack_state so we wait until after sending
  198. * the ACK before setting s_ack_state to ACKNOWLEDGE
  199. * (see above).
  200. */
  201. qp->s_ack_state = OP(SEND_ONLY);
  202. qp->s_flags &= ~RVT_S_ACK_PENDING;
  203. ps->s_txreq->ss = NULL;
  204. if (qp->s_nak_state)
  205. ohdr->u.aeth =
  206. cpu_to_be32((qp->r_msn & IB_MSN_MASK) |
  207. (qp->s_nak_state <<
  208. IB_AETH_CREDIT_SHIFT));
  209. else
  210. ohdr->u.aeth = rvt_compute_aeth(qp);
  211. hwords++;
  212. len = 0;
  213. bth0 = OP(ACKNOWLEDGE) << 24;
  214. bth2 = mask_psn(qp->s_ack_psn);
  215. }
  216. qp->s_rdma_ack_cnt++;
  217. qp->s_hdrwords = hwords;
  218. ps->s_txreq->sde = priv->s_sde;
  219. ps->s_txreq->s_cur_size = len;
  220. hfi1_make_ruc_header(qp, ohdr, bth0, bth2, middle, ps);
  221. /* pbc */
  222. ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2;
  223. return 1;
  224. bail:
  225. qp->s_ack_state = OP(ACKNOWLEDGE);
  226. /*
  227. * Ensure s_rdma_ack_cnt changes are committed prior to resetting
  228. * RVT_S_RESP_PENDING
  229. */
  230. smp_wmb();
  231. qp->s_flags &= ~(RVT_S_RESP_PENDING
  232. | RVT_S_ACK_PENDING
  233. | RVT_S_AHG_VALID);
  234. return 0;
  235. }
  236. /**
  237. * hfi1_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
  238. * @qp: a pointer to the QP
  239. *
  240. * Assumes s_lock is held.
  241. *
  242. * Return 1 if constructed; otherwise, return 0.
  243. */
  244. int hfi1_make_rc_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps)
  245. {
  246. struct hfi1_qp_priv *priv = qp->priv;
  247. struct hfi1_ibdev *dev = to_idev(qp->ibqp.device);
  248. struct ib_other_headers *ohdr;
  249. struct rvt_sge_state *ss;
  250. struct rvt_swqe *wqe;
  251. u32 hwords;
  252. u32 len;
  253. u32 bth0 = 0;
  254. u32 bth2;
  255. u32 pmtu = qp->pmtu;
  256. char newreq;
  257. int middle = 0;
  258. int delta;
  259. lockdep_assert_held(&qp->s_lock);
  260. ps->s_txreq = get_txreq(ps->dev, qp);
  261. if (IS_ERR(ps->s_txreq))
  262. goto bail_no_tx;
  263. if (priv->hdr_type == HFI1_PKT_TYPE_9B) {
  264. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  265. hwords = 5;
  266. if (rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH)
  267. ohdr = &ps->s_txreq->phdr.hdr.ibh.u.l.oth;
  268. else
  269. ohdr = &ps->s_txreq->phdr.hdr.ibh.u.oth;
  270. } else {
  271. /* header size in 32-bit words 16B LRH+BTH = (16+12)/4. */
  272. hwords = 7;
  273. if ((rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH) &&
  274. (hfi1_check_mcast(rdma_ah_get_dlid(&qp->remote_ah_attr))))
  275. ohdr = &ps->s_txreq->phdr.hdr.opah.u.l.oth;
  276. else
  277. ohdr = &ps->s_txreq->phdr.hdr.opah.u.oth;
  278. }
  279. /* Sending responses has higher priority over sending requests. */
  280. if ((qp->s_flags & RVT_S_RESP_PENDING) &&
  281. make_rc_ack(dev, qp, ohdr, ps))
  282. return 1;
  283. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_SEND_OK)) {
  284. if (!(ib_rvt_state_ops[qp->state] & RVT_FLUSH_SEND))
  285. goto bail;
  286. /* We are in the error state, flush the work request. */
  287. smp_read_barrier_depends(); /* see post_one_send() */
  288. if (qp->s_last == READ_ONCE(qp->s_head))
  289. goto bail;
  290. /* If DMAs are in progress, we can't flush immediately. */
  291. if (iowait_sdma_pending(&priv->s_iowait)) {
  292. qp->s_flags |= RVT_S_WAIT_DMA;
  293. goto bail;
  294. }
  295. clear_ahg(qp);
  296. wqe = rvt_get_swqe_ptr(qp, qp->s_last);
  297. hfi1_send_complete(qp, wqe, qp->s_last != qp->s_acked ?
  298. IB_WC_SUCCESS : IB_WC_WR_FLUSH_ERR);
  299. /* will get called again */
  300. goto done_free_tx;
  301. }
  302. if (qp->s_flags & (RVT_S_WAIT_RNR | RVT_S_WAIT_ACK))
  303. goto bail;
  304. if (cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) {
  305. if (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) {
  306. qp->s_flags |= RVT_S_WAIT_PSN;
  307. goto bail;
  308. }
  309. qp->s_sending_psn = qp->s_psn;
  310. qp->s_sending_hpsn = qp->s_psn - 1;
  311. }
  312. /* Send a request. */
  313. wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
  314. switch (qp->s_state) {
  315. default:
  316. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_NEXT_SEND_OK))
  317. goto bail;
  318. /*
  319. * Resend an old request or start a new one.
  320. *
  321. * We keep track of the current SWQE so that
  322. * we don't reset the "furthest progress" state
  323. * if we need to back up.
  324. */
  325. newreq = 0;
  326. if (qp->s_cur == qp->s_tail) {
  327. /* Check if send work queue is empty. */
  328. smp_read_barrier_depends(); /* see post_one_send() */
  329. if (qp->s_tail == READ_ONCE(qp->s_head)) {
  330. clear_ahg(qp);
  331. goto bail;
  332. }
  333. /*
  334. * If a fence is requested, wait for previous
  335. * RDMA read and atomic operations to finish.
  336. */
  337. if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
  338. qp->s_num_rd_atomic) {
  339. qp->s_flags |= RVT_S_WAIT_FENCE;
  340. goto bail;
  341. }
  342. /*
  343. * Local operations are processed immediately
  344. * after all prior requests have completed
  345. */
  346. if (wqe->wr.opcode == IB_WR_REG_MR ||
  347. wqe->wr.opcode == IB_WR_LOCAL_INV) {
  348. int local_ops = 0;
  349. int err = 0;
  350. if (qp->s_last != qp->s_cur)
  351. goto bail;
  352. if (++qp->s_cur == qp->s_size)
  353. qp->s_cur = 0;
  354. if (++qp->s_tail == qp->s_size)
  355. qp->s_tail = 0;
  356. if (!(wqe->wr.send_flags &
  357. RVT_SEND_COMPLETION_ONLY)) {
  358. err = rvt_invalidate_rkey(
  359. qp,
  360. wqe->wr.ex.invalidate_rkey);
  361. local_ops = 1;
  362. }
  363. hfi1_send_complete(qp, wqe,
  364. err ? IB_WC_LOC_PROT_ERR
  365. : IB_WC_SUCCESS);
  366. if (local_ops)
  367. atomic_dec(&qp->local_ops_pending);
  368. qp->s_hdrwords = 0;
  369. goto done_free_tx;
  370. }
  371. newreq = 1;
  372. qp->s_psn = wqe->psn;
  373. }
  374. /*
  375. * Note that we have to be careful not to modify the
  376. * original work request since we may need to resend
  377. * it.
  378. */
  379. len = wqe->length;
  380. ss = &qp->s_sge;
  381. bth2 = mask_psn(qp->s_psn);
  382. switch (wqe->wr.opcode) {
  383. case IB_WR_SEND:
  384. case IB_WR_SEND_WITH_IMM:
  385. case IB_WR_SEND_WITH_INV:
  386. /* If no credit, return. */
  387. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) &&
  388. rvt_cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) {
  389. qp->s_flags |= RVT_S_WAIT_SSN_CREDIT;
  390. goto bail;
  391. }
  392. if (len > pmtu) {
  393. qp->s_state = OP(SEND_FIRST);
  394. len = pmtu;
  395. break;
  396. }
  397. if (wqe->wr.opcode == IB_WR_SEND) {
  398. qp->s_state = OP(SEND_ONLY);
  399. } else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) {
  400. qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
  401. /* Immediate data comes after the BTH */
  402. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  403. hwords += 1;
  404. } else {
  405. qp->s_state = OP(SEND_ONLY_WITH_INVALIDATE);
  406. /* Invalidate rkey comes after the BTH */
  407. ohdr->u.ieth = cpu_to_be32(
  408. wqe->wr.ex.invalidate_rkey);
  409. hwords += 1;
  410. }
  411. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  412. bth0 |= IB_BTH_SOLICITED;
  413. bth2 |= IB_BTH_REQ_ACK;
  414. if (++qp->s_cur == qp->s_size)
  415. qp->s_cur = 0;
  416. break;
  417. case IB_WR_RDMA_WRITE:
  418. if (newreq && !(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
  419. qp->s_lsn++;
  420. goto no_flow_control;
  421. case IB_WR_RDMA_WRITE_WITH_IMM:
  422. /* If no credit, return. */
  423. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) &&
  424. rvt_cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) {
  425. qp->s_flags |= RVT_S_WAIT_SSN_CREDIT;
  426. goto bail;
  427. }
  428. no_flow_control:
  429. put_ib_reth_vaddr(
  430. wqe->rdma_wr.remote_addr,
  431. &ohdr->u.rc.reth);
  432. ohdr->u.rc.reth.rkey =
  433. cpu_to_be32(wqe->rdma_wr.rkey);
  434. ohdr->u.rc.reth.length = cpu_to_be32(len);
  435. hwords += sizeof(struct ib_reth) / sizeof(u32);
  436. if (len > pmtu) {
  437. qp->s_state = OP(RDMA_WRITE_FIRST);
  438. len = pmtu;
  439. break;
  440. }
  441. if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
  442. qp->s_state = OP(RDMA_WRITE_ONLY);
  443. } else {
  444. qp->s_state =
  445. OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
  446. /* Immediate data comes after RETH */
  447. ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
  448. hwords += 1;
  449. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  450. bth0 |= IB_BTH_SOLICITED;
  451. }
  452. bth2 |= IB_BTH_REQ_ACK;
  453. if (++qp->s_cur == qp->s_size)
  454. qp->s_cur = 0;
  455. break;
  456. case IB_WR_RDMA_READ:
  457. /*
  458. * Don't allow more operations to be started
  459. * than the QP limits allow.
  460. */
  461. if (newreq) {
  462. if (qp->s_num_rd_atomic >=
  463. qp->s_max_rd_atomic) {
  464. qp->s_flags |= RVT_S_WAIT_RDMAR;
  465. goto bail;
  466. }
  467. qp->s_num_rd_atomic++;
  468. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
  469. qp->s_lsn++;
  470. }
  471. put_ib_reth_vaddr(
  472. wqe->rdma_wr.remote_addr,
  473. &ohdr->u.rc.reth);
  474. ohdr->u.rc.reth.rkey =
  475. cpu_to_be32(wqe->rdma_wr.rkey);
  476. ohdr->u.rc.reth.length = cpu_to_be32(len);
  477. qp->s_state = OP(RDMA_READ_REQUEST);
  478. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  479. ss = NULL;
  480. len = 0;
  481. bth2 |= IB_BTH_REQ_ACK;
  482. if (++qp->s_cur == qp->s_size)
  483. qp->s_cur = 0;
  484. break;
  485. case IB_WR_ATOMIC_CMP_AND_SWP:
  486. case IB_WR_ATOMIC_FETCH_AND_ADD:
  487. /*
  488. * Don't allow more operations to be started
  489. * than the QP limits allow.
  490. */
  491. if (newreq) {
  492. if (qp->s_num_rd_atomic >=
  493. qp->s_max_rd_atomic) {
  494. qp->s_flags |= RVT_S_WAIT_RDMAR;
  495. goto bail;
  496. }
  497. qp->s_num_rd_atomic++;
  498. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
  499. qp->s_lsn++;
  500. }
  501. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
  502. qp->s_state = OP(COMPARE_SWAP);
  503. put_ib_ateth_swap(wqe->atomic_wr.swap,
  504. &ohdr->u.atomic_eth);
  505. put_ib_ateth_compare(wqe->atomic_wr.compare_add,
  506. &ohdr->u.atomic_eth);
  507. } else {
  508. qp->s_state = OP(FETCH_ADD);
  509. put_ib_ateth_swap(wqe->atomic_wr.compare_add,
  510. &ohdr->u.atomic_eth);
  511. put_ib_ateth_compare(0, &ohdr->u.atomic_eth);
  512. }
  513. put_ib_ateth_vaddr(wqe->atomic_wr.remote_addr,
  514. &ohdr->u.atomic_eth);
  515. ohdr->u.atomic_eth.rkey = cpu_to_be32(
  516. wqe->atomic_wr.rkey);
  517. hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
  518. ss = NULL;
  519. len = 0;
  520. bth2 |= IB_BTH_REQ_ACK;
  521. if (++qp->s_cur == qp->s_size)
  522. qp->s_cur = 0;
  523. break;
  524. default:
  525. goto bail;
  526. }
  527. qp->s_sge.sge = wqe->sg_list[0];
  528. qp->s_sge.sg_list = wqe->sg_list + 1;
  529. qp->s_sge.num_sge = wqe->wr.num_sge;
  530. qp->s_sge.total_len = wqe->length;
  531. qp->s_len = wqe->length;
  532. if (newreq) {
  533. qp->s_tail++;
  534. if (qp->s_tail >= qp->s_size)
  535. qp->s_tail = 0;
  536. }
  537. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  538. qp->s_psn = wqe->lpsn + 1;
  539. else
  540. qp->s_psn++;
  541. break;
  542. case OP(RDMA_READ_RESPONSE_FIRST):
  543. /*
  544. * qp->s_state is normally set to the opcode of the
  545. * last packet constructed for new requests and therefore
  546. * is never set to RDMA read response.
  547. * RDMA_READ_RESPONSE_FIRST is used by the ACK processing
  548. * thread to indicate a SEND needs to be restarted from an
  549. * earlier PSN without interfering with the sending thread.
  550. * See restart_rc().
  551. */
  552. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
  553. /* FALLTHROUGH */
  554. case OP(SEND_FIRST):
  555. qp->s_state = OP(SEND_MIDDLE);
  556. /* FALLTHROUGH */
  557. case OP(SEND_MIDDLE):
  558. bth2 = mask_psn(qp->s_psn++);
  559. ss = &qp->s_sge;
  560. len = qp->s_len;
  561. if (len > pmtu) {
  562. len = pmtu;
  563. middle = HFI1_CAP_IS_KSET(SDMA_AHG);
  564. break;
  565. }
  566. if (wqe->wr.opcode == IB_WR_SEND) {
  567. qp->s_state = OP(SEND_LAST);
  568. } else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) {
  569. qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
  570. /* Immediate data comes after the BTH */
  571. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  572. hwords += 1;
  573. } else {
  574. qp->s_state = OP(SEND_LAST_WITH_INVALIDATE);
  575. /* invalidate data comes after the BTH */
  576. ohdr->u.ieth = cpu_to_be32(wqe->wr.ex.invalidate_rkey);
  577. hwords += 1;
  578. }
  579. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  580. bth0 |= IB_BTH_SOLICITED;
  581. bth2 |= IB_BTH_REQ_ACK;
  582. qp->s_cur++;
  583. if (qp->s_cur >= qp->s_size)
  584. qp->s_cur = 0;
  585. break;
  586. case OP(RDMA_READ_RESPONSE_LAST):
  587. /*
  588. * qp->s_state is normally set to the opcode of the
  589. * last packet constructed for new requests and therefore
  590. * is never set to RDMA read response.
  591. * RDMA_READ_RESPONSE_LAST is used by the ACK processing
  592. * thread to indicate a RDMA write needs to be restarted from
  593. * an earlier PSN without interfering with the sending thread.
  594. * See restart_rc().
  595. */
  596. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
  597. /* FALLTHROUGH */
  598. case OP(RDMA_WRITE_FIRST):
  599. qp->s_state = OP(RDMA_WRITE_MIDDLE);
  600. /* FALLTHROUGH */
  601. case OP(RDMA_WRITE_MIDDLE):
  602. bth2 = mask_psn(qp->s_psn++);
  603. ss = &qp->s_sge;
  604. len = qp->s_len;
  605. if (len > pmtu) {
  606. len = pmtu;
  607. middle = HFI1_CAP_IS_KSET(SDMA_AHG);
  608. break;
  609. }
  610. if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
  611. qp->s_state = OP(RDMA_WRITE_LAST);
  612. } else {
  613. qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
  614. /* Immediate data comes after the BTH */
  615. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  616. hwords += 1;
  617. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  618. bth0 |= IB_BTH_SOLICITED;
  619. }
  620. bth2 |= IB_BTH_REQ_ACK;
  621. qp->s_cur++;
  622. if (qp->s_cur >= qp->s_size)
  623. qp->s_cur = 0;
  624. break;
  625. case OP(RDMA_READ_RESPONSE_MIDDLE):
  626. /*
  627. * qp->s_state is normally set to the opcode of the
  628. * last packet constructed for new requests and therefore
  629. * is never set to RDMA read response.
  630. * RDMA_READ_RESPONSE_MIDDLE is used by the ACK processing
  631. * thread to indicate a RDMA read needs to be restarted from
  632. * an earlier PSN without interfering with the sending thread.
  633. * See restart_rc().
  634. */
  635. len = (delta_psn(qp->s_psn, wqe->psn)) * pmtu;
  636. put_ib_reth_vaddr(
  637. wqe->rdma_wr.remote_addr + len,
  638. &ohdr->u.rc.reth);
  639. ohdr->u.rc.reth.rkey =
  640. cpu_to_be32(wqe->rdma_wr.rkey);
  641. ohdr->u.rc.reth.length = cpu_to_be32(wqe->length - len);
  642. qp->s_state = OP(RDMA_READ_REQUEST);
  643. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  644. bth2 = mask_psn(qp->s_psn) | IB_BTH_REQ_ACK;
  645. qp->s_psn = wqe->lpsn + 1;
  646. ss = NULL;
  647. len = 0;
  648. qp->s_cur++;
  649. if (qp->s_cur == qp->s_size)
  650. qp->s_cur = 0;
  651. break;
  652. }
  653. qp->s_sending_hpsn = bth2;
  654. delta = delta_psn(bth2, wqe->psn);
  655. if (delta && delta % HFI1_PSN_CREDIT == 0)
  656. bth2 |= IB_BTH_REQ_ACK;
  657. if (qp->s_flags & RVT_S_SEND_ONE) {
  658. qp->s_flags &= ~RVT_S_SEND_ONE;
  659. qp->s_flags |= RVT_S_WAIT_ACK;
  660. bth2 |= IB_BTH_REQ_ACK;
  661. }
  662. qp->s_len -= len;
  663. qp->s_hdrwords = hwords;
  664. ps->s_txreq->sde = priv->s_sde;
  665. ps->s_txreq->ss = ss;
  666. ps->s_txreq->s_cur_size = len;
  667. hfi1_make_ruc_header(
  668. qp,
  669. ohdr,
  670. bth0 | (qp->s_state << 24),
  671. bth2,
  672. middle,
  673. ps);
  674. /* pbc */
  675. ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2;
  676. return 1;
  677. done_free_tx:
  678. hfi1_put_txreq(ps->s_txreq);
  679. ps->s_txreq = NULL;
  680. return 1;
  681. bail:
  682. hfi1_put_txreq(ps->s_txreq);
  683. bail_no_tx:
  684. ps->s_txreq = NULL;
  685. qp->s_flags &= ~RVT_S_BUSY;
  686. qp->s_hdrwords = 0;
  687. return 0;
  688. }
  689. static inline void hfi1_make_bth_aeth(struct rvt_qp *qp,
  690. struct ib_other_headers *ohdr,
  691. u32 bth0, u32 bth1)
  692. {
  693. if (qp->r_nak_state)
  694. ohdr->u.aeth = cpu_to_be32((qp->r_msn & IB_MSN_MASK) |
  695. (qp->r_nak_state <<
  696. IB_AETH_CREDIT_SHIFT));
  697. else
  698. ohdr->u.aeth = rvt_compute_aeth(qp);
  699. ohdr->bth[0] = cpu_to_be32(bth0);
  700. ohdr->bth[1] = cpu_to_be32(bth1 | qp->remote_qpn);
  701. ohdr->bth[2] = cpu_to_be32(mask_psn(qp->r_ack_psn));
  702. }
  703. static inline void hfi1_queue_rc_ack(struct rvt_qp *qp, bool is_fecn)
  704. {
  705. struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  706. unsigned long flags;
  707. spin_lock_irqsave(&qp->s_lock, flags);
  708. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
  709. goto unlock;
  710. this_cpu_inc(*ibp->rvp.rc_qacks);
  711. qp->s_flags |= RVT_S_ACK_PENDING | RVT_S_RESP_PENDING;
  712. qp->s_nak_state = qp->r_nak_state;
  713. qp->s_ack_psn = qp->r_ack_psn;
  714. if (is_fecn)
  715. qp->s_flags |= RVT_S_ECN;
  716. /* Schedule the send tasklet. */
  717. hfi1_schedule_send(qp);
  718. unlock:
  719. spin_unlock_irqrestore(&qp->s_lock, flags);
  720. }
  721. static inline void hfi1_make_rc_ack_9B(struct rvt_qp *qp,
  722. struct hfi1_opa_header *opa_hdr,
  723. u8 sc5, bool is_fecn,
  724. u64 *pbc_flags, u32 *hwords,
  725. u32 *nwords)
  726. {
  727. struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  728. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  729. struct ib_header *hdr = &opa_hdr->ibh;
  730. struct ib_other_headers *ohdr;
  731. u16 lrh0 = HFI1_LRH_BTH;
  732. u16 pkey;
  733. u32 bth0, bth1;
  734. opa_hdr->hdr_type = HFI1_PKT_TYPE_9B;
  735. ohdr = &hdr->u.oth;
  736. /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4 */
  737. *hwords = 6;
  738. if (unlikely(rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH)) {
  739. *hwords += hfi1_make_grh(ibp, &hdr->u.l.grh,
  740. rdma_ah_read_grh(&qp->remote_ah_attr),
  741. *hwords - 2, SIZE_OF_CRC);
  742. ohdr = &hdr->u.l.oth;
  743. lrh0 = HFI1_LRH_GRH;
  744. }
  745. /* set PBC_DC_INFO bit (aka SC[4]) in pbc_flags */
  746. *pbc_flags |= ((!!(sc5 & 0x10)) << PBC_DC_INFO_SHIFT);
  747. /* read pkey_index w/o lock (its atomic) */
  748. pkey = hfi1_get_pkey(ibp, qp->s_pkey_index);
  749. lrh0 |= (sc5 & IB_SC_MASK) << IB_SC_SHIFT |
  750. (rdma_ah_get_sl(&qp->remote_ah_attr) & IB_SL_MASK) <<
  751. IB_SL_SHIFT;
  752. hfi1_make_ib_hdr(hdr, lrh0, *hwords + SIZE_OF_CRC,
  753. opa_get_lid(rdma_ah_get_dlid(&qp->remote_ah_attr), 9B),
  754. ppd->lid | rdma_ah_get_path_bits(&qp->remote_ah_attr));
  755. bth0 = pkey | (OP(ACKNOWLEDGE) << 24);
  756. if (qp->s_mig_state == IB_MIG_MIGRATED)
  757. bth0 |= IB_BTH_MIG_REQ;
  758. bth1 = (!!is_fecn) << IB_BECN_SHIFT;
  759. hfi1_make_bth_aeth(qp, ohdr, bth0, bth1);
  760. }
  761. static inline void hfi1_make_rc_ack_16B(struct rvt_qp *qp,
  762. struct hfi1_opa_header *opa_hdr,
  763. u8 sc5, bool is_fecn,
  764. u64 *pbc_flags, u32 *hwords,
  765. u32 *nwords)
  766. {
  767. struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  768. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  769. struct hfi1_16b_header *hdr = &opa_hdr->opah;
  770. struct ib_other_headers *ohdr;
  771. u32 bth0, bth1;
  772. u16 len, pkey;
  773. u8 becn = !!is_fecn;
  774. u8 l4 = OPA_16B_L4_IB_LOCAL;
  775. u8 extra_bytes;
  776. opa_hdr->hdr_type = HFI1_PKT_TYPE_16B;
  777. ohdr = &hdr->u.oth;
  778. /* header size in 32-bit words 16B LRH+BTH+AETH = (16+12+4)/4 */
  779. *hwords = 8;
  780. extra_bytes = hfi1_get_16b_padding(*hwords << 2, 0);
  781. *nwords = SIZE_OF_CRC + ((extra_bytes + SIZE_OF_LT) >> 2);
  782. if (unlikely(rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH) &&
  783. hfi1_check_mcast(rdma_ah_get_dlid(&qp->remote_ah_attr))) {
  784. *hwords += hfi1_make_grh(ibp, &hdr->u.l.grh,
  785. rdma_ah_read_grh(&qp->remote_ah_attr),
  786. *hwords - 4, *nwords);
  787. ohdr = &hdr->u.l.oth;
  788. l4 = OPA_16B_L4_IB_GLOBAL;
  789. }
  790. *pbc_flags |= PBC_PACKET_BYPASS | PBC_INSERT_BYPASS_ICRC;
  791. /* read pkey_index w/o lock (its atomic) */
  792. pkey = hfi1_get_pkey(ibp, qp->s_pkey_index);
  793. /* Convert dwords to flits */
  794. len = (*hwords + *nwords) >> 1;
  795. hfi1_make_16b_hdr(hdr,
  796. ppd->lid | rdma_ah_get_path_bits(&qp->remote_ah_attr),
  797. opa_get_lid(rdma_ah_get_dlid(&qp->remote_ah_attr),
  798. 16B),
  799. len, pkey, becn, 0, l4, sc5);
  800. bth0 = pkey | (OP(ACKNOWLEDGE) << 24);
  801. bth0 |= extra_bytes << 20;
  802. if (qp->s_mig_state == IB_MIG_MIGRATED)
  803. bth1 = OPA_BTH_MIG_REQ;
  804. hfi1_make_bth_aeth(qp, ohdr, bth0, bth1);
  805. }
  806. typedef void (*hfi1_make_rc_ack)(struct rvt_qp *qp,
  807. struct hfi1_opa_header *opa_hdr,
  808. u8 sc5, bool is_fecn,
  809. u64 *pbc_flags, u32 *hwords,
  810. u32 *nwords);
  811. /* We support only two types - 9B and 16B for now */
  812. static const hfi1_make_rc_ack hfi1_make_rc_ack_tbl[2] = {
  813. [HFI1_PKT_TYPE_9B] = &hfi1_make_rc_ack_9B,
  814. [HFI1_PKT_TYPE_16B] = &hfi1_make_rc_ack_16B
  815. };
  816. /**
  817. * hfi1_send_rc_ack - Construct an ACK packet and send it
  818. * @qp: a pointer to the QP
  819. *
  820. * This is called from hfi1_rc_rcv() and handle_receive_interrupt().
  821. * Note that RDMA reads and atomics are handled in the
  822. * send side QP state and send engine.
  823. */
  824. void hfi1_send_rc_ack(struct hfi1_ctxtdata *rcd,
  825. struct rvt_qp *qp, bool is_fecn)
  826. {
  827. struct hfi1_ibport *ibp = rcd_to_iport(rcd);
  828. struct hfi1_qp_priv *priv = qp->priv;
  829. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  830. u8 sc5 = ibp->sl_to_sc[rdma_ah_get_sl(&qp->remote_ah_attr)];
  831. u64 pbc, pbc_flags = 0;
  832. u32 hwords = 0;
  833. u32 nwords = 0;
  834. u32 plen;
  835. struct pio_buf *pbuf;
  836. struct hfi1_opa_header opa_hdr;
  837. /* clear the defer count */
  838. qp->r_adefered = 0;
  839. /* Don't send ACK or NAK if a RDMA read or atomic is pending. */
  840. if (qp->s_flags & RVT_S_RESP_PENDING) {
  841. hfi1_queue_rc_ack(qp, is_fecn);
  842. return;
  843. }
  844. /* Ensure s_rdma_ack_cnt changes are committed */
  845. smp_read_barrier_depends();
  846. if (qp->s_rdma_ack_cnt) {
  847. hfi1_queue_rc_ack(qp, is_fecn);
  848. return;
  849. }
  850. /* Don't try to send ACKs if the link isn't ACTIVE */
  851. if (driver_lstate(ppd) != IB_PORT_ACTIVE)
  852. return;
  853. /* Make the appropriate header */
  854. hfi1_make_rc_ack_tbl[priv->hdr_type](qp, &opa_hdr, sc5, is_fecn,
  855. &pbc_flags, &hwords, &nwords);
  856. plen = 2 /* PBC */ + hwords + nwords;
  857. pbc = create_pbc(ppd, pbc_flags, qp->srate_mbps,
  858. sc_to_vlt(ppd->dd, sc5), plen);
  859. pbuf = sc_buffer_alloc(rcd->sc, plen, NULL, NULL);
  860. if (!pbuf) {
  861. /*
  862. * We have no room to send at the moment. Pass
  863. * responsibility for sending the ACK to the send engine
  864. * so that when enough buffer space becomes available,
  865. * the ACK is sent ahead of other outgoing packets.
  866. */
  867. hfi1_queue_rc_ack(qp, is_fecn);
  868. return;
  869. }
  870. trace_ack_output_ibhdr(dd_from_ibdev(qp->ibqp.device),
  871. &opa_hdr, ib_is_sc5(sc5));
  872. /* write the pbc and data */
  873. ppd->dd->pio_inline_send(ppd->dd, pbuf, pbc,
  874. (priv->hdr_type == HFI1_PKT_TYPE_9B ?
  875. (void *)&opa_hdr.ibh :
  876. (void *)&opa_hdr.opah), hwords);
  877. return;
  878. }
  879. /**
  880. * reset_psn - reset the QP state to send starting from PSN
  881. * @qp: the QP
  882. * @psn: the packet sequence number to restart at
  883. *
  884. * This is called from hfi1_rc_rcv() to process an incoming RC ACK
  885. * for the given QP.
  886. * Called at interrupt level with the QP s_lock held.
  887. */
  888. static void reset_psn(struct rvt_qp *qp, u32 psn)
  889. {
  890. u32 n = qp->s_acked;
  891. struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, n);
  892. u32 opcode;
  893. lockdep_assert_held(&qp->s_lock);
  894. qp->s_cur = n;
  895. /*
  896. * If we are starting the request from the beginning,
  897. * let the normal send code handle initialization.
  898. */
  899. if (cmp_psn(psn, wqe->psn) <= 0) {
  900. qp->s_state = OP(SEND_LAST);
  901. goto done;
  902. }
  903. /* Find the work request opcode corresponding to the given PSN. */
  904. opcode = wqe->wr.opcode;
  905. for (;;) {
  906. int diff;
  907. if (++n == qp->s_size)
  908. n = 0;
  909. if (n == qp->s_tail)
  910. break;
  911. wqe = rvt_get_swqe_ptr(qp, n);
  912. diff = cmp_psn(psn, wqe->psn);
  913. if (diff < 0)
  914. break;
  915. qp->s_cur = n;
  916. /*
  917. * If we are starting the request from the beginning,
  918. * let the normal send code handle initialization.
  919. */
  920. if (diff == 0) {
  921. qp->s_state = OP(SEND_LAST);
  922. goto done;
  923. }
  924. opcode = wqe->wr.opcode;
  925. }
  926. /*
  927. * Set the state to restart in the middle of a request.
  928. * Don't change the s_sge, s_cur_sge, or s_cur_size.
  929. * See hfi1_make_rc_req().
  930. */
  931. switch (opcode) {
  932. case IB_WR_SEND:
  933. case IB_WR_SEND_WITH_IMM:
  934. qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
  935. break;
  936. case IB_WR_RDMA_WRITE:
  937. case IB_WR_RDMA_WRITE_WITH_IMM:
  938. qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
  939. break;
  940. case IB_WR_RDMA_READ:
  941. qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  942. break;
  943. default:
  944. /*
  945. * This case shouldn't happen since its only
  946. * one PSN per req.
  947. */
  948. qp->s_state = OP(SEND_LAST);
  949. }
  950. done:
  951. qp->s_psn = psn;
  952. /*
  953. * Set RVT_S_WAIT_PSN as rc_complete() may start the timer
  954. * asynchronously before the send engine can get scheduled.
  955. * Doing it in hfi1_make_rc_req() is too late.
  956. */
  957. if ((cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) &&
  958. (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0))
  959. qp->s_flags |= RVT_S_WAIT_PSN;
  960. qp->s_flags &= ~RVT_S_AHG_VALID;
  961. }
  962. /*
  963. * Back up requester to resend the last un-ACKed request.
  964. * The QP r_lock and s_lock should be held and interrupts disabled.
  965. */
  966. void hfi1_restart_rc(struct rvt_qp *qp, u32 psn, int wait)
  967. {
  968. struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  969. struct hfi1_ibport *ibp;
  970. lockdep_assert_held(&qp->r_lock);
  971. lockdep_assert_held(&qp->s_lock);
  972. if (qp->s_retry == 0) {
  973. if (qp->s_mig_state == IB_MIG_ARMED) {
  974. hfi1_migrate_qp(qp);
  975. qp->s_retry = qp->s_retry_cnt;
  976. } else if (qp->s_last == qp->s_acked) {
  977. hfi1_send_complete(qp, wqe, IB_WC_RETRY_EXC_ERR);
  978. rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  979. return;
  980. } else { /* need to handle delayed completion */
  981. return;
  982. }
  983. } else {
  984. qp->s_retry--;
  985. }
  986. ibp = to_iport(qp->ibqp.device, qp->port_num);
  987. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  988. ibp->rvp.n_rc_resends++;
  989. else
  990. ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn);
  991. qp->s_flags &= ~(RVT_S_WAIT_FENCE | RVT_S_WAIT_RDMAR |
  992. RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_PSN |
  993. RVT_S_WAIT_ACK);
  994. if (wait)
  995. qp->s_flags |= RVT_S_SEND_ONE;
  996. reset_psn(qp, psn);
  997. }
  998. /*
  999. * Set qp->s_sending_psn to the next PSN after the given one.
  1000. * This would be psn+1 except when RDMA reads are present.
  1001. */
  1002. static void reset_sending_psn(struct rvt_qp *qp, u32 psn)
  1003. {
  1004. struct rvt_swqe *wqe;
  1005. u32 n = qp->s_last;
  1006. lockdep_assert_held(&qp->s_lock);
  1007. /* Find the work request corresponding to the given PSN. */
  1008. for (;;) {
  1009. wqe = rvt_get_swqe_ptr(qp, n);
  1010. if (cmp_psn(psn, wqe->lpsn) <= 0) {
  1011. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  1012. qp->s_sending_psn = wqe->lpsn + 1;
  1013. else
  1014. qp->s_sending_psn = psn + 1;
  1015. break;
  1016. }
  1017. if (++n == qp->s_size)
  1018. n = 0;
  1019. if (n == qp->s_tail)
  1020. break;
  1021. }
  1022. }
  1023. /*
  1024. * This should be called with the QP s_lock held and interrupts disabled.
  1025. */
  1026. void hfi1_rc_send_complete(struct rvt_qp *qp, struct hfi1_opa_header *opah)
  1027. {
  1028. struct ib_other_headers *ohdr;
  1029. struct hfi1_qp_priv *priv = qp->priv;
  1030. struct rvt_swqe *wqe;
  1031. struct ib_header *hdr = NULL;
  1032. struct hfi1_16b_header *hdr_16b = NULL;
  1033. u32 opcode;
  1034. u32 psn;
  1035. lockdep_assert_held(&qp->s_lock);
  1036. if (!(ib_rvt_state_ops[qp->state] & RVT_SEND_OR_FLUSH_OR_RECV_OK))
  1037. return;
  1038. /* Find out where the BTH is */
  1039. if (priv->hdr_type == HFI1_PKT_TYPE_9B) {
  1040. hdr = &opah->ibh;
  1041. if (ib_get_lnh(hdr) == HFI1_LRH_BTH)
  1042. ohdr = &hdr->u.oth;
  1043. else
  1044. ohdr = &hdr->u.l.oth;
  1045. } else {
  1046. u8 l4;
  1047. hdr_16b = &opah->opah;
  1048. l4 = hfi1_16B_get_l4(hdr_16b);
  1049. if (l4 == OPA_16B_L4_IB_LOCAL)
  1050. ohdr = &hdr_16b->u.oth;
  1051. else
  1052. ohdr = &hdr_16b->u.l.oth;
  1053. }
  1054. opcode = ib_bth_get_opcode(ohdr);
  1055. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  1056. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  1057. WARN_ON(!qp->s_rdma_ack_cnt);
  1058. qp->s_rdma_ack_cnt--;
  1059. return;
  1060. }
  1061. psn = ib_bth_get_psn(ohdr);
  1062. reset_sending_psn(qp, psn);
  1063. /*
  1064. * Start timer after a packet requesting an ACK has been sent and
  1065. * there are still requests that haven't been acked.
  1066. */
  1067. if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail &&
  1068. !(qp->s_flags &
  1069. (RVT_S_TIMER | RVT_S_WAIT_RNR | RVT_S_WAIT_PSN)) &&
  1070. (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
  1071. rvt_add_retry_timer(qp);
  1072. while (qp->s_last != qp->s_acked) {
  1073. u32 s_last;
  1074. wqe = rvt_get_swqe_ptr(qp, qp->s_last);
  1075. if (cmp_psn(wqe->lpsn, qp->s_sending_psn) >= 0 &&
  1076. cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)
  1077. break;
  1078. s_last = qp->s_last;
  1079. trace_hfi1_qp_send_completion(qp, wqe, s_last);
  1080. if (++s_last >= qp->s_size)
  1081. s_last = 0;
  1082. qp->s_last = s_last;
  1083. /* see post_send() */
  1084. barrier();
  1085. rvt_put_swqe(wqe);
  1086. rvt_qp_swqe_complete(qp,
  1087. wqe,
  1088. ib_hfi1_wc_opcode[wqe->wr.opcode],
  1089. IB_WC_SUCCESS);
  1090. }
  1091. /*
  1092. * If we were waiting for sends to complete before re-sending,
  1093. * and they are now complete, restart sending.
  1094. */
  1095. trace_hfi1_sendcomplete(qp, psn);
  1096. if (qp->s_flags & RVT_S_WAIT_PSN &&
  1097. cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
  1098. qp->s_flags &= ~RVT_S_WAIT_PSN;
  1099. qp->s_sending_psn = qp->s_psn;
  1100. qp->s_sending_hpsn = qp->s_psn - 1;
  1101. hfi1_schedule_send(qp);
  1102. }
  1103. }
  1104. static inline void update_last_psn(struct rvt_qp *qp, u32 psn)
  1105. {
  1106. qp->s_last_psn = psn;
  1107. }
  1108. /*
  1109. * Generate a SWQE completion.
  1110. * This is similar to hfi1_send_complete but has to check to be sure
  1111. * that the SGEs are not being referenced if the SWQE is being resent.
  1112. */
  1113. static struct rvt_swqe *do_rc_completion(struct rvt_qp *qp,
  1114. struct rvt_swqe *wqe,
  1115. struct hfi1_ibport *ibp)
  1116. {
  1117. lockdep_assert_held(&qp->s_lock);
  1118. /*
  1119. * Don't decrement refcount and don't generate a
  1120. * completion if the SWQE is being resent until the send
  1121. * is finished.
  1122. */
  1123. if (cmp_psn(wqe->lpsn, qp->s_sending_psn) < 0 ||
  1124. cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
  1125. u32 s_last;
  1126. rvt_put_swqe(wqe);
  1127. s_last = qp->s_last;
  1128. trace_hfi1_qp_send_completion(qp, wqe, s_last);
  1129. if (++s_last >= qp->s_size)
  1130. s_last = 0;
  1131. qp->s_last = s_last;
  1132. /* see post_send() */
  1133. barrier();
  1134. rvt_qp_swqe_complete(qp,
  1135. wqe,
  1136. ib_hfi1_wc_opcode[wqe->wr.opcode],
  1137. IB_WC_SUCCESS);
  1138. } else {
  1139. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  1140. this_cpu_inc(*ibp->rvp.rc_delayed_comp);
  1141. /*
  1142. * If send progress not running attempt to progress
  1143. * SDMA queue.
  1144. */
  1145. if (ppd->dd->flags & HFI1_HAS_SEND_DMA) {
  1146. struct sdma_engine *engine;
  1147. u8 sl = rdma_ah_get_sl(&qp->remote_ah_attr);
  1148. u8 sc5;
  1149. /* For now use sc to find engine */
  1150. sc5 = ibp->sl_to_sc[sl];
  1151. engine = qp_to_sdma_engine(qp, sc5);
  1152. sdma_engine_progress_schedule(engine);
  1153. }
  1154. }
  1155. qp->s_retry = qp->s_retry_cnt;
  1156. update_last_psn(qp, wqe->lpsn);
  1157. /*
  1158. * If we are completing a request which is in the process of
  1159. * being resent, we can stop re-sending it since we know the
  1160. * responder has already seen it.
  1161. */
  1162. if (qp->s_acked == qp->s_cur) {
  1163. if (++qp->s_cur >= qp->s_size)
  1164. qp->s_cur = 0;
  1165. qp->s_acked = qp->s_cur;
  1166. wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
  1167. if (qp->s_acked != qp->s_tail) {
  1168. qp->s_state = OP(SEND_LAST);
  1169. qp->s_psn = wqe->psn;
  1170. }
  1171. } else {
  1172. if (++qp->s_acked >= qp->s_size)
  1173. qp->s_acked = 0;
  1174. if (qp->state == IB_QPS_SQD && qp->s_acked == qp->s_cur)
  1175. qp->s_draining = 0;
  1176. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1177. }
  1178. return wqe;
  1179. }
  1180. /**
  1181. * do_rc_ack - process an incoming RC ACK
  1182. * @qp: the QP the ACK came in on
  1183. * @psn: the packet sequence number of the ACK
  1184. * @opcode: the opcode of the request that resulted in the ACK
  1185. *
  1186. * This is called from rc_rcv_resp() to process an incoming RC ACK
  1187. * for the given QP.
  1188. * May be called at interrupt level, with the QP s_lock held.
  1189. * Returns 1 if OK, 0 if current operation should be aborted (NAK).
  1190. */
  1191. static int do_rc_ack(struct rvt_qp *qp, u32 aeth, u32 psn, int opcode,
  1192. u64 val, struct hfi1_ctxtdata *rcd)
  1193. {
  1194. struct hfi1_ibport *ibp;
  1195. enum ib_wc_status status;
  1196. struct rvt_swqe *wqe;
  1197. int ret = 0;
  1198. u32 ack_psn;
  1199. int diff;
  1200. lockdep_assert_held(&qp->s_lock);
  1201. /*
  1202. * Note that NAKs implicitly ACK outstanding SEND and RDMA write
  1203. * requests and implicitly NAK RDMA read and atomic requests issued
  1204. * before the NAK'ed request. The MSN won't include the NAK'ed
  1205. * request but will include an ACK'ed request(s).
  1206. */
  1207. ack_psn = psn;
  1208. if (aeth >> IB_AETH_NAK_SHIFT)
  1209. ack_psn--;
  1210. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1211. ibp = rcd_to_iport(rcd);
  1212. /*
  1213. * The MSN might be for a later WQE than the PSN indicates so
  1214. * only complete WQEs that the PSN finishes.
  1215. */
  1216. while ((diff = delta_psn(ack_psn, wqe->lpsn)) >= 0) {
  1217. /*
  1218. * RDMA_READ_RESPONSE_ONLY is a special case since
  1219. * we want to generate completion events for everything
  1220. * before the RDMA read, copy the data, then generate
  1221. * the completion for the read.
  1222. */
  1223. if (wqe->wr.opcode == IB_WR_RDMA_READ &&
  1224. opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
  1225. diff == 0) {
  1226. ret = 1;
  1227. goto bail_stop;
  1228. }
  1229. /*
  1230. * If this request is a RDMA read or atomic, and the ACK is
  1231. * for a later operation, this ACK NAKs the RDMA read or
  1232. * atomic. In other words, only a RDMA_READ_LAST or ONLY
  1233. * can ACK a RDMA read and likewise for atomic ops. Note
  1234. * that the NAK case can only happen if relaxed ordering is
  1235. * used and requests are sent after an RDMA read or atomic
  1236. * is sent but before the response is received.
  1237. */
  1238. if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
  1239. (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
  1240. ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1241. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
  1242. (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {
  1243. /* Retry this request. */
  1244. if (!(qp->r_flags & RVT_R_RDMAR_SEQ)) {
  1245. qp->r_flags |= RVT_R_RDMAR_SEQ;
  1246. hfi1_restart_rc(qp, qp->s_last_psn + 1, 0);
  1247. if (list_empty(&qp->rspwait)) {
  1248. qp->r_flags |= RVT_R_RSP_SEND;
  1249. rvt_get_qp(qp);
  1250. list_add_tail(&qp->rspwait,
  1251. &rcd->qp_wait_list);
  1252. }
  1253. }
  1254. /*
  1255. * No need to process the ACK/NAK since we are
  1256. * restarting an earlier request.
  1257. */
  1258. goto bail_stop;
  1259. }
  1260. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1261. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
  1262. u64 *vaddr = wqe->sg_list[0].vaddr;
  1263. *vaddr = val;
  1264. }
  1265. if (qp->s_num_rd_atomic &&
  1266. (wqe->wr.opcode == IB_WR_RDMA_READ ||
  1267. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1268. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
  1269. qp->s_num_rd_atomic--;
  1270. /* Restart sending task if fence is complete */
  1271. if ((qp->s_flags & RVT_S_WAIT_FENCE) &&
  1272. !qp->s_num_rd_atomic) {
  1273. qp->s_flags &= ~(RVT_S_WAIT_FENCE |
  1274. RVT_S_WAIT_ACK);
  1275. hfi1_schedule_send(qp);
  1276. } else if (qp->s_flags & RVT_S_WAIT_RDMAR) {
  1277. qp->s_flags &= ~(RVT_S_WAIT_RDMAR |
  1278. RVT_S_WAIT_ACK);
  1279. hfi1_schedule_send(qp);
  1280. }
  1281. }
  1282. wqe = do_rc_completion(qp, wqe, ibp);
  1283. if (qp->s_acked == qp->s_tail)
  1284. break;
  1285. }
  1286. switch (aeth >> IB_AETH_NAK_SHIFT) {
  1287. case 0: /* ACK */
  1288. this_cpu_inc(*ibp->rvp.rc_acks);
  1289. if (qp->s_acked != qp->s_tail) {
  1290. /*
  1291. * We are expecting more ACKs so
  1292. * mod the retry timer.
  1293. */
  1294. rvt_mod_retry_timer(qp);
  1295. /*
  1296. * We can stop re-sending the earlier packets and
  1297. * continue with the next packet the receiver wants.
  1298. */
  1299. if (cmp_psn(qp->s_psn, psn) <= 0)
  1300. reset_psn(qp, psn + 1);
  1301. } else {
  1302. /* No more acks - kill all timers */
  1303. rvt_stop_rc_timers(qp);
  1304. if (cmp_psn(qp->s_psn, psn) <= 0) {
  1305. qp->s_state = OP(SEND_LAST);
  1306. qp->s_psn = psn + 1;
  1307. }
  1308. }
  1309. if (qp->s_flags & RVT_S_WAIT_ACK) {
  1310. qp->s_flags &= ~RVT_S_WAIT_ACK;
  1311. hfi1_schedule_send(qp);
  1312. }
  1313. rvt_get_credit(qp, aeth);
  1314. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  1315. qp->s_retry = qp->s_retry_cnt;
  1316. update_last_psn(qp, psn);
  1317. return 1;
  1318. case 1: /* RNR NAK */
  1319. ibp->rvp.n_rnr_naks++;
  1320. if (qp->s_acked == qp->s_tail)
  1321. goto bail_stop;
  1322. if (qp->s_flags & RVT_S_WAIT_RNR)
  1323. goto bail_stop;
  1324. if (qp->s_rnr_retry == 0) {
  1325. status = IB_WC_RNR_RETRY_EXC_ERR;
  1326. goto class_b;
  1327. }
  1328. if (qp->s_rnr_retry_cnt < 7)
  1329. qp->s_rnr_retry--;
  1330. /* The last valid PSN is the previous PSN. */
  1331. update_last_psn(qp, psn - 1);
  1332. ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn);
  1333. reset_psn(qp, psn);
  1334. qp->s_flags &= ~(RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_ACK);
  1335. rvt_stop_rc_timers(qp);
  1336. rvt_add_rnr_timer(qp, aeth);
  1337. return 0;
  1338. case 3: /* NAK */
  1339. if (qp->s_acked == qp->s_tail)
  1340. goto bail_stop;
  1341. /* The last valid PSN is the previous PSN. */
  1342. update_last_psn(qp, psn - 1);
  1343. switch ((aeth >> IB_AETH_CREDIT_SHIFT) &
  1344. IB_AETH_CREDIT_MASK) {
  1345. case 0: /* PSN sequence error */
  1346. ibp->rvp.n_seq_naks++;
  1347. /*
  1348. * Back up to the responder's expected PSN.
  1349. * Note that we might get a NAK in the middle of an
  1350. * RDMA READ response which terminates the RDMA
  1351. * READ.
  1352. */
  1353. hfi1_restart_rc(qp, psn, 0);
  1354. hfi1_schedule_send(qp);
  1355. break;
  1356. case 1: /* Invalid Request */
  1357. status = IB_WC_REM_INV_REQ_ERR;
  1358. ibp->rvp.n_other_naks++;
  1359. goto class_b;
  1360. case 2: /* Remote Access Error */
  1361. status = IB_WC_REM_ACCESS_ERR;
  1362. ibp->rvp.n_other_naks++;
  1363. goto class_b;
  1364. case 3: /* Remote Operation Error */
  1365. status = IB_WC_REM_OP_ERR;
  1366. ibp->rvp.n_other_naks++;
  1367. class_b:
  1368. if (qp->s_last == qp->s_acked) {
  1369. hfi1_send_complete(qp, wqe, status);
  1370. rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  1371. }
  1372. break;
  1373. default:
  1374. /* Ignore other reserved NAK error codes */
  1375. goto reserved;
  1376. }
  1377. qp->s_retry = qp->s_retry_cnt;
  1378. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  1379. goto bail_stop;
  1380. default: /* 2: reserved */
  1381. reserved:
  1382. /* Ignore reserved NAK codes. */
  1383. goto bail_stop;
  1384. }
  1385. /* cannot be reached */
  1386. bail_stop:
  1387. rvt_stop_rc_timers(qp);
  1388. return ret;
  1389. }
  1390. /*
  1391. * We have seen an out of sequence RDMA read middle or last packet.
  1392. * This ACKs SENDs and RDMA writes up to the first RDMA read or atomic SWQE.
  1393. */
  1394. static void rdma_seq_err(struct rvt_qp *qp, struct hfi1_ibport *ibp, u32 psn,
  1395. struct hfi1_ctxtdata *rcd)
  1396. {
  1397. struct rvt_swqe *wqe;
  1398. lockdep_assert_held(&qp->s_lock);
  1399. /* Remove QP from retry timer */
  1400. rvt_stop_rc_timers(qp);
  1401. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1402. while (cmp_psn(psn, wqe->lpsn) > 0) {
  1403. if (wqe->wr.opcode == IB_WR_RDMA_READ ||
  1404. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1405. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
  1406. break;
  1407. wqe = do_rc_completion(qp, wqe, ibp);
  1408. }
  1409. ibp->rvp.n_rdma_seq++;
  1410. qp->r_flags |= RVT_R_RDMAR_SEQ;
  1411. hfi1_restart_rc(qp, qp->s_last_psn + 1, 0);
  1412. if (list_empty(&qp->rspwait)) {
  1413. qp->r_flags |= RVT_R_RSP_SEND;
  1414. rvt_get_qp(qp);
  1415. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  1416. }
  1417. }
  1418. /**
  1419. * rc_rcv_resp - process an incoming RC response packet
  1420. * @packet: data packet information
  1421. *
  1422. * This is called from hfi1_rc_rcv() to process an incoming RC response
  1423. * packet for the given QP.
  1424. * Called at interrupt level.
  1425. */
  1426. static void rc_rcv_resp(struct hfi1_packet *packet)
  1427. {
  1428. struct hfi1_ctxtdata *rcd = packet->rcd;
  1429. void *data = packet->payload;
  1430. u32 tlen = packet->tlen;
  1431. struct rvt_qp *qp = packet->qp;
  1432. struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  1433. struct ib_other_headers *ohdr = packet->ohdr;
  1434. struct rvt_swqe *wqe;
  1435. enum ib_wc_status status;
  1436. unsigned long flags;
  1437. int diff;
  1438. u64 val;
  1439. u32 aeth;
  1440. u32 psn = ib_bth_get_psn(packet->ohdr);
  1441. u32 pmtu = qp->pmtu;
  1442. u16 hdrsize = packet->hlen;
  1443. u8 opcode = packet->opcode;
  1444. u8 pad = packet->pad;
  1445. u8 extra_bytes = pad + packet->extra_byte + (SIZE_OF_CRC << 2);
  1446. spin_lock_irqsave(&qp->s_lock, flags);
  1447. trace_hfi1_ack(qp, psn);
  1448. /* Ignore invalid responses. */
  1449. smp_read_barrier_depends(); /* see post_one_send */
  1450. if (cmp_psn(psn, READ_ONCE(qp->s_next_psn)) >= 0)
  1451. goto ack_done;
  1452. /* Ignore duplicate responses. */
  1453. diff = cmp_psn(psn, qp->s_last_psn);
  1454. if (unlikely(diff <= 0)) {
  1455. /* Update credits for "ghost" ACKs */
  1456. if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
  1457. aeth = be32_to_cpu(ohdr->u.aeth);
  1458. if ((aeth >> IB_AETH_NAK_SHIFT) == 0)
  1459. rvt_get_credit(qp, aeth);
  1460. }
  1461. goto ack_done;
  1462. }
  1463. /*
  1464. * Skip everything other than the PSN we expect, if we are waiting
  1465. * for a reply to a restarted RDMA read or atomic op.
  1466. */
  1467. if (qp->r_flags & RVT_R_RDMAR_SEQ) {
  1468. if (cmp_psn(psn, qp->s_last_psn + 1) != 0)
  1469. goto ack_done;
  1470. qp->r_flags &= ~RVT_R_RDMAR_SEQ;
  1471. }
  1472. if (unlikely(qp->s_acked == qp->s_tail))
  1473. goto ack_done;
  1474. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1475. status = IB_WC_SUCCESS;
  1476. switch (opcode) {
  1477. case OP(ACKNOWLEDGE):
  1478. case OP(ATOMIC_ACKNOWLEDGE):
  1479. case OP(RDMA_READ_RESPONSE_FIRST):
  1480. aeth = be32_to_cpu(ohdr->u.aeth);
  1481. if (opcode == OP(ATOMIC_ACKNOWLEDGE))
  1482. val = ib_u64_get(&ohdr->u.at.atomic_ack_eth);
  1483. else
  1484. val = 0;
  1485. if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) ||
  1486. opcode != OP(RDMA_READ_RESPONSE_FIRST))
  1487. goto ack_done;
  1488. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1489. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1490. goto ack_op_err;
  1491. /*
  1492. * If this is a response to a resent RDMA read, we
  1493. * have to be careful to copy the data to the right
  1494. * location.
  1495. */
  1496. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1497. wqe, psn, pmtu);
  1498. goto read_middle;
  1499. case OP(RDMA_READ_RESPONSE_MIDDLE):
  1500. /* no AETH, no ACK */
  1501. if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
  1502. goto ack_seq_err;
  1503. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1504. goto ack_op_err;
  1505. read_middle:
  1506. if (unlikely(tlen != (hdrsize + pmtu + extra_bytes)))
  1507. goto ack_len_err;
  1508. if (unlikely(pmtu >= qp->s_rdma_read_len))
  1509. goto ack_len_err;
  1510. /*
  1511. * We got a response so update the timeout.
  1512. * 4.096 usec. * (1 << qp->timeout)
  1513. */
  1514. rvt_mod_retry_timer(qp);
  1515. if (qp->s_flags & RVT_S_WAIT_ACK) {
  1516. qp->s_flags &= ~RVT_S_WAIT_ACK;
  1517. hfi1_schedule_send(qp);
  1518. }
  1519. if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))
  1520. qp->s_retry = qp->s_retry_cnt;
  1521. /*
  1522. * Update the RDMA receive state but do the copy w/o
  1523. * holding the locks and blocking interrupts.
  1524. */
  1525. qp->s_rdma_read_len -= pmtu;
  1526. update_last_psn(qp, psn);
  1527. spin_unlock_irqrestore(&qp->s_lock, flags);
  1528. hfi1_copy_sge(&qp->s_rdma_read_sge, data, pmtu, false, false);
  1529. goto bail;
  1530. case OP(RDMA_READ_RESPONSE_ONLY):
  1531. aeth = be32_to_cpu(ohdr->u.aeth);
  1532. if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd))
  1533. goto ack_done;
  1534. /*
  1535. * Check that the data size is >= 0 && <= pmtu.
  1536. * Remember to account for ICRC (4).
  1537. */
  1538. if (unlikely(tlen < (hdrsize + extra_bytes)))
  1539. goto ack_len_err;
  1540. /*
  1541. * If this is a response to a resent RDMA read, we
  1542. * have to be careful to copy the data to the right
  1543. * location.
  1544. */
  1545. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1546. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1547. wqe, psn, pmtu);
  1548. goto read_last;
  1549. case OP(RDMA_READ_RESPONSE_LAST):
  1550. /* ACKs READ req. */
  1551. if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
  1552. goto ack_seq_err;
  1553. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1554. goto ack_op_err;
  1555. /*
  1556. * Check that the data size is >= 1 && <= pmtu.
  1557. * Remember to account for ICRC (4).
  1558. */
  1559. if (unlikely(tlen <= (hdrsize + extra_bytes)))
  1560. goto ack_len_err;
  1561. read_last:
  1562. tlen -= hdrsize + extra_bytes;
  1563. if (unlikely(tlen != qp->s_rdma_read_len))
  1564. goto ack_len_err;
  1565. aeth = be32_to_cpu(ohdr->u.aeth);
  1566. hfi1_copy_sge(&qp->s_rdma_read_sge, data, tlen, false, false);
  1567. WARN_ON(qp->s_rdma_read_sge.num_sge);
  1568. (void)do_rc_ack(qp, aeth, psn,
  1569. OP(RDMA_READ_RESPONSE_LAST), 0, rcd);
  1570. goto ack_done;
  1571. }
  1572. ack_op_err:
  1573. status = IB_WC_LOC_QP_OP_ERR;
  1574. goto ack_err;
  1575. ack_seq_err:
  1576. rdma_seq_err(qp, ibp, psn, rcd);
  1577. goto ack_done;
  1578. ack_len_err:
  1579. status = IB_WC_LOC_LEN_ERR;
  1580. ack_err:
  1581. if (qp->s_last == qp->s_acked) {
  1582. hfi1_send_complete(qp, wqe, status);
  1583. rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  1584. }
  1585. ack_done:
  1586. spin_unlock_irqrestore(&qp->s_lock, flags);
  1587. bail:
  1588. return;
  1589. }
  1590. static inline void rc_defered_ack(struct hfi1_ctxtdata *rcd,
  1591. struct rvt_qp *qp)
  1592. {
  1593. if (list_empty(&qp->rspwait)) {
  1594. qp->r_flags |= RVT_R_RSP_NAK;
  1595. rvt_get_qp(qp);
  1596. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  1597. }
  1598. }
  1599. static inline void rc_cancel_ack(struct rvt_qp *qp)
  1600. {
  1601. qp->r_adefered = 0;
  1602. if (list_empty(&qp->rspwait))
  1603. return;
  1604. list_del_init(&qp->rspwait);
  1605. qp->r_flags &= ~RVT_R_RSP_NAK;
  1606. rvt_put_qp(qp);
  1607. }
  1608. /**
  1609. * rc_rcv_error - process an incoming duplicate or error RC packet
  1610. * @ohdr: the other headers for this packet
  1611. * @data: the packet data
  1612. * @qp: the QP for this packet
  1613. * @opcode: the opcode for this packet
  1614. * @psn: the packet sequence number for this packet
  1615. * @diff: the difference between the PSN and the expected PSN
  1616. *
  1617. * This is called from hfi1_rc_rcv() to process an unexpected
  1618. * incoming RC packet for the given QP.
  1619. * Called at interrupt level.
  1620. * Return 1 if no more processing is needed; otherwise return 0 to
  1621. * schedule a response to be sent.
  1622. */
  1623. static noinline int rc_rcv_error(struct ib_other_headers *ohdr, void *data,
  1624. struct rvt_qp *qp, u32 opcode, u32 psn,
  1625. int diff, struct hfi1_ctxtdata *rcd)
  1626. {
  1627. struct hfi1_ibport *ibp = rcd_to_iport(rcd);
  1628. struct rvt_ack_entry *e;
  1629. unsigned long flags;
  1630. u8 i, prev;
  1631. int old_req;
  1632. trace_hfi1_rcv_error(qp, psn);
  1633. if (diff > 0) {
  1634. /*
  1635. * Packet sequence error.
  1636. * A NAK will ACK earlier sends and RDMA writes.
  1637. * Don't queue the NAK if we already sent one.
  1638. */
  1639. if (!qp->r_nak_state) {
  1640. ibp->rvp.n_rc_seqnak++;
  1641. qp->r_nak_state = IB_NAK_PSN_ERROR;
  1642. /* Use the expected PSN. */
  1643. qp->r_ack_psn = qp->r_psn;
  1644. /*
  1645. * Wait to send the sequence NAK until all packets
  1646. * in the receive queue have been processed.
  1647. * Otherwise, we end up propagating congestion.
  1648. */
  1649. rc_defered_ack(rcd, qp);
  1650. }
  1651. goto done;
  1652. }
  1653. /*
  1654. * Handle a duplicate request. Don't re-execute SEND, RDMA
  1655. * write or atomic op. Don't NAK errors, just silently drop
  1656. * the duplicate request. Note that r_sge, r_len, and
  1657. * r_rcv_len may be in use so don't modify them.
  1658. *
  1659. * We are supposed to ACK the earliest duplicate PSN but we
  1660. * can coalesce an outstanding duplicate ACK. We have to
  1661. * send the earliest so that RDMA reads can be restarted at
  1662. * the requester's expected PSN.
  1663. *
  1664. * First, find where this duplicate PSN falls within the
  1665. * ACKs previously sent.
  1666. * old_req is true if there is an older response that is scheduled
  1667. * to be sent before sending this one.
  1668. */
  1669. e = NULL;
  1670. old_req = 1;
  1671. ibp->rvp.n_rc_dupreq++;
  1672. spin_lock_irqsave(&qp->s_lock, flags);
  1673. for (i = qp->r_head_ack_queue; ; i = prev) {
  1674. if (i == qp->s_tail_ack_queue)
  1675. old_req = 0;
  1676. if (i)
  1677. prev = i - 1;
  1678. else
  1679. prev = HFI1_MAX_RDMA_ATOMIC;
  1680. if (prev == qp->r_head_ack_queue) {
  1681. e = NULL;
  1682. break;
  1683. }
  1684. e = &qp->s_ack_queue[prev];
  1685. if (!e->opcode) {
  1686. e = NULL;
  1687. break;
  1688. }
  1689. if (cmp_psn(psn, e->psn) >= 0) {
  1690. if (prev == qp->s_tail_ack_queue &&
  1691. cmp_psn(psn, e->lpsn) <= 0)
  1692. old_req = 0;
  1693. break;
  1694. }
  1695. }
  1696. switch (opcode) {
  1697. case OP(RDMA_READ_REQUEST): {
  1698. struct ib_reth *reth;
  1699. u32 offset;
  1700. u32 len;
  1701. /*
  1702. * If we didn't find the RDMA read request in the ack queue,
  1703. * we can ignore this request.
  1704. */
  1705. if (!e || e->opcode != OP(RDMA_READ_REQUEST))
  1706. goto unlock_done;
  1707. /* RETH comes after BTH */
  1708. reth = &ohdr->u.rc.reth;
  1709. /*
  1710. * Address range must be a subset of the original
  1711. * request and start on pmtu boundaries.
  1712. * We reuse the old ack_queue slot since the requester
  1713. * should not back up and request an earlier PSN for the
  1714. * same request.
  1715. */
  1716. offset = delta_psn(psn, e->psn) * qp->pmtu;
  1717. len = be32_to_cpu(reth->length);
  1718. if (unlikely(offset + len != e->rdma_sge.sge_length))
  1719. goto unlock_done;
  1720. if (e->rdma_sge.mr) {
  1721. rvt_put_mr(e->rdma_sge.mr);
  1722. e->rdma_sge.mr = NULL;
  1723. }
  1724. if (len != 0) {
  1725. u32 rkey = be32_to_cpu(reth->rkey);
  1726. u64 vaddr = get_ib_reth_vaddr(reth);
  1727. int ok;
  1728. ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr, rkey,
  1729. IB_ACCESS_REMOTE_READ);
  1730. if (unlikely(!ok))
  1731. goto unlock_done;
  1732. } else {
  1733. e->rdma_sge.vaddr = NULL;
  1734. e->rdma_sge.length = 0;
  1735. e->rdma_sge.sge_length = 0;
  1736. }
  1737. e->psn = psn;
  1738. if (old_req)
  1739. goto unlock_done;
  1740. qp->s_tail_ack_queue = prev;
  1741. break;
  1742. }
  1743. case OP(COMPARE_SWAP):
  1744. case OP(FETCH_ADD): {
  1745. /*
  1746. * If we didn't find the atomic request in the ack queue
  1747. * or the send engine is already backed up to send an
  1748. * earlier entry, we can ignore this request.
  1749. */
  1750. if (!e || e->opcode != (u8)opcode || old_req)
  1751. goto unlock_done;
  1752. qp->s_tail_ack_queue = prev;
  1753. break;
  1754. }
  1755. default:
  1756. /*
  1757. * Ignore this operation if it doesn't request an ACK
  1758. * or an earlier RDMA read or atomic is going to be resent.
  1759. */
  1760. if (!(psn & IB_BTH_REQ_ACK) || old_req)
  1761. goto unlock_done;
  1762. /*
  1763. * Resend the most recent ACK if this request is
  1764. * after all the previous RDMA reads and atomics.
  1765. */
  1766. if (i == qp->r_head_ack_queue) {
  1767. spin_unlock_irqrestore(&qp->s_lock, flags);
  1768. qp->r_nak_state = 0;
  1769. qp->r_ack_psn = qp->r_psn - 1;
  1770. goto send_ack;
  1771. }
  1772. /*
  1773. * Resend the RDMA read or atomic op which
  1774. * ACKs this duplicate request.
  1775. */
  1776. qp->s_tail_ack_queue = i;
  1777. break;
  1778. }
  1779. qp->s_ack_state = OP(ACKNOWLEDGE);
  1780. qp->s_flags |= RVT_S_RESP_PENDING;
  1781. qp->r_nak_state = 0;
  1782. hfi1_schedule_send(qp);
  1783. unlock_done:
  1784. spin_unlock_irqrestore(&qp->s_lock, flags);
  1785. done:
  1786. return 1;
  1787. send_ack:
  1788. return 0;
  1789. }
  1790. static inline void update_ack_queue(struct rvt_qp *qp, unsigned n)
  1791. {
  1792. unsigned next;
  1793. next = n + 1;
  1794. if (next > HFI1_MAX_RDMA_ATOMIC)
  1795. next = 0;
  1796. qp->s_tail_ack_queue = next;
  1797. qp->s_ack_state = OP(ACKNOWLEDGE);
  1798. }
  1799. static void log_cca_event(struct hfi1_pportdata *ppd, u8 sl, u32 rlid,
  1800. u32 lqpn, u32 rqpn, u8 svc_type)
  1801. {
  1802. struct opa_hfi1_cong_log_event_internal *cc_event;
  1803. unsigned long flags;
  1804. if (sl >= OPA_MAX_SLS)
  1805. return;
  1806. spin_lock_irqsave(&ppd->cc_log_lock, flags);
  1807. ppd->threshold_cong_event_map[sl / 8] |= 1 << (sl % 8);
  1808. ppd->threshold_event_counter++;
  1809. cc_event = &ppd->cc_events[ppd->cc_log_idx++];
  1810. if (ppd->cc_log_idx == OPA_CONG_LOG_ELEMS)
  1811. ppd->cc_log_idx = 0;
  1812. cc_event->lqpn = lqpn & RVT_QPN_MASK;
  1813. cc_event->rqpn = rqpn & RVT_QPN_MASK;
  1814. cc_event->sl = sl;
  1815. cc_event->svc_type = svc_type;
  1816. cc_event->rlid = rlid;
  1817. /* keep timestamp in units of 1.024 usec */
  1818. cc_event->timestamp = ktime_get_ns() / 1024;
  1819. spin_unlock_irqrestore(&ppd->cc_log_lock, flags);
  1820. }
  1821. void process_becn(struct hfi1_pportdata *ppd, u8 sl, u32 rlid, u32 lqpn,
  1822. u32 rqpn, u8 svc_type)
  1823. {
  1824. struct cca_timer *cca_timer;
  1825. u16 ccti, ccti_incr, ccti_timer, ccti_limit;
  1826. u8 trigger_threshold;
  1827. struct cc_state *cc_state;
  1828. unsigned long flags;
  1829. if (sl >= OPA_MAX_SLS)
  1830. return;
  1831. cc_state = get_cc_state(ppd);
  1832. if (!cc_state)
  1833. return;
  1834. /*
  1835. * 1) increase CCTI (for this SL)
  1836. * 2) select IPG (i.e., call set_link_ipg())
  1837. * 3) start timer
  1838. */
  1839. ccti_limit = cc_state->cct.ccti_limit;
  1840. ccti_incr = cc_state->cong_setting.entries[sl].ccti_increase;
  1841. ccti_timer = cc_state->cong_setting.entries[sl].ccti_timer;
  1842. trigger_threshold =
  1843. cc_state->cong_setting.entries[sl].trigger_threshold;
  1844. spin_lock_irqsave(&ppd->cca_timer_lock, flags);
  1845. cca_timer = &ppd->cca_timer[sl];
  1846. if (cca_timer->ccti < ccti_limit) {
  1847. if (cca_timer->ccti + ccti_incr <= ccti_limit)
  1848. cca_timer->ccti += ccti_incr;
  1849. else
  1850. cca_timer->ccti = ccti_limit;
  1851. set_link_ipg(ppd);
  1852. }
  1853. ccti = cca_timer->ccti;
  1854. if (!hrtimer_active(&cca_timer->hrtimer)) {
  1855. /* ccti_timer is in units of 1.024 usec */
  1856. unsigned long nsec = 1024 * ccti_timer;
  1857. hrtimer_start(&cca_timer->hrtimer, ns_to_ktime(nsec),
  1858. HRTIMER_MODE_REL);
  1859. }
  1860. spin_unlock_irqrestore(&ppd->cca_timer_lock, flags);
  1861. if ((trigger_threshold != 0) && (ccti >= trigger_threshold))
  1862. log_cca_event(ppd, sl, rlid, lqpn, rqpn, svc_type);
  1863. }
  1864. /**
  1865. * hfi1_rc_rcv - process an incoming RC packet
  1866. * @packet: data packet information
  1867. *
  1868. * This is called from qp_rcv() to process an incoming RC packet
  1869. * for the given QP.
  1870. * May be called at interrupt level.
  1871. */
  1872. void hfi1_rc_rcv(struct hfi1_packet *packet)
  1873. {
  1874. struct hfi1_ctxtdata *rcd = packet->rcd;
  1875. void *data = packet->payload;
  1876. u32 tlen = packet->tlen;
  1877. struct rvt_qp *qp = packet->qp;
  1878. struct hfi1_ibport *ibp = rcd_to_iport(rcd);
  1879. struct ib_other_headers *ohdr = packet->ohdr;
  1880. u32 bth0 = be32_to_cpu(ohdr->bth[0]);
  1881. u32 opcode = packet->opcode;
  1882. u32 hdrsize = packet->hlen;
  1883. u32 psn = ib_bth_get_psn(packet->ohdr);
  1884. u32 pad = packet->pad;
  1885. struct ib_wc wc;
  1886. u32 pmtu = qp->pmtu;
  1887. int diff;
  1888. struct ib_reth *reth;
  1889. unsigned long flags;
  1890. int ret;
  1891. bool is_fecn = false;
  1892. bool copy_last = false;
  1893. u32 rkey;
  1894. u8 extra_bytes = pad + packet->extra_byte + (SIZE_OF_CRC << 2);
  1895. lockdep_assert_held(&qp->r_lock);
  1896. if (hfi1_ruc_check_hdr(ibp, packet))
  1897. return;
  1898. is_fecn = process_ecn(qp, packet, false);
  1899. /*
  1900. * Process responses (ACKs) before anything else. Note that the
  1901. * packet sequence number will be for something in the send work
  1902. * queue rather than the expected receive packet sequence number.
  1903. * In other words, this QP is the requester.
  1904. */
  1905. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  1906. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  1907. rc_rcv_resp(packet);
  1908. if (is_fecn)
  1909. goto send_ack;
  1910. return;
  1911. }
  1912. /* Compute 24 bits worth of difference. */
  1913. diff = delta_psn(psn, qp->r_psn);
  1914. if (unlikely(diff)) {
  1915. if (rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd))
  1916. return;
  1917. goto send_ack;
  1918. }
  1919. /* Check for opcode sequence errors. */
  1920. switch (qp->r_state) {
  1921. case OP(SEND_FIRST):
  1922. case OP(SEND_MIDDLE):
  1923. if (opcode == OP(SEND_MIDDLE) ||
  1924. opcode == OP(SEND_LAST) ||
  1925. opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
  1926. opcode == OP(SEND_LAST_WITH_INVALIDATE))
  1927. break;
  1928. goto nack_inv;
  1929. case OP(RDMA_WRITE_FIRST):
  1930. case OP(RDMA_WRITE_MIDDLE):
  1931. if (opcode == OP(RDMA_WRITE_MIDDLE) ||
  1932. opcode == OP(RDMA_WRITE_LAST) ||
  1933. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1934. break;
  1935. goto nack_inv;
  1936. default:
  1937. if (opcode == OP(SEND_MIDDLE) ||
  1938. opcode == OP(SEND_LAST) ||
  1939. opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
  1940. opcode == OP(SEND_LAST_WITH_INVALIDATE) ||
  1941. opcode == OP(RDMA_WRITE_MIDDLE) ||
  1942. opcode == OP(RDMA_WRITE_LAST) ||
  1943. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1944. goto nack_inv;
  1945. /*
  1946. * Note that it is up to the requester to not send a new
  1947. * RDMA read or atomic operation before receiving an ACK
  1948. * for the previous operation.
  1949. */
  1950. break;
  1951. }
  1952. if (qp->state == IB_QPS_RTR && !(qp->r_flags & RVT_R_COMM_EST))
  1953. rvt_comm_est(qp);
  1954. /* OK, process the packet. */
  1955. switch (opcode) {
  1956. case OP(SEND_FIRST):
  1957. ret = hfi1_rvt_get_rwqe(qp, 0);
  1958. if (ret < 0)
  1959. goto nack_op_err;
  1960. if (!ret)
  1961. goto rnr_nak;
  1962. qp->r_rcv_len = 0;
  1963. /* FALLTHROUGH */
  1964. case OP(SEND_MIDDLE):
  1965. case OP(RDMA_WRITE_MIDDLE):
  1966. send_middle:
  1967. /* Check for invalid length PMTU or posted rwqe len. */
  1968. /*
  1969. * There will be no padding for 9B packet but 16B packets
  1970. * will come in with some padding since we always add
  1971. * CRC and LT bytes which will need to be flit aligned
  1972. */
  1973. if (unlikely(tlen != (hdrsize + pmtu + extra_bytes)))
  1974. goto nack_inv;
  1975. qp->r_rcv_len += pmtu;
  1976. if (unlikely(qp->r_rcv_len > qp->r_len))
  1977. goto nack_inv;
  1978. hfi1_copy_sge(&qp->r_sge, data, pmtu, true, false);
  1979. break;
  1980. case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
  1981. /* consume RWQE */
  1982. ret = hfi1_rvt_get_rwqe(qp, 1);
  1983. if (ret < 0)
  1984. goto nack_op_err;
  1985. if (!ret)
  1986. goto rnr_nak;
  1987. goto send_last_imm;
  1988. case OP(SEND_ONLY):
  1989. case OP(SEND_ONLY_WITH_IMMEDIATE):
  1990. case OP(SEND_ONLY_WITH_INVALIDATE):
  1991. ret = hfi1_rvt_get_rwqe(qp, 0);
  1992. if (ret < 0)
  1993. goto nack_op_err;
  1994. if (!ret)
  1995. goto rnr_nak;
  1996. qp->r_rcv_len = 0;
  1997. if (opcode == OP(SEND_ONLY))
  1998. goto no_immediate_data;
  1999. if (opcode == OP(SEND_ONLY_WITH_INVALIDATE))
  2000. goto send_last_inv;
  2001. /* FALLTHROUGH -- for SEND_ONLY_WITH_IMMEDIATE */
  2002. case OP(SEND_LAST_WITH_IMMEDIATE):
  2003. send_last_imm:
  2004. wc.ex.imm_data = ohdr->u.imm_data;
  2005. wc.wc_flags = IB_WC_WITH_IMM;
  2006. goto send_last;
  2007. case OP(SEND_LAST_WITH_INVALIDATE):
  2008. send_last_inv:
  2009. rkey = be32_to_cpu(ohdr->u.ieth);
  2010. if (rvt_invalidate_rkey(qp, rkey))
  2011. goto no_immediate_data;
  2012. wc.ex.invalidate_rkey = rkey;
  2013. wc.wc_flags = IB_WC_WITH_INVALIDATE;
  2014. goto send_last;
  2015. case OP(RDMA_WRITE_LAST):
  2016. copy_last = rvt_is_user_qp(qp);
  2017. /* fall through */
  2018. case OP(SEND_LAST):
  2019. no_immediate_data:
  2020. wc.wc_flags = 0;
  2021. wc.ex.imm_data = 0;
  2022. send_last:
  2023. /* Check for invalid length. */
  2024. /* LAST len should be >= 1 */
  2025. if (unlikely(tlen < (hdrsize + extra_bytes)))
  2026. goto nack_inv;
  2027. /* Don't count the CRC(and padding and LT byte for 16B). */
  2028. tlen -= (hdrsize + extra_bytes);
  2029. wc.byte_len = tlen + qp->r_rcv_len;
  2030. if (unlikely(wc.byte_len > qp->r_len))
  2031. goto nack_inv;
  2032. hfi1_copy_sge(&qp->r_sge, data, tlen, true, copy_last);
  2033. rvt_put_ss(&qp->r_sge);
  2034. qp->r_msn++;
  2035. if (!__test_and_clear_bit(RVT_R_WRID_VALID, &qp->r_aflags))
  2036. break;
  2037. wc.wr_id = qp->r_wr_id;
  2038. wc.status = IB_WC_SUCCESS;
  2039. if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||
  2040. opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
  2041. wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
  2042. else
  2043. wc.opcode = IB_WC_RECV;
  2044. wc.qp = &qp->ibqp;
  2045. wc.src_qp = qp->remote_qpn;
  2046. wc.slid = rdma_ah_get_dlid(&qp->remote_ah_attr) & U16_MAX;
  2047. /*
  2048. * It seems that IB mandates the presence of an SL in a
  2049. * work completion only for the UD transport (see section
  2050. * 11.4.2 of IBTA Vol. 1).
  2051. *
  2052. * However, the way the SL is chosen below is consistent
  2053. * with the way that IB/qib works and is trying avoid
  2054. * introducing incompatibilities.
  2055. *
  2056. * See also OPA Vol. 1, section 9.7.6, and table 9-17.
  2057. */
  2058. wc.sl = rdma_ah_get_sl(&qp->remote_ah_attr);
  2059. /* zero fields that are N/A */
  2060. wc.vendor_err = 0;
  2061. wc.pkey_index = 0;
  2062. wc.dlid_path_bits = 0;
  2063. wc.port_num = 0;
  2064. /* Signal completion event if the solicited bit is set. */
  2065. rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.recv_cq), &wc,
  2066. (bth0 & IB_BTH_SOLICITED) != 0);
  2067. break;
  2068. case OP(RDMA_WRITE_ONLY):
  2069. copy_last = rvt_is_user_qp(qp);
  2070. /* fall through */
  2071. case OP(RDMA_WRITE_FIRST):
  2072. case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
  2073. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_WRITE)))
  2074. goto nack_inv;
  2075. /* consume RWQE */
  2076. reth = &ohdr->u.rc.reth;
  2077. qp->r_len = be32_to_cpu(reth->length);
  2078. qp->r_rcv_len = 0;
  2079. qp->r_sge.sg_list = NULL;
  2080. if (qp->r_len != 0) {
  2081. u32 rkey = be32_to_cpu(reth->rkey);
  2082. u64 vaddr = get_ib_reth_vaddr(reth);
  2083. int ok;
  2084. /* Check rkey & NAK */
  2085. ok = rvt_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, vaddr,
  2086. rkey, IB_ACCESS_REMOTE_WRITE);
  2087. if (unlikely(!ok))
  2088. goto nack_acc;
  2089. qp->r_sge.num_sge = 1;
  2090. } else {
  2091. qp->r_sge.num_sge = 0;
  2092. qp->r_sge.sge.mr = NULL;
  2093. qp->r_sge.sge.vaddr = NULL;
  2094. qp->r_sge.sge.length = 0;
  2095. qp->r_sge.sge.sge_length = 0;
  2096. }
  2097. if (opcode == OP(RDMA_WRITE_FIRST))
  2098. goto send_middle;
  2099. else if (opcode == OP(RDMA_WRITE_ONLY))
  2100. goto no_immediate_data;
  2101. ret = hfi1_rvt_get_rwqe(qp, 1);
  2102. if (ret < 0)
  2103. goto nack_op_err;
  2104. if (!ret) {
  2105. /* peer will send again */
  2106. rvt_put_ss(&qp->r_sge);
  2107. goto rnr_nak;
  2108. }
  2109. wc.ex.imm_data = ohdr->u.rc.imm_data;
  2110. wc.wc_flags = IB_WC_WITH_IMM;
  2111. goto send_last;
  2112. case OP(RDMA_READ_REQUEST): {
  2113. struct rvt_ack_entry *e;
  2114. u32 len;
  2115. u8 next;
  2116. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ)))
  2117. goto nack_inv;
  2118. next = qp->r_head_ack_queue + 1;
  2119. /* s_ack_queue is size HFI1_MAX_RDMA_ATOMIC+1 so use > not >= */
  2120. if (next > HFI1_MAX_RDMA_ATOMIC)
  2121. next = 0;
  2122. spin_lock_irqsave(&qp->s_lock, flags);
  2123. if (unlikely(next == qp->s_tail_ack_queue)) {
  2124. if (!qp->s_ack_queue[next].sent)
  2125. goto nack_inv_unlck;
  2126. update_ack_queue(qp, next);
  2127. }
  2128. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  2129. if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
  2130. rvt_put_mr(e->rdma_sge.mr);
  2131. e->rdma_sge.mr = NULL;
  2132. }
  2133. reth = &ohdr->u.rc.reth;
  2134. len = be32_to_cpu(reth->length);
  2135. if (len) {
  2136. u32 rkey = be32_to_cpu(reth->rkey);
  2137. u64 vaddr = get_ib_reth_vaddr(reth);
  2138. int ok;
  2139. /* Check rkey & NAK */
  2140. ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr,
  2141. rkey, IB_ACCESS_REMOTE_READ);
  2142. if (unlikely(!ok))
  2143. goto nack_acc_unlck;
  2144. /*
  2145. * Update the next expected PSN. We add 1 later
  2146. * below, so only add the remainder here.
  2147. */
  2148. qp->r_psn += rvt_div_mtu(qp, len - 1);
  2149. } else {
  2150. e->rdma_sge.mr = NULL;
  2151. e->rdma_sge.vaddr = NULL;
  2152. e->rdma_sge.length = 0;
  2153. e->rdma_sge.sge_length = 0;
  2154. }
  2155. e->opcode = opcode;
  2156. e->sent = 0;
  2157. e->psn = psn;
  2158. e->lpsn = qp->r_psn;
  2159. /*
  2160. * We need to increment the MSN here instead of when we
  2161. * finish sending the result since a duplicate request would
  2162. * increment it more than once.
  2163. */
  2164. qp->r_msn++;
  2165. qp->r_psn++;
  2166. qp->r_state = opcode;
  2167. qp->r_nak_state = 0;
  2168. qp->r_head_ack_queue = next;
  2169. /* Schedule the send engine. */
  2170. qp->s_flags |= RVT_S_RESP_PENDING;
  2171. hfi1_schedule_send(qp);
  2172. spin_unlock_irqrestore(&qp->s_lock, flags);
  2173. if (is_fecn)
  2174. goto send_ack;
  2175. return;
  2176. }
  2177. case OP(COMPARE_SWAP):
  2178. case OP(FETCH_ADD): {
  2179. struct ib_atomic_eth *ateth;
  2180. struct rvt_ack_entry *e;
  2181. u64 vaddr;
  2182. atomic64_t *maddr;
  2183. u64 sdata;
  2184. u32 rkey;
  2185. u8 next;
  2186. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC)))
  2187. goto nack_inv;
  2188. next = qp->r_head_ack_queue + 1;
  2189. if (next > HFI1_MAX_RDMA_ATOMIC)
  2190. next = 0;
  2191. spin_lock_irqsave(&qp->s_lock, flags);
  2192. if (unlikely(next == qp->s_tail_ack_queue)) {
  2193. if (!qp->s_ack_queue[next].sent)
  2194. goto nack_inv_unlck;
  2195. update_ack_queue(qp, next);
  2196. }
  2197. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  2198. if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
  2199. rvt_put_mr(e->rdma_sge.mr);
  2200. e->rdma_sge.mr = NULL;
  2201. }
  2202. ateth = &ohdr->u.atomic_eth;
  2203. vaddr = get_ib_ateth_vaddr(ateth);
  2204. if (unlikely(vaddr & (sizeof(u64) - 1)))
  2205. goto nack_inv_unlck;
  2206. rkey = be32_to_cpu(ateth->rkey);
  2207. /* Check rkey & NAK */
  2208. if (unlikely(!rvt_rkey_ok(qp, &qp->r_sge.sge, sizeof(u64),
  2209. vaddr, rkey,
  2210. IB_ACCESS_REMOTE_ATOMIC)))
  2211. goto nack_acc_unlck;
  2212. /* Perform atomic OP and save result. */
  2213. maddr = (atomic64_t *)qp->r_sge.sge.vaddr;
  2214. sdata = get_ib_ateth_swap(ateth);
  2215. e->atomic_data = (opcode == OP(FETCH_ADD)) ?
  2216. (u64)atomic64_add_return(sdata, maddr) - sdata :
  2217. (u64)cmpxchg((u64 *)qp->r_sge.sge.vaddr,
  2218. get_ib_ateth_compare(ateth),
  2219. sdata);
  2220. rvt_put_mr(qp->r_sge.sge.mr);
  2221. qp->r_sge.num_sge = 0;
  2222. e->opcode = opcode;
  2223. e->sent = 0;
  2224. e->psn = psn;
  2225. e->lpsn = psn;
  2226. qp->r_msn++;
  2227. qp->r_psn++;
  2228. qp->r_state = opcode;
  2229. qp->r_nak_state = 0;
  2230. qp->r_head_ack_queue = next;
  2231. /* Schedule the send engine. */
  2232. qp->s_flags |= RVT_S_RESP_PENDING;
  2233. hfi1_schedule_send(qp);
  2234. spin_unlock_irqrestore(&qp->s_lock, flags);
  2235. if (is_fecn)
  2236. goto send_ack;
  2237. return;
  2238. }
  2239. default:
  2240. /* NAK unknown opcodes. */
  2241. goto nack_inv;
  2242. }
  2243. qp->r_psn++;
  2244. qp->r_state = opcode;
  2245. qp->r_ack_psn = psn;
  2246. qp->r_nak_state = 0;
  2247. /* Send an ACK if requested or required. */
  2248. if (psn & IB_BTH_REQ_ACK) {
  2249. if (packet->numpkt == 0) {
  2250. rc_cancel_ack(qp);
  2251. goto send_ack;
  2252. }
  2253. if (qp->r_adefered >= HFI1_PSN_CREDIT) {
  2254. rc_cancel_ack(qp);
  2255. goto send_ack;
  2256. }
  2257. if (unlikely(is_fecn)) {
  2258. rc_cancel_ack(qp);
  2259. goto send_ack;
  2260. }
  2261. qp->r_adefered++;
  2262. rc_defered_ack(rcd, qp);
  2263. }
  2264. return;
  2265. rnr_nak:
  2266. qp->r_nak_state = qp->r_min_rnr_timer | IB_RNR_NAK;
  2267. qp->r_ack_psn = qp->r_psn;
  2268. /* Queue RNR NAK for later */
  2269. rc_defered_ack(rcd, qp);
  2270. return;
  2271. nack_op_err:
  2272. rvt_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
  2273. qp->r_nak_state = IB_NAK_REMOTE_OPERATIONAL_ERROR;
  2274. qp->r_ack_psn = qp->r_psn;
  2275. /* Queue NAK for later */
  2276. rc_defered_ack(rcd, qp);
  2277. return;
  2278. nack_inv_unlck:
  2279. spin_unlock_irqrestore(&qp->s_lock, flags);
  2280. nack_inv:
  2281. rvt_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
  2282. qp->r_nak_state = IB_NAK_INVALID_REQUEST;
  2283. qp->r_ack_psn = qp->r_psn;
  2284. /* Queue NAK for later */
  2285. rc_defered_ack(rcd, qp);
  2286. return;
  2287. nack_acc_unlck:
  2288. spin_unlock_irqrestore(&qp->s_lock, flags);
  2289. nack_acc:
  2290. rvt_rc_error(qp, IB_WC_LOC_PROT_ERR);
  2291. qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
  2292. qp->r_ack_psn = qp->r_psn;
  2293. send_ack:
  2294. hfi1_send_rc_ack(rcd, qp, is_fecn);
  2295. }
  2296. void hfi1_rc_hdrerr(
  2297. struct hfi1_ctxtdata *rcd,
  2298. struct hfi1_packet *packet,
  2299. struct rvt_qp *qp)
  2300. {
  2301. struct hfi1_ibport *ibp = rcd_to_iport(rcd);
  2302. int diff;
  2303. u32 opcode;
  2304. u32 psn;
  2305. if (hfi1_ruc_check_hdr(ibp, packet))
  2306. return;
  2307. psn = ib_bth_get_psn(packet->ohdr);
  2308. opcode = ib_bth_get_opcode(packet->ohdr);
  2309. /* Only deal with RDMA Writes for now */
  2310. if (opcode < IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) {
  2311. diff = delta_psn(psn, qp->r_psn);
  2312. if (!qp->r_nak_state && diff >= 0) {
  2313. ibp->rvp.n_rc_seqnak++;
  2314. qp->r_nak_state = IB_NAK_PSN_ERROR;
  2315. /* Use the expected PSN. */
  2316. qp->r_ack_psn = qp->r_psn;
  2317. /*
  2318. * Wait to send the sequence
  2319. * NAK until all packets
  2320. * in the receive queue have
  2321. * been processed.
  2322. * Otherwise, we end up
  2323. * propagating congestion.
  2324. */
  2325. rc_defered_ack(rcd, qp);
  2326. } /* Out of sequence NAK */
  2327. } /* QP Request NAKs */
  2328. }