main.c 37 KB

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  1. /*
  2. * Broadcom NetXtreme-E RoCE driver.
  3. *
  4. * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
  5. * Broadcom refers to Broadcom Limited and/or its subsidiaries.
  6. *
  7. * This software is available to you under a choice of one of two
  8. * licenses. You may choose to be licensed under the terms of the GNU
  9. * General Public License (GPL) Version 2, available from the file
  10. * COPYING in the main directory of this source tree, or the
  11. * BSD license below:
  12. *
  13. * Redistribution and use in source and binary forms, with or without
  14. * modification, are permitted provided that the following conditions
  15. * are met:
  16. *
  17. * 1. Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * 2. Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  26. * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  27. * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
  28. * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  29. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  30. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  31. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  32. * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
  33. * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
  34. * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35. *
  36. * Description: Main component of the bnxt_re driver
  37. */
  38. #include <linux/module.h>
  39. #include <linux/netdevice.h>
  40. #include <linux/ethtool.h>
  41. #include <linux/mutex.h>
  42. #include <linux/list.h>
  43. #include <linux/rculist.h>
  44. #include <linux/spinlock.h>
  45. #include <linux/pci.h>
  46. #include <net/dcbnl.h>
  47. #include <net/ipv6.h>
  48. #include <net/addrconf.h>
  49. #include <linux/if_ether.h>
  50. #include <rdma/ib_verbs.h>
  51. #include <rdma/ib_user_verbs.h>
  52. #include <rdma/ib_umem.h>
  53. #include <rdma/ib_addr.h>
  54. #include "bnxt_ulp.h"
  55. #include "roce_hsi.h"
  56. #include "qplib_res.h"
  57. #include "qplib_sp.h"
  58. #include "qplib_fp.h"
  59. #include "qplib_rcfw.h"
  60. #include "bnxt_re.h"
  61. #include "ib_verbs.h"
  62. #include <rdma/bnxt_re-abi.h>
  63. #include "bnxt.h"
  64. #include "hw_counters.h"
  65. static char version[] =
  66. BNXT_RE_DESC " v" ROCE_DRV_MODULE_VERSION "\n";
  67. MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>");
  68. MODULE_DESCRIPTION(BNXT_RE_DESC " Driver");
  69. MODULE_LICENSE("Dual BSD/GPL");
  70. /* globals */
  71. static struct list_head bnxt_re_dev_list = LIST_HEAD_INIT(bnxt_re_dev_list);
  72. /* Mutex to protect the list of bnxt_re devices added */
  73. static DEFINE_MUTEX(bnxt_re_dev_lock);
  74. static struct workqueue_struct *bnxt_re_wq;
  75. static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev, bool lock_wait);
  76. /* for handling bnxt_en callbacks later */
  77. static void bnxt_re_stop(void *p)
  78. {
  79. }
  80. static void bnxt_re_start(void *p)
  81. {
  82. }
  83. static void bnxt_re_sriov_config(void *p, int num_vfs)
  84. {
  85. }
  86. static void bnxt_re_shutdown(void *p)
  87. {
  88. struct bnxt_re_dev *rdev = p;
  89. if (!rdev)
  90. return;
  91. bnxt_re_ib_unreg(rdev, false);
  92. }
  93. static struct bnxt_ulp_ops bnxt_re_ulp_ops = {
  94. .ulp_async_notifier = NULL,
  95. .ulp_stop = bnxt_re_stop,
  96. .ulp_start = bnxt_re_start,
  97. .ulp_sriov_config = bnxt_re_sriov_config,
  98. .ulp_shutdown = bnxt_re_shutdown
  99. };
  100. /* RoCE -> Net driver */
  101. /* Driver registration routines used to let the networking driver (bnxt_en)
  102. * to know that the RoCE driver is now installed
  103. */
  104. static int bnxt_re_unregister_netdev(struct bnxt_re_dev *rdev, bool lock_wait)
  105. {
  106. struct bnxt_en_dev *en_dev;
  107. int rc;
  108. if (!rdev)
  109. return -EINVAL;
  110. en_dev = rdev->en_dev;
  111. /* Acquire rtnl lock if it is not invokded from netdev event */
  112. if (lock_wait)
  113. rtnl_lock();
  114. rc = en_dev->en_ops->bnxt_unregister_device(rdev->en_dev,
  115. BNXT_ROCE_ULP);
  116. if (lock_wait)
  117. rtnl_unlock();
  118. return rc;
  119. }
  120. static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev)
  121. {
  122. struct bnxt_en_dev *en_dev;
  123. int rc = 0;
  124. if (!rdev)
  125. return -EINVAL;
  126. en_dev = rdev->en_dev;
  127. rtnl_lock();
  128. rc = en_dev->en_ops->bnxt_register_device(en_dev, BNXT_ROCE_ULP,
  129. &bnxt_re_ulp_ops, rdev);
  130. rtnl_unlock();
  131. return rc;
  132. }
  133. static int bnxt_re_free_msix(struct bnxt_re_dev *rdev, bool lock_wait)
  134. {
  135. struct bnxt_en_dev *en_dev;
  136. int rc;
  137. if (!rdev)
  138. return -EINVAL;
  139. en_dev = rdev->en_dev;
  140. if (lock_wait)
  141. rtnl_lock();
  142. rc = en_dev->en_ops->bnxt_free_msix(rdev->en_dev, BNXT_ROCE_ULP);
  143. if (lock_wait)
  144. rtnl_unlock();
  145. return rc;
  146. }
  147. static int bnxt_re_request_msix(struct bnxt_re_dev *rdev)
  148. {
  149. int rc = 0, num_msix_want = BNXT_RE_MAX_MSIX, num_msix_got;
  150. struct bnxt_en_dev *en_dev;
  151. if (!rdev)
  152. return -EINVAL;
  153. en_dev = rdev->en_dev;
  154. num_msix_want = min_t(u32, BNXT_RE_MAX_MSIX, num_online_cpus());
  155. rtnl_lock();
  156. num_msix_got = en_dev->en_ops->bnxt_request_msix(en_dev, BNXT_ROCE_ULP,
  157. rdev->msix_entries,
  158. num_msix_want);
  159. if (num_msix_got < BNXT_RE_MIN_MSIX) {
  160. rc = -EINVAL;
  161. goto done;
  162. }
  163. if (num_msix_got != num_msix_want) {
  164. dev_warn(rdev_to_dev(rdev),
  165. "Requested %d MSI-X vectors, got %d\n",
  166. num_msix_want, num_msix_got);
  167. }
  168. rdev->num_msix = num_msix_got;
  169. done:
  170. rtnl_unlock();
  171. return rc;
  172. }
  173. static void bnxt_re_init_hwrm_hdr(struct bnxt_re_dev *rdev, struct input *hdr,
  174. u16 opcd, u16 crid, u16 trid)
  175. {
  176. hdr->req_type = cpu_to_le16(opcd);
  177. hdr->cmpl_ring = cpu_to_le16(crid);
  178. hdr->target_id = cpu_to_le16(trid);
  179. }
  180. static void bnxt_re_fill_fw_msg(struct bnxt_fw_msg *fw_msg, void *msg,
  181. int msg_len, void *resp, int resp_max_len,
  182. int timeout)
  183. {
  184. fw_msg->msg = msg;
  185. fw_msg->msg_len = msg_len;
  186. fw_msg->resp = resp;
  187. fw_msg->resp_max_len = resp_max_len;
  188. fw_msg->timeout = timeout;
  189. }
  190. static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev, u16 fw_ring_id,
  191. bool lock_wait)
  192. {
  193. struct bnxt_en_dev *en_dev = rdev->en_dev;
  194. struct hwrm_ring_free_input req = {0};
  195. struct hwrm_ring_free_output resp;
  196. struct bnxt_fw_msg fw_msg;
  197. bool do_unlock = false;
  198. int rc = -EINVAL;
  199. if (!en_dev)
  200. return rc;
  201. memset(&fw_msg, 0, sizeof(fw_msg));
  202. if (lock_wait) {
  203. rtnl_lock();
  204. do_unlock = true;
  205. }
  206. bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1);
  207. req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL;
  208. req.ring_id = cpu_to_le16(fw_ring_id);
  209. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
  210. sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
  211. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  212. if (rc)
  213. dev_err(rdev_to_dev(rdev),
  214. "Failed to free HW ring:%d :%#x", req.ring_id, rc);
  215. if (do_unlock)
  216. rtnl_unlock();
  217. return rc;
  218. }
  219. static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev, dma_addr_t *dma_arr,
  220. int pages, int type, u32 ring_mask,
  221. u32 map_index, u16 *fw_ring_id)
  222. {
  223. struct bnxt_en_dev *en_dev = rdev->en_dev;
  224. struct hwrm_ring_alloc_input req = {0};
  225. struct hwrm_ring_alloc_output resp;
  226. struct bnxt_fw_msg fw_msg;
  227. int rc = -EINVAL;
  228. if (!en_dev)
  229. return rc;
  230. memset(&fw_msg, 0, sizeof(fw_msg));
  231. rtnl_lock();
  232. bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_ALLOC, -1, -1);
  233. req.enables = 0;
  234. req.page_tbl_addr = cpu_to_le64(dma_arr[0]);
  235. if (pages > 1) {
  236. /* Page size is in log2 units */
  237. req.page_size = BNXT_PAGE_SHIFT;
  238. req.page_tbl_depth = 1;
  239. }
  240. req.fbo = 0;
  241. /* Association of ring index with doorbell index and MSIX number */
  242. req.logical_id = cpu_to_le16(map_index);
  243. req.length = cpu_to_le32(ring_mask + 1);
  244. req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL;
  245. req.int_mode = RING_ALLOC_REQ_INT_MODE_MSIX;
  246. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
  247. sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
  248. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  249. if (!rc)
  250. *fw_ring_id = le16_to_cpu(resp.ring_id);
  251. rtnl_unlock();
  252. return rc;
  253. }
  254. static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev,
  255. u32 fw_stats_ctx_id, bool lock_wait)
  256. {
  257. struct bnxt_en_dev *en_dev = rdev->en_dev;
  258. struct hwrm_stat_ctx_free_input req = {0};
  259. struct bnxt_fw_msg fw_msg;
  260. bool do_unlock = false;
  261. int rc = -EINVAL;
  262. if (!en_dev)
  263. return rc;
  264. memset(&fw_msg, 0, sizeof(fw_msg));
  265. if (lock_wait) {
  266. rtnl_lock();
  267. do_unlock = true;
  268. }
  269. bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_FREE, -1, -1);
  270. req.stat_ctx_id = cpu_to_le32(fw_stats_ctx_id);
  271. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&req,
  272. sizeof(req), DFLT_HWRM_CMD_TIMEOUT);
  273. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  274. if (rc)
  275. dev_err(rdev_to_dev(rdev),
  276. "Failed to free HW stats context %#x", rc);
  277. if (do_unlock)
  278. rtnl_unlock();
  279. return rc;
  280. }
  281. static int bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev *rdev,
  282. dma_addr_t dma_map,
  283. u32 *fw_stats_ctx_id)
  284. {
  285. struct hwrm_stat_ctx_alloc_output resp = {0};
  286. struct hwrm_stat_ctx_alloc_input req = {0};
  287. struct bnxt_en_dev *en_dev = rdev->en_dev;
  288. struct bnxt_fw_msg fw_msg;
  289. int rc = -EINVAL;
  290. *fw_stats_ctx_id = INVALID_STATS_CTX_ID;
  291. if (!en_dev)
  292. return rc;
  293. memset(&fw_msg, 0, sizeof(fw_msg));
  294. rtnl_lock();
  295. bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_ALLOC, -1, -1);
  296. req.update_period_ms = cpu_to_le32(1000);
  297. req.stats_dma_addr = cpu_to_le64(dma_map);
  298. req.stat_ctx_flags = STAT_CTX_ALLOC_REQ_STAT_CTX_FLAGS_ROCE;
  299. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
  300. sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
  301. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  302. if (!rc)
  303. *fw_stats_ctx_id = le32_to_cpu(resp.stat_ctx_id);
  304. rtnl_unlock();
  305. return rc;
  306. }
  307. /* Device */
  308. static bool is_bnxt_re_dev(struct net_device *netdev)
  309. {
  310. struct ethtool_drvinfo drvinfo;
  311. if (netdev->ethtool_ops && netdev->ethtool_ops->get_drvinfo) {
  312. memset(&drvinfo, 0, sizeof(drvinfo));
  313. netdev->ethtool_ops->get_drvinfo(netdev, &drvinfo);
  314. if (strcmp(drvinfo.driver, "bnxt_en"))
  315. return false;
  316. return true;
  317. }
  318. return false;
  319. }
  320. static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev)
  321. {
  322. struct bnxt_re_dev *rdev;
  323. rcu_read_lock();
  324. list_for_each_entry_rcu(rdev, &bnxt_re_dev_list, list) {
  325. if (rdev->netdev == netdev) {
  326. rcu_read_unlock();
  327. return rdev;
  328. }
  329. }
  330. rcu_read_unlock();
  331. return NULL;
  332. }
  333. static void bnxt_re_dev_unprobe(struct net_device *netdev,
  334. struct bnxt_en_dev *en_dev)
  335. {
  336. dev_put(netdev);
  337. module_put(en_dev->pdev->driver->driver.owner);
  338. }
  339. static struct bnxt_en_dev *bnxt_re_dev_probe(struct net_device *netdev)
  340. {
  341. struct bnxt *bp = netdev_priv(netdev);
  342. struct bnxt_en_dev *en_dev;
  343. struct pci_dev *pdev;
  344. /* Call bnxt_en's RoCE probe via indirect API */
  345. if (!bp->ulp_probe)
  346. return ERR_PTR(-EINVAL);
  347. en_dev = bp->ulp_probe(netdev);
  348. if (IS_ERR(en_dev))
  349. return en_dev;
  350. pdev = en_dev->pdev;
  351. if (!pdev)
  352. return ERR_PTR(-EINVAL);
  353. if (!(en_dev->flags & BNXT_EN_FLAG_ROCE_CAP)) {
  354. dev_dbg(&pdev->dev,
  355. "%s: probe error: RoCE is not supported on this device",
  356. ROCE_DRV_MODULE_NAME);
  357. return ERR_PTR(-ENODEV);
  358. }
  359. /* Bump net device reference count */
  360. if (!try_module_get(pdev->driver->driver.owner))
  361. return ERR_PTR(-ENODEV);
  362. dev_hold(netdev);
  363. return en_dev;
  364. }
  365. static void bnxt_re_unregister_ib(struct bnxt_re_dev *rdev)
  366. {
  367. ib_unregister_device(&rdev->ibdev);
  368. }
  369. static int bnxt_re_register_ib(struct bnxt_re_dev *rdev)
  370. {
  371. struct ib_device *ibdev = &rdev->ibdev;
  372. /* ib device init */
  373. ibdev->owner = THIS_MODULE;
  374. ibdev->node_type = RDMA_NODE_IB_CA;
  375. strlcpy(ibdev->name, "bnxt_re%d", IB_DEVICE_NAME_MAX);
  376. strlcpy(ibdev->node_desc, BNXT_RE_DESC " HCA",
  377. strlen(BNXT_RE_DESC) + 5);
  378. ibdev->phys_port_cnt = 1;
  379. bnxt_qplib_get_guid(rdev->netdev->dev_addr, (u8 *)&ibdev->node_guid);
  380. ibdev->num_comp_vectors = 1;
  381. ibdev->dev.parent = &rdev->en_dev->pdev->dev;
  382. ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY;
  383. /* User space */
  384. ibdev->uverbs_abi_ver = BNXT_RE_ABI_VERSION;
  385. ibdev->uverbs_cmd_mask =
  386. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  387. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  388. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  389. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  390. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  391. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  392. (1ull << IB_USER_VERBS_CMD_REREG_MR) |
  393. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  394. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  395. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  396. (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
  397. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  398. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  399. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  400. (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
  401. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  402. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  403. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  404. (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
  405. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
  406. (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
  407. (1ull << IB_USER_VERBS_CMD_MODIFY_AH) |
  408. (1ull << IB_USER_VERBS_CMD_QUERY_AH) |
  409. (1ull << IB_USER_VERBS_CMD_DESTROY_AH);
  410. /* POLL_CQ and REQ_NOTIFY_CQ is directly handled in libbnxt_re */
  411. /* Kernel verbs */
  412. ibdev->query_device = bnxt_re_query_device;
  413. ibdev->modify_device = bnxt_re_modify_device;
  414. ibdev->query_port = bnxt_re_query_port;
  415. ibdev->get_port_immutable = bnxt_re_get_port_immutable;
  416. ibdev->query_pkey = bnxt_re_query_pkey;
  417. ibdev->query_gid = bnxt_re_query_gid;
  418. ibdev->get_netdev = bnxt_re_get_netdev;
  419. ibdev->add_gid = bnxt_re_add_gid;
  420. ibdev->del_gid = bnxt_re_del_gid;
  421. ibdev->get_link_layer = bnxt_re_get_link_layer;
  422. ibdev->alloc_pd = bnxt_re_alloc_pd;
  423. ibdev->dealloc_pd = bnxt_re_dealloc_pd;
  424. ibdev->create_ah = bnxt_re_create_ah;
  425. ibdev->modify_ah = bnxt_re_modify_ah;
  426. ibdev->query_ah = bnxt_re_query_ah;
  427. ibdev->destroy_ah = bnxt_re_destroy_ah;
  428. ibdev->create_qp = bnxt_re_create_qp;
  429. ibdev->modify_qp = bnxt_re_modify_qp;
  430. ibdev->query_qp = bnxt_re_query_qp;
  431. ibdev->destroy_qp = bnxt_re_destroy_qp;
  432. ibdev->post_send = bnxt_re_post_send;
  433. ibdev->post_recv = bnxt_re_post_recv;
  434. ibdev->create_cq = bnxt_re_create_cq;
  435. ibdev->destroy_cq = bnxt_re_destroy_cq;
  436. ibdev->poll_cq = bnxt_re_poll_cq;
  437. ibdev->req_notify_cq = bnxt_re_req_notify_cq;
  438. ibdev->get_dma_mr = bnxt_re_get_dma_mr;
  439. ibdev->dereg_mr = bnxt_re_dereg_mr;
  440. ibdev->alloc_mr = bnxt_re_alloc_mr;
  441. ibdev->map_mr_sg = bnxt_re_map_mr_sg;
  442. ibdev->reg_user_mr = bnxt_re_reg_user_mr;
  443. ibdev->alloc_ucontext = bnxt_re_alloc_ucontext;
  444. ibdev->dealloc_ucontext = bnxt_re_dealloc_ucontext;
  445. ibdev->mmap = bnxt_re_mmap;
  446. ibdev->get_hw_stats = bnxt_re_ib_get_hw_stats;
  447. ibdev->alloc_hw_stats = bnxt_re_ib_alloc_hw_stats;
  448. return ib_register_device(ibdev, NULL);
  449. }
  450. static ssize_t show_rev(struct device *device, struct device_attribute *attr,
  451. char *buf)
  452. {
  453. struct bnxt_re_dev *rdev = to_bnxt_re_dev(device, ibdev.dev);
  454. return scnprintf(buf, PAGE_SIZE, "0x%x\n", rdev->en_dev->pdev->vendor);
  455. }
  456. static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
  457. char *buf)
  458. {
  459. struct bnxt_re_dev *rdev = to_bnxt_re_dev(device, ibdev.dev);
  460. return scnprintf(buf, PAGE_SIZE, "%s\n", rdev->dev_attr.fw_ver);
  461. }
  462. static ssize_t show_hca(struct device *device, struct device_attribute *attr,
  463. char *buf)
  464. {
  465. struct bnxt_re_dev *rdev = to_bnxt_re_dev(device, ibdev.dev);
  466. return scnprintf(buf, PAGE_SIZE, "%s\n", rdev->ibdev.node_desc);
  467. }
  468. static DEVICE_ATTR(hw_rev, 0444, show_rev, NULL);
  469. static DEVICE_ATTR(fw_rev, 0444, show_fw_ver, NULL);
  470. static DEVICE_ATTR(hca_type, 0444, show_hca, NULL);
  471. static struct device_attribute *bnxt_re_attributes[] = {
  472. &dev_attr_hw_rev,
  473. &dev_attr_fw_rev,
  474. &dev_attr_hca_type
  475. };
  476. static void bnxt_re_dev_remove(struct bnxt_re_dev *rdev)
  477. {
  478. dev_put(rdev->netdev);
  479. rdev->netdev = NULL;
  480. mutex_lock(&bnxt_re_dev_lock);
  481. list_del_rcu(&rdev->list);
  482. mutex_unlock(&bnxt_re_dev_lock);
  483. synchronize_rcu();
  484. flush_workqueue(bnxt_re_wq);
  485. ib_dealloc_device(&rdev->ibdev);
  486. /* rdev is gone */
  487. }
  488. static struct bnxt_re_dev *bnxt_re_dev_add(struct net_device *netdev,
  489. struct bnxt_en_dev *en_dev)
  490. {
  491. struct bnxt_re_dev *rdev;
  492. /* Allocate bnxt_re_dev instance here */
  493. rdev = (struct bnxt_re_dev *)ib_alloc_device(sizeof(*rdev));
  494. if (!rdev) {
  495. dev_err(NULL, "%s: bnxt_re_dev allocation failure!",
  496. ROCE_DRV_MODULE_NAME);
  497. return NULL;
  498. }
  499. /* Default values */
  500. rdev->netdev = netdev;
  501. dev_hold(rdev->netdev);
  502. rdev->en_dev = en_dev;
  503. rdev->id = rdev->en_dev->pdev->devfn;
  504. INIT_LIST_HEAD(&rdev->qp_list);
  505. mutex_init(&rdev->qp_lock);
  506. atomic_set(&rdev->qp_count, 0);
  507. atomic_set(&rdev->cq_count, 0);
  508. atomic_set(&rdev->srq_count, 0);
  509. atomic_set(&rdev->mr_count, 0);
  510. atomic_set(&rdev->mw_count, 0);
  511. rdev->cosq[0] = 0xFFFF;
  512. rdev->cosq[1] = 0xFFFF;
  513. mutex_lock(&bnxt_re_dev_lock);
  514. list_add_tail_rcu(&rdev->list, &bnxt_re_dev_list);
  515. mutex_unlock(&bnxt_re_dev_lock);
  516. return rdev;
  517. }
  518. static int bnxt_re_aeq_handler(struct bnxt_qplib_rcfw *rcfw,
  519. struct creq_func_event *aeqe)
  520. {
  521. switch (aeqe->event) {
  522. case CREQ_FUNC_EVENT_EVENT_TX_WQE_ERROR:
  523. break;
  524. case CREQ_FUNC_EVENT_EVENT_TX_DATA_ERROR:
  525. break;
  526. case CREQ_FUNC_EVENT_EVENT_RX_WQE_ERROR:
  527. break;
  528. case CREQ_FUNC_EVENT_EVENT_RX_DATA_ERROR:
  529. break;
  530. case CREQ_FUNC_EVENT_EVENT_CQ_ERROR:
  531. break;
  532. case CREQ_FUNC_EVENT_EVENT_TQM_ERROR:
  533. break;
  534. case CREQ_FUNC_EVENT_EVENT_CFCQ_ERROR:
  535. break;
  536. case CREQ_FUNC_EVENT_EVENT_CFCS_ERROR:
  537. break;
  538. case CREQ_FUNC_EVENT_EVENT_CFCC_ERROR:
  539. break;
  540. case CREQ_FUNC_EVENT_EVENT_CFCM_ERROR:
  541. break;
  542. case CREQ_FUNC_EVENT_EVENT_TIM_ERROR:
  543. break;
  544. default:
  545. return -EINVAL;
  546. }
  547. return 0;
  548. }
  549. static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq,
  550. struct bnxt_qplib_cq *handle)
  551. {
  552. struct bnxt_re_cq *cq = container_of(handle, struct bnxt_re_cq,
  553. qplib_cq);
  554. if (!cq) {
  555. dev_err(NULL, "%s: CQ is NULL, CQN not handled",
  556. ROCE_DRV_MODULE_NAME);
  557. return -EINVAL;
  558. }
  559. if (cq->ib_cq.comp_handler) {
  560. /* Lock comp_handler? */
  561. (*cq->ib_cq.comp_handler)(&cq->ib_cq, cq->ib_cq.cq_context);
  562. }
  563. return 0;
  564. }
  565. static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev)
  566. {
  567. int i;
  568. if (rdev->nq[0].hwq.max_elements) {
  569. for (i = 1; i < rdev->num_msix; i++)
  570. bnxt_qplib_disable_nq(&rdev->nq[i - 1]);
  571. }
  572. if (rdev->qplib_res.rcfw)
  573. bnxt_qplib_cleanup_res(&rdev->qplib_res);
  574. }
  575. static int bnxt_re_init_res(struct bnxt_re_dev *rdev)
  576. {
  577. int rc = 0, i;
  578. bnxt_qplib_init_res(&rdev->qplib_res);
  579. for (i = 1; i < rdev->num_msix ; i++) {
  580. rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq[i - 1],
  581. i - 1, rdev->msix_entries[i].vector,
  582. rdev->msix_entries[i].db_offset,
  583. &bnxt_re_cqn_handler, NULL);
  584. if (rc) {
  585. dev_err(rdev_to_dev(rdev),
  586. "Failed to enable NQ with rc = 0x%x", rc);
  587. goto fail;
  588. }
  589. }
  590. return 0;
  591. fail:
  592. return rc;
  593. }
  594. static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev, bool lock_wait)
  595. {
  596. int i;
  597. for (i = 0; i < rdev->num_msix - 1; i++) {
  598. bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, lock_wait);
  599. bnxt_qplib_free_nq(&rdev->nq[i]);
  600. }
  601. }
  602. static void bnxt_re_free_res(struct bnxt_re_dev *rdev, bool lock_wait)
  603. {
  604. bnxt_re_free_nq_res(rdev, lock_wait);
  605. if (rdev->qplib_res.dpi_tbl.max) {
  606. bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
  607. &rdev->qplib_res.dpi_tbl,
  608. &rdev->dpi_privileged);
  609. }
  610. if (rdev->qplib_res.rcfw) {
  611. bnxt_qplib_free_res(&rdev->qplib_res);
  612. rdev->qplib_res.rcfw = NULL;
  613. }
  614. }
  615. static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev)
  616. {
  617. int rc = 0, i;
  618. /* Configure and allocate resources for qplib */
  619. rdev->qplib_res.rcfw = &rdev->rcfw;
  620. rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr);
  621. if (rc)
  622. goto fail;
  623. rc = bnxt_qplib_alloc_res(&rdev->qplib_res, rdev->en_dev->pdev,
  624. rdev->netdev, &rdev->dev_attr);
  625. if (rc)
  626. goto fail;
  627. rc = bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl,
  628. &rdev->dpi_privileged,
  629. rdev);
  630. if (rc)
  631. goto dealloc_res;
  632. for (i = 0; i < rdev->num_msix - 1; i++) {
  633. rdev->nq[i].hwq.max_elements = BNXT_RE_MAX_CQ_COUNT +
  634. BNXT_RE_MAX_SRQC_COUNT + 2;
  635. rc = bnxt_qplib_alloc_nq(rdev->en_dev->pdev, &rdev->nq[i]);
  636. if (rc) {
  637. dev_err(rdev_to_dev(rdev), "Alloc Failed NQ%d rc:%#x",
  638. i, rc);
  639. goto dealloc_dpi;
  640. }
  641. rc = bnxt_re_net_ring_alloc
  642. (rdev, rdev->nq[i].hwq.pbl[PBL_LVL_0].pg_map_arr,
  643. rdev->nq[i].hwq.pbl[rdev->nq[i].hwq.level].pg_count,
  644. HWRM_RING_ALLOC_CMPL,
  645. BNXT_QPLIB_NQE_MAX_CNT - 1,
  646. rdev->msix_entries[i + 1].ring_idx,
  647. &rdev->nq[i].ring_id);
  648. if (rc) {
  649. dev_err(rdev_to_dev(rdev),
  650. "Failed to allocate NQ fw id with rc = 0x%x",
  651. rc);
  652. goto free_nq;
  653. }
  654. }
  655. return 0;
  656. free_nq:
  657. for (i = 0; i < rdev->num_msix - 1; i++)
  658. bnxt_qplib_free_nq(&rdev->nq[i]);
  659. dealloc_dpi:
  660. bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
  661. &rdev->qplib_res.dpi_tbl,
  662. &rdev->dpi_privileged);
  663. dealloc_res:
  664. bnxt_qplib_free_res(&rdev->qplib_res);
  665. fail:
  666. rdev->qplib_res.rcfw = NULL;
  667. return rc;
  668. }
  669. static void bnxt_re_dispatch_event(struct ib_device *ibdev, struct ib_qp *qp,
  670. u8 port_num, enum ib_event_type event)
  671. {
  672. struct ib_event ib_event;
  673. ib_event.device = ibdev;
  674. if (qp)
  675. ib_event.element.qp = qp;
  676. else
  677. ib_event.element.port_num = port_num;
  678. ib_event.event = event;
  679. ib_dispatch_event(&ib_event);
  680. }
  681. #define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN 0x02
  682. static int bnxt_re_query_hwrm_pri2cos(struct bnxt_re_dev *rdev, u8 dir,
  683. u64 *cid_map)
  684. {
  685. struct hwrm_queue_pri2cos_qcfg_input req = {0};
  686. struct bnxt *bp = netdev_priv(rdev->netdev);
  687. struct hwrm_queue_pri2cos_qcfg_output resp;
  688. struct bnxt_en_dev *en_dev = rdev->en_dev;
  689. struct bnxt_fw_msg fw_msg;
  690. u32 flags = 0;
  691. u8 *qcfgmap, *tmp_map;
  692. int rc = 0, i;
  693. if (!cid_map)
  694. return -EINVAL;
  695. memset(&fw_msg, 0, sizeof(fw_msg));
  696. bnxt_re_init_hwrm_hdr(rdev, (void *)&req,
  697. HWRM_QUEUE_PRI2COS_QCFG, -1, -1);
  698. flags |= (dir & 0x01);
  699. flags |= HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN;
  700. req.flags = cpu_to_le32(flags);
  701. req.port_id = bp->pf.port_id;
  702. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
  703. sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
  704. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  705. if (rc)
  706. return rc;
  707. if (resp.queue_cfg_info) {
  708. dev_warn(rdev_to_dev(rdev),
  709. "Asymmetric cos queue configuration detected");
  710. dev_warn(rdev_to_dev(rdev),
  711. " on device, QoS may not be fully functional\n");
  712. }
  713. qcfgmap = &resp.pri0_cos_queue_id;
  714. tmp_map = (u8 *)cid_map;
  715. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
  716. tmp_map[i] = qcfgmap[i];
  717. return rc;
  718. }
  719. static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev,
  720. struct bnxt_re_qp *qp)
  721. {
  722. return (qp->ib_qp.qp_type == IB_QPT_GSI) || (qp == rdev->qp1_sqp);
  723. }
  724. static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev)
  725. {
  726. int mask = IB_QP_STATE;
  727. struct ib_qp_attr qp_attr;
  728. struct bnxt_re_qp *qp;
  729. qp_attr.qp_state = IB_QPS_ERR;
  730. mutex_lock(&rdev->qp_lock);
  731. list_for_each_entry(qp, &rdev->qp_list, list) {
  732. /* Modify the state of all QPs except QP1/Shadow QP */
  733. if (!bnxt_re_is_qp1_or_shadow_qp(rdev, qp)) {
  734. if (qp->qplib_qp.state !=
  735. CMDQ_MODIFY_QP_NEW_STATE_RESET &&
  736. qp->qplib_qp.state !=
  737. CMDQ_MODIFY_QP_NEW_STATE_ERR) {
  738. bnxt_re_dispatch_event(&rdev->ibdev, &qp->ib_qp,
  739. 1, IB_EVENT_QP_FATAL);
  740. bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, mask,
  741. NULL);
  742. }
  743. }
  744. }
  745. mutex_unlock(&rdev->qp_lock);
  746. }
  747. static int bnxt_re_update_gid(struct bnxt_re_dev *rdev)
  748. {
  749. struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl;
  750. struct bnxt_qplib_gid gid;
  751. u16 gid_idx, index;
  752. int rc = 0;
  753. if (!test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags))
  754. return 0;
  755. if (!sgid_tbl) {
  756. dev_err(rdev_to_dev(rdev), "QPLIB: SGID table not allocated");
  757. return -EINVAL;
  758. }
  759. for (index = 0; index < sgid_tbl->active; index++) {
  760. gid_idx = sgid_tbl->hw_id[index];
  761. if (!memcmp(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero,
  762. sizeof(bnxt_qplib_gid_zero)))
  763. continue;
  764. /* need to modify the VLAN enable setting of non VLAN GID only
  765. * as setting is done for VLAN GID while adding GID
  766. */
  767. if (sgid_tbl->vlan[index])
  768. continue;
  769. memcpy(&gid, &sgid_tbl->tbl[index], sizeof(gid));
  770. rc = bnxt_qplib_update_sgid(sgid_tbl, &gid, gid_idx,
  771. rdev->qplib_res.netdev->dev_addr);
  772. }
  773. return rc;
  774. }
  775. static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev)
  776. {
  777. u32 prio_map = 0, tmp_map = 0;
  778. struct net_device *netdev;
  779. struct dcb_app app;
  780. netdev = rdev->netdev;
  781. memset(&app, 0, sizeof(app));
  782. app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE;
  783. app.protocol = ETH_P_IBOE;
  784. tmp_map = dcb_ieee_getapp_mask(netdev, &app);
  785. prio_map = tmp_map;
  786. app.selector = IEEE_8021QAZ_APP_SEL_DGRAM;
  787. app.protocol = ROCE_V2_UDP_DPORT;
  788. tmp_map = dcb_ieee_getapp_mask(netdev, &app);
  789. prio_map |= tmp_map;
  790. return prio_map;
  791. }
  792. static void bnxt_re_parse_cid_map(u8 prio_map, u8 *cid_map, u16 *cosq)
  793. {
  794. u16 prio;
  795. u8 id;
  796. for (prio = 0, id = 0; prio < 8; prio++) {
  797. if (prio_map & (1 << prio)) {
  798. cosq[id] = cid_map[prio];
  799. id++;
  800. if (id == 2) /* Max 2 tcs supported */
  801. break;
  802. }
  803. }
  804. }
  805. static int bnxt_re_setup_qos(struct bnxt_re_dev *rdev)
  806. {
  807. u8 prio_map = 0;
  808. u64 cid_map;
  809. int rc;
  810. /* Get priority for roce */
  811. prio_map = bnxt_re_get_priority_mask(rdev);
  812. if (prio_map == rdev->cur_prio_map)
  813. return 0;
  814. rdev->cur_prio_map = prio_map;
  815. /* Get cosq id for this priority */
  816. rc = bnxt_re_query_hwrm_pri2cos(rdev, 0, &cid_map);
  817. if (rc) {
  818. dev_warn(rdev_to_dev(rdev), "no cos for p_mask %x\n", prio_map);
  819. return rc;
  820. }
  821. /* Parse CoS IDs for app priority */
  822. bnxt_re_parse_cid_map(prio_map, (u8 *)&cid_map, rdev->cosq);
  823. /* Config BONO. */
  824. rc = bnxt_qplib_map_tc2cos(&rdev->qplib_res, rdev->cosq);
  825. if (rc) {
  826. dev_warn(rdev_to_dev(rdev), "no tc for cos{%x, %x}\n",
  827. rdev->cosq[0], rdev->cosq[1]);
  828. return rc;
  829. }
  830. /* Actual priorities are not programmed as they are already
  831. * done by L2 driver; just enable or disable priority vlan tagging
  832. */
  833. if ((prio_map == 0 && rdev->qplib_res.prio) ||
  834. (prio_map != 0 && !rdev->qplib_res.prio)) {
  835. rdev->qplib_res.prio = prio_map ? true : false;
  836. bnxt_re_update_gid(rdev);
  837. }
  838. return 0;
  839. }
  840. static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev, bool lock_wait)
  841. {
  842. int i, rc;
  843. if (test_and_clear_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) {
  844. for (i = 0; i < ARRAY_SIZE(bnxt_re_attributes); i++)
  845. device_remove_file(&rdev->ibdev.dev,
  846. bnxt_re_attributes[i]);
  847. /* Cleanup ib dev */
  848. bnxt_re_unregister_ib(rdev);
  849. }
  850. if (test_and_clear_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags))
  851. cancel_delayed_work(&rdev->worker);
  852. bnxt_re_cleanup_res(rdev);
  853. bnxt_re_free_res(rdev, lock_wait);
  854. if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) {
  855. rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw);
  856. if (rc)
  857. dev_warn(rdev_to_dev(rdev),
  858. "Failed to deinitialize RCFW: %#x", rc);
  859. bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id,
  860. lock_wait);
  861. bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx);
  862. bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
  863. bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, lock_wait);
  864. bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
  865. }
  866. if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags)) {
  867. rc = bnxt_re_free_msix(rdev, lock_wait);
  868. if (rc)
  869. dev_warn(rdev_to_dev(rdev),
  870. "Failed to free MSI-X vectors: %#x", rc);
  871. }
  872. if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) {
  873. rc = bnxt_re_unregister_netdev(rdev, lock_wait);
  874. if (rc)
  875. dev_warn(rdev_to_dev(rdev),
  876. "Failed to unregister with netdev: %#x", rc);
  877. }
  878. }
  879. static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev)
  880. {
  881. u32 i;
  882. rdev->qplib_ctx.qpc_count = BNXT_RE_MAX_QPC_COUNT;
  883. rdev->qplib_ctx.mrw_count = BNXT_RE_MAX_MRW_COUNT;
  884. rdev->qplib_ctx.srqc_count = BNXT_RE_MAX_SRQC_COUNT;
  885. rdev->qplib_ctx.cq_count = BNXT_RE_MAX_CQ_COUNT;
  886. for (i = 0; i < MAX_TQM_ALLOC_REQ; i++)
  887. rdev->qplib_ctx.tqm_count[i] =
  888. rdev->dev_attr.tqm_alloc_reqs[i];
  889. }
  890. /* worker thread for polling periodic events. Now used for QoS programming*/
  891. static void bnxt_re_worker(struct work_struct *work)
  892. {
  893. struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev,
  894. worker.work);
  895. bnxt_re_setup_qos(rdev);
  896. schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
  897. }
  898. static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev)
  899. {
  900. int i, j, rc;
  901. /* Registered a new RoCE device instance to netdev */
  902. rc = bnxt_re_register_netdev(rdev);
  903. if (rc) {
  904. pr_err("Failed to register with netedev: %#x\n", rc);
  905. return -EINVAL;
  906. }
  907. set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
  908. rc = bnxt_re_request_msix(rdev);
  909. if (rc) {
  910. pr_err("Failed to get MSI-X vectors: %#x\n", rc);
  911. rc = -EINVAL;
  912. goto fail;
  913. }
  914. set_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags);
  915. /* Establish RCFW Communication Channel to initialize the context
  916. * memory for the function and all child VFs
  917. */
  918. rc = bnxt_qplib_alloc_rcfw_channel(rdev->en_dev->pdev, &rdev->rcfw,
  919. BNXT_RE_MAX_QPC_COUNT);
  920. if (rc) {
  921. pr_err("Failed to allocate RCFW Channel: %#x\n", rc);
  922. goto fail;
  923. }
  924. rc = bnxt_re_net_ring_alloc
  925. (rdev, rdev->rcfw.creq.pbl[PBL_LVL_0].pg_map_arr,
  926. rdev->rcfw.creq.pbl[rdev->rcfw.creq.level].pg_count,
  927. HWRM_RING_ALLOC_CMPL, BNXT_QPLIB_CREQE_MAX_CNT - 1,
  928. rdev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx,
  929. &rdev->rcfw.creq_ring_id);
  930. if (rc) {
  931. pr_err("Failed to allocate CREQ: %#x\n", rc);
  932. goto free_rcfw;
  933. }
  934. rc = bnxt_qplib_enable_rcfw_channel
  935. (rdev->en_dev->pdev, &rdev->rcfw,
  936. rdev->msix_entries[BNXT_RE_AEQ_IDX].vector,
  937. rdev->msix_entries[BNXT_RE_AEQ_IDX].db_offset,
  938. 0, &bnxt_re_aeq_handler);
  939. if (rc) {
  940. pr_err("Failed to enable RCFW channel: %#x\n", rc);
  941. goto free_ring;
  942. }
  943. rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr);
  944. if (rc)
  945. goto disable_rcfw;
  946. bnxt_re_set_resource_limits(rdev);
  947. rc = bnxt_qplib_alloc_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx, 0);
  948. if (rc) {
  949. pr_err("Failed to allocate QPLIB context: %#x\n", rc);
  950. goto disable_rcfw;
  951. }
  952. rc = bnxt_re_net_stats_ctx_alloc(rdev,
  953. rdev->qplib_ctx.stats.dma_map,
  954. &rdev->qplib_ctx.stats.fw_id);
  955. if (rc) {
  956. pr_err("Failed to allocate stats context: %#x\n", rc);
  957. goto free_ctx;
  958. }
  959. rc = bnxt_qplib_init_rcfw(&rdev->rcfw, &rdev->qplib_ctx, 0);
  960. if (rc) {
  961. pr_err("Failed to initialize RCFW: %#x\n", rc);
  962. goto free_sctx;
  963. }
  964. set_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags);
  965. /* Resources based on the 'new' device caps */
  966. rc = bnxt_re_alloc_res(rdev);
  967. if (rc) {
  968. pr_err("Failed to allocate resources: %#x\n", rc);
  969. goto fail;
  970. }
  971. rc = bnxt_re_init_res(rdev);
  972. if (rc) {
  973. pr_err("Failed to initialize resources: %#x\n", rc);
  974. goto fail;
  975. }
  976. rc = bnxt_re_setup_qos(rdev);
  977. if (rc)
  978. pr_info("RoCE priority not yet configured\n");
  979. INIT_DELAYED_WORK(&rdev->worker, bnxt_re_worker);
  980. set_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags);
  981. schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
  982. /* Register ib dev */
  983. rc = bnxt_re_register_ib(rdev);
  984. if (rc) {
  985. pr_err("Failed to register with IB: %#x\n", rc);
  986. goto fail;
  987. }
  988. dev_info(rdev_to_dev(rdev), "Device registered successfully");
  989. for (i = 0; i < ARRAY_SIZE(bnxt_re_attributes); i++) {
  990. rc = device_create_file(&rdev->ibdev.dev,
  991. bnxt_re_attributes[i]);
  992. if (rc) {
  993. dev_err(rdev_to_dev(rdev),
  994. "Failed to create IB sysfs: %#x", rc);
  995. /* Must clean up all created device files */
  996. for (j = 0; j < i; j++)
  997. device_remove_file(&rdev->ibdev.dev,
  998. bnxt_re_attributes[j]);
  999. bnxt_re_unregister_ib(rdev);
  1000. goto fail;
  1001. }
  1002. }
  1003. set_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags);
  1004. ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed,
  1005. &rdev->active_width);
  1006. bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_PORT_ACTIVE);
  1007. bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_GID_CHANGE);
  1008. return 0;
  1009. free_sctx:
  1010. bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id, true);
  1011. free_ctx:
  1012. bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx);
  1013. disable_rcfw:
  1014. bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
  1015. free_ring:
  1016. bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, true);
  1017. free_rcfw:
  1018. bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
  1019. fail:
  1020. bnxt_re_ib_unreg(rdev, true);
  1021. return rc;
  1022. }
  1023. static void bnxt_re_dev_unreg(struct bnxt_re_dev *rdev)
  1024. {
  1025. struct bnxt_en_dev *en_dev = rdev->en_dev;
  1026. struct net_device *netdev = rdev->netdev;
  1027. bnxt_re_dev_remove(rdev);
  1028. if (netdev)
  1029. bnxt_re_dev_unprobe(netdev, en_dev);
  1030. }
  1031. static int bnxt_re_dev_reg(struct bnxt_re_dev **rdev, struct net_device *netdev)
  1032. {
  1033. struct bnxt_en_dev *en_dev;
  1034. int rc = 0;
  1035. if (!is_bnxt_re_dev(netdev))
  1036. return -ENODEV;
  1037. en_dev = bnxt_re_dev_probe(netdev);
  1038. if (IS_ERR(en_dev)) {
  1039. if (en_dev != ERR_PTR(-ENODEV))
  1040. pr_err("%s: Failed to probe\n", ROCE_DRV_MODULE_NAME);
  1041. rc = PTR_ERR(en_dev);
  1042. goto exit;
  1043. }
  1044. *rdev = bnxt_re_dev_add(netdev, en_dev);
  1045. if (!*rdev) {
  1046. rc = -ENOMEM;
  1047. bnxt_re_dev_unprobe(netdev, en_dev);
  1048. goto exit;
  1049. }
  1050. exit:
  1051. return rc;
  1052. }
  1053. static void bnxt_re_remove_one(struct bnxt_re_dev *rdev)
  1054. {
  1055. pci_dev_put(rdev->en_dev->pdev);
  1056. }
  1057. /* Handle all deferred netevents tasks */
  1058. static void bnxt_re_task(struct work_struct *work)
  1059. {
  1060. struct bnxt_re_work *re_work;
  1061. struct bnxt_re_dev *rdev;
  1062. int rc = 0;
  1063. re_work = container_of(work, struct bnxt_re_work, work);
  1064. rdev = re_work->rdev;
  1065. if (re_work->event != NETDEV_REGISTER &&
  1066. !test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags))
  1067. return;
  1068. switch (re_work->event) {
  1069. case NETDEV_REGISTER:
  1070. rc = bnxt_re_ib_reg(rdev);
  1071. if (rc)
  1072. dev_err(rdev_to_dev(rdev),
  1073. "Failed to register with IB: %#x", rc);
  1074. break;
  1075. case NETDEV_UP:
  1076. bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
  1077. IB_EVENT_PORT_ACTIVE);
  1078. break;
  1079. case NETDEV_DOWN:
  1080. bnxt_re_dev_stop(rdev);
  1081. break;
  1082. case NETDEV_CHANGE:
  1083. if (!netif_carrier_ok(rdev->netdev))
  1084. bnxt_re_dev_stop(rdev);
  1085. else if (netif_carrier_ok(rdev->netdev))
  1086. bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
  1087. IB_EVENT_PORT_ACTIVE);
  1088. ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed,
  1089. &rdev->active_width);
  1090. break;
  1091. default:
  1092. break;
  1093. }
  1094. smp_mb__before_atomic();
  1095. clear_bit(BNXT_RE_FLAG_TASK_IN_PROG, &rdev->flags);
  1096. kfree(re_work);
  1097. }
  1098. static void bnxt_re_init_one(struct bnxt_re_dev *rdev)
  1099. {
  1100. pci_dev_get(rdev->en_dev->pdev);
  1101. }
  1102. /*
  1103. * "Notifier chain callback can be invoked for the same chain from
  1104. * different CPUs at the same time".
  1105. *
  1106. * For cases when the netdev is already present, our call to the
  1107. * register_netdevice_notifier() will actually get the rtnl_lock()
  1108. * before sending NETDEV_REGISTER and (if up) NETDEV_UP
  1109. * events.
  1110. *
  1111. * But for cases when the netdev is not already present, the notifier
  1112. * chain is subjected to be invoked from different CPUs simultaneously.
  1113. *
  1114. * This is protected by the netdev_mutex.
  1115. */
  1116. static int bnxt_re_netdev_event(struct notifier_block *notifier,
  1117. unsigned long event, void *ptr)
  1118. {
  1119. struct net_device *real_dev, *netdev = netdev_notifier_info_to_dev(ptr);
  1120. struct bnxt_re_work *re_work;
  1121. struct bnxt_re_dev *rdev;
  1122. int rc = 0;
  1123. bool sch_work = false;
  1124. real_dev = rdma_vlan_dev_real_dev(netdev);
  1125. if (!real_dev)
  1126. real_dev = netdev;
  1127. rdev = bnxt_re_from_netdev(real_dev);
  1128. if (!rdev && event != NETDEV_REGISTER)
  1129. goto exit;
  1130. if (real_dev != netdev)
  1131. goto exit;
  1132. switch (event) {
  1133. case NETDEV_REGISTER:
  1134. if (rdev)
  1135. break;
  1136. rc = bnxt_re_dev_reg(&rdev, real_dev);
  1137. if (rc == -ENODEV)
  1138. break;
  1139. if (rc) {
  1140. pr_err("Failed to register with the device %s: %#x\n",
  1141. real_dev->name, rc);
  1142. break;
  1143. }
  1144. bnxt_re_init_one(rdev);
  1145. sch_work = true;
  1146. break;
  1147. case NETDEV_UNREGISTER:
  1148. /* netdev notifier will call NETDEV_UNREGISTER again later since
  1149. * we are still holding the reference to the netdev
  1150. */
  1151. if (test_bit(BNXT_RE_FLAG_TASK_IN_PROG, &rdev->flags))
  1152. goto exit;
  1153. bnxt_re_ib_unreg(rdev, false);
  1154. bnxt_re_remove_one(rdev);
  1155. bnxt_re_dev_unreg(rdev);
  1156. break;
  1157. default:
  1158. sch_work = true;
  1159. break;
  1160. }
  1161. if (sch_work) {
  1162. /* Allocate for the deferred task */
  1163. re_work = kzalloc(sizeof(*re_work), GFP_ATOMIC);
  1164. if (re_work) {
  1165. re_work->rdev = rdev;
  1166. re_work->event = event;
  1167. re_work->vlan_dev = (real_dev == netdev ?
  1168. NULL : netdev);
  1169. INIT_WORK(&re_work->work, bnxt_re_task);
  1170. set_bit(BNXT_RE_FLAG_TASK_IN_PROG, &rdev->flags);
  1171. queue_work(bnxt_re_wq, &re_work->work);
  1172. }
  1173. }
  1174. exit:
  1175. return NOTIFY_DONE;
  1176. }
  1177. static struct notifier_block bnxt_re_netdev_notifier = {
  1178. .notifier_call = bnxt_re_netdev_event
  1179. };
  1180. static int __init bnxt_re_mod_init(void)
  1181. {
  1182. int rc = 0;
  1183. pr_info("%s: %s", ROCE_DRV_MODULE_NAME, version);
  1184. bnxt_re_wq = create_singlethread_workqueue("bnxt_re");
  1185. if (!bnxt_re_wq)
  1186. return -ENOMEM;
  1187. INIT_LIST_HEAD(&bnxt_re_dev_list);
  1188. rc = register_netdevice_notifier(&bnxt_re_netdev_notifier);
  1189. if (rc) {
  1190. pr_err("%s: Cannot register to netdevice_notifier",
  1191. ROCE_DRV_MODULE_NAME);
  1192. goto err_netdev;
  1193. }
  1194. return 0;
  1195. err_netdev:
  1196. destroy_workqueue(bnxt_re_wq);
  1197. return rc;
  1198. }
  1199. static void __exit bnxt_re_mod_exit(void)
  1200. {
  1201. struct bnxt_re_dev *rdev;
  1202. LIST_HEAD(to_be_deleted);
  1203. mutex_lock(&bnxt_re_dev_lock);
  1204. /* Free all adapter allocated resources */
  1205. if (!list_empty(&bnxt_re_dev_list))
  1206. list_splice_init(&bnxt_re_dev_list, &to_be_deleted);
  1207. mutex_unlock(&bnxt_re_dev_lock);
  1208. list_for_each_entry(rdev, &to_be_deleted, list) {
  1209. dev_info(rdev_to_dev(rdev), "Unregistering Device");
  1210. bnxt_re_dev_stop(rdev);
  1211. bnxt_re_ib_unreg(rdev, true);
  1212. bnxt_re_remove_one(rdev);
  1213. bnxt_re_dev_unreg(rdev);
  1214. }
  1215. unregister_netdevice_notifier(&bnxt_re_netdev_notifier);
  1216. if (bnxt_re_wq)
  1217. destroy_workqueue(bnxt_re_wq);
  1218. }
  1219. module_init(bnxt_re_mod_init);
  1220. module_exit(bnxt_re_mod_exit);