cpqphp_core.c 35 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Compaq Hot Plug Controller Driver
  4. *
  5. * Copyright (C) 1995,2001 Compaq Computer Corporation
  6. * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
  7. * Copyright (C) 2001 IBM Corp.
  8. *
  9. * All rights reserved.
  10. *
  11. * Send feedback to <greg@kroah.com>
  12. *
  13. * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
  14. * Torben Mathiasen <torben.mathiasen@hp.com>
  15. */
  16. #include <linux/module.h>
  17. #include <linux/moduleparam.h>
  18. #include <linux/kernel.h>
  19. #include <linux/types.h>
  20. #include <linux/proc_fs.h>
  21. #include <linux/slab.h>
  22. #include <linux/workqueue.h>
  23. #include <linux/pci.h>
  24. #include <linux/pci_hotplug.h>
  25. #include <linux/init.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/uaccess.h>
  28. #include "cpqphp.h"
  29. #include "cpqphp_nvram.h"
  30. /* Global variables */
  31. int cpqhp_debug;
  32. int cpqhp_legacy_mode;
  33. struct controller *cpqhp_ctrl_list; /* = NULL */
  34. struct pci_func *cpqhp_slot_list[256];
  35. struct irq_routing_table *cpqhp_routing_table;
  36. /* local variables */
  37. static void __iomem *smbios_table;
  38. static void __iomem *smbios_start;
  39. static void __iomem *cpqhp_rom_start;
  40. static bool power_mode;
  41. static bool debug;
  42. static int initialized;
  43. #define DRIVER_VERSION "0.9.8"
  44. #define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
  45. #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
  46. MODULE_AUTHOR(DRIVER_AUTHOR);
  47. MODULE_DESCRIPTION(DRIVER_DESC);
  48. MODULE_LICENSE("GPL");
  49. module_param(power_mode, bool, 0644);
  50. MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
  51. module_param(debug, bool, 0644);
  52. MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
  53. #define CPQHPC_MODULE_MINOR 208
  54. static inline int is_slot64bit(struct slot *slot)
  55. {
  56. return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
  57. }
  58. static inline int is_slot66mhz(struct slot *slot)
  59. {
  60. return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
  61. }
  62. /**
  63. * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
  64. * @begin: begin pointer for region to be scanned.
  65. * @end: end pointer for region to be scanned.
  66. *
  67. * Returns pointer to the head of the SMBIOS tables (or %NULL).
  68. */
  69. static void __iomem *detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
  70. {
  71. void __iomem *fp;
  72. void __iomem *endp;
  73. u8 temp1, temp2, temp3, temp4;
  74. int status = 0;
  75. endp = (end - sizeof(u32) + 1);
  76. for (fp = begin; fp <= endp; fp += 16) {
  77. temp1 = readb(fp);
  78. temp2 = readb(fp+1);
  79. temp3 = readb(fp+2);
  80. temp4 = readb(fp+3);
  81. if (temp1 == '_' &&
  82. temp2 == 'S' &&
  83. temp3 == 'M' &&
  84. temp4 == '_') {
  85. status = 1;
  86. break;
  87. }
  88. }
  89. if (!status)
  90. fp = NULL;
  91. dbg("Discovered SMBIOS Entry point at %p\n", fp);
  92. return fp;
  93. }
  94. /**
  95. * init_SERR - Initializes the per slot SERR generation.
  96. * @ctrl: controller to use
  97. *
  98. * For unexpected switch opens
  99. */
  100. static int init_SERR(struct controller *ctrl)
  101. {
  102. u32 tempdword;
  103. u32 number_of_slots;
  104. u8 physical_slot;
  105. if (!ctrl)
  106. return 1;
  107. tempdword = ctrl->first_slot;
  108. number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  109. /* Loop through slots */
  110. while (number_of_slots) {
  111. physical_slot = tempdword;
  112. writeb(0, ctrl->hpc_reg + SLOT_SERR);
  113. tempdword++;
  114. number_of_slots--;
  115. }
  116. return 0;
  117. }
  118. static int init_cpqhp_routing_table(void)
  119. {
  120. int len;
  121. cpqhp_routing_table = pcibios_get_irq_routing_table();
  122. if (cpqhp_routing_table == NULL)
  123. return -ENOMEM;
  124. len = cpqhp_routing_table_length();
  125. if (len == 0) {
  126. kfree(cpqhp_routing_table);
  127. cpqhp_routing_table = NULL;
  128. return -1;
  129. }
  130. return 0;
  131. }
  132. /* nice debugging output */
  133. static void pci_print_IRQ_route(void)
  134. {
  135. int len;
  136. int loop;
  137. u8 tbus, tdevice, tslot;
  138. len = cpqhp_routing_table_length();
  139. dbg("bus dev func slot\n");
  140. for (loop = 0; loop < len; ++loop) {
  141. tbus = cpqhp_routing_table->slots[loop].bus;
  142. tdevice = cpqhp_routing_table->slots[loop].devfn;
  143. tslot = cpqhp_routing_table->slots[loop].slot;
  144. dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
  145. }
  146. return;
  147. }
  148. /**
  149. * get_subsequent_smbios_entry: get the next entry from bios table.
  150. * @smbios_start: where to start in the SMBIOS table
  151. * @smbios_table: location of the SMBIOS table
  152. * @curr: %NULL or pointer to previously returned structure
  153. *
  154. * Gets the first entry if previous == NULL;
  155. * otherwise, returns the next entry.
  156. * Uses global SMBIOS Table pointer.
  157. *
  158. * Returns a pointer to an SMBIOS structure or NULL if none found.
  159. */
  160. static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
  161. void __iomem *smbios_table,
  162. void __iomem *curr)
  163. {
  164. u8 bail = 0;
  165. u8 previous_byte = 1;
  166. void __iomem *p_temp;
  167. void __iomem *p_max;
  168. if (!smbios_table || !curr)
  169. return NULL;
  170. /* set p_max to the end of the table */
  171. p_max = smbios_start + readw(smbios_table + ST_LENGTH);
  172. p_temp = curr;
  173. p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
  174. while ((p_temp < p_max) && !bail) {
  175. /* Look for the double NULL terminator
  176. * The first condition is the previous byte
  177. * and the second is the curr
  178. */
  179. if (!previous_byte && !(readb(p_temp)))
  180. bail = 1;
  181. previous_byte = readb(p_temp);
  182. p_temp++;
  183. }
  184. if (p_temp < p_max)
  185. return p_temp;
  186. else
  187. return NULL;
  188. }
  189. /**
  190. * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL
  191. * @smbios_start: where to start in the SMBIOS table
  192. * @smbios_table: location of the SMBIOS table
  193. * @type: SMBIOS structure type to be returned
  194. * @previous: %NULL or pointer to previously returned structure
  195. *
  196. * Gets the first entry of the specified type if previous == %NULL;
  197. * Otherwise, returns the next entry of the given type.
  198. * Uses global SMBIOS Table pointer.
  199. * Uses get_subsequent_smbios_entry.
  200. *
  201. * Returns a pointer to an SMBIOS structure or %NULL if none found.
  202. */
  203. static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
  204. void __iomem *smbios_table,
  205. u8 type,
  206. void __iomem *previous)
  207. {
  208. if (!smbios_table)
  209. return NULL;
  210. if (!previous)
  211. previous = smbios_start;
  212. else
  213. previous = get_subsequent_smbios_entry(smbios_start,
  214. smbios_table, previous);
  215. while (previous)
  216. if (readb(previous + SMBIOS_GENERIC_TYPE) != type)
  217. previous = get_subsequent_smbios_entry(smbios_start,
  218. smbios_table, previous);
  219. else
  220. break;
  221. return previous;
  222. }
  223. static void release_slot(struct hotplug_slot *hotplug_slot)
  224. {
  225. struct slot *slot = hotplug_slot->private;
  226. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  227. kfree(slot->hotplug_slot->info);
  228. kfree(slot->hotplug_slot);
  229. kfree(slot);
  230. }
  231. static int ctrl_slot_cleanup(struct controller *ctrl)
  232. {
  233. struct slot *old_slot, *next_slot;
  234. old_slot = ctrl->slot;
  235. ctrl->slot = NULL;
  236. while (old_slot) {
  237. /* memory will be freed by the release_slot callback */
  238. next_slot = old_slot->next;
  239. pci_hp_deregister(old_slot->hotplug_slot);
  240. old_slot = next_slot;
  241. }
  242. cpqhp_remove_debugfs_files(ctrl);
  243. /* Free IRQ associated with hot plug device */
  244. free_irq(ctrl->interrupt, ctrl);
  245. /* Unmap the memory */
  246. iounmap(ctrl->hpc_reg);
  247. /* Finally reclaim PCI mem */
  248. release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
  249. pci_resource_len(ctrl->pci_dev, 0));
  250. return 0;
  251. }
  252. /**
  253. * get_slot_mapping - determine logical slot mapping for PCI device
  254. *
  255. * Won't work for more than one PCI-PCI bridge in a slot.
  256. *
  257. * @bus_num - bus number of PCI device
  258. * @dev_num - device number of PCI device
  259. * @slot - Pointer to u8 where slot number will be returned
  260. *
  261. * Output: SUCCESS or FAILURE
  262. */
  263. static int
  264. get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
  265. {
  266. u32 work;
  267. long len;
  268. long loop;
  269. u8 tbus, tdevice, tslot, bridgeSlot;
  270. dbg("%s: %p, %d, %d, %p\n", __func__, bus, bus_num, dev_num, slot);
  271. bridgeSlot = 0xFF;
  272. len = cpqhp_routing_table_length();
  273. for (loop = 0; loop < len; ++loop) {
  274. tbus = cpqhp_routing_table->slots[loop].bus;
  275. tdevice = cpqhp_routing_table->slots[loop].devfn >> 3;
  276. tslot = cpqhp_routing_table->slots[loop].slot;
  277. if ((tbus == bus_num) && (tdevice == dev_num)) {
  278. *slot = tslot;
  279. return 0;
  280. } else {
  281. /* Did not get a match on the target PCI device. Check
  282. * if the current IRQ table entry is a PCI-to-PCI
  283. * bridge device. If so, and it's secondary bus
  284. * matches the bus number for the target device, I need
  285. * to save the bridge's slot number. If I can not find
  286. * an entry for the target device, I will have to
  287. * assume it's on the other side of the bridge, and
  288. * assign it the bridge's slot.
  289. */
  290. bus->number = tbus;
  291. pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
  292. PCI_CLASS_REVISION, &work);
  293. if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
  294. pci_bus_read_config_dword(bus,
  295. PCI_DEVFN(tdevice, 0),
  296. PCI_PRIMARY_BUS, &work);
  297. // See if bridge's secondary bus matches target bus.
  298. if (((work >> 8) & 0x000000FF) == (long) bus_num)
  299. bridgeSlot = tslot;
  300. }
  301. }
  302. }
  303. /* If we got here, we didn't find an entry in the IRQ mapping table for
  304. * the target PCI device. If we did determine that the target device
  305. * is on the other side of a PCI-to-PCI bridge, return the slot number
  306. * for the bridge.
  307. */
  308. if (bridgeSlot != 0xFF) {
  309. *slot = bridgeSlot;
  310. return 0;
  311. }
  312. /* Couldn't find an entry in the routing table for this PCI device */
  313. return -1;
  314. }
  315. /**
  316. * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
  317. * @ctrl: struct controller to use
  318. * @func: PCI device/function info
  319. * @status: LED control flag: 1 = LED on, 0 = LED off
  320. */
  321. static int
  322. cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
  323. u32 status)
  324. {
  325. u8 hp_slot;
  326. if (func == NULL)
  327. return 1;
  328. hp_slot = func->device - ctrl->slot_device_offset;
  329. /* Wait for exclusive access to hardware */
  330. mutex_lock(&ctrl->crit_sect);
  331. if (status == 1)
  332. amber_LED_on(ctrl, hp_slot);
  333. else if (status == 0)
  334. amber_LED_off(ctrl, hp_slot);
  335. else {
  336. /* Done with exclusive hardware access */
  337. mutex_unlock(&ctrl->crit_sect);
  338. return 1;
  339. }
  340. set_SOGO(ctrl);
  341. /* Wait for SOBS to be unset */
  342. wait_for_ctrl_irq(ctrl);
  343. /* Done with exclusive hardware access */
  344. mutex_unlock(&ctrl->crit_sect);
  345. return 0;
  346. }
  347. /**
  348. * set_attention_status - Turns the Amber LED for a slot on or off
  349. * @hotplug_slot: slot to change LED on
  350. * @status: LED control flag
  351. */
  352. static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 status)
  353. {
  354. struct pci_func *slot_func;
  355. struct slot *slot = hotplug_slot->private;
  356. struct controller *ctrl = slot->ctrl;
  357. u8 bus;
  358. u8 devfn;
  359. u8 device;
  360. u8 function;
  361. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  362. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  363. return -ENODEV;
  364. device = devfn >> 3;
  365. function = devfn & 0x7;
  366. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  367. slot_func = cpqhp_slot_find(bus, device, function);
  368. if (!slot_func)
  369. return -ENODEV;
  370. return cpqhp_set_attention_status(ctrl, slot_func, status);
  371. }
  372. static int process_SI(struct hotplug_slot *hotplug_slot)
  373. {
  374. struct pci_func *slot_func;
  375. struct slot *slot = hotplug_slot->private;
  376. struct controller *ctrl = slot->ctrl;
  377. u8 bus;
  378. u8 devfn;
  379. u8 device;
  380. u8 function;
  381. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  382. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  383. return -ENODEV;
  384. device = devfn >> 3;
  385. function = devfn & 0x7;
  386. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  387. slot_func = cpqhp_slot_find(bus, device, function);
  388. if (!slot_func)
  389. return -ENODEV;
  390. slot_func->bus = bus;
  391. slot_func->device = device;
  392. slot_func->function = function;
  393. slot_func->configured = 0;
  394. dbg("board_added(%p, %p)\n", slot_func, ctrl);
  395. return cpqhp_process_SI(ctrl, slot_func);
  396. }
  397. static int process_SS(struct hotplug_slot *hotplug_slot)
  398. {
  399. struct pci_func *slot_func;
  400. struct slot *slot = hotplug_slot->private;
  401. struct controller *ctrl = slot->ctrl;
  402. u8 bus;
  403. u8 devfn;
  404. u8 device;
  405. u8 function;
  406. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  407. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  408. return -ENODEV;
  409. device = devfn >> 3;
  410. function = devfn & 0x7;
  411. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  412. slot_func = cpqhp_slot_find(bus, device, function);
  413. if (!slot_func)
  414. return -ENODEV;
  415. dbg("In %s, slot_func = %p, ctrl = %p\n", __func__, slot_func, ctrl);
  416. return cpqhp_process_SS(ctrl, slot_func);
  417. }
  418. static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
  419. {
  420. struct slot *slot = hotplug_slot->private;
  421. struct controller *ctrl = slot->ctrl;
  422. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  423. return cpqhp_hardware_test(ctrl, value);
  424. }
  425. static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
  426. {
  427. struct slot *slot = hotplug_slot->private;
  428. struct controller *ctrl = slot->ctrl;
  429. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  430. *value = get_slot_enabled(ctrl, slot);
  431. return 0;
  432. }
  433. static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
  434. {
  435. struct slot *slot = hotplug_slot->private;
  436. struct controller *ctrl = slot->ctrl;
  437. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  438. *value = cpq_get_attention_status(ctrl, slot);
  439. return 0;
  440. }
  441. static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
  442. {
  443. struct slot *slot = hotplug_slot->private;
  444. struct controller *ctrl = slot->ctrl;
  445. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  446. *value = cpq_get_latch_status(ctrl, slot);
  447. return 0;
  448. }
  449. static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
  450. {
  451. struct slot *slot = hotplug_slot->private;
  452. struct controller *ctrl = slot->ctrl;
  453. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  454. *value = get_presence_status(ctrl, slot);
  455. return 0;
  456. }
  457. static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
  458. .set_attention_status = set_attention_status,
  459. .enable_slot = process_SI,
  460. .disable_slot = process_SS,
  461. .hardware_test = hardware_test,
  462. .get_power_status = get_power_status,
  463. .get_attention_status = get_attention_status,
  464. .get_latch_status = get_latch_status,
  465. .get_adapter_status = get_adapter_status,
  466. };
  467. #define SLOT_NAME_SIZE 10
  468. static int ctrl_slot_setup(struct controller *ctrl,
  469. void __iomem *smbios_start,
  470. void __iomem *smbios_table)
  471. {
  472. struct slot *slot;
  473. struct hotplug_slot *hotplug_slot;
  474. struct hotplug_slot_info *hotplug_slot_info;
  475. struct pci_bus *bus = ctrl->pci_bus;
  476. u8 number_of_slots;
  477. u8 slot_device;
  478. u8 slot_number;
  479. u8 ctrl_slot;
  480. u32 tempdword;
  481. char name[SLOT_NAME_SIZE];
  482. void __iomem *slot_entry = NULL;
  483. int result;
  484. dbg("%s\n", __func__);
  485. tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
  486. number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  487. slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  488. slot_number = ctrl->first_slot;
  489. while (number_of_slots) {
  490. slot = kzalloc(sizeof(*slot), GFP_KERNEL);
  491. if (!slot) {
  492. result = -ENOMEM;
  493. goto error;
  494. }
  495. slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)),
  496. GFP_KERNEL);
  497. if (!slot->hotplug_slot) {
  498. result = -ENOMEM;
  499. goto error_slot;
  500. }
  501. hotplug_slot = slot->hotplug_slot;
  502. hotplug_slot->info = kzalloc(sizeof(*(hotplug_slot->info)),
  503. GFP_KERNEL);
  504. if (!hotplug_slot->info) {
  505. result = -ENOMEM;
  506. goto error_hpslot;
  507. }
  508. hotplug_slot_info = hotplug_slot->info;
  509. slot->ctrl = ctrl;
  510. slot->bus = ctrl->bus;
  511. slot->device = slot_device;
  512. slot->number = slot_number;
  513. dbg("slot->number = %u\n", slot->number);
  514. slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
  515. slot_entry);
  516. while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
  517. slot->number)) {
  518. slot_entry = get_SMBIOS_entry(smbios_start,
  519. smbios_table, 9, slot_entry);
  520. }
  521. slot->p_sm_slot = slot_entry;
  522. timer_setup(&slot->task_event, cpqhp_pushbutton_thread, 0);
  523. slot->task_event.expires = jiffies + 5 * HZ;
  524. /*FIXME: these capabilities aren't used but if they are
  525. * they need to be correctly implemented
  526. */
  527. slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
  528. slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
  529. if (is_slot64bit(slot))
  530. slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
  531. if (is_slot66mhz(slot))
  532. slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
  533. if (bus->cur_bus_speed == PCI_SPEED_66MHz)
  534. slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
  535. ctrl_slot =
  536. slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
  537. /* Check presence */
  538. slot->capabilities |=
  539. ((((~tempdword) >> 23) |
  540. ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
  541. /* Check the switch state */
  542. slot->capabilities |=
  543. ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
  544. /* Check the slot enable */
  545. slot->capabilities |=
  546. ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
  547. /* register this slot with the hotplug pci core */
  548. hotplug_slot->release = &release_slot;
  549. hotplug_slot->private = slot;
  550. snprintf(name, SLOT_NAME_SIZE, "%u", slot->number);
  551. hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
  552. hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot);
  553. hotplug_slot_info->attention_status =
  554. cpq_get_attention_status(ctrl, slot);
  555. hotplug_slot_info->latch_status =
  556. cpq_get_latch_status(ctrl, slot);
  557. hotplug_slot_info->adapter_status =
  558. get_presence_status(ctrl, slot);
  559. dbg("registering bus %d, dev %d, number %d, ctrl->slot_device_offset %d, slot %d\n",
  560. slot->bus, slot->device,
  561. slot->number, ctrl->slot_device_offset,
  562. slot_number);
  563. result = pci_hp_register(hotplug_slot,
  564. ctrl->pci_dev->bus,
  565. slot->device,
  566. name);
  567. if (result) {
  568. err("pci_hp_register failed with error %d\n", result);
  569. goto error_info;
  570. }
  571. slot->next = ctrl->slot;
  572. ctrl->slot = slot;
  573. number_of_slots--;
  574. slot_device++;
  575. slot_number++;
  576. }
  577. return 0;
  578. error_info:
  579. kfree(hotplug_slot_info);
  580. error_hpslot:
  581. kfree(hotplug_slot);
  582. error_slot:
  583. kfree(slot);
  584. error:
  585. return result;
  586. }
  587. static int one_time_init(void)
  588. {
  589. int loop;
  590. int retval = 0;
  591. if (initialized)
  592. return 0;
  593. power_mode = 0;
  594. retval = init_cpqhp_routing_table();
  595. if (retval)
  596. goto error;
  597. if (cpqhp_debug)
  598. pci_print_IRQ_route();
  599. dbg("Initialize + Start the notification mechanism\n");
  600. retval = cpqhp_event_start_thread();
  601. if (retval)
  602. goto error;
  603. dbg("Initialize slot lists\n");
  604. for (loop = 0; loop < 256; loop++)
  605. cpqhp_slot_list[loop] = NULL;
  606. /* FIXME: We also need to hook the NMI handler eventually.
  607. * this also needs to be worked with Christoph
  608. * register_NMI_handler();
  609. */
  610. /* Map rom address */
  611. cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
  612. if (!cpqhp_rom_start) {
  613. err("Could not ioremap memory region for ROM\n");
  614. retval = -EIO;
  615. goto error;
  616. }
  617. /* Now, map the int15 entry point if we are on compaq specific
  618. * hardware
  619. */
  620. compaq_nvram_init(cpqhp_rom_start);
  621. /* Map smbios table entry point structure */
  622. smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
  623. cpqhp_rom_start + ROM_PHY_LEN);
  624. if (!smbios_table) {
  625. err("Could not find the SMBIOS pointer in memory\n");
  626. retval = -EIO;
  627. goto error_rom_start;
  628. }
  629. smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
  630. readw(smbios_table + ST_LENGTH));
  631. if (!smbios_start) {
  632. err("Could not ioremap memory region taken from SMBIOS values\n");
  633. retval = -EIO;
  634. goto error_smbios_start;
  635. }
  636. initialized = 1;
  637. return retval;
  638. error_smbios_start:
  639. iounmap(smbios_start);
  640. error_rom_start:
  641. iounmap(cpqhp_rom_start);
  642. error:
  643. return retval;
  644. }
  645. static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  646. {
  647. u8 num_of_slots = 0;
  648. u8 hp_slot = 0;
  649. u8 device;
  650. u8 bus_cap;
  651. u16 temp_word;
  652. u16 vendor_id;
  653. u16 subsystem_vid;
  654. u16 subsystem_deviceid;
  655. u32 rc;
  656. struct controller *ctrl;
  657. struct pci_func *func;
  658. struct pci_bus *bus;
  659. int err;
  660. err = pci_enable_device(pdev);
  661. if (err) {
  662. printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
  663. pci_name(pdev), err);
  664. return err;
  665. }
  666. bus = pdev->subordinate;
  667. if (!bus) {
  668. pci_notice(pdev, "the device is not a bridge, skipping\n");
  669. rc = -ENODEV;
  670. goto err_disable_device;
  671. }
  672. /* Need to read VID early b/c it's used to differentiate CPQ and INTC
  673. * discovery
  674. */
  675. vendor_id = pdev->vendor;
  676. if ((vendor_id != PCI_VENDOR_ID_COMPAQ) &&
  677. (vendor_id != PCI_VENDOR_ID_INTEL)) {
  678. err(msg_HPC_non_compaq_or_intel);
  679. rc = -ENODEV;
  680. goto err_disable_device;
  681. }
  682. dbg("Vendor ID: %x\n", vendor_id);
  683. dbg("revision: %d\n", pdev->revision);
  684. if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
  685. err(msg_HPC_rev_error);
  686. rc = -ENODEV;
  687. goto err_disable_device;
  688. }
  689. /* Check for the proper subsystem IDs
  690. * Intel uses a different SSID programming model than Compaq.
  691. * For Intel, each SSID bit identifies a PHP capability.
  692. * Also Intel HPCs may have RID=0.
  693. */
  694. if ((pdev->revision <= 2) && (vendor_id != PCI_VENDOR_ID_INTEL)) {
  695. err(msg_HPC_not_supported);
  696. rc = -ENODEV;
  697. goto err_disable_device;
  698. }
  699. /* TODO: This code can be made to support non-Compaq or Intel
  700. * subsystem IDs
  701. */
  702. subsystem_vid = pdev->subsystem_vendor;
  703. dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
  704. if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
  705. err(msg_HPC_non_compaq_or_intel);
  706. rc = -ENODEV;
  707. goto err_disable_device;
  708. }
  709. ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
  710. if (!ctrl) {
  711. rc = -ENOMEM;
  712. goto err_disable_device;
  713. }
  714. subsystem_deviceid = pdev->subsystem_device;
  715. info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
  716. /* Set Vendor ID, so it can be accessed later from other
  717. * functions
  718. */
  719. ctrl->vendor_id = vendor_id;
  720. switch (subsystem_vid) {
  721. case PCI_VENDOR_ID_COMPAQ:
  722. if (pdev->revision >= 0x13) { /* CIOBX */
  723. ctrl->push_flag = 1;
  724. ctrl->slot_switch_type = 1;
  725. ctrl->push_button = 1;
  726. ctrl->pci_config_space = 1;
  727. ctrl->defeature_PHP = 1;
  728. ctrl->pcix_support = 1;
  729. ctrl->pcix_speed_capability = 1;
  730. pci_read_config_byte(pdev, 0x41, &bus_cap);
  731. if (bus_cap & 0x80) {
  732. dbg("bus max supports 133MHz PCI-X\n");
  733. bus->max_bus_speed = PCI_SPEED_133MHz_PCIX;
  734. break;
  735. }
  736. if (bus_cap & 0x40) {
  737. dbg("bus max supports 100MHz PCI-X\n");
  738. bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
  739. break;
  740. }
  741. if (bus_cap & 0x20) {
  742. dbg("bus max supports 66MHz PCI-X\n");
  743. bus->max_bus_speed = PCI_SPEED_66MHz_PCIX;
  744. break;
  745. }
  746. if (bus_cap & 0x10) {
  747. dbg("bus max supports 66MHz PCI\n");
  748. bus->max_bus_speed = PCI_SPEED_66MHz;
  749. break;
  750. }
  751. break;
  752. }
  753. switch (subsystem_deviceid) {
  754. case PCI_SUB_HPC_ID:
  755. /* Original 6500/7000 implementation */
  756. ctrl->slot_switch_type = 1;
  757. bus->max_bus_speed = PCI_SPEED_33MHz;
  758. ctrl->push_button = 0;
  759. ctrl->pci_config_space = 1;
  760. ctrl->defeature_PHP = 1;
  761. ctrl->pcix_support = 0;
  762. ctrl->pcix_speed_capability = 0;
  763. break;
  764. case PCI_SUB_HPC_ID2:
  765. /* First Pushbutton implementation */
  766. ctrl->push_flag = 1;
  767. ctrl->slot_switch_type = 1;
  768. bus->max_bus_speed = PCI_SPEED_33MHz;
  769. ctrl->push_button = 1;
  770. ctrl->pci_config_space = 1;
  771. ctrl->defeature_PHP = 1;
  772. ctrl->pcix_support = 0;
  773. ctrl->pcix_speed_capability = 0;
  774. break;
  775. case PCI_SUB_HPC_ID_INTC:
  776. /* Third party (6500/7000) */
  777. ctrl->slot_switch_type = 1;
  778. bus->max_bus_speed = PCI_SPEED_33MHz;
  779. ctrl->push_button = 0;
  780. ctrl->pci_config_space = 1;
  781. ctrl->defeature_PHP = 1;
  782. ctrl->pcix_support = 0;
  783. ctrl->pcix_speed_capability = 0;
  784. break;
  785. case PCI_SUB_HPC_ID3:
  786. /* First 66 Mhz implementation */
  787. ctrl->push_flag = 1;
  788. ctrl->slot_switch_type = 1;
  789. bus->max_bus_speed = PCI_SPEED_66MHz;
  790. ctrl->push_button = 1;
  791. ctrl->pci_config_space = 1;
  792. ctrl->defeature_PHP = 1;
  793. ctrl->pcix_support = 0;
  794. ctrl->pcix_speed_capability = 0;
  795. break;
  796. case PCI_SUB_HPC_ID4:
  797. /* First PCI-X implementation, 100MHz */
  798. ctrl->push_flag = 1;
  799. ctrl->slot_switch_type = 1;
  800. bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
  801. ctrl->push_button = 1;
  802. ctrl->pci_config_space = 1;
  803. ctrl->defeature_PHP = 1;
  804. ctrl->pcix_support = 1;
  805. ctrl->pcix_speed_capability = 0;
  806. break;
  807. default:
  808. err(msg_HPC_not_supported);
  809. rc = -ENODEV;
  810. goto err_free_ctrl;
  811. }
  812. break;
  813. case PCI_VENDOR_ID_INTEL:
  814. /* Check for speed capability (0=33, 1=66) */
  815. if (subsystem_deviceid & 0x0001)
  816. bus->max_bus_speed = PCI_SPEED_66MHz;
  817. else
  818. bus->max_bus_speed = PCI_SPEED_33MHz;
  819. /* Check for push button */
  820. if (subsystem_deviceid & 0x0002)
  821. ctrl->push_button = 0;
  822. else
  823. ctrl->push_button = 1;
  824. /* Check for slot switch type (0=mechanical, 1=not mechanical) */
  825. if (subsystem_deviceid & 0x0004)
  826. ctrl->slot_switch_type = 0;
  827. else
  828. ctrl->slot_switch_type = 1;
  829. /* PHP Status (0=De-feature PHP, 1=Normal operation) */
  830. if (subsystem_deviceid & 0x0008)
  831. ctrl->defeature_PHP = 1; /* PHP supported */
  832. else
  833. ctrl->defeature_PHP = 0; /* PHP not supported */
  834. /* Alternate Base Address Register Interface
  835. * (0=not supported, 1=supported)
  836. */
  837. if (subsystem_deviceid & 0x0010)
  838. ctrl->alternate_base_address = 1;
  839. else
  840. ctrl->alternate_base_address = 0;
  841. /* PCI Config Space Index (0=not supported, 1=supported) */
  842. if (subsystem_deviceid & 0x0020)
  843. ctrl->pci_config_space = 1;
  844. else
  845. ctrl->pci_config_space = 0;
  846. /* PCI-X support */
  847. if (subsystem_deviceid & 0x0080) {
  848. ctrl->pcix_support = 1;
  849. if (subsystem_deviceid & 0x0040)
  850. /* 133MHz PCI-X if bit 7 is 1 */
  851. ctrl->pcix_speed_capability = 1;
  852. else
  853. /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
  854. /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
  855. ctrl->pcix_speed_capability = 0;
  856. } else {
  857. /* Conventional PCI */
  858. ctrl->pcix_support = 0;
  859. ctrl->pcix_speed_capability = 0;
  860. }
  861. break;
  862. default:
  863. err(msg_HPC_not_supported);
  864. rc = -ENODEV;
  865. goto err_free_ctrl;
  866. }
  867. /* Tell the user that we found one. */
  868. info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
  869. pdev->bus->number);
  870. dbg("Hotplug controller capabilities:\n");
  871. dbg(" speed_capability %d\n", bus->max_bus_speed);
  872. dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
  873. "switch present" : "no switch");
  874. dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
  875. "PHP supported" : "PHP not supported");
  876. dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
  877. "supported" : "not supported");
  878. dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
  879. "supported" : "not supported");
  880. dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
  881. "supported" : "not supported");
  882. dbg(" pcix_support %s\n", ctrl->pcix_support ?
  883. "supported" : "not supported");
  884. ctrl->pci_dev = pdev;
  885. pci_set_drvdata(pdev, ctrl);
  886. /* make our own copy of the pci bus structure,
  887. * as we like tweaking it a lot */
  888. ctrl->pci_bus = kmemdup(pdev->bus, sizeof(*ctrl->pci_bus), GFP_KERNEL);
  889. if (!ctrl->pci_bus) {
  890. err("out of memory\n");
  891. rc = -ENOMEM;
  892. goto err_free_ctrl;
  893. }
  894. ctrl->bus = pdev->bus->number;
  895. ctrl->rev = pdev->revision;
  896. dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
  897. PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
  898. mutex_init(&ctrl->crit_sect);
  899. init_waitqueue_head(&ctrl->queue);
  900. /* initialize our threads if they haven't already been started up */
  901. rc = one_time_init();
  902. if (rc)
  903. goto err_free_bus;
  904. dbg("pdev = %p\n", pdev);
  905. dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
  906. dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
  907. if (!request_mem_region(pci_resource_start(pdev, 0),
  908. pci_resource_len(pdev, 0), MY_NAME)) {
  909. err("cannot reserve MMIO region\n");
  910. rc = -ENOMEM;
  911. goto err_free_bus;
  912. }
  913. ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
  914. pci_resource_len(pdev, 0));
  915. if (!ctrl->hpc_reg) {
  916. err("cannot remap MMIO region %llx @ %llx\n",
  917. (unsigned long long)pci_resource_len(pdev, 0),
  918. (unsigned long long)pci_resource_start(pdev, 0));
  919. rc = -ENODEV;
  920. goto err_free_mem_region;
  921. }
  922. /* Check for 66Mhz operation */
  923. bus->cur_bus_speed = get_controller_speed(ctrl);
  924. /********************************************************
  925. *
  926. * Save configuration headers for this and
  927. * subordinate PCI buses
  928. *
  929. ********************************************************/
  930. /* find the physical slot number of the first hot plug slot */
  931. /* Get slot won't work for devices behind bridges, but
  932. * in this case it will always be called for the "base"
  933. * bus/dev/func of a slot.
  934. * CS: this is leveraging the PCIIRQ routing code from the kernel
  935. * (pci-pc.c: get_irq_routing_table) */
  936. rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
  937. (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
  938. &(ctrl->first_slot));
  939. dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
  940. ctrl->first_slot, rc);
  941. if (rc) {
  942. err(msg_initialization_err, rc);
  943. goto err_iounmap;
  944. }
  945. /* Store PCI Config Space for all devices on this bus */
  946. rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
  947. if (rc) {
  948. err("%s: unable to save PCI configuration data, error %d\n",
  949. __func__, rc);
  950. goto err_iounmap;
  951. }
  952. /*
  953. * Get IO, memory, and IRQ resources for new devices
  954. */
  955. /* The next line is required for cpqhp_find_available_resources */
  956. ctrl->interrupt = pdev->irq;
  957. if (ctrl->interrupt < 0x10) {
  958. cpqhp_legacy_mode = 1;
  959. dbg("System seems to be configured for Full Table Mapped MPS mode\n");
  960. }
  961. ctrl->cfgspc_irq = 0;
  962. pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
  963. rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
  964. ctrl->add_support = !rc;
  965. if (rc) {
  966. dbg("cpqhp_find_available_resources = 0x%x\n", rc);
  967. err("unable to locate PCI configuration resources for hot plug add.\n");
  968. goto err_iounmap;
  969. }
  970. /*
  971. * Finish setting up the hot plug ctrl device
  972. */
  973. ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  974. dbg("NumSlots %d\n", ctrl->slot_device_offset);
  975. ctrl->next_event = 0;
  976. /* Setup the slot information structures */
  977. rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
  978. if (rc) {
  979. err(msg_initialization_err, 6);
  980. err("%s: unable to save PCI configuration data, error %d\n",
  981. __func__, rc);
  982. goto err_iounmap;
  983. }
  984. /* Mask all general input interrupts */
  985. writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
  986. /* set up the interrupt */
  987. dbg("HPC interrupt = %d\n", ctrl->interrupt);
  988. if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
  989. IRQF_SHARED, MY_NAME, ctrl)) {
  990. err("Can't get irq %d for the hotplug pci controller\n",
  991. ctrl->interrupt);
  992. rc = -ENODEV;
  993. goto err_iounmap;
  994. }
  995. /* Enable Shift Out interrupt and clear it, also enable SERR on power
  996. * fault
  997. */
  998. temp_word = readw(ctrl->hpc_reg + MISC);
  999. temp_word |= 0x4006;
  1000. writew(temp_word, ctrl->hpc_reg + MISC);
  1001. /* Changed 05/05/97 to clear all interrupts at start */
  1002. writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
  1003. ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
  1004. writel(0x0L, ctrl->hpc_reg + INT_MASK);
  1005. if (!cpqhp_ctrl_list) {
  1006. cpqhp_ctrl_list = ctrl;
  1007. ctrl->next = NULL;
  1008. } else {
  1009. ctrl->next = cpqhp_ctrl_list;
  1010. cpqhp_ctrl_list = ctrl;
  1011. }
  1012. /* turn off empty slots here unless command line option "ON" set
  1013. * Wait for exclusive access to hardware
  1014. */
  1015. mutex_lock(&ctrl->crit_sect);
  1016. num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  1017. /* find first device number for the ctrl */
  1018. device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  1019. while (num_of_slots) {
  1020. dbg("num_of_slots: %d\n", num_of_slots);
  1021. func = cpqhp_slot_find(ctrl->bus, device, 0);
  1022. if (!func)
  1023. break;
  1024. hp_slot = func->device - ctrl->slot_device_offset;
  1025. dbg("hp_slot: %d\n", hp_slot);
  1026. /* We have to save the presence info for these slots */
  1027. temp_word = ctrl->ctrl_int_comp >> 16;
  1028. func->presence_save = (temp_word >> hp_slot) & 0x01;
  1029. func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
  1030. if (ctrl->ctrl_int_comp & (0x1L << hp_slot))
  1031. func->switch_save = 0;
  1032. else
  1033. func->switch_save = 0x10;
  1034. if (!power_mode)
  1035. if (!func->is_a_board) {
  1036. green_LED_off(ctrl, hp_slot);
  1037. slot_disable(ctrl, hp_slot);
  1038. }
  1039. device++;
  1040. num_of_slots--;
  1041. }
  1042. if (!power_mode) {
  1043. set_SOGO(ctrl);
  1044. /* Wait for SOBS to be unset */
  1045. wait_for_ctrl_irq(ctrl);
  1046. }
  1047. rc = init_SERR(ctrl);
  1048. if (rc) {
  1049. err("init_SERR failed\n");
  1050. mutex_unlock(&ctrl->crit_sect);
  1051. goto err_free_irq;
  1052. }
  1053. /* Done with exclusive hardware access */
  1054. mutex_unlock(&ctrl->crit_sect);
  1055. cpqhp_create_debugfs_files(ctrl);
  1056. return 0;
  1057. err_free_irq:
  1058. free_irq(ctrl->interrupt, ctrl);
  1059. err_iounmap:
  1060. iounmap(ctrl->hpc_reg);
  1061. err_free_mem_region:
  1062. release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  1063. err_free_bus:
  1064. kfree(ctrl->pci_bus);
  1065. err_free_ctrl:
  1066. kfree(ctrl);
  1067. err_disable_device:
  1068. pci_disable_device(pdev);
  1069. return rc;
  1070. }
  1071. static void __exit unload_cpqphpd(void)
  1072. {
  1073. struct pci_func *next;
  1074. struct pci_func *TempSlot;
  1075. int loop;
  1076. u32 rc;
  1077. struct controller *ctrl;
  1078. struct controller *tctrl;
  1079. struct pci_resource *res;
  1080. struct pci_resource *tres;
  1081. rc = compaq_nvram_store(cpqhp_rom_start);
  1082. ctrl = cpqhp_ctrl_list;
  1083. while (ctrl) {
  1084. if (ctrl->hpc_reg) {
  1085. u16 misc;
  1086. rc = read_slot_enable(ctrl);
  1087. writeb(0, ctrl->hpc_reg + SLOT_SERR);
  1088. writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
  1089. misc = readw(ctrl->hpc_reg + MISC);
  1090. misc &= 0xFFFD;
  1091. writew(misc, ctrl->hpc_reg + MISC);
  1092. }
  1093. ctrl_slot_cleanup(ctrl);
  1094. res = ctrl->io_head;
  1095. while (res) {
  1096. tres = res;
  1097. res = res->next;
  1098. kfree(tres);
  1099. }
  1100. res = ctrl->mem_head;
  1101. while (res) {
  1102. tres = res;
  1103. res = res->next;
  1104. kfree(tres);
  1105. }
  1106. res = ctrl->p_mem_head;
  1107. while (res) {
  1108. tres = res;
  1109. res = res->next;
  1110. kfree(tres);
  1111. }
  1112. res = ctrl->bus_head;
  1113. while (res) {
  1114. tres = res;
  1115. res = res->next;
  1116. kfree(tres);
  1117. }
  1118. kfree(ctrl->pci_bus);
  1119. tctrl = ctrl;
  1120. ctrl = ctrl->next;
  1121. kfree(tctrl);
  1122. }
  1123. for (loop = 0; loop < 256; loop++) {
  1124. next = cpqhp_slot_list[loop];
  1125. while (next != NULL) {
  1126. res = next->io_head;
  1127. while (res) {
  1128. tres = res;
  1129. res = res->next;
  1130. kfree(tres);
  1131. }
  1132. res = next->mem_head;
  1133. while (res) {
  1134. tres = res;
  1135. res = res->next;
  1136. kfree(tres);
  1137. }
  1138. res = next->p_mem_head;
  1139. while (res) {
  1140. tres = res;
  1141. res = res->next;
  1142. kfree(tres);
  1143. }
  1144. res = next->bus_head;
  1145. while (res) {
  1146. tres = res;
  1147. res = res->next;
  1148. kfree(tres);
  1149. }
  1150. TempSlot = next;
  1151. next = next->next;
  1152. kfree(TempSlot);
  1153. }
  1154. }
  1155. /* Stop the notification mechanism */
  1156. if (initialized)
  1157. cpqhp_event_stop_thread();
  1158. /* unmap the rom address */
  1159. if (cpqhp_rom_start)
  1160. iounmap(cpqhp_rom_start);
  1161. if (smbios_start)
  1162. iounmap(smbios_start);
  1163. }
  1164. static const struct pci_device_id hpcd_pci_tbl[] = {
  1165. {
  1166. /* handle any PCI Hotplug controller */
  1167. .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
  1168. .class_mask = ~0,
  1169. /* no matter who makes it */
  1170. .vendor = PCI_ANY_ID,
  1171. .device = PCI_ANY_ID,
  1172. .subvendor = PCI_ANY_ID,
  1173. .subdevice = PCI_ANY_ID,
  1174. }, { /* end: all zeroes */ }
  1175. };
  1176. MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
  1177. static struct pci_driver cpqhpc_driver = {
  1178. .name = "compaq_pci_hotplug",
  1179. .id_table = hpcd_pci_tbl,
  1180. .probe = cpqhpc_probe,
  1181. /* remove: cpqhpc_remove_one, */
  1182. };
  1183. static int __init cpqhpc_init(void)
  1184. {
  1185. int result;
  1186. cpqhp_debug = debug;
  1187. info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
  1188. cpqhp_initialize_debugfs();
  1189. result = pci_register_driver(&cpqhpc_driver);
  1190. dbg("pci_register_driver = %d\n", result);
  1191. return result;
  1192. }
  1193. static void __exit cpqhpc_cleanup(void)
  1194. {
  1195. dbg("unload_cpqphpd()\n");
  1196. unload_cpqphpd();
  1197. dbg("pci_unregister_driver\n");
  1198. pci_unregister_driver(&cpqhpc_driver);
  1199. cpqhp_shutdown_debugfs();
  1200. }
  1201. module_init(cpqhpc_init);
  1202. module_exit(cpqhpc_cleanup);