pci-epc-core.c 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /**
  3. * PCI Endpoint *Controller* (EPC) library
  4. *
  5. * Copyright (C) 2017 Texas Instruments
  6. * Author: Kishon Vijay Abraham I <kishon@ti.com>
  7. */
  8. #include <linux/device.h>
  9. #include <linux/slab.h>
  10. #include <linux/module.h>
  11. #include <linux/of_device.h>
  12. #include <linux/pci-epc.h>
  13. #include <linux/pci-epf.h>
  14. #include <linux/pci-ep-cfs.h>
  15. static struct class *pci_epc_class;
  16. static void devm_pci_epc_release(struct device *dev, void *res)
  17. {
  18. struct pci_epc *epc = *(struct pci_epc **)res;
  19. pci_epc_destroy(epc);
  20. }
  21. static int devm_pci_epc_match(struct device *dev, void *res, void *match_data)
  22. {
  23. struct pci_epc **epc = res;
  24. return *epc == match_data;
  25. }
  26. /**
  27. * pci_epc_put() - release the PCI endpoint controller
  28. * @epc: epc returned by pci_epc_get()
  29. *
  30. * release the refcount the caller obtained by invoking pci_epc_get()
  31. */
  32. void pci_epc_put(struct pci_epc *epc)
  33. {
  34. if (!epc || IS_ERR(epc))
  35. return;
  36. module_put(epc->ops->owner);
  37. put_device(&epc->dev);
  38. }
  39. EXPORT_SYMBOL_GPL(pci_epc_put);
  40. /**
  41. * pci_epc_get() - get the PCI endpoint controller
  42. * @epc_name: device name of the endpoint controller
  43. *
  44. * Invoke to get struct pci_epc * corresponding to the device name of the
  45. * endpoint controller
  46. */
  47. struct pci_epc *pci_epc_get(const char *epc_name)
  48. {
  49. int ret = -EINVAL;
  50. struct pci_epc *epc;
  51. struct device *dev;
  52. struct class_dev_iter iter;
  53. class_dev_iter_init(&iter, pci_epc_class, NULL, NULL);
  54. while ((dev = class_dev_iter_next(&iter))) {
  55. if (strcmp(epc_name, dev_name(dev)))
  56. continue;
  57. epc = to_pci_epc(dev);
  58. if (!try_module_get(epc->ops->owner)) {
  59. ret = -EINVAL;
  60. goto err;
  61. }
  62. class_dev_iter_exit(&iter);
  63. get_device(&epc->dev);
  64. return epc;
  65. }
  66. err:
  67. class_dev_iter_exit(&iter);
  68. return ERR_PTR(ret);
  69. }
  70. EXPORT_SYMBOL_GPL(pci_epc_get);
  71. /**
  72. * pci_epc_stop() - stop the PCI link
  73. * @epc: the link of the EPC device that has to be stopped
  74. *
  75. * Invoke to stop the PCI link
  76. */
  77. void pci_epc_stop(struct pci_epc *epc)
  78. {
  79. unsigned long flags;
  80. if (IS_ERR(epc) || !epc->ops->stop)
  81. return;
  82. spin_lock_irqsave(&epc->lock, flags);
  83. epc->ops->stop(epc);
  84. spin_unlock_irqrestore(&epc->lock, flags);
  85. }
  86. EXPORT_SYMBOL_GPL(pci_epc_stop);
  87. /**
  88. * pci_epc_start() - start the PCI link
  89. * @epc: the link of *this* EPC device has to be started
  90. *
  91. * Invoke to start the PCI link
  92. */
  93. int pci_epc_start(struct pci_epc *epc)
  94. {
  95. int ret;
  96. unsigned long flags;
  97. if (IS_ERR(epc))
  98. return -EINVAL;
  99. if (!epc->ops->start)
  100. return 0;
  101. spin_lock_irqsave(&epc->lock, flags);
  102. ret = epc->ops->start(epc);
  103. spin_unlock_irqrestore(&epc->lock, flags);
  104. return ret;
  105. }
  106. EXPORT_SYMBOL_GPL(pci_epc_start);
  107. /**
  108. * pci_epc_raise_irq() - interrupt the host system
  109. * @epc: the EPC device which has to interrupt the host
  110. * @func_no: the endpoint function number in the EPC device
  111. * @type: specify the type of interrupt; legacy or MSI
  112. * @interrupt_num: the MSI interrupt number
  113. *
  114. * Invoke to raise an MSI or legacy interrupt
  115. */
  116. int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no,
  117. enum pci_epc_irq_type type, u8 interrupt_num)
  118. {
  119. int ret;
  120. unsigned long flags;
  121. if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
  122. return -EINVAL;
  123. if (!epc->ops->raise_irq)
  124. return 0;
  125. spin_lock_irqsave(&epc->lock, flags);
  126. ret = epc->ops->raise_irq(epc, func_no, type, interrupt_num);
  127. spin_unlock_irqrestore(&epc->lock, flags);
  128. return ret;
  129. }
  130. EXPORT_SYMBOL_GPL(pci_epc_raise_irq);
  131. /**
  132. * pci_epc_get_msi() - get the number of MSI interrupt numbers allocated
  133. * @epc: the EPC device to which MSI interrupts was requested
  134. * @func_no: the endpoint function number in the EPC device
  135. *
  136. * Invoke to get the number of MSI interrupts allocated by the RC
  137. */
  138. int pci_epc_get_msi(struct pci_epc *epc, u8 func_no)
  139. {
  140. int interrupt;
  141. unsigned long flags;
  142. if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
  143. return 0;
  144. if (!epc->ops->get_msi)
  145. return 0;
  146. spin_lock_irqsave(&epc->lock, flags);
  147. interrupt = epc->ops->get_msi(epc, func_no);
  148. spin_unlock_irqrestore(&epc->lock, flags);
  149. if (interrupt < 0)
  150. return 0;
  151. interrupt = 1 << interrupt;
  152. return interrupt;
  153. }
  154. EXPORT_SYMBOL_GPL(pci_epc_get_msi);
  155. /**
  156. * pci_epc_set_msi() - set the number of MSI interrupt numbers required
  157. * @epc: the EPC device on which MSI has to be configured
  158. * @func_no: the endpoint function number in the EPC device
  159. * @interrupts: number of MSI interrupts required by the EPF
  160. *
  161. * Invoke to set the required number of MSI interrupts.
  162. */
  163. int pci_epc_set_msi(struct pci_epc *epc, u8 func_no, u8 interrupts)
  164. {
  165. int ret;
  166. u8 encode_int;
  167. unsigned long flags;
  168. if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
  169. return -EINVAL;
  170. if (!epc->ops->set_msi)
  171. return 0;
  172. encode_int = order_base_2(interrupts);
  173. spin_lock_irqsave(&epc->lock, flags);
  174. ret = epc->ops->set_msi(epc, func_no, encode_int);
  175. spin_unlock_irqrestore(&epc->lock, flags);
  176. return ret;
  177. }
  178. EXPORT_SYMBOL_GPL(pci_epc_set_msi);
  179. /**
  180. * pci_epc_unmap_addr() - unmap CPU address from PCI address
  181. * @epc: the EPC device on which address is allocated
  182. * @func_no: the endpoint function number in the EPC device
  183. * @phys_addr: physical address of the local system
  184. *
  185. * Invoke to unmap the CPU address from PCI address.
  186. */
  187. void pci_epc_unmap_addr(struct pci_epc *epc, u8 func_no,
  188. phys_addr_t phys_addr)
  189. {
  190. unsigned long flags;
  191. if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
  192. return;
  193. if (!epc->ops->unmap_addr)
  194. return;
  195. spin_lock_irqsave(&epc->lock, flags);
  196. epc->ops->unmap_addr(epc, func_no, phys_addr);
  197. spin_unlock_irqrestore(&epc->lock, flags);
  198. }
  199. EXPORT_SYMBOL_GPL(pci_epc_unmap_addr);
  200. /**
  201. * pci_epc_map_addr() - map CPU address to PCI address
  202. * @epc: the EPC device on which address is allocated
  203. * @func_no: the endpoint function number in the EPC device
  204. * @phys_addr: physical address of the local system
  205. * @pci_addr: PCI address to which the physical address should be mapped
  206. * @size: the size of the allocation
  207. *
  208. * Invoke to map CPU address with PCI address.
  209. */
  210. int pci_epc_map_addr(struct pci_epc *epc, u8 func_no,
  211. phys_addr_t phys_addr, u64 pci_addr, size_t size)
  212. {
  213. int ret;
  214. unsigned long flags;
  215. if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
  216. return -EINVAL;
  217. if (!epc->ops->map_addr)
  218. return 0;
  219. spin_lock_irqsave(&epc->lock, flags);
  220. ret = epc->ops->map_addr(epc, func_no, phys_addr, pci_addr, size);
  221. spin_unlock_irqrestore(&epc->lock, flags);
  222. return ret;
  223. }
  224. EXPORT_SYMBOL_GPL(pci_epc_map_addr);
  225. /**
  226. * pci_epc_clear_bar() - reset the BAR
  227. * @epc: the EPC device for which the BAR has to be cleared
  228. * @func_no: the endpoint function number in the EPC device
  229. * @bar: the BAR number that has to be reset
  230. *
  231. * Invoke to reset the BAR of the endpoint device.
  232. */
  233. void pci_epc_clear_bar(struct pci_epc *epc, u8 func_no, int bar)
  234. {
  235. unsigned long flags;
  236. if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
  237. return;
  238. if (!epc->ops->clear_bar)
  239. return;
  240. spin_lock_irqsave(&epc->lock, flags);
  241. epc->ops->clear_bar(epc, func_no, bar);
  242. spin_unlock_irqrestore(&epc->lock, flags);
  243. }
  244. EXPORT_SYMBOL_GPL(pci_epc_clear_bar);
  245. /**
  246. * pci_epc_set_bar() - configure BAR in order for host to assign PCI addr space
  247. * @epc: the EPC device on which BAR has to be configured
  248. * @func_no: the endpoint function number in the EPC device
  249. * @bar: the BAR number that has to be configured
  250. * @size: the size of the addr space
  251. * @flags: specify memory allocation/io allocation/32bit address/64 bit address
  252. *
  253. * Invoke to configure the BAR of the endpoint device.
  254. */
  255. int pci_epc_set_bar(struct pci_epc *epc, u8 func_no, enum pci_barno bar,
  256. dma_addr_t bar_phys, size_t size, int flags)
  257. {
  258. int ret;
  259. unsigned long irq_flags;
  260. if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
  261. return -EINVAL;
  262. if (!epc->ops->set_bar)
  263. return 0;
  264. spin_lock_irqsave(&epc->lock, irq_flags);
  265. ret = epc->ops->set_bar(epc, func_no, bar, bar_phys, size, flags);
  266. spin_unlock_irqrestore(&epc->lock, irq_flags);
  267. return ret;
  268. }
  269. EXPORT_SYMBOL_GPL(pci_epc_set_bar);
  270. /**
  271. * pci_epc_write_header() - write standard configuration header
  272. * @epc: the EPC device to which the configuration header should be written
  273. * @func_no: the endpoint function number in the EPC device
  274. * @header: standard configuration header fields
  275. *
  276. * Invoke to write the configuration header to the endpoint controller. Every
  277. * endpoint controller will have a dedicated location to which the standard
  278. * configuration header would be written. The callback function should write
  279. * the header fields to this dedicated location.
  280. */
  281. int pci_epc_write_header(struct pci_epc *epc, u8 func_no,
  282. struct pci_epf_header *header)
  283. {
  284. int ret;
  285. unsigned long flags;
  286. if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
  287. return -EINVAL;
  288. if (!epc->ops->write_header)
  289. return 0;
  290. spin_lock_irqsave(&epc->lock, flags);
  291. ret = epc->ops->write_header(epc, func_no, header);
  292. spin_unlock_irqrestore(&epc->lock, flags);
  293. return ret;
  294. }
  295. EXPORT_SYMBOL_GPL(pci_epc_write_header);
  296. /**
  297. * pci_epc_add_epf() - bind PCI endpoint function to an endpoint controller
  298. * @epc: the EPC device to which the endpoint function should be added
  299. * @epf: the endpoint function to be added
  300. *
  301. * A PCI endpoint device can have one or more functions. In the case of PCIe,
  302. * the specification allows up to 8 PCIe endpoint functions. Invoke
  303. * pci_epc_add_epf() to add a PCI endpoint function to an endpoint controller.
  304. */
  305. int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf)
  306. {
  307. unsigned long flags;
  308. if (epf->epc)
  309. return -EBUSY;
  310. if (IS_ERR(epc))
  311. return -EINVAL;
  312. if (epf->func_no > epc->max_functions - 1)
  313. return -EINVAL;
  314. epf->epc = epc;
  315. spin_lock_irqsave(&epc->lock, flags);
  316. list_add_tail(&epf->list, &epc->pci_epf);
  317. spin_unlock_irqrestore(&epc->lock, flags);
  318. return 0;
  319. }
  320. EXPORT_SYMBOL_GPL(pci_epc_add_epf);
  321. /**
  322. * pci_epc_remove_epf() - remove PCI endpoint function from endpoint controller
  323. * @epc: the EPC device from which the endpoint function should be removed
  324. * @epf: the endpoint function to be removed
  325. *
  326. * Invoke to remove PCI endpoint function from the endpoint controller.
  327. */
  328. void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf)
  329. {
  330. unsigned long flags;
  331. if (!epc || IS_ERR(epc))
  332. return;
  333. spin_lock_irqsave(&epc->lock, flags);
  334. list_del(&epf->list);
  335. spin_unlock_irqrestore(&epc->lock, flags);
  336. }
  337. EXPORT_SYMBOL_GPL(pci_epc_remove_epf);
  338. /**
  339. * pci_epc_linkup() - Notify the EPF device that EPC device has established a
  340. * connection with the Root Complex.
  341. * @epc: the EPC device which has established link with the host
  342. *
  343. * Invoke to Notify the EPF device that the EPC device has established a
  344. * connection with the Root Complex.
  345. */
  346. void pci_epc_linkup(struct pci_epc *epc)
  347. {
  348. unsigned long flags;
  349. struct pci_epf *epf;
  350. if (!epc || IS_ERR(epc))
  351. return;
  352. spin_lock_irqsave(&epc->lock, flags);
  353. list_for_each_entry(epf, &epc->pci_epf, list)
  354. pci_epf_linkup(epf);
  355. spin_unlock_irqrestore(&epc->lock, flags);
  356. }
  357. EXPORT_SYMBOL_GPL(pci_epc_linkup);
  358. /**
  359. * pci_epc_destroy() - destroy the EPC device
  360. * @epc: the EPC device that has to be destroyed
  361. *
  362. * Invoke to destroy the PCI EPC device
  363. */
  364. void pci_epc_destroy(struct pci_epc *epc)
  365. {
  366. pci_ep_cfs_remove_epc_group(epc->group);
  367. device_unregister(&epc->dev);
  368. kfree(epc);
  369. }
  370. EXPORT_SYMBOL_GPL(pci_epc_destroy);
  371. /**
  372. * devm_pci_epc_destroy() - destroy the EPC device
  373. * @dev: device that wants to destroy the EPC
  374. * @epc: the EPC device that has to be destroyed
  375. *
  376. * Invoke to destroy the devres associated with this
  377. * pci_epc and destroy the EPC device.
  378. */
  379. void devm_pci_epc_destroy(struct device *dev, struct pci_epc *epc)
  380. {
  381. int r;
  382. r = devres_destroy(dev, devm_pci_epc_release, devm_pci_epc_match,
  383. epc);
  384. dev_WARN_ONCE(dev, r, "couldn't find PCI EPC resource\n");
  385. }
  386. EXPORT_SYMBOL_GPL(devm_pci_epc_destroy);
  387. /**
  388. * __pci_epc_create() - create a new endpoint controller (EPC) device
  389. * @dev: device that is creating the new EPC
  390. * @ops: function pointers for performing EPC operations
  391. * @owner: the owner of the module that creates the EPC device
  392. *
  393. * Invoke to create a new EPC device and add it to pci_epc class.
  394. */
  395. struct pci_epc *
  396. __pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
  397. struct module *owner)
  398. {
  399. int ret;
  400. struct pci_epc *epc;
  401. if (WARN_ON(!dev)) {
  402. ret = -EINVAL;
  403. goto err_ret;
  404. }
  405. epc = kzalloc(sizeof(*epc), GFP_KERNEL);
  406. if (!epc) {
  407. ret = -ENOMEM;
  408. goto err_ret;
  409. }
  410. spin_lock_init(&epc->lock);
  411. INIT_LIST_HEAD(&epc->pci_epf);
  412. device_initialize(&epc->dev);
  413. epc->dev.class = pci_epc_class;
  414. epc->dev.parent = dev;
  415. epc->ops = ops;
  416. ret = dev_set_name(&epc->dev, "%s", dev_name(dev));
  417. if (ret)
  418. goto put_dev;
  419. ret = device_add(&epc->dev);
  420. if (ret)
  421. goto put_dev;
  422. epc->group = pci_ep_cfs_add_epc_group(dev_name(dev));
  423. return epc;
  424. put_dev:
  425. put_device(&epc->dev);
  426. kfree(epc);
  427. err_ret:
  428. return ERR_PTR(ret);
  429. }
  430. EXPORT_SYMBOL_GPL(__pci_epc_create);
  431. /**
  432. * __devm_pci_epc_create() - create a new endpoint controller (EPC) device
  433. * @dev: device that is creating the new EPC
  434. * @ops: function pointers for performing EPC operations
  435. * @owner: the owner of the module that creates the EPC device
  436. *
  437. * Invoke to create a new EPC device and add it to pci_epc class.
  438. * While at that, it also associates the device with the pci_epc using devres.
  439. * On driver detach, release function is invoked on the devres data,
  440. * then, devres data is freed.
  441. */
  442. struct pci_epc *
  443. __devm_pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
  444. struct module *owner)
  445. {
  446. struct pci_epc **ptr, *epc;
  447. ptr = devres_alloc(devm_pci_epc_release, sizeof(*ptr), GFP_KERNEL);
  448. if (!ptr)
  449. return ERR_PTR(-ENOMEM);
  450. epc = __pci_epc_create(dev, ops, owner);
  451. if (!IS_ERR(epc)) {
  452. *ptr = epc;
  453. devres_add(dev, ptr);
  454. } else {
  455. devres_free(ptr);
  456. }
  457. return epc;
  458. }
  459. EXPORT_SYMBOL_GPL(__devm_pci_epc_create);
  460. static int __init pci_epc_init(void)
  461. {
  462. pci_epc_class = class_create(THIS_MODULE, "pci_epc");
  463. if (IS_ERR(pci_epc_class)) {
  464. pr_err("failed to create pci epc class --> %ld\n",
  465. PTR_ERR(pci_epc_class));
  466. return PTR_ERR(pci_epc_class);
  467. }
  468. return 0;
  469. }
  470. module_init(pci_epc_init);
  471. static void __exit pci_epc_exit(void)
  472. {
  473. class_destroy(pci_epc_class);
  474. }
  475. module_exit(pci_epc_exit);
  476. MODULE_DESCRIPTION("PCI EPC Library");
  477. MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>");
  478. MODULE_LICENSE("GPL v2");