pci-epf-test.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530
  1. // SPDX-License-Identifier: GPL-2.0
  2. /**
  3. * Test driver to test endpoint functionality
  4. *
  5. * Copyright (C) 2017 Texas Instruments
  6. * Author: Kishon Vijay Abraham I <kishon@ti.com>
  7. */
  8. #include <linux/crc32.h>
  9. #include <linux/delay.h>
  10. #include <linux/io.h>
  11. #include <linux/module.h>
  12. #include <linux/slab.h>
  13. #include <linux/pci_ids.h>
  14. #include <linux/random.h>
  15. #include <linux/pci-epc.h>
  16. #include <linux/pci-epf.h>
  17. #include <linux/pci_regs.h>
  18. #define COMMAND_RAISE_LEGACY_IRQ BIT(0)
  19. #define COMMAND_RAISE_MSI_IRQ BIT(1)
  20. #define MSI_NUMBER_SHIFT 2
  21. #define MSI_NUMBER_MASK (0x3f << MSI_NUMBER_SHIFT)
  22. #define COMMAND_READ BIT(8)
  23. #define COMMAND_WRITE BIT(9)
  24. #define COMMAND_COPY BIT(10)
  25. #define STATUS_READ_SUCCESS BIT(0)
  26. #define STATUS_READ_FAIL BIT(1)
  27. #define STATUS_WRITE_SUCCESS BIT(2)
  28. #define STATUS_WRITE_FAIL BIT(3)
  29. #define STATUS_COPY_SUCCESS BIT(4)
  30. #define STATUS_COPY_FAIL BIT(5)
  31. #define STATUS_IRQ_RAISED BIT(6)
  32. #define STATUS_SRC_ADDR_INVALID BIT(7)
  33. #define STATUS_DST_ADDR_INVALID BIT(8)
  34. #define TIMER_RESOLUTION 1
  35. static struct workqueue_struct *kpcitest_workqueue;
  36. struct pci_epf_test {
  37. void *reg[6];
  38. struct pci_epf *epf;
  39. enum pci_barno test_reg_bar;
  40. bool linkup_notifier;
  41. struct delayed_work cmd_handler;
  42. };
  43. struct pci_epf_test_reg {
  44. u32 magic;
  45. u32 command;
  46. u32 status;
  47. u64 src_addr;
  48. u64 dst_addr;
  49. u32 size;
  50. u32 checksum;
  51. } __packed;
  52. static struct pci_epf_header test_header = {
  53. .vendorid = PCI_ANY_ID,
  54. .deviceid = PCI_ANY_ID,
  55. .baseclass_code = PCI_CLASS_OTHERS,
  56. .interrupt_pin = PCI_INTERRUPT_INTA,
  57. };
  58. struct pci_epf_test_data {
  59. enum pci_barno test_reg_bar;
  60. bool linkup_notifier;
  61. };
  62. static int bar_size[] = { 512, 512, 1024, 16384, 131072, 1048576 };
  63. static int pci_epf_test_copy(struct pci_epf_test *epf_test)
  64. {
  65. int ret;
  66. void __iomem *src_addr;
  67. void __iomem *dst_addr;
  68. phys_addr_t src_phys_addr;
  69. phys_addr_t dst_phys_addr;
  70. struct pci_epf *epf = epf_test->epf;
  71. struct device *dev = &epf->dev;
  72. struct pci_epc *epc = epf->epc;
  73. enum pci_barno test_reg_bar = epf_test->test_reg_bar;
  74. struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
  75. src_addr = pci_epc_mem_alloc_addr(epc, &src_phys_addr, reg->size);
  76. if (!src_addr) {
  77. dev_err(dev, "failed to allocate source address\n");
  78. reg->status = STATUS_SRC_ADDR_INVALID;
  79. ret = -ENOMEM;
  80. goto err;
  81. }
  82. ret = pci_epc_map_addr(epc, epf->func_no, src_phys_addr, reg->src_addr,
  83. reg->size);
  84. if (ret) {
  85. dev_err(dev, "failed to map source address\n");
  86. reg->status = STATUS_SRC_ADDR_INVALID;
  87. goto err_src_addr;
  88. }
  89. dst_addr = pci_epc_mem_alloc_addr(epc, &dst_phys_addr, reg->size);
  90. if (!dst_addr) {
  91. dev_err(dev, "failed to allocate destination address\n");
  92. reg->status = STATUS_DST_ADDR_INVALID;
  93. ret = -ENOMEM;
  94. goto err_src_map_addr;
  95. }
  96. ret = pci_epc_map_addr(epc, epf->func_no, dst_phys_addr, reg->dst_addr,
  97. reg->size);
  98. if (ret) {
  99. dev_err(dev, "failed to map destination address\n");
  100. reg->status = STATUS_DST_ADDR_INVALID;
  101. goto err_dst_addr;
  102. }
  103. memcpy(dst_addr, src_addr, reg->size);
  104. pci_epc_unmap_addr(epc, epf->func_no, dst_phys_addr);
  105. err_dst_addr:
  106. pci_epc_mem_free_addr(epc, dst_phys_addr, dst_addr, reg->size);
  107. err_src_map_addr:
  108. pci_epc_unmap_addr(epc, epf->func_no, src_phys_addr);
  109. err_src_addr:
  110. pci_epc_mem_free_addr(epc, src_phys_addr, src_addr, reg->size);
  111. err:
  112. return ret;
  113. }
  114. static int pci_epf_test_read(struct pci_epf_test *epf_test)
  115. {
  116. int ret;
  117. void __iomem *src_addr;
  118. void *buf;
  119. u32 crc32;
  120. phys_addr_t phys_addr;
  121. struct pci_epf *epf = epf_test->epf;
  122. struct device *dev = &epf->dev;
  123. struct pci_epc *epc = epf->epc;
  124. enum pci_barno test_reg_bar = epf_test->test_reg_bar;
  125. struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
  126. src_addr = pci_epc_mem_alloc_addr(epc, &phys_addr, reg->size);
  127. if (!src_addr) {
  128. dev_err(dev, "failed to allocate address\n");
  129. reg->status = STATUS_SRC_ADDR_INVALID;
  130. ret = -ENOMEM;
  131. goto err;
  132. }
  133. ret = pci_epc_map_addr(epc, epf->func_no, phys_addr, reg->src_addr,
  134. reg->size);
  135. if (ret) {
  136. dev_err(dev, "failed to map address\n");
  137. reg->status = STATUS_SRC_ADDR_INVALID;
  138. goto err_addr;
  139. }
  140. buf = kzalloc(reg->size, GFP_KERNEL);
  141. if (!buf) {
  142. ret = -ENOMEM;
  143. goto err_map_addr;
  144. }
  145. memcpy(buf, src_addr, reg->size);
  146. crc32 = crc32_le(~0, buf, reg->size);
  147. if (crc32 != reg->checksum)
  148. ret = -EIO;
  149. kfree(buf);
  150. err_map_addr:
  151. pci_epc_unmap_addr(epc, epf->func_no, phys_addr);
  152. err_addr:
  153. pci_epc_mem_free_addr(epc, phys_addr, src_addr, reg->size);
  154. err:
  155. return ret;
  156. }
  157. static int pci_epf_test_write(struct pci_epf_test *epf_test)
  158. {
  159. int ret;
  160. void __iomem *dst_addr;
  161. void *buf;
  162. phys_addr_t phys_addr;
  163. struct pci_epf *epf = epf_test->epf;
  164. struct device *dev = &epf->dev;
  165. struct pci_epc *epc = epf->epc;
  166. enum pci_barno test_reg_bar = epf_test->test_reg_bar;
  167. struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
  168. dst_addr = pci_epc_mem_alloc_addr(epc, &phys_addr, reg->size);
  169. if (!dst_addr) {
  170. dev_err(dev, "failed to allocate address\n");
  171. reg->status = STATUS_DST_ADDR_INVALID;
  172. ret = -ENOMEM;
  173. goto err;
  174. }
  175. ret = pci_epc_map_addr(epc, epf->func_no, phys_addr, reg->dst_addr,
  176. reg->size);
  177. if (ret) {
  178. dev_err(dev, "failed to map address\n");
  179. reg->status = STATUS_DST_ADDR_INVALID;
  180. goto err_addr;
  181. }
  182. buf = kzalloc(reg->size, GFP_KERNEL);
  183. if (!buf) {
  184. ret = -ENOMEM;
  185. goto err_map_addr;
  186. }
  187. get_random_bytes(buf, reg->size);
  188. reg->checksum = crc32_le(~0, buf, reg->size);
  189. memcpy(dst_addr, buf, reg->size);
  190. /*
  191. * wait 1ms inorder for the write to complete. Without this delay L3
  192. * error in observed in the host system.
  193. */
  194. mdelay(1);
  195. kfree(buf);
  196. err_map_addr:
  197. pci_epc_unmap_addr(epc, epf->func_no, phys_addr);
  198. err_addr:
  199. pci_epc_mem_free_addr(epc, phys_addr, dst_addr, reg->size);
  200. err:
  201. return ret;
  202. }
  203. static void pci_epf_test_raise_irq(struct pci_epf_test *epf_test, u8 irq)
  204. {
  205. u8 msi_count;
  206. struct pci_epf *epf = epf_test->epf;
  207. struct pci_epc *epc = epf->epc;
  208. enum pci_barno test_reg_bar = epf_test->test_reg_bar;
  209. struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
  210. reg->status |= STATUS_IRQ_RAISED;
  211. msi_count = pci_epc_get_msi(epc, epf->func_no);
  212. if (irq > msi_count || msi_count <= 0)
  213. pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_LEGACY, 0);
  214. else
  215. pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_MSI, irq);
  216. }
  217. static void pci_epf_test_cmd_handler(struct work_struct *work)
  218. {
  219. int ret;
  220. u8 irq;
  221. u8 msi_count;
  222. u32 command;
  223. struct pci_epf_test *epf_test = container_of(work, struct pci_epf_test,
  224. cmd_handler.work);
  225. struct pci_epf *epf = epf_test->epf;
  226. struct pci_epc *epc = epf->epc;
  227. enum pci_barno test_reg_bar = epf_test->test_reg_bar;
  228. struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
  229. command = reg->command;
  230. if (!command)
  231. goto reset_handler;
  232. reg->command = 0;
  233. reg->status = 0;
  234. irq = (command & MSI_NUMBER_MASK) >> MSI_NUMBER_SHIFT;
  235. if (command & COMMAND_RAISE_LEGACY_IRQ) {
  236. reg->status = STATUS_IRQ_RAISED;
  237. pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_LEGACY, 0);
  238. goto reset_handler;
  239. }
  240. if (command & COMMAND_WRITE) {
  241. ret = pci_epf_test_write(epf_test);
  242. if (ret)
  243. reg->status |= STATUS_WRITE_FAIL;
  244. else
  245. reg->status |= STATUS_WRITE_SUCCESS;
  246. pci_epf_test_raise_irq(epf_test, irq);
  247. goto reset_handler;
  248. }
  249. if (command & COMMAND_READ) {
  250. ret = pci_epf_test_read(epf_test);
  251. if (!ret)
  252. reg->status |= STATUS_READ_SUCCESS;
  253. else
  254. reg->status |= STATUS_READ_FAIL;
  255. pci_epf_test_raise_irq(epf_test, irq);
  256. goto reset_handler;
  257. }
  258. if (command & COMMAND_COPY) {
  259. ret = pci_epf_test_copy(epf_test);
  260. if (!ret)
  261. reg->status |= STATUS_COPY_SUCCESS;
  262. else
  263. reg->status |= STATUS_COPY_FAIL;
  264. pci_epf_test_raise_irq(epf_test, irq);
  265. goto reset_handler;
  266. }
  267. if (command & COMMAND_RAISE_MSI_IRQ) {
  268. msi_count = pci_epc_get_msi(epc, epf->func_no);
  269. if (irq > msi_count || msi_count <= 0)
  270. goto reset_handler;
  271. reg->status = STATUS_IRQ_RAISED;
  272. pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_MSI, irq);
  273. goto reset_handler;
  274. }
  275. reset_handler:
  276. queue_delayed_work(kpcitest_workqueue, &epf_test->cmd_handler,
  277. msecs_to_jiffies(1));
  278. }
  279. static void pci_epf_test_linkup(struct pci_epf *epf)
  280. {
  281. struct pci_epf_test *epf_test = epf_get_drvdata(epf);
  282. queue_delayed_work(kpcitest_workqueue, &epf_test->cmd_handler,
  283. msecs_to_jiffies(1));
  284. }
  285. static void pci_epf_test_unbind(struct pci_epf *epf)
  286. {
  287. struct pci_epf_test *epf_test = epf_get_drvdata(epf);
  288. struct pci_epc *epc = epf->epc;
  289. int bar;
  290. cancel_delayed_work(&epf_test->cmd_handler);
  291. pci_epc_stop(epc);
  292. for (bar = BAR_0; bar <= BAR_5; bar++) {
  293. if (epf_test->reg[bar]) {
  294. pci_epf_free_space(epf, epf_test->reg[bar], bar);
  295. pci_epc_clear_bar(epc, epf->func_no, bar);
  296. }
  297. }
  298. }
  299. static int pci_epf_test_set_bar(struct pci_epf *epf)
  300. {
  301. int flags;
  302. int bar;
  303. int ret;
  304. struct pci_epf_bar *epf_bar;
  305. struct pci_epc *epc = epf->epc;
  306. struct device *dev = &epf->dev;
  307. struct pci_epf_test *epf_test = epf_get_drvdata(epf);
  308. enum pci_barno test_reg_bar = epf_test->test_reg_bar;
  309. flags = PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_32;
  310. if (sizeof(dma_addr_t) == 0x8)
  311. flags |= PCI_BASE_ADDRESS_MEM_TYPE_64;
  312. for (bar = BAR_0; bar <= BAR_5; bar++) {
  313. epf_bar = &epf->bar[bar];
  314. ret = pci_epc_set_bar(epc, epf->func_no, bar,
  315. epf_bar->phys_addr,
  316. epf_bar->size, flags);
  317. if (ret) {
  318. pci_epf_free_space(epf, epf_test->reg[bar], bar);
  319. dev_err(dev, "failed to set BAR%d\n", bar);
  320. if (bar == test_reg_bar)
  321. return ret;
  322. }
  323. }
  324. return 0;
  325. }
  326. static int pci_epf_test_alloc_space(struct pci_epf *epf)
  327. {
  328. struct pci_epf_test *epf_test = epf_get_drvdata(epf);
  329. struct device *dev = &epf->dev;
  330. void *base;
  331. int bar;
  332. enum pci_barno test_reg_bar = epf_test->test_reg_bar;
  333. base = pci_epf_alloc_space(epf, sizeof(struct pci_epf_test_reg),
  334. test_reg_bar);
  335. if (!base) {
  336. dev_err(dev, "failed to allocated register space\n");
  337. return -ENOMEM;
  338. }
  339. epf_test->reg[test_reg_bar] = base;
  340. for (bar = BAR_0; bar <= BAR_5; bar++) {
  341. if (bar == test_reg_bar)
  342. continue;
  343. base = pci_epf_alloc_space(epf, bar_size[bar], bar);
  344. if (!base)
  345. dev_err(dev, "failed to allocate space for BAR%d\n",
  346. bar);
  347. epf_test->reg[bar] = base;
  348. }
  349. return 0;
  350. }
  351. static int pci_epf_test_bind(struct pci_epf *epf)
  352. {
  353. int ret;
  354. struct pci_epf_test *epf_test = epf_get_drvdata(epf);
  355. struct pci_epf_header *header = epf->header;
  356. struct pci_epc *epc = epf->epc;
  357. struct device *dev = &epf->dev;
  358. if (WARN_ON_ONCE(!epc))
  359. return -EINVAL;
  360. ret = pci_epc_write_header(epc, epf->func_no, header);
  361. if (ret) {
  362. dev_err(dev, "configuration header write failed\n");
  363. return ret;
  364. }
  365. ret = pci_epf_test_alloc_space(epf);
  366. if (ret)
  367. return ret;
  368. ret = pci_epf_test_set_bar(epf);
  369. if (ret)
  370. return ret;
  371. ret = pci_epc_set_msi(epc, epf->func_no, epf->msi_interrupts);
  372. if (ret)
  373. return ret;
  374. if (!epf_test->linkup_notifier)
  375. queue_work(kpcitest_workqueue, &epf_test->cmd_handler.work);
  376. return 0;
  377. }
  378. static const struct pci_epf_device_id pci_epf_test_ids[] = {
  379. {
  380. .name = "pci_epf_test",
  381. },
  382. {},
  383. };
  384. static int pci_epf_test_probe(struct pci_epf *epf)
  385. {
  386. struct pci_epf_test *epf_test;
  387. struct device *dev = &epf->dev;
  388. const struct pci_epf_device_id *match;
  389. struct pci_epf_test_data *data;
  390. enum pci_barno test_reg_bar = BAR_0;
  391. bool linkup_notifier = true;
  392. match = pci_epf_match_device(pci_epf_test_ids, epf);
  393. data = (struct pci_epf_test_data *)match->driver_data;
  394. if (data) {
  395. test_reg_bar = data->test_reg_bar;
  396. linkup_notifier = data->linkup_notifier;
  397. }
  398. epf_test = devm_kzalloc(dev, sizeof(*epf_test), GFP_KERNEL);
  399. if (!epf_test)
  400. return -ENOMEM;
  401. epf->header = &test_header;
  402. epf_test->epf = epf;
  403. epf_test->test_reg_bar = test_reg_bar;
  404. epf_test->linkup_notifier = linkup_notifier;
  405. INIT_DELAYED_WORK(&epf_test->cmd_handler, pci_epf_test_cmd_handler);
  406. epf_set_drvdata(epf, epf_test);
  407. return 0;
  408. }
  409. static struct pci_epf_ops ops = {
  410. .unbind = pci_epf_test_unbind,
  411. .bind = pci_epf_test_bind,
  412. .linkup = pci_epf_test_linkup,
  413. };
  414. static struct pci_epf_driver test_driver = {
  415. .driver.name = "pci_epf_test",
  416. .probe = pci_epf_test_probe,
  417. .id_table = pci_epf_test_ids,
  418. .ops = &ops,
  419. .owner = THIS_MODULE,
  420. };
  421. static int __init pci_epf_test_init(void)
  422. {
  423. int ret;
  424. kpcitest_workqueue = alloc_workqueue("kpcitest",
  425. WQ_MEM_RECLAIM | WQ_HIGHPRI, 0);
  426. ret = pci_epf_register_driver(&test_driver);
  427. if (ret) {
  428. pr_err("failed to register pci epf test driver --> %d\n", ret);
  429. return ret;
  430. }
  431. return 0;
  432. }
  433. module_init(pci_epf_test_init);
  434. static void __exit pci_epf_test_exit(void)
  435. {
  436. pci_epf_unregister_driver(&test_driver);
  437. }
  438. module_exit(pci_epf_test_exit);
  439. MODULE_DESCRIPTION("PCI EPF TEST DRIVER");
  440. MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>");
  441. MODULE_LICENSE("GPL v2");