pcie-designware-plat.c 2.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * PCIe RC driver for Synopsys DesignWare Core
  4. *
  5. * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
  6. *
  7. * Authors: Joao Pinto <Joao.Pinto@synopsys.com>
  8. */
  9. #include <linux/clk.h>
  10. #include <linux/delay.h>
  11. #include <linux/gpio.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/kernel.h>
  14. #include <linux/init.h>
  15. #include <linux/of_gpio.h>
  16. #include <linux/pci.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/resource.h>
  19. #include <linux/signal.h>
  20. #include <linux/types.h>
  21. #include "pcie-designware.h"
  22. struct dw_plat_pcie {
  23. struct dw_pcie *pci;
  24. };
  25. static irqreturn_t dw_plat_pcie_msi_irq_handler(int irq, void *arg)
  26. {
  27. struct pcie_port *pp = arg;
  28. return dw_handle_msi_irq(pp);
  29. }
  30. static int dw_plat_pcie_host_init(struct pcie_port *pp)
  31. {
  32. struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
  33. dw_pcie_setup_rc(pp);
  34. dw_pcie_wait_for_link(pci);
  35. if (IS_ENABLED(CONFIG_PCI_MSI))
  36. dw_pcie_msi_init(pp);
  37. return 0;
  38. }
  39. static const struct dw_pcie_host_ops dw_plat_pcie_host_ops = {
  40. .host_init = dw_plat_pcie_host_init,
  41. };
  42. static int dw_plat_add_pcie_port(struct pcie_port *pp,
  43. struct platform_device *pdev)
  44. {
  45. struct device *dev = &pdev->dev;
  46. int ret;
  47. pp->irq = platform_get_irq(pdev, 1);
  48. if (pp->irq < 0)
  49. return pp->irq;
  50. if (IS_ENABLED(CONFIG_PCI_MSI)) {
  51. pp->msi_irq = platform_get_irq(pdev, 0);
  52. if (pp->msi_irq < 0)
  53. return pp->msi_irq;
  54. ret = devm_request_irq(dev, pp->msi_irq,
  55. dw_plat_pcie_msi_irq_handler,
  56. IRQF_SHARED | IRQF_NO_THREAD,
  57. "dw-plat-pcie-msi", pp);
  58. if (ret) {
  59. dev_err(dev, "failed to request MSI IRQ\n");
  60. return ret;
  61. }
  62. }
  63. pp->root_bus_nr = -1;
  64. pp->ops = &dw_plat_pcie_host_ops;
  65. ret = dw_pcie_host_init(pp);
  66. if (ret) {
  67. dev_err(dev, "failed to initialize host\n");
  68. return ret;
  69. }
  70. return 0;
  71. }
  72. static const struct dw_pcie_ops dw_pcie_ops = {
  73. };
  74. static int dw_plat_pcie_probe(struct platform_device *pdev)
  75. {
  76. struct device *dev = &pdev->dev;
  77. struct dw_plat_pcie *dw_plat_pcie;
  78. struct dw_pcie *pci;
  79. struct resource *res; /* Resource from DT */
  80. int ret;
  81. dw_plat_pcie = devm_kzalloc(dev, sizeof(*dw_plat_pcie), GFP_KERNEL);
  82. if (!dw_plat_pcie)
  83. return -ENOMEM;
  84. pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
  85. if (!pci)
  86. return -ENOMEM;
  87. pci->dev = dev;
  88. pci->ops = &dw_pcie_ops;
  89. dw_plat_pcie->pci = pci;
  90. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  91. pci->dbi_base = devm_ioremap_resource(dev, res);
  92. if (IS_ERR(pci->dbi_base))
  93. return PTR_ERR(pci->dbi_base);
  94. platform_set_drvdata(pdev, dw_plat_pcie);
  95. ret = dw_plat_add_pcie_port(&pci->pp, pdev);
  96. if (ret < 0)
  97. return ret;
  98. return 0;
  99. }
  100. static const struct of_device_id dw_plat_pcie_of_match[] = {
  101. { .compatible = "snps,dw-pcie", },
  102. {},
  103. };
  104. static struct platform_driver dw_plat_pcie_driver = {
  105. .driver = {
  106. .name = "dw-pcie",
  107. .of_match_table = dw_plat_pcie_of_match,
  108. .suppress_bind_attrs = true,
  109. },
  110. .probe = dw_plat_pcie_probe,
  111. };
  112. builtin_platform_driver(dw_plat_pcie_driver);