intel_pstate.c 23 KB

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  1. /*
  2. * intel_pstate.c: Native P state management for Intel processors
  3. *
  4. * (C) Copyright 2012 Intel Corporation
  5. * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; version 2
  10. * of the License.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/kernel_stat.h>
  14. #include <linux/module.h>
  15. #include <linux/ktime.h>
  16. #include <linux/hrtimer.h>
  17. #include <linux/tick.h>
  18. #include <linux/slab.h>
  19. #include <linux/sched.h>
  20. #include <linux/list.h>
  21. #include <linux/cpu.h>
  22. #include <linux/cpufreq.h>
  23. #include <linux/sysfs.h>
  24. #include <linux/types.h>
  25. #include <linux/fs.h>
  26. #include <linux/debugfs.h>
  27. #include <linux/acpi.h>
  28. #include <trace/events/power.h>
  29. #include <asm/div64.h>
  30. #include <asm/msr.h>
  31. #include <asm/cpu_device_id.h>
  32. #define SAMPLE_COUNT 3
  33. #define BYT_RATIOS 0x66a
  34. #define BYT_VIDS 0x66b
  35. #define BYT_TURBO_RATIOS 0x66c
  36. #define FRAC_BITS 6
  37. #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
  38. #define fp_toint(X) ((X) >> FRAC_BITS)
  39. #define FP_ROUNDUP(X) ((X) += 1 << FRAC_BITS)
  40. static inline int32_t mul_fp(int32_t x, int32_t y)
  41. {
  42. return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
  43. }
  44. static inline int32_t div_fp(int32_t x, int32_t y)
  45. {
  46. return div_s64((int64_t)x << FRAC_BITS, (int64_t)y);
  47. }
  48. struct sample {
  49. int32_t core_pct_busy;
  50. u64 aperf;
  51. u64 mperf;
  52. unsigned long long tsc;
  53. int freq;
  54. };
  55. struct pstate_data {
  56. int current_pstate;
  57. int min_pstate;
  58. int max_pstate;
  59. int turbo_pstate;
  60. };
  61. struct vid_data {
  62. int32_t min;
  63. int32_t max;
  64. int32_t ratio;
  65. };
  66. struct _pid {
  67. int setpoint;
  68. int32_t integral;
  69. int32_t p_gain;
  70. int32_t i_gain;
  71. int32_t d_gain;
  72. int deadband;
  73. int32_t last_err;
  74. };
  75. struct cpudata {
  76. int cpu;
  77. char name[64];
  78. struct timer_list timer;
  79. struct pstate_data pstate;
  80. struct vid_data vid;
  81. struct _pid pid;
  82. u64 prev_aperf;
  83. u64 prev_mperf;
  84. unsigned long long prev_tsc;
  85. int sample_ptr;
  86. struct sample samples[SAMPLE_COUNT];
  87. };
  88. static struct cpudata **all_cpu_data;
  89. struct pstate_adjust_policy {
  90. int sample_rate_ms;
  91. int deadband;
  92. int setpoint;
  93. int p_gain_pct;
  94. int d_gain_pct;
  95. int i_gain_pct;
  96. };
  97. struct pstate_funcs {
  98. int (*get_max)(void);
  99. int (*get_min)(void);
  100. int (*get_turbo)(void);
  101. void (*set)(struct cpudata*, int pstate);
  102. void (*get_vid)(struct cpudata *);
  103. };
  104. struct cpu_defaults {
  105. struct pstate_adjust_policy pid_policy;
  106. struct pstate_funcs funcs;
  107. };
  108. static struct pstate_adjust_policy pid_params;
  109. static struct pstate_funcs pstate_funcs;
  110. struct perf_limits {
  111. int no_turbo;
  112. int max_perf_pct;
  113. int min_perf_pct;
  114. int32_t max_perf;
  115. int32_t min_perf;
  116. int max_policy_pct;
  117. int max_sysfs_pct;
  118. };
  119. static struct perf_limits limits = {
  120. .no_turbo = 0,
  121. .max_perf_pct = 100,
  122. .max_perf = int_tofp(1),
  123. .min_perf_pct = 0,
  124. .min_perf = 0,
  125. .max_policy_pct = 100,
  126. .max_sysfs_pct = 100,
  127. };
  128. static inline void pid_reset(struct _pid *pid, int setpoint, int busy,
  129. int deadband, int integral) {
  130. pid->setpoint = setpoint;
  131. pid->deadband = deadband;
  132. pid->integral = int_tofp(integral);
  133. pid->last_err = setpoint - busy;
  134. }
  135. static inline void pid_p_gain_set(struct _pid *pid, int percent)
  136. {
  137. pid->p_gain = div_fp(int_tofp(percent), int_tofp(100));
  138. }
  139. static inline void pid_i_gain_set(struct _pid *pid, int percent)
  140. {
  141. pid->i_gain = div_fp(int_tofp(percent), int_tofp(100));
  142. }
  143. static inline void pid_d_gain_set(struct _pid *pid, int percent)
  144. {
  145. pid->d_gain = div_fp(int_tofp(percent), int_tofp(100));
  146. }
  147. static signed int pid_calc(struct _pid *pid, int32_t busy)
  148. {
  149. signed int result;
  150. int32_t pterm, dterm, fp_error;
  151. int32_t integral_limit;
  152. fp_error = int_tofp(pid->setpoint) - busy;
  153. if (abs(fp_error) <= int_tofp(pid->deadband))
  154. return 0;
  155. pterm = mul_fp(pid->p_gain, fp_error);
  156. pid->integral += fp_error;
  157. /* limit the integral term */
  158. integral_limit = int_tofp(30);
  159. if (pid->integral > integral_limit)
  160. pid->integral = integral_limit;
  161. if (pid->integral < -integral_limit)
  162. pid->integral = -integral_limit;
  163. dterm = mul_fp(pid->d_gain, fp_error - pid->last_err);
  164. pid->last_err = fp_error;
  165. result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm;
  166. return (signed int)fp_toint(result);
  167. }
  168. static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu)
  169. {
  170. pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct);
  171. pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct);
  172. pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct);
  173. pid_reset(&cpu->pid,
  174. pid_params.setpoint,
  175. 100,
  176. pid_params.deadband,
  177. 0);
  178. }
  179. static inline void intel_pstate_reset_all_pid(void)
  180. {
  181. unsigned int cpu;
  182. for_each_online_cpu(cpu) {
  183. if (all_cpu_data[cpu])
  184. intel_pstate_busy_pid_reset(all_cpu_data[cpu]);
  185. }
  186. }
  187. /************************** debugfs begin ************************/
  188. static int pid_param_set(void *data, u64 val)
  189. {
  190. *(u32 *)data = val;
  191. intel_pstate_reset_all_pid();
  192. return 0;
  193. }
  194. static int pid_param_get(void *data, u64 *val)
  195. {
  196. *val = *(u32 *)data;
  197. return 0;
  198. }
  199. DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get,
  200. pid_param_set, "%llu\n");
  201. struct pid_param {
  202. char *name;
  203. void *value;
  204. };
  205. static struct pid_param pid_files[] = {
  206. {"sample_rate_ms", &pid_params.sample_rate_ms},
  207. {"d_gain_pct", &pid_params.d_gain_pct},
  208. {"i_gain_pct", &pid_params.i_gain_pct},
  209. {"deadband", &pid_params.deadband},
  210. {"setpoint", &pid_params.setpoint},
  211. {"p_gain_pct", &pid_params.p_gain_pct},
  212. {NULL, NULL}
  213. };
  214. static struct dentry *debugfs_parent;
  215. static void intel_pstate_debug_expose_params(void)
  216. {
  217. int i = 0;
  218. debugfs_parent = debugfs_create_dir("pstate_snb", NULL);
  219. if (IS_ERR_OR_NULL(debugfs_parent))
  220. return;
  221. while (pid_files[i].name) {
  222. debugfs_create_file(pid_files[i].name, 0660,
  223. debugfs_parent, pid_files[i].value,
  224. &fops_pid_param);
  225. i++;
  226. }
  227. }
  228. /************************** debugfs end ************************/
  229. /************************** sysfs begin ************************/
  230. #define show_one(file_name, object) \
  231. static ssize_t show_##file_name \
  232. (struct kobject *kobj, struct attribute *attr, char *buf) \
  233. { \
  234. return sprintf(buf, "%u\n", limits.object); \
  235. }
  236. static ssize_t store_no_turbo(struct kobject *a, struct attribute *b,
  237. const char *buf, size_t count)
  238. {
  239. unsigned int input;
  240. int ret;
  241. ret = sscanf(buf, "%u", &input);
  242. if (ret != 1)
  243. return -EINVAL;
  244. limits.no_turbo = clamp_t(int, input, 0 , 1);
  245. return count;
  246. }
  247. static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b,
  248. const char *buf, size_t count)
  249. {
  250. unsigned int input;
  251. int ret;
  252. ret = sscanf(buf, "%u", &input);
  253. if (ret != 1)
  254. return -EINVAL;
  255. limits.max_sysfs_pct = clamp_t(int, input, 0 , 100);
  256. limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
  257. limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
  258. return count;
  259. }
  260. static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b,
  261. const char *buf, size_t count)
  262. {
  263. unsigned int input;
  264. int ret;
  265. ret = sscanf(buf, "%u", &input);
  266. if (ret != 1)
  267. return -EINVAL;
  268. limits.min_perf_pct = clamp_t(int, input, 0 , 100);
  269. limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
  270. return count;
  271. }
  272. show_one(no_turbo, no_turbo);
  273. show_one(max_perf_pct, max_perf_pct);
  274. show_one(min_perf_pct, min_perf_pct);
  275. define_one_global_rw(no_turbo);
  276. define_one_global_rw(max_perf_pct);
  277. define_one_global_rw(min_perf_pct);
  278. static struct attribute *intel_pstate_attributes[] = {
  279. &no_turbo.attr,
  280. &max_perf_pct.attr,
  281. &min_perf_pct.attr,
  282. NULL
  283. };
  284. static struct attribute_group intel_pstate_attr_group = {
  285. .attrs = intel_pstate_attributes,
  286. };
  287. static struct kobject *intel_pstate_kobject;
  288. static void intel_pstate_sysfs_expose_params(void)
  289. {
  290. int rc;
  291. intel_pstate_kobject = kobject_create_and_add("intel_pstate",
  292. &cpu_subsys.dev_root->kobj);
  293. BUG_ON(!intel_pstate_kobject);
  294. rc = sysfs_create_group(intel_pstate_kobject,
  295. &intel_pstate_attr_group);
  296. BUG_ON(rc);
  297. }
  298. /************************** sysfs end ************************/
  299. static int byt_get_min_pstate(void)
  300. {
  301. u64 value;
  302. rdmsrl(BYT_RATIOS, value);
  303. return (value >> 8) & 0xFF;
  304. }
  305. static int byt_get_max_pstate(void)
  306. {
  307. u64 value;
  308. rdmsrl(BYT_RATIOS, value);
  309. return (value >> 16) & 0xFF;
  310. }
  311. static int byt_get_turbo_pstate(void)
  312. {
  313. u64 value;
  314. rdmsrl(BYT_TURBO_RATIOS, value);
  315. return value & 0x3F;
  316. }
  317. static void byt_set_pstate(struct cpudata *cpudata, int pstate)
  318. {
  319. u64 val;
  320. int32_t vid_fp;
  321. u32 vid;
  322. val = pstate << 8;
  323. if (limits.no_turbo)
  324. val |= (u64)1 << 32;
  325. vid_fp = cpudata->vid.min + mul_fp(
  326. int_tofp(pstate - cpudata->pstate.min_pstate),
  327. cpudata->vid.ratio);
  328. vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max);
  329. vid = fp_toint(vid_fp);
  330. val |= vid;
  331. wrmsrl(MSR_IA32_PERF_CTL, val);
  332. }
  333. static void byt_get_vid(struct cpudata *cpudata)
  334. {
  335. u64 value;
  336. rdmsrl(BYT_VIDS, value);
  337. cpudata->vid.min = int_tofp((value >> 8) & 0x7f);
  338. cpudata->vid.max = int_tofp((value >> 16) & 0x7f);
  339. cpudata->vid.ratio = div_fp(
  340. cpudata->vid.max - cpudata->vid.min,
  341. int_tofp(cpudata->pstate.max_pstate -
  342. cpudata->pstate.min_pstate));
  343. }
  344. static int core_get_min_pstate(void)
  345. {
  346. u64 value;
  347. rdmsrl(MSR_PLATFORM_INFO, value);
  348. return (value >> 40) & 0xFF;
  349. }
  350. static int core_get_max_pstate(void)
  351. {
  352. u64 value;
  353. rdmsrl(MSR_PLATFORM_INFO, value);
  354. return (value >> 8) & 0xFF;
  355. }
  356. static int core_get_turbo_pstate(void)
  357. {
  358. u64 value;
  359. int nont, ret;
  360. rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
  361. nont = core_get_max_pstate();
  362. ret = ((value) & 255);
  363. if (ret <= nont)
  364. ret = nont;
  365. return ret;
  366. }
  367. static void core_set_pstate(struct cpudata *cpudata, int pstate)
  368. {
  369. u64 val;
  370. val = pstate << 8;
  371. if (limits.no_turbo)
  372. val |= (u64)1 << 32;
  373. wrmsrl(MSR_IA32_PERF_CTL, val);
  374. }
  375. static struct cpu_defaults core_params = {
  376. .pid_policy = {
  377. .sample_rate_ms = 10,
  378. .deadband = 0,
  379. .setpoint = 97,
  380. .p_gain_pct = 20,
  381. .d_gain_pct = 0,
  382. .i_gain_pct = 0,
  383. },
  384. .funcs = {
  385. .get_max = core_get_max_pstate,
  386. .get_min = core_get_min_pstate,
  387. .get_turbo = core_get_turbo_pstate,
  388. .set = core_set_pstate,
  389. },
  390. };
  391. static struct cpu_defaults byt_params = {
  392. .pid_policy = {
  393. .sample_rate_ms = 10,
  394. .deadband = 0,
  395. .setpoint = 97,
  396. .p_gain_pct = 14,
  397. .d_gain_pct = 0,
  398. .i_gain_pct = 4,
  399. },
  400. .funcs = {
  401. .get_max = byt_get_max_pstate,
  402. .get_min = byt_get_min_pstate,
  403. .get_turbo = byt_get_turbo_pstate,
  404. .set = byt_set_pstate,
  405. .get_vid = byt_get_vid,
  406. },
  407. };
  408. static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max)
  409. {
  410. int max_perf = cpu->pstate.turbo_pstate;
  411. int max_perf_adj;
  412. int min_perf;
  413. if (limits.no_turbo)
  414. max_perf = cpu->pstate.max_pstate;
  415. max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf));
  416. *max = clamp_t(int, max_perf_adj,
  417. cpu->pstate.min_pstate, cpu->pstate.turbo_pstate);
  418. min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf));
  419. *min = clamp_t(int, min_perf,
  420. cpu->pstate.min_pstate, max_perf);
  421. }
  422. static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
  423. {
  424. int max_perf, min_perf;
  425. intel_pstate_get_min_max(cpu, &min_perf, &max_perf);
  426. pstate = clamp_t(int, pstate, min_perf, max_perf);
  427. if (pstate == cpu->pstate.current_pstate)
  428. return;
  429. trace_cpu_frequency(pstate * 100000, cpu->cpu);
  430. cpu->pstate.current_pstate = pstate;
  431. pstate_funcs.set(cpu, pstate);
  432. }
  433. static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps)
  434. {
  435. int target;
  436. target = cpu->pstate.current_pstate + steps;
  437. intel_pstate_set_pstate(cpu, target);
  438. }
  439. static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps)
  440. {
  441. int target;
  442. target = cpu->pstate.current_pstate - steps;
  443. intel_pstate_set_pstate(cpu, target);
  444. }
  445. static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
  446. {
  447. sprintf(cpu->name, "Intel 2nd generation core");
  448. cpu->pstate.min_pstate = pstate_funcs.get_min();
  449. cpu->pstate.max_pstate = pstate_funcs.get_max();
  450. cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
  451. if (pstate_funcs.get_vid)
  452. pstate_funcs.get_vid(cpu);
  453. /*
  454. * goto max pstate so we don't slow up boot if we are built-in if we are
  455. * a module we will take care of it during normal operation
  456. */
  457. intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
  458. }
  459. static inline void intel_pstate_calc_busy(struct cpudata *cpu,
  460. struct sample *sample)
  461. {
  462. int32_t core_pct;
  463. int32_t c0_pct;
  464. core_pct = div_fp(int_tofp((sample->aperf)),
  465. int_tofp((sample->mperf)));
  466. core_pct = mul_fp(core_pct, int_tofp(100));
  467. FP_ROUNDUP(core_pct);
  468. c0_pct = div_fp(int_tofp(sample->mperf), int_tofp(sample->tsc));
  469. sample->freq = fp_toint(
  470. mul_fp(int_tofp(cpu->pstate.max_pstate * 1000), core_pct));
  471. sample->core_pct_busy = mul_fp(core_pct, c0_pct);
  472. }
  473. static inline void intel_pstate_sample(struct cpudata *cpu)
  474. {
  475. u64 aperf, mperf;
  476. unsigned long long tsc;
  477. rdmsrl(MSR_IA32_APERF, aperf);
  478. rdmsrl(MSR_IA32_MPERF, mperf);
  479. tsc = native_read_tsc();
  480. aperf = aperf >> FRAC_BITS;
  481. mperf = mperf >> FRAC_BITS;
  482. tsc = tsc >> FRAC_BITS;
  483. cpu->sample_ptr = (cpu->sample_ptr + 1) % SAMPLE_COUNT;
  484. cpu->samples[cpu->sample_ptr].aperf = aperf;
  485. cpu->samples[cpu->sample_ptr].mperf = mperf;
  486. cpu->samples[cpu->sample_ptr].tsc = tsc;
  487. cpu->samples[cpu->sample_ptr].aperf -= cpu->prev_aperf;
  488. cpu->samples[cpu->sample_ptr].mperf -= cpu->prev_mperf;
  489. cpu->samples[cpu->sample_ptr].tsc -= cpu->prev_tsc;
  490. intel_pstate_calc_busy(cpu, &cpu->samples[cpu->sample_ptr]);
  491. cpu->prev_aperf = aperf;
  492. cpu->prev_mperf = mperf;
  493. cpu->prev_tsc = tsc;
  494. }
  495. static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
  496. {
  497. int sample_time, delay;
  498. sample_time = pid_params.sample_rate_ms;
  499. delay = msecs_to_jiffies(sample_time);
  500. mod_timer_pinned(&cpu->timer, jiffies + delay);
  501. }
  502. static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu)
  503. {
  504. int32_t core_busy, max_pstate, current_pstate;
  505. core_busy = cpu->samples[cpu->sample_ptr].core_pct_busy;
  506. max_pstate = int_tofp(cpu->pstate.max_pstate);
  507. current_pstate = int_tofp(cpu->pstate.current_pstate);
  508. core_busy = mul_fp(core_busy, div_fp(max_pstate, current_pstate));
  509. return FP_ROUNDUP(core_busy);
  510. }
  511. static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu)
  512. {
  513. int32_t busy_scaled;
  514. struct _pid *pid;
  515. signed int ctl = 0;
  516. int steps;
  517. pid = &cpu->pid;
  518. busy_scaled = intel_pstate_get_scaled_busy(cpu);
  519. ctl = pid_calc(pid, busy_scaled);
  520. steps = abs(ctl);
  521. if (ctl < 0)
  522. intel_pstate_pstate_increase(cpu, steps);
  523. else
  524. intel_pstate_pstate_decrease(cpu, steps);
  525. }
  526. static void intel_pstate_timer_func(unsigned long __data)
  527. {
  528. struct cpudata *cpu = (struct cpudata *) __data;
  529. struct sample *sample;
  530. intel_pstate_sample(cpu);
  531. sample = &cpu->samples[cpu->sample_ptr];
  532. intel_pstate_adjust_busy_pstate(cpu);
  533. trace_pstate_sample(fp_toint(sample->core_pct_busy),
  534. fp_toint(intel_pstate_get_scaled_busy(cpu)),
  535. cpu->pstate.current_pstate,
  536. sample->mperf,
  537. sample->aperf,
  538. sample->freq);
  539. intel_pstate_set_sample_time(cpu);
  540. }
  541. #define ICPU(model, policy) \
  542. { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\
  543. (unsigned long)&policy }
  544. static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
  545. ICPU(0x2a, core_params),
  546. ICPU(0x2d, core_params),
  547. ICPU(0x37, byt_params),
  548. ICPU(0x3a, core_params),
  549. ICPU(0x3c, core_params),
  550. ICPU(0x3e, core_params),
  551. ICPU(0x3f, core_params),
  552. ICPU(0x45, core_params),
  553. ICPU(0x46, core_params),
  554. {}
  555. };
  556. MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
  557. static int intel_pstate_init_cpu(unsigned int cpunum)
  558. {
  559. const struct x86_cpu_id *id;
  560. struct cpudata *cpu;
  561. id = x86_match_cpu(intel_pstate_cpu_ids);
  562. if (!id)
  563. return -ENODEV;
  564. all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL);
  565. if (!all_cpu_data[cpunum])
  566. return -ENOMEM;
  567. cpu = all_cpu_data[cpunum];
  568. intel_pstate_get_cpu_pstates(cpu);
  569. if (!cpu->pstate.current_pstate) {
  570. all_cpu_data[cpunum] = NULL;
  571. kfree(cpu);
  572. return -ENODATA;
  573. }
  574. cpu->cpu = cpunum;
  575. init_timer_deferrable(&cpu->timer);
  576. cpu->timer.function = intel_pstate_timer_func;
  577. cpu->timer.data =
  578. (unsigned long)cpu;
  579. cpu->timer.expires = jiffies + HZ/100;
  580. intel_pstate_busy_pid_reset(cpu);
  581. intel_pstate_sample(cpu);
  582. intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
  583. add_timer_on(&cpu->timer, cpunum);
  584. pr_info("Intel pstate controlling: cpu %d\n", cpunum);
  585. return 0;
  586. }
  587. static unsigned int intel_pstate_get(unsigned int cpu_num)
  588. {
  589. struct sample *sample;
  590. struct cpudata *cpu;
  591. cpu = all_cpu_data[cpu_num];
  592. if (!cpu)
  593. return 0;
  594. sample = &cpu->samples[cpu->sample_ptr];
  595. return sample->freq;
  596. }
  597. static int intel_pstate_set_policy(struct cpufreq_policy *policy)
  598. {
  599. struct cpudata *cpu;
  600. cpu = all_cpu_data[policy->cpu];
  601. if (!policy->cpuinfo.max_freq)
  602. return -ENODEV;
  603. if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
  604. limits.min_perf_pct = 100;
  605. limits.min_perf = int_tofp(1);
  606. limits.max_perf_pct = 100;
  607. limits.max_perf = int_tofp(1);
  608. limits.no_turbo = 0;
  609. return 0;
  610. }
  611. limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
  612. limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100);
  613. limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
  614. limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq;
  615. limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100);
  616. limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
  617. limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
  618. return 0;
  619. }
  620. static int intel_pstate_verify_policy(struct cpufreq_policy *policy)
  621. {
  622. cpufreq_verify_within_cpu_limits(policy);
  623. if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
  624. (policy->policy != CPUFREQ_POLICY_PERFORMANCE))
  625. return -EINVAL;
  626. return 0;
  627. }
  628. static int intel_pstate_cpu_exit(struct cpufreq_policy *policy)
  629. {
  630. int cpu = policy->cpu;
  631. del_timer(&all_cpu_data[cpu]->timer);
  632. kfree(all_cpu_data[cpu]);
  633. all_cpu_data[cpu] = NULL;
  634. return 0;
  635. }
  636. static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
  637. {
  638. struct cpudata *cpu;
  639. int rc;
  640. rc = intel_pstate_init_cpu(policy->cpu);
  641. if (rc)
  642. return rc;
  643. cpu = all_cpu_data[policy->cpu];
  644. if (!limits.no_turbo &&
  645. limits.min_perf_pct == 100 && limits.max_perf_pct == 100)
  646. policy->policy = CPUFREQ_POLICY_PERFORMANCE;
  647. else
  648. policy->policy = CPUFREQ_POLICY_POWERSAVE;
  649. policy->min = cpu->pstate.min_pstate * 100000;
  650. policy->max = cpu->pstate.turbo_pstate * 100000;
  651. /* cpuinfo and default policy values */
  652. policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000;
  653. policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000;
  654. policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
  655. cpumask_set_cpu(policy->cpu, policy->cpus);
  656. return 0;
  657. }
  658. static struct cpufreq_driver intel_pstate_driver = {
  659. .flags = CPUFREQ_CONST_LOOPS,
  660. .verify = intel_pstate_verify_policy,
  661. .setpolicy = intel_pstate_set_policy,
  662. .get = intel_pstate_get,
  663. .init = intel_pstate_cpu_init,
  664. .exit = intel_pstate_cpu_exit,
  665. .name = "intel_pstate",
  666. };
  667. static int __initdata no_load;
  668. static int intel_pstate_msrs_not_valid(void)
  669. {
  670. /* Check that all the msr's we are using are valid. */
  671. u64 aperf, mperf, tmp;
  672. rdmsrl(MSR_IA32_APERF, aperf);
  673. rdmsrl(MSR_IA32_MPERF, mperf);
  674. if (!pstate_funcs.get_max() ||
  675. !pstate_funcs.get_min() ||
  676. !pstate_funcs.get_turbo())
  677. return -ENODEV;
  678. rdmsrl(MSR_IA32_APERF, tmp);
  679. if (!(tmp - aperf))
  680. return -ENODEV;
  681. rdmsrl(MSR_IA32_MPERF, tmp);
  682. if (!(tmp - mperf))
  683. return -ENODEV;
  684. return 0;
  685. }
  686. static void copy_pid_params(struct pstate_adjust_policy *policy)
  687. {
  688. pid_params.sample_rate_ms = policy->sample_rate_ms;
  689. pid_params.p_gain_pct = policy->p_gain_pct;
  690. pid_params.i_gain_pct = policy->i_gain_pct;
  691. pid_params.d_gain_pct = policy->d_gain_pct;
  692. pid_params.deadband = policy->deadband;
  693. pid_params.setpoint = policy->setpoint;
  694. }
  695. static void copy_cpu_funcs(struct pstate_funcs *funcs)
  696. {
  697. pstate_funcs.get_max = funcs->get_max;
  698. pstate_funcs.get_min = funcs->get_min;
  699. pstate_funcs.get_turbo = funcs->get_turbo;
  700. pstate_funcs.set = funcs->set;
  701. pstate_funcs.get_vid = funcs->get_vid;
  702. }
  703. #if IS_ENABLED(CONFIG_ACPI)
  704. #include <acpi/processor.h>
  705. static bool intel_pstate_no_acpi_pss(void)
  706. {
  707. int i;
  708. for_each_possible_cpu(i) {
  709. acpi_status status;
  710. union acpi_object *pss;
  711. struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
  712. struct acpi_processor *pr = per_cpu(processors, i);
  713. if (!pr)
  714. continue;
  715. status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer);
  716. if (ACPI_FAILURE(status))
  717. continue;
  718. pss = buffer.pointer;
  719. if (pss && pss->type == ACPI_TYPE_PACKAGE) {
  720. kfree(pss);
  721. return false;
  722. }
  723. kfree(pss);
  724. }
  725. return true;
  726. }
  727. struct hw_vendor_info {
  728. u16 valid;
  729. char oem_id[ACPI_OEM_ID_SIZE];
  730. char oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
  731. };
  732. /* Hardware vendor-specific info that has its own power management modes */
  733. static struct hw_vendor_info vendor_info[] = {
  734. {1, "HP ", "ProLiant"},
  735. {0, "", ""},
  736. };
  737. static bool intel_pstate_platform_pwr_mgmt_exists(void)
  738. {
  739. struct acpi_table_header hdr;
  740. struct hw_vendor_info *v_info;
  741. if (acpi_disabled
  742. || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr)))
  743. return false;
  744. for (v_info = vendor_info; v_info->valid; v_info++) {
  745. if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE)
  746. && !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE)
  747. && intel_pstate_no_acpi_pss())
  748. return true;
  749. }
  750. return false;
  751. }
  752. #else /* CONFIG_ACPI not enabled */
  753. static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
  754. #endif /* CONFIG_ACPI */
  755. static int __init intel_pstate_init(void)
  756. {
  757. int cpu, rc = 0;
  758. const struct x86_cpu_id *id;
  759. struct cpu_defaults *cpu_info;
  760. if (no_load)
  761. return -ENODEV;
  762. id = x86_match_cpu(intel_pstate_cpu_ids);
  763. if (!id)
  764. return -ENODEV;
  765. /*
  766. * The Intel pstate driver will be ignored if the platform
  767. * firmware has its own power management modes.
  768. */
  769. if (intel_pstate_platform_pwr_mgmt_exists())
  770. return -ENODEV;
  771. cpu_info = (struct cpu_defaults *)id->driver_data;
  772. copy_pid_params(&cpu_info->pid_policy);
  773. copy_cpu_funcs(&cpu_info->funcs);
  774. if (intel_pstate_msrs_not_valid())
  775. return -ENODEV;
  776. pr_info("Intel P-state driver initializing.\n");
  777. all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
  778. if (!all_cpu_data)
  779. return -ENOMEM;
  780. rc = cpufreq_register_driver(&intel_pstate_driver);
  781. if (rc)
  782. goto out;
  783. intel_pstate_debug_expose_params();
  784. intel_pstate_sysfs_expose_params();
  785. return rc;
  786. out:
  787. get_online_cpus();
  788. for_each_online_cpu(cpu) {
  789. if (all_cpu_data[cpu]) {
  790. del_timer_sync(&all_cpu_data[cpu]->timer);
  791. kfree(all_cpu_data[cpu]);
  792. }
  793. }
  794. put_online_cpus();
  795. vfree(all_cpu_data);
  796. return -ENODEV;
  797. }
  798. device_initcall(intel_pstate_init);
  799. static int __init intel_pstate_setup(char *str)
  800. {
  801. if (!str)
  802. return -EINVAL;
  803. if (!strcmp(str, "disable"))
  804. no_load = 1;
  805. return 0;
  806. }
  807. early_param("intel_pstate", intel_pstate_setup);
  808. MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
  809. MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
  810. MODULE_LICENSE("GPL");