intel-pt.c 26 KB

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  1. /*
  2. * intel_pt.c: Intel Processor Trace support
  3. * Copyright (c) 2013-2015, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. */
  15. #include <stdbool.h>
  16. #include <linux/kernel.h>
  17. #include <linux/types.h>
  18. #include <linux/bitops.h>
  19. #include <linux/log2.h>
  20. #include <cpuid.h>
  21. #include "../../perf.h"
  22. #include "../../util/session.h"
  23. #include "../../util/event.h"
  24. #include "../../util/evlist.h"
  25. #include "../../util/evsel.h"
  26. #include "../../util/cpumap.h"
  27. #include <subcmd/parse-options.h>
  28. #include "../../util/parse-events.h"
  29. #include "../../util/pmu.h"
  30. #include "../../util/debug.h"
  31. #include "../../util/auxtrace.h"
  32. #include "../../util/tsc.h"
  33. #include "../../util/intel-pt.h"
  34. #define KiB(x) ((x) * 1024)
  35. #define MiB(x) ((x) * 1024 * 1024)
  36. #define KiB_MASK(x) (KiB(x) - 1)
  37. #define MiB_MASK(x) (MiB(x) - 1)
  38. #define INTEL_PT_DEFAULT_SAMPLE_SIZE KiB(4)
  39. #define INTEL_PT_MAX_SAMPLE_SIZE KiB(60)
  40. #define INTEL_PT_PSB_PERIOD_NEAR 256
  41. struct intel_pt_snapshot_ref {
  42. void *ref_buf;
  43. size_t ref_offset;
  44. bool wrapped;
  45. };
  46. struct intel_pt_recording {
  47. struct auxtrace_record itr;
  48. struct perf_pmu *intel_pt_pmu;
  49. int have_sched_switch;
  50. struct perf_evlist *evlist;
  51. bool snapshot_mode;
  52. bool snapshot_init_done;
  53. size_t snapshot_size;
  54. size_t snapshot_ref_buf_size;
  55. int snapshot_ref_cnt;
  56. struct intel_pt_snapshot_ref *snapshot_refs;
  57. };
  58. static int intel_pt_parse_terms_with_default(struct list_head *formats,
  59. const char *str,
  60. u64 *config)
  61. {
  62. struct list_head *terms;
  63. struct perf_event_attr attr = { .size = 0, };
  64. int err;
  65. terms = malloc(sizeof(struct list_head));
  66. if (!terms)
  67. return -ENOMEM;
  68. INIT_LIST_HEAD(terms);
  69. err = parse_events_terms(terms, str);
  70. if (err)
  71. goto out_free;
  72. attr.config = *config;
  73. err = perf_pmu__config_terms(formats, &attr, terms, true, NULL);
  74. if (err)
  75. goto out_free;
  76. *config = attr.config;
  77. out_free:
  78. parse_events__free_terms(terms);
  79. return err;
  80. }
  81. static int intel_pt_parse_terms(struct list_head *formats, const char *str,
  82. u64 *config)
  83. {
  84. *config = 0;
  85. return intel_pt_parse_terms_with_default(formats, str, config);
  86. }
  87. static u64 intel_pt_masked_bits(u64 mask, u64 bits)
  88. {
  89. const u64 top_bit = 1ULL << 63;
  90. u64 res = 0;
  91. int i;
  92. for (i = 0; i < 64; i++) {
  93. if (mask & top_bit) {
  94. res <<= 1;
  95. if (bits & top_bit)
  96. res |= 1;
  97. }
  98. mask <<= 1;
  99. bits <<= 1;
  100. }
  101. return res;
  102. }
  103. static int intel_pt_read_config(struct perf_pmu *intel_pt_pmu, const char *str,
  104. struct perf_evlist *evlist, u64 *res)
  105. {
  106. struct perf_evsel *evsel;
  107. u64 mask;
  108. *res = 0;
  109. mask = perf_pmu__format_bits(&intel_pt_pmu->format, str);
  110. if (!mask)
  111. return -EINVAL;
  112. evlist__for_each(evlist, evsel) {
  113. if (evsel->attr.type == intel_pt_pmu->type) {
  114. *res = intel_pt_masked_bits(mask, evsel->attr.config);
  115. return 0;
  116. }
  117. }
  118. return -EINVAL;
  119. }
  120. static size_t intel_pt_psb_period(struct perf_pmu *intel_pt_pmu,
  121. struct perf_evlist *evlist)
  122. {
  123. u64 val;
  124. int err, topa_multiple_entries;
  125. size_t psb_period;
  126. if (perf_pmu__scan_file(intel_pt_pmu, "caps/topa_multiple_entries",
  127. "%d", &topa_multiple_entries) != 1)
  128. topa_multiple_entries = 0;
  129. /*
  130. * Use caps/topa_multiple_entries to indicate early hardware that had
  131. * extra frequent PSBs.
  132. */
  133. if (!topa_multiple_entries) {
  134. psb_period = 256;
  135. goto out;
  136. }
  137. err = intel_pt_read_config(intel_pt_pmu, "psb_period", evlist, &val);
  138. if (err)
  139. val = 0;
  140. psb_period = 1 << (val + 11);
  141. out:
  142. pr_debug2("%s psb_period %zu\n", intel_pt_pmu->name, psb_period);
  143. return psb_period;
  144. }
  145. static int intel_pt_pick_bit(int bits, int target)
  146. {
  147. int pos, pick = -1;
  148. for (pos = 0; bits; bits >>= 1, pos++) {
  149. if (bits & 1) {
  150. if (pos <= target || pick < 0)
  151. pick = pos;
  152. if (pos >= target)
  153. break;
  154. }
  155. }
  156. return pick;
  157. }
  158. static u64 intel_pt_default_config(struct perf_pmu *intel_pt_pmu)
  159. {
  160. char buf[256];
  161. int mtc, mtc_periods = 0, mtc_period;
  162. int psb_cyc, psb_periods, psb_period;
  163. int pos = 0;
  164. u64 config;
  165. pos += scnprintf(buf + pos, sizeof(buf) - pos, "tsc");
  166. if (perf_pmu__scan_file(intel_pt_pmu, "caps/mtc", "%d",
  167. &mtc) != 1)
  168. mtc = 1;
  169. if (mtc) {
  170. if (perf_pmu__scan_file(intel_pt_pmu, "caps/mtc_periods", "%x",
  171. &mtc_periods) != 1)
  172. mtc_periods = 0;
  173. if (mtc_periods) {
  174. mtc_period = intel_pt_pick_bit(mtc_periods, 3);
  175. pos += scnprintf(buf + pos, sizeof(buf) - pos,
  176. ",mtc,mtc_period=%d", mtc_period);
  177. }
  178. }
  179. if (perf_pmu__scan_file(intel_pt_pmu, "caps/psb_cyc", "%d",
  180. &psb_cyc) != 1)
  181. psb_cyc = 1;
  182. if (psb_cyc && mtc_periods) {
  183. if (perf_pmu__scan_file(intel_pt_pmu, "caps/psb_periods", "%x",
  184. &psb_periods) != 1)
  185. psb_periods = 0;
  186. if (psb_periods) {
  187. psb_period = intel_pt_pick_bit(psb_periods, 3);
  188. pos += scnprintf(buf + pos, sizeof(buf) - pos,
  189. ",psb_period=%d", psb_period);
  190. }
  191. }
  192. pr_debug2("%s default config: %s\n", intel_pt_pmu->name, buf);
  193. intel_pt_parse_terms(&intel_pt_pmu->format, buf, &config);
  194. return config;
  195. }
  196. static int intel_pt_parse_snapshot_options(struct auxtrace_record *itr,
  197. struct record_opts *opts,
  198. const char *str)
  199. {
  200. struct intel_pt_recording *ptr =
  201. container_of(itr, struct intel_pt_recording, itr);
  202. unsigned long long snapshot_size = 0;
  203. char *endptr;
  204. if (str) {
  205. snapshot_size = strtoull(str, &endptr, 0);
  206. if (*endptr || snapshot_size > SIZE_MAX)
  207. return -1;
  208. }
  209. opts->auxtrace_snapshot_mode = true;
  210. opts->auxtrace_snapshot_size = snapshot_size;
  211. ptr->snapshot_size = snapshot_size;
  212. return 0;
  213. }
  214. struct perf_event_attr *
  215. intel_pt_pmu_default_config(struct perf_pmu *intel_pt_pmu)
  216. {
  217. struct perf_event_attr *attr;
  218. attr = zalloc(sizeof(struct perf_event_attr));
  219. if (!attr)
  220. return NULL;
  221. attr->config = intel_pt_default_config(intel_pt_pmu);
  222. intel_pt_pmu->selectable = true;
  223. return attr;
  224. }
  225. static size_t intel_pt_info_priv_size(struct auxtrace_record *itr __maybe_unused)
  226. {
  227. return INTEL_PT_AUXTRACE_PRIV_SIZE;
  228. }
  229. static void intel_pt_tsc_ctc_ratio(u32 *n, u32 *d)
  230. {
  231. unsigned int eax = 0, ebx = 0, ecx = 0, edx = 0;
  232. __get_cpuid(0x15, &eax, &ebx, &ecx, &edx);
  233. *n = ebx;
  234. *d = eax;
  235. }
  236. static int intel_pt_info_fill(struct auxtrace_record *itr,
  237. struct perf_session *session,
  238. struct auxtrace_info_event *auxtrace_info,
  239. size_t priv_size)
  240. {
  241. struct intel_pt_recording *ptr =
  242. container_of(itr, struct intel_pt_recording, itr);
  243. struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu;
  244. struct perf_event_mmap_page *pc;
  245. struct perf_tsc_conversion tc = { .time_mult = 0, };
  246. bool cap_user_time_zero = false, per_cpu_mmaps;
  247. u64 tsc_bit, mtc_bit, mtc_freq_bits, cyc_bit, noretcomp_bit;
  248. u32 tsc_ctc_ratio_n, tsc_ctc_ratio_d;
  249. int err;
  250. if (priv_size != INTEL_PT_AUXTRACE_PRIV_SIZE)
  251. return -EINVAL;
  252. intel_pt_parse_terms(&intel_pt_pmu->format, "tsc", &tsc_bit);
  253. intel_pt_parse_terms(&intel_pt_pmu->format, "noretcomp",
  254. &noretcomp_bit);
  255. intel_pt_parse_terms(&intel_pt_pmu->format, "mtc", &mtc_bit);
  256. mtc_freq_bits = perf_pmu__format_bits(&intel_pt_pmu->format,
  257. "mtc_period");
  258. intel_pt_parse_terms(&intel_pt_pmu->format, "cyc", &cyc_bit);
  259. intel_pt_tsc_ctc_ratio(&tsc_ctc_ratio_n, &tsc_ctc_ratio_d);
  260. if (!session->evlist->nr_mmaps)
  261. return -EINVAL;
  262. pc = session->evlist->mmap[0].base;
  263. if (pc) {
  264. err = perf_read_tsc_conversion(pc, &tc);
  265. if (err) {
  266. if (err != -EOPNOTSUPP)
  267. return err;
  268. } else {
  269. cap_user_time_zero = tc.time_mult != 0;
  270. }
  271. if (!cap_user_time_zero)
  272. ui__warning("Intel Processor Trace: TSC not available\n");
  273. }
  274. per_cpu_mmaps = !cpu_map__empty(session->evlist->cpus);
  275. auxtrace_info->type = PERF_AUXTRACE_INTEL_PT;
  276. auxtrace_info->priv[INTEL_PT_PMU_TYPE] = intel_pt_pmu->type;
  277. auxtrace_info->priv[INTEL_PT_TIME_SHIFT] = tc.time_shift;
  278. auxtrace_info->priv[INTEL_PT_TIME_MULT] = tc.time_mult;
  279. auxtrace_info->priv[INTEL_PT_TIME_ZERO] = tc.time_zero;
  280. auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO] = cap_user_time_zero;
  281. auxtrace_info->priv[INTEL_PT_TSC_BIT] = tsc_bit;
  282. auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT] = noretcomp_bit;
  283. auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH] = ptr->have_sched_switch;
  284. auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE] = ptr->snapshot_mode;
  285. auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS] = per_cpu_mmaps;
  286. auxtrace_info->priv[INTEL_PT_MTC_BIT] = mtc_bit;
  287. auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS] = mtc_freq_bits;
  288. auxtrace_info->priv[INTEL_PT_TSC_CTC_N] = tsc_ctc_ratio_n;
  289. auxtrace_info->priv[INTEL_PT_TSC_CTC_D] = tsc_ctc_ratio_d;
  290. auxtrace_info->priv[INTEL_PT_CYC_BIT] = cyc_bit;
  291. return 0;
  292. }
  293. static int intel_pt_track_switches(struct perf_evlist *evlist)
  294. {
  295. const char *sched_switch = "sched:sched_switch";
  296. struct perf_evsel *evsel;
  297. int err;
  298. if (!perf_evlist__can_select_event(evlist, sched_switch))
  299. return -EPERM;
  300. err = parse_events(evlist, sched_switch, NULL);
  301. if (err) {
  302. pr_debug2("%s: failed to parse %s, error %d\n",
  303. __func__, sched_switch, err);
  304. return err;
  305. }
  306. evsel = perf_evlist__last(evlist);
  307. perf_evsel__set_sample_bit(evsel, CPU);
  308. perf_evsel__set_sample_bit(evsel, TIME);
  309. evsel->system_wide = true;
  310. evsel->no_aux_samples = true;
  311. evsel->immediate = true;
  312. return 0;
  313. }
  314. static void intel_pt_valid_str(char *str, size_t len, u64 valid)
  315. {
  316. unsigned int val, last = 0, state = 1;
  317. int p = 0;
  318. str[0] = '\0';
  319. for (val = 0; val <= 64; val++, valid >>= 1) {
  320. if (valid & 1) {
  321. last = val;
  322. switch (state) {
  323. case 0:
  324. p += scnprintf(str + p, len - p, ",");
  325. /* Fall through */
  326. case 1:
  327. p += scnprintf(str + p, len - p, "%u", val);
  328. state = 2;
  329. break;
  330. case 2:
  331. state = 3;
  332. break;
  333. case 3:
  334. state = 4;
  335. break;
  336. default:
  337. break;
  338. }
  339. } else {
  340. switch (state) {
  341. case 3:
  342. p += scnprintf(str + p, len - p, ",%u", last);
  343. state = 0;
  344. break;
  345. case 4:
  346. p += scnprintf(str + p, len - p, "-%u", last);
  347. state = 0;
  348. break;
  349. default:
  350. break;
  351. }
  352. if (state != 1)
  353. state = 0;
  354. }
  355. }
  356. }
  357. static int intel_pt_val_config_term(struct perf_pmu *intel_pt_pmu,
  358. const char *caps, const char *name,
  359. const char *supported, u64 config)
  360. {
  361. char valid_str[256];
  362. unsigned int shift;
  363. unsigned long long valid;
  364. u64 bits;
  365. int ok;
  366. if (perf_pmu__scan_file(intel_pt_pmu, caps, "%llx", &valid) != 1)
  367. valid = 0;
  368. if (supported &&
  369. perf_pmu__scan_file(intel_pt_pmu, supported, "%d", &ok) == 1 && !ok)
  370. valid = 0;
  371. valid |= 1;
  372. bits = perf_pmu__format_bits(&intel_pt_pmu->format, name);
  373. config &= bits;
  374. for (shift = 0; bits && !(bits & 1); shift++)
  375. bits >>= 1;
  376. config >>= shift;
  377. if (config > 63)
  378. goto out_err;
  379. if (valid & (1 << config))
  380. return 0;
  381. out_err:
  382. intel_pt_valid_str(valid_str, sizeof(valid_str), valid);
  383. pr_err("Invalid %s for %s. Valid values are: %s\n",
  384. name, INTEL_PT_PMU_NAME, valid_str);
  385. return -EINVAL;
  386. }
  387. static int intel_pt_validate_config(struct perf_pmu *intel_pt_pmu,
  388. struct perf_evsel *evsel)
  389. {
  390. int err;
  391. if (!evsel)
  392. return 0;
  393. err = intel_pt_val_config_term(intel_pt_pmu, "caps/cycle_thresholds",
  394. "cyc_thresh", "caps/psb_cyc",
  395. evsel->attr.config);
  396. if (err)
  397. return err;
  398. err = intel_pt_val_config_term(intel_pt_pmu, "caps/mtc_periods",
  399. "mtc_period", "caps/mtc",
  400. evsel->attr.config);
  401. if (err)
  402. return err;
  403. return intel_pt_val_config_term(intel_pt_pmu, "caps/psb_periods",
  404. "psb_period", "caps/psb_cyc",
  405. evsel->attr.config);
  406. }
  407. static int intel_pt_recording_options(struct auxtrace_record *itr,
  408. struct perf_evlist *evlist,
  409. struct record_opts *opts)
  410. {
  411. struct intel_pt_recording *ptr =
  412. container_of(itr, struct intel_pt_recording, itr);
  413. struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu;
  414. bool have_timing_info;
  415. struct perf_evsel *evsel, *intel_pt_evsel = NULL;
  416. const struct cpu_map *cpus = evlist->cpus;
  417. bool privileged = geteuid() == 0 || perf_event_paranoid() < 0;
  418. u64 tsc_bit;
  419. int err;
  420. ptr->evlist = evlist;
  421. ptr->snapshot_mode = opts->auxtrace_snapshot_mode;
  422. evlist__for_each(evlist, evsel) {
  423. if (evsel->attr.type == intel_pt_pmu->type) {
  424. if (intel_pt_evsel) {
  425. pr_err("There may be only one " INTEL_PT_PMU_NAME " event\n");
  426. return -EINVAL;
  427. }
  428. evsel->attr.freq = 0;
  429. evsel->attr.sample_period = 1;
  430. intel_pt_evsel = evsel;
  431. opts->full_auxtrace = true;
  432. }
  433. }
  434. if (opts->auxtrace_snapshot_mode && !opts->full_auxtrace) {
  435. pr_err("Snapshot mode (-S option) requires " INTEL_PT_PMU_NAME " PMU event (-e " INTEL_PT_PMU_NAME ")\n");
  436. return -EINVAL;
  437. }
  438. if (opts->use_clockid) {
  439. pr_err("Cannot use clockid (-k option) with " INTEL_PT_PMU_NAME "\n");
  440. return -EINVAL;
  441. }
  442. if (!opts->full_auxtrace)
  443. return 0;
  444. err = intel_pt_validate_config(intel_pt_pmu, intel_pt_evsel);
  445. if (err)
  446. return err;
  447. /* Set default sizes for snapshot mode */
  448. if (opts->auxtrace_snapshot_mode) {
  449. size_t psb_period = intel_pt_psb_period(intel_pt_pmu, evlist);
  450. if (!opts->auxtrace_snapshot_size && !opts->auxtrace_mmap_pages) {
  451. if (privileged) {
  452. opts->auxtrace_mmap_pages = MiB(4) / page_size;
  453. } else {
  454. opts->auxtrace_mmap_pages = KiB(128) / page_size;
  455. if (opts->mmap_pages == UINT_MAX)
  456. opts->mmap_pages = KiB(256) / page_size;
  457. }
  458. } else if (!opts->auxtrace_mmap_pages && !privileged &&
  459. opts->mmap_pages == UINT_MAX) {
  460. opts->mmap_pages = KiB(256) / page_size;
  461. }
  462. if (!opts->auxtrace_snapshot_size)
  463. opts->auxtrace_snapshot_size =
  464. opts->auxtrace_mmap_pages * (size_t)page_size;
  465. if (!opts->auxtrace_mmap_pages) {
  466. size_t sz = opts->auxtrace_snapshot_size;
  467. sz = round_up(sz, page_size) / page_size;
  468. opts->auxtrace_mmap_pages = roundup_pow_of_two(sz);
  469. }
  470. if (opts->auxtrace_snapshot_size >
  471. opts->auxtrace_mmap_pages * (size_t)page_size) {
  472. pr_err("Snapshot size %zu must not be greater than AUX area tracing mmap size %zu\n",
  473. opts->auxtrace_snapshot_size,
  474. opts->auxtrace_mmap_pages * (size_t)page_size);
  475. return -EINVAL;
  476. }
  477. if (!opts->auxtrace_snapshot_size || !opts->auxtrace_mmap_pages) {
  478. pr_err("Failed to calculate default snapshot size and/or AUX area tracing mmap pages\n");
  479. return -EINVAL;
  480. }
  481. pr_debug2("Intel PT snapshot size: %zu\n",
  482. opts->auxtrace_snapshot_size);
  483. if (psb_period &&
  484. opts->auxtrace_snapshot_size <= psb_period +
  485. INTEL_PT_PSB_PERIOD_NEAR)
  486. ui__warning("Intel PT snapshot size (%zu) may be too small for PSB period (%zu)\n",
  487. opts->auxtrace_snapshot_size, psb_period);
  488. }
  489. /* Set default sizes for full trace mode */
  490. if (opts->full_auxtrace && !opts->auxtrace_mmap_pages) {
  491. if (privileged) {
  492. opts->auxtrace_mmap_pages = MiB(4) / page_size;
  493. } else {
  494. opts->auxtrace_mmap_pages = KiB(128) / page_size;
  495. if (opts->mmap_pages == UINT_MAX)
  496. opts->mmap_pages = KiB(256) / page_size;
  497. }
  498. }
  499. /* Validate auxtrace_mmap_pages */
  500. if (opts->auxtrace_mmap_pages) {
  501. size_t sz = opts->auxtrace_mmap_pages * (size_t)page_size;
  502. size_t min_sz;
  503. if (opts->auxtrace_snapshot_mode)
  504. min_sz = KiB(4);
  505. else
  506. min_sz = KiB(8);
  507. if (sz < min_sz || !is_power_of_2(sz)) {
  508. pr_err("Invalid mmap size for Intel Processor Trace: must be at least %zuKiB and a power of 2\n",
  509. min_sz / 1024);
  510. return -EINVAL;
  511. }
  512. }
  513. intel_pt_parse_terms(&intel_pt_pmu->format, "tsc", &tsc_bit);
  514. if (opts->full_auxtrace && (intel_pt_evsel->attr.config & tsc_bit))
  515. have_timing_info = true;
  516. else
  517. have_timing_info = false;
  518. /*
  519. * Per-cpu recording needs sched_switch events to distinguish different
  520. * threads.
  521. */
  522. if (have_timing_info && !cpu_map__empty(cpus)) {
  523. if (perf_can_record_switch_events()) {
  524. bool cpu_wide = !target__none(&opts->target) &&
  525. !target__has_task(&opts->target);
  526. if (!cpu_wide && perf_can_record_cpu_wide()) {
  527. struct perf_evsel *switch_evsel;
  528. err = parse_events(evlist, "dummy:u", NULL);
  529. if (err)
  530. return err;
  531. switch_evsel = perf_evlist__last(evlist);
  532. switch_evsel->attr.freq = 0;
  533. switch_evsel->attr.sample_period = 1;
  534. switch_evsel->attr.context_switch = 1;
  535. switch_evsel->system_wide = true;
  536. switch_evsel->no_aux_samples = true;
  537. switch_evsel->immediate = true;
  538. perf_evsel__set_sample_bit(switch_evsel, TID);
  539. perf_evsel__set_sample_bit(switch_evsel, TIME);
  540. perf_evsel__set_sample_bit(switch_evsel, CPU);
  541. opts->record_switch_events = false;
  542. ptr->have_sched_switch = 3;
  543. } else {
  544. opts->record_switch_events = true;
  545. if (cpu_wide)
  546. ptr->have_sched_switch = 3;
  547. else
  548. ptr->have_sched_switch = 2;
  549. }
  550. } else {
  551. err = intel_pt_track_switches(evlist);
  552. if (err == -EPERM)
  553. pr_debug2("Unable to select sched:sched_switch\n");
  554. else if (err)
  555. return err;
  556. else
  557. ptr->have_sched_switch = 1;
  558. }
  559. }
  560. if (intel_pt_evsel) {
  561. /*
  562. * To obtain the auxtrace buffer file descriptor, the auxtrace
  563. * event must come first.
  564. */
  565. perf_evlist__to_front(evlist, intel_pt_evsel);
  566. /*
  567. * In the case of per-cpu mmaps, we need the CPU on the
  568. * AUX event.
  569. */
  570. if (!cpu_map__empty(cpus))
  571. perf_evsel__set_sample_bit(intel_pt_evsel, CPU);
  572. }
  573. /* Add dummy event to keep tracking */
  574. if (opts->full_auxtrace) {
  575. struct perf_evsel *tracking_evsel;
  576. err = parse_events(evlist, "dummy:u", NULL);
  577. if (err)
  578. return err;
  579. tracking_evsel = perf_evlist__last(evlist);
  580. perf_evlist__set_tracking_event(evlist, tracking_evsel);
  581. tracking_evsel->attr.freq = 0;
  582. tracking_evsel->attr.sample_period = 1;
  583. /* In per-cpu case, always need the time of mmap events etc */
  584. if (!cpu_map__empty(cpus)) {
  585. perf_evsel__set_sample_bit(tracking_evsel, TIME);
  586. /* And the CPU for switch events */
  587. perf_evsel__set_sample_bit(tracking_evsel, CPU);
  588. }
  589. }
  590. /*
  591. * Warn the user when we do not have enough information to decode i.e.
  592. * per-cpu with no sched_switch (except workload-only).
  593. */
  594. if (!ptr->have_sched_switch && !cpu_map__empty(cpus) &&
  595. !target__none(&opts->target))
  596. ui__warning("Intel Processor Trace decoding will not be possible except for kernel tracing!\n");
  597. return 0;
  598. }
  599. static int intel_pt_snapshot_start(struct auxtrace_record *itr)
  600. {
  601. struct intel_pt_recording *ptr =
  602. container_of(itr, struct intel_pt_recording, itr);
  603. struct perf_evsel *evsel;
  604. evlist__for_each(ptr->evlist, evsel) {
  605. if (evsel->attr.type == ptr->intel_pt_pmu->type)
  606. return perf_evsel__disable(evsel);
  607. }
  608. return -EINVAL;
  609. }
  610. static int intel_pt_snapshot_finish(struct auxtrace_record *itr)
  611. {
  612. struct intel_pt_recording *ptr =
  613. container_of(itr, struct intel_pt_recording, itr);
  614. struct perf_evsel *evsel;
  615. evlist__for_each(ptr->evlist, evsel) {
  616. if (evsel->attr.type == ptr->intel_pt_pmu->type)
  617. return perf_evsel__enable(evsel);
  618. }
  619. return -EINVAL;
  620. }
  621. static int intel_pt_alloc_snapshot_refs(struct intel_pt_recording *ptr, int idx)
  622. {
  623. const size_t sz = sizeof(struct intel_pt_snapshot_ref);
  624. int cnt = ptr->snapshot_ref_cnt, new_cnt = cnt * 2;
  625. struct intel_pt_snapshot_ref *refs;
  626. if (!new_cnt)
  627. new_cnt = 16;
  628. while (new_cnt <= idx)
  629. new_cnt *= 2;
  630. refs = calloc(new_cnt, sz);
  631. if (!refs)
  632. return -ENOMEM;
  633. memcpy(refs, ptr->snapshot_refs, cnt * sz);
  634. ptr->snapshot_refs = refs;
  635. ptr->snapshot_ref_cnt = new_cnt;
  636. return 0;
  637. }
  638. static void intel_pt_free_snapshot_refs(struct intel_pt_recording *ptr)
  639. {
  640. int i;
  641. for (i = 0; i < ptr->snapshot_ref_cnt; i++)
  642. zfree(&ptr->snapshot_refs[i].ref_buf);
  643. zfree(&ptr->snapshot_refs);
  644. }
  645. static void intel_pt_recording_free(struct auxtrace_record *itr)
  646. {
  647. struct intel_pt_recording *ptr =
  648. container_of(itr, struct intel_pt_recording, itr);
  649. intel_pt_free_snapshot_refs(ptr);
  650. free(ptr);
  651. }
  652. static int intel_pt_alloc_snapshot_ref(struct intel_pt_recording *ptr, int idx,
  653. size_t snapshot_buf_size)
  654. {
  655. size_t ref_buf_size = ptr->snapshot_ref_buf_size;
  656. void *ref_buf;
  657. ref_buf = zalloc(ref_buf_size);
  658. if (!ref_buf)
  659. return -ENOMEM;
  660. ptr->snapshot_refs[idx].ref_buf = ref_buf;
  661. ptr->snapshot_refs[idx].ref_offset = snapshot_buf_size - ref_buf_size;
  662. return 0;
  663. }
  664. static size_t intel_pt_snapshot_ref_buf_size(struct intel_pt_recording *ptr,
  665. size_t snapshot_buf_size)
  666. {
  667. const size_t max_size = 256 * 1024;
  668. size_t buf_size = 0, psb_period;
  669. if (ptr->snapshot_size <= 64 * 1024)
  670. return 0;
  671. psb_period = intel_pt_psb_period(ptr->intel_pt_pmu, ptr->evlist);
  672. if (psb_period)
  673. buf_size = psb_period * 2;
  674. if (!buf_size || buf_size > max_size)
  675. buf_size = max_size;
  676. if (buf_size >= snapshot_buf_size)
  677. return 0;
  678. if (buf_size >= ptr->snapshot_size / 2)
  679. return 0;
  680. return buf_size;
  681. }
  682. static int intel_pt_snapshot_init(struct intel_pt_recording *ptr,
  683. size_t snapshot_buf_size)
  684. {
  685. if (ptr->snapshot_init_done)
  686. return 0;
  687. ptr->snapshot_init_done = true;
  688. ptr->snapshot_ref_buf_size = intel_pt_snapshot_ref_buf_size(ptr,
  689. snapshot_buf_size);
  690. return 0;
  691. }
  692. /**
  693. * intel_pt_compare_buffers - compare bytes in a buffer to a circular buffer.
  694. * @buf1: first buffer
  695. * @compare_size: number of bytes to compare
  696. * @buf2: second buffer (a circular buffer)
  697. * @offs2: offset in second buffer
  698. * @buf2_size: size of second buffer
  699. *
  700. * The comparison allows for the possibility that the bytes to compare in the
  701. * circular buffer are not contiguous. It is assumed that @compare_size <=
  702. * @buf2_size. This function returns %false if the bytes are identical, %true
  703. * otherwise.
  704. */
  705. static bool intel_pt_compare_buffers(void *buf1, size_t compare_size,
  706. void *buf2, size_t offs2, size_t buf2_size)
  707. {
  708. size_t end2 = offs2 + compare_size, part_size;
  709. if (end2 <= buf2_size)
  710. return memcmp(buf1, buf2 + offs2, compare_size);
  711. part_size = end2 - buf2_size;
  712. if (memcmp(buf1, buf2 + offs2, part_size))
  713. return true;
  714. compare_size -= part_size;
  715. return memcmp(buf1 + part_size, buf2, compare_size);
  716. }
  717. static bool intel_pt_compare_ref(void *ref_buf, size_t ref_offset,
  718. size_t ref_size, size_t buf_size,
  719. void *data, size_t head)
  720. {
  721. size_t ref_end = ref_offset + ref_size;
  722. if (ref_end > buf_size) {
  723. if (head > ref_offset || head < ref_end - buf_size)
  724. return true;
  725. } else if (head > ref_offset && head < ref_end) {
  726. return true;
  727. }
  728. return intel_pt_compare_buffers(ref_buf, ref_size, data, ref_offset,
  729. buf_size);
  730. }
  731. static void intel_pt_copy_ref(void *ref_buf, size_t ref_size, size_t buf_size,
  732. void *data, size_t head)
  733. {
  734. if (head >= ref_size) {
  735. memcpy(ref_buf, data + head - ref_size, ref_size);
  736. } else {
  737. memcpy(ref_buf, data, head);
  738. ref_size -= head;
  739. memcpy(ref_buf + head, data + buf_size - ref_size, ref_size);
  740. }
  741. }
  742. static bool intel_pt_wrapped(struct intel_pt_recording *ptr, int idx,
  743. struct auxtrace_mmap *mm, unsigned char *data,
  744. u64 head)
  745. {
  746. struct intel_pt_snapshot_ref *ref = &ptr->snapshot_refs[idx];
  747. bool wrapped;
  748. wrapped = intel_pt_compare_ref(ref->ref_buf, ref->ref_offset,
  749. ptr->snapshot_ref_buf_size, mm->len,
  750. data, head);
  751. intel_pt_copy_ref(ref->ref_buf, ptr->snapshot_ref_buf_size, mm->len,
  752. data, head);
  753. return wrapped;
  754. }
  755. static bool intel_pt_first_wrap(u64 *data, size_t buf_size)
  756. {
  757. int i, a, b;
  758. b = buf_size >> 3;
  759. a = b - 512;
  760. if (a < 0)
  761. a = 0;
  762. for (i = a; i < b; i++) {
  763. if (data[i])
  764. return true;
  765. }
  766. return false;
  767. }
  768. static int intel_pt_find_snapshot(struct auxtrace_record *itr, int idx,
  769. struct auxtrace_mmap *mm, unsigned char *data,
  770. u64 *head, u64 *old)
  771. {
  772. struct intel_pt_recording *ptr =
  773. container_of(itr, struct intel_pt_recording, itr);
  774. bool wrapped;
  775. int err;
  776. pr_debug3("%s: mmap index %d old head %zu new head %zu\n",
  777. __func__, idx, (size_t)*old, (size_t)*head);
  778. err = intel_pt_snapshot_init(ptr, mm->len);
  779. if (err)
  780. goto out_err;
  781. if (idx >= ptr->snapshot_ref_cnt) {
  782. err = intel_pt_alloc_snapshot_refs(ptr, idx);
  783. if (err)
  784. goto out_err;
  785. }
  786. if (ptr->snapshot_ref_buf_size) {
  787. if (!ptr->snapshot_refs[idx].ref_buf) {
  788. err = intel_pt_alloc_snapshot_ref(ptr, idx, mm->len);
  789. if (err)
  790. goto out_err;
  791. }
  792. wrapped = intel_pt_wrapped(ptr, idx, mm, data, *head);
  793. } else {
  794. wrapped = ptr->snapshot_refs[idx].wrapped;
  795. if (!wrapped && intel_pt_first_wrap((u64 *)data, mm->len)) {
  796. ptr->snapshot_refs[idx].wrapped = true;
  797. wrapped = true;
  798. }
  799. }
  800. /*
  801. * In full trace mode 'head' continually increases. However in snapshot
  802. * mode 'head' is an offset within the buffer. Here 'old' and 'head'
  803. * are adjusted to match the full trace case which expects that 'old' is
  804. * always less than 'head'.
  805. */
  806. if (wrapped) {
  807. *old = *head;
  808. *head += mm->len;
  809. } else {
  810. if (mm->mask)
  811. *old &= mm->mask;
  812. else
  813. *old %= mm->len;
  814. if (*old > *head)
  815. *head += mm->len;
  816. }
  817. pr_debug3("%s: wrap-around %sdetected, adjusted old head %zu adjusted new head %zu\n",
  818. __func__, wrapped ? "" : "not ", (size_t)*old, (size_t)*head);
  819. return 0;
  820. out_err:
  821. pr_err("%s: failed, error %d\n", __func__, err);
  822. return err;
  823. }
  824. static u64 intel_pt_reference(struct auxtrace_record *itr __maybe_unused)
  825. {
  826. return rdtsc();
  827. }
  828. static int intel_pt_read_finish(struct auxtrace_record *itr, int idx)
  829. {
  830. struct intel_pt_recording *ptr =
  831. container_of(itr, struct intel_pt_recording, itr);
  832. struct perf_evsel *evsel;
  833. evlist__for_each(ptr->evlist, evsel) {
  834. if (evsel->attr.type == ptr->intel_pt_pmu->type)
  835. return perf_evlist__enable_event_idx(ptr->evlist, evsel,
  836. idx);
  837. }
  838. return -EINVAL;
  839. }
  840. struct auxtrace_record *intel_pt_recording_init(int *err)
  841. {
  842. struct perf_pmu *intel_pt_pmu = perf_pmu__find(INTEL_PT_PMU_NAME);
  843. struct intel_pt_recording *ptr;
  844. if (!intel_pt_pmu)
  845. return NULL;
  846. ptr = zalloc(sizeof(struct intel_pt_recording));
  847. if (!ptr) {
  848. *err = -ENOMEM;
  849. return NULL;
  850. }
  851. ptr->intel_pt_pmu = intel_pt_pmu;
  852. ptr->itr.recording_options = intel_pt_recording_options;
  853. ptr->itr.info_priv_size = intel_pt_info_priv_size;
  854. ptr->itr.info_fill = intel_pt_info_fill;
  855. ptr->itr.free = intel_pt_recording_free;
  856. ptr->itr.snapshot_start = intel_pt_snapshot_start;
  857. ptr->itr.snapshot_finish = intel_pt_snapshot_finish;
  858. ptr->itr.find_snapshot = intel_pt_find_snapshot;
  859. ptr->itr.parse_snapshot_options = intel_pt_parse_snapshot_options;
  860. ptr->itr.reference = intel_pt_reference;
  861. ptr->itr.read_finish = intel_pt_read_finish;
  862. return &ptr->itr;
  863. }