hugetlbpage-book3e.c 4.1 KB

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  1. /*
  2. * PPC Huge TLB Page Support for Book3E MMU
  3. *
  4. * Copyright (C) 2009 David Gibson, IBM Corporation.
  5. * Copyright (C) 2011 Becky Bruce, Freescale Semiconductor
  6. *
  7. */
  8. #include <linux/mm.h>
  9. #include <linux/hugetlb.h>
  10. #ifdef CONFIG_PPC_FSL_BOOK3E
  11. #ifdef CONFIG_PPC64
  12. static inline int tlb1_next(void)
  13. {
  14. struct paca_struct *paca = get_paca();
  15. struct tlb_core_data *tcd;
  16. int this, next;
  17. tcd = paca->tcd_ptr;
  18. this = tcd->esel_next;
  19. next = this + 1;
  20. if (next >= tcd->esel_max)
  21. next = tcd->esel_first;
  22. tcd->esel_next = next;
  23. return this;
  24. }
  25. #else
  26. static inline int tlb1_next(void)
  27. {
  28. int index, ncams;
  29. ncams = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY;
  30. index = this_cpu_read(next_tlbcam_idx);
  31. /* Just round-robin the entries and wrap when we hit the end */
  32. if (unlikely(index == ncams - 1))
  33. __this_cpu_write(next_tlbcam_idx, tlbcam_index);
  34. else
  35. __this_cpu_inc(next_tlbcam_idx);
  36. return index;
  37. }
  38. #endif /* !PPC64 */
  39. #endif /* FSL */
  40. static inline int mmu_get_tsize(int psize)
  41. {
  42. return mmu_psize_defs[psize].enc;
  43. }
  44. #if defined(CONFIG_PPC_FSL_BOOK3E) && defined(CONFIG_PPC64)
  45. #include <asm/paca.h>
  46. static inline void book3e_tlb_lock(void)
  47. {
  48. struct paca_struct *paca = get_paca();
  49. unsigned long tmp;
  50. int token = smp_processor_id() + 1;
  51. asm volatile("1: lbarx %0, 0, %1;"
  52. "cmpwi %0, 0;"
  53. "bne 2f;"
  54. "stbcx. %2, 0, %1;"
  55. "bne 1b;"
  56. "b 3f;"
  57. "2: lbzx %0, 0, %1;"
  58. "cmpwi %0, 0;"
  59. "bne 2b;"
  60. "b 1b;"
  61. "3:"
  62. : "=&r" (tmp)
  63. : "r" (&paca->tcd_ptr->lock), "r" (token)
  64. : "memory");
  65. }
  66. static inline void book3e_tlb_unlock(void)
  67. {
  68. struct paca_struct *paca = get_paca();
  69. isync();
  70. paca->tcd_ptr->lock = 0;
  71. }
  72. #else
  73. static inline void book3e_tlb_lock(void)
  74. {
  75. }
  76. static inline void book3e_tlb_unlock(void)
  77. {
  78. }
  79. #endif
  80. static inline int book3e_tlb_exists(unsigned long ea, unsigned long pid)
  81. {
  82. int found = 0;
  83. mtspr(SPRN_MAS6, pid << 16);
  84. if (mmu_has_feature(MMU_FTR_USE_TLBRSRV)) {
  85. asm volatile(
  86. "li %0,0\n"
  87. "tlbsx. 0,%1\n"
  88. "bne 1f\n"
  89. "li %0,1\n"
  90. "1:\n"
  91. : "=&r"(found) : "r"(ea));
  92. } else {
  93. asm volatile(
  94. "tlbsx 0,%1\n"
  95. "mfspr %0,0x271\n"
  96. "srwi %0,%0,31\n"
  97. : "=&r"(found) : "r"(ea));
  98. }
  99. return found;
  100. }
  101. void book3e_hugetlb_preload(struct vm_area_struct *vma, unsigned long ea,
  102. pte_t pte)
  103. {
  104. unsigned long mas1, mas2;
  105. u64 mas7_3;
  106. unsigned long psize, tsize, shift;
  107. unsigned long flags;
  108. struct mm_struct *mm;
  109. #ifdef CONFIG_PPC_FSL_BOOK3E
  110. int index;
  111. #endif
  112. if (unlikely(is_kernel_addr(ea)))
  113. return;
  114. mm = vma->vm_mm;
  115. #ifdef CONFIG_PPC_MM_SLICES
  116. psize = get_slice_psize(mm, ea);
  117. tsize = mmu_get_tsize(psize);
  118. shift = mmu_psize_defs[psize].shift;
  119. #else
  120. psize = vma_mmu_pagesize(vma);
  121. shift = __ilog2(psize);
  122. tsize = shift - 10;
  123. #endif
  124. /*
  125. * We can't be interrupted while we're setting up the MAS
  126. * regusters or after we've confirmed that no tlb exists.
  127. */
  128. local_irq_save(flags);
  129. book3e_tlb_lock();
  130. if (unlikely(book3e_tlb_exists(ea, mm->context.id))) {
  131. book3e_tlb_unlock();
  132. local_irq_restore(flags);
  133. return;
  134. }
  135. #ifdef CONFIG_PPC_FSL_BOOK3E
  136. /* We have to use the CAM(TLB1) on FSL parts for hugepages */
  137. index = tlb1_next();
  138. mtspr(SPRN_MAS0, MAS0_ESEL(index) | MAS0_TLBSEL(1));
  139. #endif
  140. mas1 = MAS1_VALID | MAS1_TID(mm->context.id) | MAS1_TSIZE(tsize);
  141. mas2 = ea & ~((1UL << shift) - 1);
  142. mas2 |= (pte_val(pte) >> PTE_WIMGE_SHIFT) & MAS2_WIMGE_MASK;
  143. mas7_3 = (u64)pte_pfn(pte) << PAGE_SHIFT;
  144. mas7_3 |= (pte_val(pte) >> PTE_BAP_SHIFT) & MAS3_BAP_MASK;
  145. if (!pte_dirty(pte))
  146. mas7_3 &= ~(MAS3_SW|MAS3_UW);
  147. mtspr(SPRN_MAS1, mas1);
  148. mtspr(SPRN_MAS2, mas2);
  149. if (mmu_has_feature(MMU_FTR_USE_PAIRED_MAS)) {
  150. mtspr(SPRN_MAS7_MAS3, mas7_3);
  151. } else {
  152. if (mmu_has_feature(MMU_FTR_BIG_PHYS))
  153. mtspr(SPRN_MAS7, upper_32_bits(mas7_3));
  154. mtspr(SPRN_MAS3, lower_32_bits(mas7_3));
  155. }
  156. asm volatile ("tlbwe");
  157. book3e_tlb_unlock();
  158. local_irq_restore(flags);
  159. }
  160. void flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
  161. {
  162. struct hstate *hstate = hstate_file(vma->vm_file);
  163. unsigned long tsize = huge_page_shift(hstate) - 10;
  164. __flush_tlb_page(vma->vm_mm, vmaddr, tsize, 0);
  165. }