opal-irqchip.c 6.6 KB

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  1. /*
  2. * This file implements an irqchip for OPAL events. Whenever there is
  3. * an interrupt that is handled by OPAL we get passed a list of events
  4. * that Linux needs to do something about. These basically look like
  5. * interrupts to Linux so we implement an irqchip to handle them.
  6. *
  7. * Copyright Alistair Popple, IBM Corporation 2014.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/bitops.h>
  15. #include <linux/irq.h>
  16. #include <linux/irqchip.h>
  17. #include <linux/irqdomain.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/module.h>
  20. #include <linux/of.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/kthread.h>
  23. #include <linux/delay.h>
  24. #include <linux/slab.h>
  25. #include <linux/irq_work.h>
  26. #include <asm/machdep.h>
  27. #include <asm/opal.h>
  28. #include "powernv.h"
  29. /* Maximum number of events supported by OPAL firmware */
  30. #define MAX_NUM_EVENTS 64
  31. struct opal_event_irqchip {
  32. struct irq_chip irqchip;
  33. struct irq_domain *domain;
  34. unsigned long mask;
  35. };
  36. static struct opal_event_irqchip opal_event_irqchip;
  37. static unsigned int opal_irq_count;
  38. static unsigned int *opal_irqs;
  39. static void opal_handle_irq_work(struct irq_work *work);
  40. static __be64 last_outstanding_events;
  41. static struct irq_work opal_event_irq_work = {
  42. .func = opal_handle_irq_work,
  43. };
  44. static void opal_event_mask(struct irq_data *d)
  45. {
  46. clear_bit(d->hwirq, &opal_event_irqchip.mask);
  47. }
  48. static void opal_event_unmask(struct irq_data *d)
  49. {
  50. set_bit(d->hwirq, &opal_event_irqchip.mask);
  51. opal_poll_events(&last_outstanding_events);
  52. if (last_outstanding_events & opal_event_irqchip.mask)
  53. /* Need to retrigger the interrupt */
  54. irq_work_queue(&opal_event_irq_work);
  55. }
  56. static int opal_event_set_type(struct irq_data *d, unsigned int flow_type)
  57. {
  58. /*
  59. * For now we only support level triggered events. The irq
  60. * handler will be called continuously until the event has
  61. * been cleared in OPAL.
  62. */
  63. if (flow_type != IRQ_TYPE_LEVEL_HIGH)
  64. return -EINVAL;
  65. return 0;
  66. }
  67. static struct opal_event_irqchip opal_event_irqchip = {
  68. .irqchip = {
  69. .name = "OPAL EVT",
  70. .irq_mask = opal_event_mask,
  71. .irq_unmask = opal_event_unmask,
  72. .irq_set_type = opal_event_set_type,
  73. },
  74. .mask = 0,
  75. };
  76. static int opal_event_map(struct irq_domain *d, unsigned int irq,
  77. irq_hw_number_t hwirq)
  78. {
  79. irq_set_chip_data(irq, &opal_event_irqchip);
  80. irq_set_chip_and_handler(irq, &opal_event_irqchip.irqchip,
  81. handle_level_irq);
  82. return 0;
  83. }
  84. void opal_handle_events(uint64_t events)
  85. {
  86. int virq, hwirq = 0;
  87. u64 mask = opal_event_irqchip.mask;
  88. if (!in_irq() && (events & mask)) {
  89. last_outstanding_events = events;
  90. irq_work_queue(&opal_event_irq_work);
  91. return;
  92. }
  93. while (events & mask) {
  94. hwirq = fls64(events) - 1;
  95. if (BIT_ULL(hwirq) & mask) {
  96. virq = irq_find_mapping(opal_event_irqchip.domain,
  97. hwirq);
  98. if (virq)
  99. generic_handle_irq(virq);
  100. }
  101. events &= ~BIT_ULL(hwirq);
  102. }
  103. }
  104. static irqreturn_t opal_interrupt(int irq, void *data)
  105. {
  106. __be64 events;
  107. opal_handle_interrupt(virq_to_hw(irq), &events);
  108. opal_handle_events(be64_to_cpu(events));
  109. return IRQ_HANDLED;
  110. }
  111. static void opal_handle_irq_work(struct irq_work *work)
  112. {
  113. opal_handle_events(be64_to_cpu(last_outstanding_events));
  114. }
  115. static int opal_event_match(struct irq_domain *h, struct device_node *node,
  116. enum irq_domain_bus_token bus_token)
  117. {
  118. return h->of_node == node;
  119. }
  120. static int opal_event_xlate(struct irq_domain *h, struct device_node *np,
  121. const u32 *intspec, unsigned int intsize,
  122. irq_hw_number_t *out_hwirq, unsigned int *out_flags)
  123. {
  124. *out_hwirq = intspec[0];
  125. *out_flags = IRQ_TYPE_LEVEL_HIGH;
  126. return 0;
  127. }
  128. static const struct irq_domain_ops opal_event_domain_ops = {
  129. .match = opal_event_match,
  130. .map = opal_event_map,
  131. .xlate = opal_event_xlate,
  132. };
  133. void opal_event_shutdown(void)
  134. {
  135. unsigned int i;
  136. /* First free interrupts, which will also mask them */
  137. for (i = 0; i < opal_irq_count; i++) {
  138. if (opal_irqs[i])
  139. free_irq(opal_irqs[i], NULL);
  140. opal_irqs[i] = 0;
  141. }
  142. }
  143. int __init opal_event_init(void)
  144. {
  145. struct device_node *dn, *opal_node;
  146. const __be32 *irqs;
  147. int i, irqlen, rc = 0;
  148. opal_node = of_find_node_by_path("/ibm,opal");
  149. if (!opal_node) {
  150. pr_warn("opal: Node not found\n");
  151. return -ENODEV;
  152. }
  153. /* If dn is NULL it means the domain won't be linked to a DT
  154. * node so therefore irq_of_parse_and_map(...) wont work. But
  155. * that shouldn't be problem because if we're running a
  156. * version of skiboot that doesn't have the dn then the
  157. * devices won't have the correct properties and will have to
  158. * fall back to the legacy method (opal_event_request(...))
  159. * anyway. */
  160. dn = of_find_compatible_node(NULL, NULL, "ibm,opal-event");
  161. opal_event_irqchip.domain = irq_domain_add_linear(dn, MAX_NUM_EVENTS,
  162. &opal_event_domain_ops, &opal_event_irqchip);
  163. of_node_put(dn);
  164. if (!opal_event_irqchip.domain) {
  165. pr_warn("opal: Unable to create irq domain\n");
  166. rc = -ENOMEM;
  167. goto out;
  168. }
  169. /* Get interrupt property */
  170. irqs = of_get_property(opal_node, "opal-interrupts", &irqlen);
  171. opal_irq_count = irqs ? (irqlen / 4) : 0;
  172. pr_debug("Found %d interrupts reserved for OPAL\n", opal_irq_count);
  173. /* Install interrupt handlers */
  174. opal_irqs = kcalloc(opal_irq_count, sizeof(*opal_irqs), GFP_KERNEL);
  175. for (i = 0; irqs && i < opal_irq_count; i++, irqs++) {
  176. unsigned int irq, virq;
  177. /* Get hardware and virtual IRQ */
  178. irq = be32_to_cpup(irqs);
  179. virq = irq_create_mapping(NULL, irq);
  180. if (virq == NO_IRQ) {
  181. pr_warn("Failed to map irq 0x%x\n", irq);
  182. continue;
  183. }
  184. /* Install interrupt handler */
  185. rc = request_irq(virq, opal_interrupt, 0, "opal", NULL);
  186. if (rc) {
  187. irq_dispose_mapping(virq);
  188. pr_warn("Error %d requesting irq %d (0x%x)\n",
  189. rc, virq, irq);
  190. continue;
  191. }
  192. /* Cache IRQ */
  193. opal_irqs[i] = virq;
  194. }
  195. out:
  196. of_node_put(opal_node);
  197. return rc;
  198. }
  199. machine_arch_initcall(powernv, opal_event_init);
  200. /**
  201. * opal_event_request(unsigned int opal_event_nr) - Request an event
  202. * @opal_event_nr: the opal event number to request
  203. *
  204. * This routine can be used to find the linux virq number which can
  205. * then be passed to request_irq to assign a handler for a particular
  206. * opal event. This should only be used by legacy devices which don't
  207. * have proper device tree bindings. Most devices should use
  208. * irq_of_parse_and_map() instead.
  209. */
  210. int opal_event_request(unsigned int opal_event_nr)
  211. {
  212. if (WARN_ON_ONCE(!opal_event_irqchip.domain))
  213. return NO_IRQ;
  214. return irq_create_mapping(opal_event_irqchip.domain, opal_event_nr);
  215. }
  216. EXPORT_SYMBOL(opal_event_request);