mbochs.c 33 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Mediated virtual PCI display host device driver
  4. *
  5. * Emulate enough of qemu stdvga to make bochs-drm.ko happy. That is
  6. * basically the vram memory bar and the bochs dispi interface vbe
  7. * registers in the mmio register bar. Specifically it does *not*
  8. * include any legacy vga stuff. Device looks a lot like "qemu -device
  9. * secondary-vga".
  10. *
  11. * (c) Gerd Hoffmann <kraxel@redhat.com>
  12. *
  13. * based on mtty driver which is:
  14. * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
  15. * Author: Neo Jia <cjia@nvidia.com>
  16. * Kirti Wankhede <kwankhede@nvidia.com>
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License version 2 as
  20. * published by the Free Software Foundation.
  21. */
  22. #include <linux/init.h>
  23. #include <linux/module.h>
  24. #include <linux/device.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/vmalloc.h>
  28. #include <linux/cdev.h>
  29. #include <linux/vfio.h>
  30. #include <linux/iommu.h>
  31. #include <linux/sysfs.h>
  32. #include <linux/mdev.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-buf.h>
  35. #include <linux/highmem.h>
  36. #include <drm/drm_fourcc.h>
  37. #include <drm/drm_rect.h>
  38. #include <drm/drm_modeset_lock.h>
  39. #include <drm/drm_property.h>
  40. #include <drm/drm_plane.h>
  41. #define VBE_DISPI_INDEX_ID 0x0
  42. #define VBE_DISPI_INDEX_XRES 0x1
  43. #define VBE_DISPI_INDEX_YRES 0x2
  44. #define VBE_DISPI_INDEX_BPP 0x3
  45. #define VBE_DISPI_INDEX_ENABLE 0x4
  46. #define VBE_DISPI_INDEX_BANK 0x5
  47. #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
  48. #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
  49. #define VBE_DISPI_INDEX_X_OFFSET 0x8
  50. #define VBE_DISPI_INDEX_Y_OFFSET 0x9
  51. #define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa
  52. #define VBE_DISPI_INDEX_COUNT 0xb
  53. #define VBE_DISPI_ID0 0xB0C0
  54. #define VBE_DISPI_ID1 0xB0C1
  55. #define VBE_DISPI_ID2 0xB0C2
  56. #define VBE_DISPI_ID3 0xB0C3
  57. #define VBE_DISPI_ID4 0xB0C4
  58. #define VBE_DISPI_ID5 0xB0C5
  59. #define VBE_DISPI_DISABLED 0x00
  60. #define VBE_DISPI_ENABLED 0x01
  61. #define VBE_DISPI_GETCAPS 0x02
  62. #define VBE_DISPI_8BIT_DAC 0x20
  63. #define VBE_DISPI_LFB_ENABLED 0x40
  64. #define VBE_DISPI_NOCLEARMEM 0x80
  65. #define MBOCHS_NAME "mbochs"
  66. #define MBOCHS_CLASS_NAME "mbochs"
  67. #define MBOCHS_CONFIG_SPACE_SIZE 0xff
  68. #define MBOCHS_MMIO_BAR_OFFSET PAGE_SIZE
  69. #define MBOCHS_MMIO_BAR_SIZE PAGE_SIZE
  70. #define MBOCHS_MEMORY_BAR_OFFSET (MBOCHS_MMIO_BAR_OFFSET + \
  71. MBOCHS_MMIO_BAR_SIZE)
  72. #define STORE_LE16(addr, val) (*(u16 *)addr = val)
  73. #define STORE_LE32(addr, val) (*(u32 *)addr = val)
  74. MODULE_LICENSE("GPL v2");
  75. static int max_mbytes = 256;
  76. module_param_named(count, max_mbytes, int, 0444);
  77. MODULE_PARM_DESC(mem, "megabytes available to " MBOCHS_NAME " devices");
  78. #define MBOCHS_TYPE_1 "small"
  79. #define MBOCHS_TYPE_2 "medium"
  80. #define MBOCHS_TYPE_3 "large"
  81. static const struct mbochs_type {
  82. const char *name;
  83. u32 mbytes;
  84. } mbochs_types[] = {
  85. {
  86. .name = MBOCHS_CLASS_NAME "-" MBOCHS_TYPE_1,
  87. .mbytes = 4,
  88. }, {
  89. .name = MBOCHS_CLASS_NAME "-" MBOCHS_TYPE_2,
  90. .mbytes = 16,
  91. }, {
  92. .name = MBOCHS_CLASS_NAME "-" MBOCHS_TYPE_3,
  93. .mbytes = 64,
  94. },
  95. };
  96. static dev_t mbochs_devt;
  97. static struct class *mbochs_class;
  98. static struct cdev mbochs_cdev;
  99. static struct device mbochs_dev;
  100. static int mbochs_used_mbytes;
  101. struct mbochs_mode {
  102. u32 drm_format;
  103. u32 bytepp;
  104. u32 width;
  105. u32 height;
  106. u32 stride;
  107. u32 __pad;
  108. u64 offset;
  109. u64 size;
  110. };
  111. struct mbochs_dmabuf {
  112. struct mbochs_mode mode;
  113. u32 id;
  114. struct page **pages;
  115. pgoff_t pagecount;
  116. struct dma_buf *buf;
  117. struct mdev_state *mdev_state;
  118. struct list_head next;
  119. bool unlinked;
  120. };
  121. /* State of each mdev device */
  122. struct mdev_state {
  123. u8 *vconfig;
  124. u64 bar_mask[3];
  125. u32 memory_bar_mask;
  126. struct mutex ops_lock;
  127. struct mdev_device *mdev;
  128. struct vfio_device_info dev_info;
  129. const struct mbochs_type *type;
  130. u16 vbe[VBE_DISPI_INDEX_COUNT];
  131. u64 memsize;
  132. struct page **pages;
  133. pgoff_t pagecount;
  134. struct list_head dmabufs;
  135. u32 active_id;
  136. u32 next_id;
  137. };
  138. static const char *vbe_name_list[VBE_DISPI_INDEX_COUNT] = {
  139. [VBE_DISPI_INDEX_ID] = "id",
  140. [VBE_DISPI_INDEX_XRES] = "xres",
  141. [VBE_DISPI_INDEX_YRES] = "yres",
  142. [VBE_DISPI_INDEX_BPP] = "bpp",
  143. [VBE_DISPI_INDEX_ENABLE] = "enable",
  144. [VBE_DISPI_INDEX_BANK] = "bank",
  145. [VBE_DISPI_INDEX_VIRT_WIDTH] = "virt-width",
  146. [VBE_DISPI_INDEX_VIRT_HEIGHT] = "virt-height",
  147. [VBE_DISPI_INDEX_X_OFFSET] = "x-offset",
  148. [VBE_DISPI_INDEX_Y_OFFSET] = "y-offset",
  149. [VBE_DISPI_INDEX_VIDEO_MEMORY_64K] = "video-mem",
  150. };
  151. static const char *vbe_name(u32 index)
  152. {
  153. if (index < ARRAY_SIZE(vbe_name_list))
  154. return vbe_name_list[index];
  155. return "(invalid)";
  156. }
  157. static struct page *mbochs_get_page(struct mdev_state *mdev_state,
  158. pgoff_t pgoff);
  159. static const struct mbochs_type *mbochs_find_type(struct kobject *kobj)
  160. {
  161. int i;
  162. for (i = 0; i < ARRAY_SIZE(mbochs_types); i++)
  163. if (strcmp(mbochs_types[i].name, kobj->name) == 0)
  164. return mbochs_types + i;
  165. return NULL;
  166. }
  167. static void mbochs_create_config_space(struct mdev_state *mdev_state)
  168. {
  169. STORE_LE16((u16 *) &mdev_state->vconfig[PCI_VENDOR_ID],
  170. 0x1234);
  171. STORE_LE16((u16 *) &mdev_state->vconfig[PCI_DEVICE_ID],
  172. 0x1111);
  173. STORE_LE16((u16 *) &mdev_state->vconfig[PCI_SUBSYSTEM_VENDOR_ID],
  174. PCI_SUBVENDOR_ID_REDHAT_QUMRANET);
  175. STORE_LE16((u16 *) &mdev_state->vconfig[PCI_SUBSYSTEM_ID],
  176. PCI_SUBDEVICE_ID_QEMU);
  177. STORE_LE16((u16 *) &mdev_state->vconfig[PCI_COMMAND],
  178. PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
  179. STORE_LE16((u16 *) &mdev_state->vconfig[PCI_CLASS_DEVICE],
  180. PCI_CLASS_DISPLAY_OTHER);
  181. mdev_state->vconfig[PCI_CLASS_REVISION] = 0x01;
  182. STORE_LE32((u32 *) &mdev_state->vconfig[PCI_BASE_ADDRESS_0],
  183. PCI_BASE_ADDRESS_SPACE_MEMORY |
  184. PCI_BASE_ADDRESS_MEM_TYPE_32 |
  185. PCI_BASE_ADDRESS_MEM_PREFETCH);
  186. mdev_state->bar_mask[0] = ~(mdev_state->memsize) + 1;
  187. STORE_LE32((u32 *) &mdev_state->vconfig[PCI_BASE_ADDRESS_2],
  188. PCI_BASE_ADDRESS_SPACE_MEMORY |
  189. PCI_BASE_ADDRESS_MEM_TYPE_32);
  190. mdev_state->bar_mask[2] = ~(MBOCHS_MMIO_BAR_SIZE) + 1;
  191. }
  192. static int mbochs_check_framebuffer(struct mdev_state *mdev_state,
  193. struct mbochs_mode *mode)
  194. {
  195. struct device *dev = mdev_dev(mdev_state->mdev);
  196. u16 *vbe = mdev_state->vbe;
  197. u32 virt_width;
  198. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  199. if (!(vbe[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED))
  200. goto nofb;
  201. memset(mode, 0, sizeof(*mode));
  202. switch (vbe[VBE_DISPI_INDEX_BPP]) {
  203. case 32:
  204. mode->drm_format = DRM_FORMAT_XRGB8888;
  205. mode->bytepp = 4;
  206. break;
  207. default:
  208. dev_info_ratelimited(dev, "%s: bpp %d not supported\n",
  209. __func__, vbe[VBE_DISPI_INDEX_BPP]);
  210. goto nofb;
  211. }
  212. mode->width = vbe[VBE_DISPI_INDEX_XRES];
  213. mode->height = vbe[VBE_DISPI_INDEX_YRES];
  214. virt_width = vbe[VBE_DISPI_INDEX_VIRT_WIDTH];
  215. if (virt_width < mode->width)
  216. virt_width = mode->width;
  217. mode->stride = virt_width * mode->bytepp;
  218. mode->size = (u64)mode->stride * mode->height;
  219. mode->offset = ((u64)vbe[VBE_DISPI_INDEX_X_OFFSET] * mode->bytepp +
  220. (u64)vbe[VBE_DISPI_INDEX_Y_OFFSET] * mode->stride);
  221. if (mode->width < 64 || mode->height < 64) {
  222. dev_info_ratelimited(dev, "%s: invalid resolution %dx%d\n",
  223. __func__, mode->width, mode->height);
  224. goto nofb;
  225. }
  226. if (mode->offset + mode->size > mdev_state->memsize) {
  227. dev_info_ratelimited(dev, "%s: framebuffer memory overflow\n",
  228. __func__);
  229. goto nofb;
  230. }
  231. return 0;
  232. nofb:
  233. memset(mode, 0, sizeof(*mode));
  234. return -EINVAL;
  235. }
  236. static bool mbochs_modes_equal(struct mbochs_mode *mode1,
  237. struct mbochs_mode *mode2)
  238. {
  239. return memcmp(mode1, mode2, sizeof(struct mbochs_mode)) == 0;
  240. }
  241. static void handle_pci_cfg_write(struct mdev_state *mdev_state, u16 offset,
  242. char *buf, u32 count)
  243. {
  244. struct device *dev = mdev_dev(mdev_state->mdev);
  245. int index = (offset - PCI_BASE_ADDRESS_0) / 0x04;
  246. u32 cfg_addr;
  247. switch (offset) {
  248. case PCI_BASE_ADDRESS_0:
  249. case PCI_BASE_ADDRESS_2:
  250. cfg_addr = *(u32 *)buf;
  251. if (cfg_addr == 0xffffffff) {
  252. cfg_addr = (cfg_addr & mdev_state->bar_mask[index]);
  253. } else {
  254. cfg_addr &= PCI_BASE_ADDRESS_MEM_MASK;
  255. if (cfg_addr)
  256. dev_info(dev, "BAR #%d @ 0x%x\n",
  257. index, cfg_addr);
  258. }
  259. cfg_addr |= (mdev_state->vconfig[offset] &
  260. ~PCI_BASE_ADDRESS_MEM_MASK);
  261. STORE_LE32(&mdev_state->vconfig[offset], cfg_addr);
  262. break;
  263. }
  264. }
  265. static void handle_mmio_write(struct mdev_state *mdev_state, u16 offset,
  266. char *buf, u32 count)
  267. {
  268. struct device *dev = mdev_dev(mdev_state->mdev);
  269. int index;
  270. u16 reg16;
  271. switch (offset) {
  272. case 0x400 ... 0x41f: /* vga ioports remapped */
  273. goto unhandled;
  274. case 0x500 ... 0x515: /* bochs dispi interface */
  275. if (count != 2)
  276. goto unhandled;
  277. index = (offset - 0x500) / 2;
  278. reg16 = *(u16 *)buf;
  279. if (index < ARRAY_SIZE(mdev_state->vbe))
  280. mdev_state->vbe[index] = reg16;
  281. dev_dbg(dev, "%s: vbe write %d = %d (%s)\n",
  282. __func__, index, reg16, vbe_name(index));
  283. break;
  284. case 0x600 ... 0x607: /* qemu extended regs */
  285. goto unhandled;
  286. default:
  287. unhandled:
  288. dev_dbg(dev, "%s: @0x%03x, count %d (unhandled)\n",
  289. __func__, offset, count);
  290. break;
  291. }
  292. }
  293. static void handle_mmio_read(struct mdev_state *mdev_state, u16 offset,
  294. char *buf, u32 count)
  295. {
  296. struct device *dev = mdev_dev(mdev_state->mdev);
  297. u16 reg16 = 0;
  298. int index;
  299. switch (offset) {
  300. case 0x500 ... 0x515: /* bochs dispi interface */
  301. if (count != 2)
  302. goto unhandled;
  303. index = (offset - 0x500) / 2;
  304. if (index < ARRAY_SIZE(mdev_state->vbe))
  305. reg16 = mdev_state->vbe[index];
  306. dev_dbg(dev, "%s: vbe read %d = %d (%s)\n",
  307. __func__, index, reg16, vbe_name(index));
  308. *(u16 *)buf = reg16;
  309. break;
  310. default:
  311. unhandled:
  312. dev_dbg(dev, "%s: @0x%03x, count %d (unhandled)\n",
  313. __func__, offset, count);
  314. memset(buf, 0, count);
  315. break;
  316. }
  317. }
  318. static ssize_t mdev_access(struct mdev_device *mdev, char *buf, size_t count,
  319. loff_t pos, bool is_write)
  320. {
  321. struct mdev_state *mdev_state = mdev_get_drvdata(mdev);
  322. struct device *dev = mdev_dev(mdev);
  323. struct page *pg;
  324. loff_t poff;
  325. char *map;
  326. int ret = 0;
  327. mutex_lock(&mdev_state->ops_lock);
  328. if (pos < MBOCHS_CONFIG_SPACE_SIZE) {
  329. if (is_write)
  330. handle_pci_cfg_write(mdev_state, pos, buf, count);
  331. else
  332. memcpy(buf, (mdev_state->vconfig + pos), count);
  333. } else if (pos >= MBOCHS_MMIO_BAR_OFFSET &&
  334. pos + count <= MBOCHS_MEMORY_BAR_OFFSET) {
  335. pos -= MBOCHS_MMIO_BAR_OFFSET;
  336. if (is_write)
  337. handle_mmio_write(mdev_state, pos, buf, count);
  338. else
  339. handle_mmio_read(mdev_state, pos, buf, count);
  340. } else if (pos >= MBOCHS_MEMORY_BAR_OFFSET &&
  341. pos + count <=
  342. MBOCHS_MEMORY_BAR_OFFSET + mdev_state->memsize) {
  343. pos -= MBOCHS_MMIO_BAR_OFFSET;
  344. poff = pos & ~PAGE_MASK;
  345. pg = mbochs_get_page(mdev_state, pos >> PAGE_SHIFT);
  346. map = kmap(pg);
  347. if (is_write)
  348. memcpy(map + poff, buf, count);
  349. else
  350. memcpy(buf, map + poff, count);
  351. kunmap(pg);
  352. put_page(pg);
  353. } else {
  354. dev_dbg(dev, "%s: %s @0x%llx (unhandled)\n",
  355. __func__, is_write ? "WR" : "RD", pos);
  356. ret = -1;
  357. goto accessfailed;
  358. }
  359. ret = count;
  360. accessfailed:
  361. mutex_unlock(&mdev_state->ops_lock);
  362. return ret;
  363. }
  364. static int mbochs_reset(struct mdev_device *mdev)
  365. {
  366. struct mdev_state *mdev_state = mdev_get_drvdata(mdev);
  367. u32 size64k = mdev_state->memsize / (64 * 1024);
  368. int i;
  369. for (i = 0; i < ARRAY_SIZE(mdev_state->vbe); i++)
  370. mdev_state->vbe[i] = 0;
  371. mdev_state->vbe[VBE_DISPI_INDEX_ID] = VBE_DISPI_ID5;
  372. mdev_state->vbe[VBE_DISPI_INDEX_VIDEO_MEMORY_64K] = size64k;
  373. return 0;
  374. }
  375. static int mbochs_create(struct kobject *kobj, struct mdev_device *mdev)
  376. {
  377. const struct mbochs_type *type = mbochs_find_type(kobj);
  378. struct device *dev = mdev_dev(mdev);
  379. struct mdev_state *mdev_state;
  380. if (!type)
  381. type = &mbochs_types[0];
  382. if (type->mbytes + mbochs_used_mbytes > max_mbytes)
  383. return -ENOMEM;
  384. mdev_state = kzalloc(sizeof(struct mdev_state), GFP_KERNEL);
  385. if (mdev_state == NULL)
  386. return -ENOMEM;
  387. mdev_state->vconfig = kzalloc(MBOCHS_CONFIG_SPACE_SIZE, GFP_KERNEL);
  388. if (mdev_state->vconfig == NULL)
  389. goto err_mem;
  390. mdev_state->memsize = type->mbytes * 1024 * 1024;
  391. mdev_state->pagecount = mdev_state->memsize >> PAGE_SHIFT;
  392. mdev_state->pages = kcalloc(mdev_state->pagecount,
  393. sizeof(struct page *),
  394. GFP_KERNEL);
  395. if (!mdev_state->pages)
  396. goto err_mem;
  397. dev_info(dev, "%s: %s, %d MB, %ld pages\n", __func__,
  398. kobj->name, type->mbytes, mdev_state->pagecount);
  399. mutex_init(&mdev_state->ops_lock);
  400. mdev_state->mdev = mdev;
  401. mdev_set_drvdata(mdev, mdev_state);
  402. INIT_LIST_HEAD(&mdev_state->dmabufs);
  403. mdev_state->next_id = 1;
  404. mdev_state->type = type;
  405. mbochs_create_config_space(mdev_state);
  406. mbochs_reset(mdev);
  407. mbochs_used_mbytes += type->mbytes;
  408. return 0;
  409. err_mem:
  410. kfree(mdev_state->vconfig);
  411. kfree(mdev_state);
  412. return -ENOMEM;
  413. }
  414. static int mbochs_remove(struct mdev_device *mdev)
  415. {
  416. struct mdev_state *mdev_state = mdev_get_drvdata(mdev);
  417. mbochs_used_mbytes -= mdev_state->type->mbytes;
  418. mdev_set_drvdata(mdev, NULL);
  419. kfree(mdev_state->pages);
  420. kfree(mdev_state->vconfig);
  421. kfree(mdev_state);
  422. return 0;
  423. }
  424. static ssize_t mbochs_read(struct mdev_device *mdev, char __user *buf,
  425. size_t count, loff_t *ppos)
  426. {
  427. unsigned int done = 0;
  428. int ret;
  429. while (count) {
  430. size_t filled;
  431. if (count >= 4 && !(*ppos % 4)) {
  432. u32 val;
  433. ret = mdev_access(mdev, (char *)&val, sizeof(val),
  434. *ppos, false);
  435. if (ret <= 0)
  436. goto read_err;
  437. if (copy_to_user(buf, &val, sizeof(val)))
  438. goto read_err;
  439. filled = 4;
  440. } else if (count >= 2 && !(*ppos % 2)) {
  441. u16 val;
  442. ret = mdev_access(mdev, (char *)&val, sizeof(val),
  443. *ppos, false);
  444. if (ret <= 0)
  445. goto read_err;
  446. if (copy_to_user(buf, &val, sizeof(val)))
  447. goto read_err;
  448. filled = 2;
  449. } else {
  450. u8 val;
  451. ret = mdev_access(mdev, (char *)&val, sizeof(val),
  452. *ppos, false);
  453. if (ret <= 0)
  454. goto read_err;
  455. if (copy_to_user(buf, &val, sizeof(val)))
  456. goto read_err;
  457. filled = 1;
  458. }
  459. count -= filled;
  460. done += filled;
  461. *ppos += filled;
  462. buf += filled;
  463. }
  464. return done;
  465. read_err:
  466. return -EFAULT;
  467. }
  468. static ssize_t mbochs_write(struct mdev_device *mdev, const char __user *buf,
  469. size_t count, loff_t *ppos)
  470. {
  471. unsigned int done = 0;
  472. int ret;
  473. while (count) {
  474. size_t filled;
  475. if (count >= 4 && !(*ppos % 4)) {
  476. u32 val;
  477. if (copy_from_user(&val, buf, sizeof(val)))
  478. goto write_err;
  479. ret = mdev_access(mdev, (char *)&val, sizeof(val),
  480. *ppos, true);
  481. if (ret <= 0)
  482. goto write_err;
  483. filled = 4;
  484. } else if (count >= 2 && !(*ppos % 2)) {
  485. u16 val;
  486. if (copy_from_user(&val, buf, sizeof(val)))
  487. goto write_err;
  488. ret = mdev_access(mdev, (char *)&val, sizeof(val),
  489. *ppos, true);
  490. if (ret <= 0)
  491. goto write_err;
  492. filled = 2;
  493. } else {
  494. u8 val;
  495. if (copy_from_user(&val, buf, sizeof(val)))
  496. goto write_err;
  497. ret = mdev_access(mdev, (char *)&val, sizeof(val),
  498. *ppos, true);
  499. if (ret <= 0)
  500. goto write_err;
  501. filled = 1;
  502. }
  503. count -= filled;
  504. done += filled;
  505. *ppos += filled;
  506. buf += filled;
  507. }
  508. return done;
  509. write_err:
  510. return -EFAULT;
  511. }
  512. static struct page *__mbochs_get_page(struct mdev_state *mdev_state,
  513. pgoff_t pgoff)
  514. {
  515. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  516. if (!mdev_state->pages[pgoff]) {
  517. mdev_state->pages[pgoff] =
  518. alloc_pages(GFP_HIGHUSER | __GFP_ZERO, 0);
  519. if (!mdev_state->pages[pgoff])
  520. return NULL;
  521. }
  522. get_page(mdev_state->pages[pgoff]);
  523. return mdev_state->pages[pgoff];
  524. }
  525. static struct page *mbochs_get_page(struct mdev_state *mdev_state,
  526. pgoff_t pgoff)
  527. {
  528. struct page *page;
  529. if (WARN_ON(pgoff >= mdev_state->pagecount))
  530. return NULL;
  531. mutex_lock(&mdev_state->ops_lock);
  532. page = __mbochs_get_page(mdev_state, pgoff);
  533. mutex_unlock(&mdev_state->ops_lock);
  534. return page;
  535. }
  536. static void mbochs_put_pages(struct mdev_state *mdev_state)
  537. {
  538. struct device *dev = mdev_dev(mdev_state->mdev);
  539. int i, count = 0;
  540. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  541. for (i = 0; i < mdev_state->pagecount; i++) {
  542. if (!mdev_state->pages[i])
  543. continue;
  544. put_page(mdev_state->pages[i]);
  545. mdev_state->pages[i] = NULL;
  546. count++;
  547. }
  548. dev_dbg(dev, "%s: %d pages released\n", __func__, count);
  549. }
  550. static int mbochs_region_vm_fault(struct vm_fault *vmf)
  551. {
  552. struct vm_area_struct *vma = vmf->vma;
  553. struct mdev_state *mdev_state = vma->vm_private_data;
  554. pgoff_t page_offset = (vmf->address - vma->vm_start) >> PAGE_SHIFT;
  555. if (page_offset >= mdev_state->pagecount)
  556. return VM_FAULT_SIGBUS;
  557. vmf->page = mbochs_get_page(mdev_state, page_offset);
  558. if (!vmf->page)
  559. return VM_FAULT_SIGBUS;
  560. return 0;
  561. }
  562. static const struct vm_operations_struct mbochs_region_vm_ops = {
  563. .fault = mbochs_region_vm_fault,
  564. };
  565. static int mbochs_mmap(struct mdev_device *mdev, struct vm_area_struct *vma)
  566. {
  567. struct mdev_state *mdev_state = mdev_get_drvdata(mdev);
  568. if (vma->vm_pgoff != MBOCHS_MEMORY_BAR_OFFSET >> PAGE_SHIFT)
  569. return -EINVAL;
  570. if (vma->vm_end < vma->vm_start)
  571. return -EINVAL;
  572. if (vma->vm_end - vma->vm_start > mdev_state->memsize)
  573. return -EINVAL;
  574. if ((vma->vm_flags & VM_SHARED) == 0)
  575. return -EINVAL;
  576. vma->vm_ops = &mbochs_region_vm_ops;
  577. vma->vm_private_data = mdev_state;
  578. return 0;
  579. }
  580. static int mbochs_dmabuf_vm_fault(struct vm_fault *vmf)
  581. {
  582. struct vm_area_struct *vma = vmf->vma;
  583. struct mbochs_dmabuf *dmabuf = vma->vm_private_data;
  584. if (WARN_ON(vmf->pgoff >= dmabuf->pagecount))
  585. return VM_FAULT_SIGBUS;
  586. vmf->page = dmabuf->pages[vmf->pgoff];
  587. get_page(vmf->page);
  588. return 0;
  589. }
  590. static const struct vm_operations_struct mbochs_dmabuf_vm_ops = {
  591. .fault = mbochs_dmabuf_vm_fault,
  592. };
  593. static int mbochs_mmap_dmabuf(struct dma_buf *buf, struct vm_area_struct *vma)
  594. {
  595. struct mbochs_dmabuf *dmabuf = buf->priv;
  596. struct device *dev = mdev_dev(dmabuf->mdev_state->mdev);
  597. dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
  598. if ((vma->vm_flags & VM_SHARED) == 0)
  599. return -EINVAL;
  600. vma->vm_ops = &mbochs_dmabuf_vm_ops;
  601. vma->vm_private_data = dmabuf;
  602. return 0;
  603. }
  604. static void mbochs_print_dmabuf(struct mbochs_dmabuf *dmabuf,
  605. const char *prefix)
  606. {
  607. struct device *dev = mdev_dev(dmabuf->mdev_state->mdev);
  608. u32 fourcc = dmabuf->mode.drm_format;
  609. dev_dbg(dev, "%s/%d: %c%c%c%c, %dx%d, stride %d, off 0x%llx, size 0x%llx, pages %ld\n",
  610. prefix, dmabuf->id,
  611. fourcc ? ((fourcc >> 0) & 0xff) : '-',
  612. fourcc ? ((fourcc >> 8) & 0xff) : '-',
  613. fourcc ? ((fourcc >> 16) & 0xff) : '-',
  614. fourcc ? ((fourcc >> 24) & 0xff) : '-',
  615. dmabuf->mode.width, dmabuf->mode.height, dmabuf->mode.stride,
  616. dmabuf->mode.offset, dmabuf->mode.size, dmabuf->pagecount);
  617. }
  618. static struct sg_table *mbochs_map_dmabuf(struct dma_buf_attachment *at,
  619. enum dma_data_direction direction)
  620. {
  621. struct mbochs_dmabuf *dmabuf = at->dmabuf->priv;
  622. struct device *dev = mdev_dev(dmabuf->mdev_state->mdev);
  623. struct sg_table *sg;
  624. dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
  625. sg = kzalloc(sizeof(*sg), GFP_KERNEL);
  626. if (!sg)
  627. goto err1;
  628. if (sg_alloc_table_from_pages(sg, dmabuf->pages, dmabuf->pagecount,
  629. 0, dmabuf->mode.size, GFP_KERNEL) < 0)
  630. goto err2;
  631. if (!dma_map_sg(at->dev, sg->sgl, sg->nents, direction))
  632. goto err3;
  633. return sg;
  634. err3:
  635. sg_free_table(sg);
  636. err2:
  637. kfree(sg);
  638. err1:
  639. return ERR_PTR(-ENOMEM);
  640. }
  641. static void mbochs_unmap_dmabuf(struct dma_buf_attachment *at,
  642. struct sg_table *sg,
  643. enum dma_data_direction direction)
  644. {
  645. struct mbochs_dmabuf *dmabuf = at->dmabuf->priv;
  646. struct device *dev = mdev_dev(dmabuf->mdev_state->mdev);
  647. dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
  648. sg_free_table(sg);
  649. kfree(sg);
  650. }
  651. static void mbochs_release_dmabuf(struct dma_buf *buf)
  652. {
  653. struct mbochs_dmabuf *dmabuf = buf->priv;
  654. struct mdev_state *mdev_state = dmabuf->mdev_state;
  655. struct device *dev = mdev_dev(mdev_state->mdev);
  656. pgoff_t pg;
  657. dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
  658. for (pg = 0; pg < dmabuf->pagecount; pg++)
  659. put_page(dmabuf->pages[pg]);
  660. mutex_lock(&mdev_state->ops_lock);
  661. dmabuf->buf = NULL;
  662. if (dmabuf->unlinked)
  663. kfree(dmabuf);
  664. mutex_unlock(&mdev_state->ops_lock);
  665. }
  666. static void *mbochs_kmap_atomic_dmabuf(struct dma_buf *buf,
  667. unsigned long page_num)
  668. {
  669. struct mbochs_dmabuf *dmabuf = buf->priv;
  670. struct page *page = dmabuf->pages[page_num];
  671. return kmap_atomic(page);
  672. }
  673. static void *mbochs_kmap_dmabuf(struct dma_buf *buf, unsigned long page_num)
  674. {
  675. struct mbochs_dmabuf *dmabuf = buf->priv;
  676. struct page *page = dmabuf->pages[page_num];
  677. return kmap(page);
  678. }
  679. static struct dma_buf_ops mbochs_dmabuf_ops = {
  680. .map_dma_buf = mbochs_map_dmabuf,
  681. .unmap_dma_buf = mbochs_unmap_dmabuf,
  682. .release = mbochs_release_dmabuf,
  683. .map_atomic = mbochs_kmap_atomic_dmabuf,
  684. .map = mbochs_kmap_dmabuf,
  685. .mmap = mbochs_mmap_dmabuf,
  686. };
  687. static struct mbochs_dmabuf *mbochs_dmabuf_alloc(struct mdev_state *mdev_state,
  688. struct mbochs_mode *mode)
  689. {
  690. struct mbochs_dmabuf *dmabuf;
  691. pgoff_t page_offset, pg;
  692. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  693. dmabuf = kzalloc(sizeof(struct mbochs_dmabuf), GFP_KERNEL);
  694. if (!dmabuf)
  695. return NULL;
  696. dmabuf->mode = *mode;
  697. dmabuf->id = mdev_state->next_id++;
  698. dmabuf->pagecount = DIV_ROUND_UP(mode->size, PAGE_SIZE);
  699. dmabuf->pages = kcalloc(dmabuf->pagecount, sizeof(struct page *),
  700. GFP_KERNEL);
  701. if (!dmabuf->pages)
  702. goto err_free_dmabuf;
  703. page_offset = dmabuf->mode.offset >> PAGE_SHIFT;
  704. for (pg = 0; pg < dmabuf->pagecount; pg++) {
  705. dmabuf->pages[pg] = __mbochs_get_page(mdev_state,
  706. page_offset + pg);
  707. if (!dmabuf->pages[pg])
  708. goto err_free_pages;
  709. }
  710. dmabuf->mdev_state = mdev_state;
  711. list_add(&dmabuf->next, &mdev_state->dmabufs);
  712. mbochs_print_dmabuf(dmabuf, __func__);
  713. return dmabuf;
  714. err_free_pages:
  715. while (pg > 0)
  716. put_page(dmabuf->pages[--pg]);
  717. kfree(dmabuf->pages);
  718. err_free_dmabuf:
  719. kfree(dmabuf);
  720. return NULL;
  721. }
  722. static struct mbochs_dmabuf *
  723. mbochs_dmabuf_find_by_mode(struct mdev_state *mdev_state,
  724. struct mbochs_mode *mode)
  725. {
  726. struct mbochs_dmabuf *dmabuf;
  727. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  728. list_for_each_entry(dmabuf, &mdev_state->dmabufs, next)
  729. if (mbochs_modes_equal(&dmabuf->mode, mode))
  730. return dmabuf;
  731. return NULL;
  732. }
  733. static struct mbochs_dmabuf *
  734. mbochs_dmabuf_find_by_id(struct mdev_state *mdev_state, u32 id)
  735. {
  736. struct mbochs_dmabuf *dmabuf;
  737. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  738. list_for_each_entry(dmabuf, &mdev_state->dmabufs, next)
  739. if (dmabuf->id == id)
  740. return dmabuf;
  741. return NULL;
  742. }
  743. static int mbochs_dmabuf_export(struct mbochs_dmabuf *dmabuf)
  744. {
  745. struct mdev_state *mdev_state = dmabuf->mdev_state;
  746. struct device *dev = mdev_dev(mdev_state->mdev);
  747. DEFINE_DMA_BUF_EXPORT_INFO(exp_info);
  748. struct dma_buf *buf;
  749. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  750. if (!IS_ALIGNED(dmabuf->mode.offset, PAGE_SIZE)) {
  751. dev_info_ratelimited(dev, "%s: framebuffer not page-aligned\n",
  752. __func__);
  753. return -EINVAL;
  754. }
  755. exp_info.ops = &mbochs_dmabuf_ops;
  756. exp_info.size = dmabuf->mode.size;
  757. exp_info.priv = dmabuf;
  758. buf = dma_buf_export(&exp_info);
  759. if (IS_ERR(buf)) {
  760. dev_info_ratelimited(dev, "%s: dma_buf_export failed: %ld\n",
  761. __func__, PTR_ERR(buf));
  762. return PTR_ERR(buf);
  763. }
  764. dmabuf->buf = buf;
  765. dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
  766. return 0;
  767. }
  768. static int mbochs_get_region_info(struct mdev_device *mdev,
  769. struct vfio_region_info *region_info,
  770. u16 *cap_type_id, void **cap_type)
  771. {
  772. struct mdev_state *mdev_state;
  773. mdev_state = mdev_get_drvdata(mdev);
  774. if (!mdev_state)
  775. return -EINVAL;
  776. if (region_info->index >= VFIO_PCI_NUM_REGIONS)
  777. return -EINVAL;
  778. switch (region_info->index) {
  779. case VFIO_PCI_CONFIG_REGION_INDEX:
  780. region_info->offset = 0;
  781. region_info->size = MBOCHS_CONFIG_SPACE_SIZE;
  782. region_info->flags = (VFIO_REGION_INFO_FLAG_READ |
  783. VFIO_REGION_INFO_FLAG_WRITE);
  784. break;
  785. case VFIO_PCI_BAR0_REGION_INDEX:
  786. region_info->offset = MBOCHS_MEMORY_BAR_OFFSET;
  787. region_info->size = mdev_state->memsize;
  788. region_info->flags = (VFIO_REGION_INFO_FLAG_READ |
  789. VFIO_REGION_INFO_FLAG_WRITE |
  790. VFIO_REGION_INFO_FLAG_MMAP);
  791. break;
  792. case VFIO_PCI_BAR2_REGION_INDEX:
  793. region_info->offset = MBOCHS_MMIO_BAR_OFFSET;
  794. region_info->size = MBOCHS_MMIO_BAR_SIZE;
  795. region_info->flags = (VFIO_REGION_INFO_FLAG_READ |
  796. VFIO_REGION_INFO_FLAG_WRITE);
  797. break;
  798. default:
  799. region_info->size = 0;
  800. region_info->offset = 0;
  801. region_info->flags = 0;
  802. }
  803. return 0;
  804. }
  805. static int mbochs_get_irq_info(struct mdev_device *mdev,
  806. struct vfio_irq_info *irq_info)
  807. {
  808. irq_info->count = 0;
  809. return 0;
  810. }
  811. static int mbochs_get_device_info(struct mdev_device *mdev,
  812. struct vfio_device_info *dev_info)
  813. {
  814. dev_info->flags = VFIO_DEVICE_FLAGS_PCI;
  815. dev_info->num_regions = VFIO_PCI_NUM_REGIONS;
  816. dev_info->num_irqs = VFIO_PCI_NUM_IRQS;
  817. return 0;
  818. }
  819. static int mbochs_query_gfx_plane(struct mdev_device *mdev,
  820. struct vfio_device_gfx_plane_info *plane)
  821. {
  822. struct mdev_state *mdev_state = mdev_get_drvdata(mdev);
  823. struct device *dev = mdev_dev(mdev);
  824. struct mbochs_dmabuf *dmabuf;
  825. struct mbochs_mode mode;
  826. int ret;
  827. if (plane->flags & VFIO_GFX_PLANE_TYPE_PROBE) {
  828. if (plane->flags == (VFIO_GFX_PLANE_TYPE_PROBE |
  829. VFIO_GFX_PLANE_TYPE_DMABUF))
  830. return 0;
  831. return -EINVAL;
  832. }
  833. if (plane->flags != VFIO_GFX_PLANE_TYPE_DMABUF)
  834. return -EINVAL;
  835. plane->drm_format_mod = 0;
  836. plane->x_pos = 0;
  837. plane->y_pos = 0;
  838. plane->x_hot = 0;
  839. plane->y_hot = 0;
  840. mutex_lock(&mdev_state->ops_lock);
  841. ret = -EINVAL;
  842. if (plane->drm_plane_type == DRM_PLANE_TYPE_PRIMARY)
  843. ret = mbochs_check_framebuffer(mdev_state, &mode);
  844. if (ret < 0) {
  845. plane->drm_format = 0;
  846. plane->width = 0;
  847. plane->height = 0;
  848. plane->stride = 0;
  849. plane->size = 0;
  850. plane->dmabuf_id = 0;
  851. goto done;
  852. }
  853. dmabuf = mbochs_dmabuf_find_by_mode(mdev_state, &mode);
  854. if (!dmabuf)
  855. mbochs_dmabuf_alloc(mdev_state, &mode);
  856. if (!dmabuf) {
  857. mutex_unlock(&mdev_state->ops_lock);
  858. return -ENOMEM;
  859. }
  860. plane->drm_format = dmabuf->mode.drm_format;
  861. plane->width = dmabuf->mode.width;
  862. plane->height = dmabuf->mode.height;
  863. plane->stride = dmabuf->mode.stride;
  864. plane->size = dmabuf->mode.size;
  865. plane->dmabuf_id = dmabuf->id;
  866. done:
  867. if (plane->drm_plane_type == DRM_PLANE_TYPE_PRIMARY &&
  868. mdev_state->active_id != plane->dmabuf_id) {
  869. dev_dbg(dev, "%s: primary: %d => %d\n", __func__,
  870. mdev_state->active_id, plane->dmabuf_id);
  871. mdev_state->active_id = plane->dmabuf_id;
  872. }
  873. mutex_unlock(&mdev_state->ops_lock);
  874. return 0;
  875. }
  876. static int mbochs_get_gfx_dmabuf(struct mdev_device *mdev,
  877. u32 id)
  878. {
  879. struct mdev_state *mdev_state = mdev_get_drvdata(mdev);
  880. struct mbochs_dmabuf *dmabuf;
  881. mutex_lock(&mdev_state->ops_lock);
  882. dmabuf = mbochs_dmabuf_find_by_id(mdev_state, id);
  883. if (!dmabuf) {
  884. mutex_unlock(&mdev_state->ops_lock);
  885. return -ENOENT;
  886. }
  887. if (!dmabuf->buf)
  888. mbochs_dmabuf_export(dmabuf);
  889. mutex_unlock(&mdev_state->ops_lock);
  890. if (!dmabuf->buf)
  891. return -EINVAL;
  892. return dma_buf_fd(dmabuf->buf, 0);
  893. }
  894. static long mbochs_ioctl(struct mdev_device *mdev, unsigned int cmd,
  895. unsigned long arg)
  896. {
  897. int ret = 0;
  898. unsigned long minsz;
  899. struct mdev_state *mdev_state;
  900. mdev_state = mdev_get_drvdata(mdev);
  901. switch (cmd) {
  902. case VFIO_DEVICE_GET_INFO:
  903. {
  904. struct vfio_device_info info;
  905. minsz = offsetofend(struct vfio_device_info, num_irqs);
  906. if (copy_from_user(&info, (void __user *)arg, minsz))
  907. return -EFAULT;
  908. if (info.argsz < minsz)
  909. return -EINVAL;
  910. ret = mbochs_get_device_info(mdev, &info);
  911. if (ret)
  912. return ret;
  913. memcpy(&mdev_state->dev_info, &info, sizeof(info));
  914. if (copy_to_user((void __user *)arg, &info, minsz))
  915. return -EFAULT;
  916. return 0;
  917. }
  918. case VFIO_DEVICE_GET_REGION_INFO:
  919. {
  920. struct vfio_region_info info;
  921. u16 cap_type_id = 0;
  922. void *cap_type = NULL;
  923. minsz = offsetofend(struct vfio_region_info, offset);
  924. if (copy_from_user(&info, (void __user *)arg, minsz))
  925. return -EFAULT;
  926. if (info.argsz < minsz)
  927. return -EINVAL;
  928. ret = mbochs_get_region_info(mdev, &info, &cap_type_id,
  929. &cap_type);
  930. if (ret)
  931. return ret;
  932. if (copy_to_user((void __user *)arg, &info, minsz))
  933. return -EFAULT;
  934. return 0;
  935. }
  936. case VFIO_DEVICE_GET_IRQ_INFO:
  937. {
  938. struct vfio_irq_info info;
  939. minsz = offsetofend(struct vfio_irq_info, count);
  940. if (copy_from_user(&info, (void __user *)arg, minsz))
  941. return -EFAULT;
  942. if ((info.argsz < minsz) ||
  943. (info.index >= mdev_state->dev_info.num_irqs))
  944. return -EINVAL;
  945. ret = mbochs_get_irq_info(mdev, &info);
  946. if (ret)
  947. return ret;
  948. if (copy_to_user((void __user *)arg, &info, minsz))
  949. return -EFAULT;
  950. return 0;
  951. }
  952. case VFIO_DEVICE_QUERY_GFX_PLANE:
  953. {
  954. struct vfio_device_gfx_plane_info plane;
  955. minsz = offsetofend(struct vfio_device_gfx_plane_info,
  956. region_index);
  957. if (copy_from_user(&plane, (void __user *)arg, minsz))
  958. return -EFAULT;
  959. if (plane.argsz < minsz)
  960. return -EINVAL;
  961. ret = mbochs_query_gfx_plane(mdev, &plane);
  962. if (ret)
  963. return ret;
  964. if (copy_to_user((void __user *)arg, &plane, minsz))
  965. return -EFAULT;
  966. return 0;
  967. }
  968. case VFIO_DEVICE_GET_GFX_DMABUF:
  969. {
  970. u32 dmabuf_id;
  971. if (get_user(dmabuf_id, (__u32 __user *)arg))
  972. return -EFAULT;
  973. return mbochs_get_gfx_dmabuf(mdev, dmabuf_id);
  974. }
  975. case VFIO_DEVICE_SET_IRQS:
  976. return -EINVAL;
  977. case VFIO_DEVICE_RESET:
  978. return mbochs_reset(mdev);
  979. }
  980. return -ENOTTY;
  981. }
  982. static int mbochs_open(struct mdev_device *mdev)
  983. {
  984. if (!try_module_get(THIS_MODULE))
  985. return -ENODEV;
  986. return 0;
  987. }
  988. static void mbochs_close(struct mdev_device *mdev)
  989. {
  990. struct mdev_state *mdev_state = mdev_get_drvdata(mdev);
  991. struct mbochs_dmabuf *dmabuf, *tmp;
  992. mutex_lock(&mdev_state->ops_lock);
  993. list_for_each_entry_safe(dmabuf, tmp, &mdev_state->dmabufs, next) {
  994. list_del(&dmabuf->next);
  995. if (dmabuf->buf) {
  996. /* free in mbochs_release_dmabuf() */
  997. dmabuf->unlinked = true;
  998. } else {
  999. kfree(dmabuf);
  1000. }
  1001. }
  1002. mbochs_put_pages(mdev_state);
  1003. mutex_unlock(&mdev_state->ops_lock);
  1004. module_put(THIS_MODULE);
  1005. }
  1006. static ssize_t
  1007. memory_show(struct device *dev, struct device_attribute *attr,
  1008. char *buf)
  1009. {
  1010. struct mdev_device *mdev = mdev_from_dev(dev);
  1011. struct mdev_state *mdev_state = mdev_get_drvdata(mdev);
  1012. return sprintf(buf, "%d MB\n", mdev_state->type->mbytes);
  1013. }
  1014. static DEVICE_ATTR_RO(memory);
  1015. static struct attribute *mdev_dev_attrs[] = {
  1016. &dev_attr_memory.attr,
  1017. NULL,
  1018. };
  1019. static const struct attribute_group mdev_dev_group = {
  1020. .name = "vendor",
  1021. .attrs = mdev_dev_attrs,
  1022. };
  1023. const struct attribute_group *mdev_dev_groups[] = {
  1024. &mdev_dev_group,
  1025. NULL,
  1026. };
  1027. static ssize_t
  1028. name_show(struct kobject *kobj, struct device *dev, char *buf)
  1029. {
  1030. return sprintf(buf, "%s\n", kobj->name);
  1031. }
  1032. MDEV_TYPE_ATTR_RO(name);
  1033. static ssize_t
  1034. description_show(struct kobject *kobj, struct device *dev, char *buf)
  1035. {
  1036. const struct mbochs_type *type = mbochs_find_type(kobj);
  1037. return sprintf(buf, "virtual display, %d MB video memory\n",
  1038. type ? type->mbytes : 0);
  1039. }
  1040. MDEV_TYPE_ATTR_RO(description);
  1041. static ssize_t
  1042. available_instances_show(struct kobject *kobj, struct device *dev, char *buf)
  1043. {
  1044. const struct mbochs_type *type = mbochs_find_type(kobj);
  1045. int count = (max_mbytes - mbochs_used_mbytes) / type->mbytes;
  1046. return sprintf(buf, "%d\n", count);
  1047. }
  1048. MDEV_TYPE_ATTR_RO(available_instances);
  1049. static ssize_t device_api_show(struct kobject *kobj, struct device *dev,
  1050. char *buf)
  1051. {
  1052. return sprintf(buf, "%s\n", VFIO_DEVICE_API_PCI_STRING);
  1053. }
  1054. MDEV_TYPE_ATTR_RO(device_api);
  1055. static struct attribute *mdev_types_attrs[] = {
  1056. &mdev_type_attr_name.attr,
  1057. &mdev_type_attr_description.attr,
  1058. &mdev_type_attr_device_api.attr,
  1059. &mdev_type_attr_available_instances.attr,
  1060. NULL,
  1061. };
  1062. static struct attribute_group mdev_type_group1 = {
  1063. .name = MBOCHS_TYPE_1,
  1064. .attrs = mdev_types_attrs,
  1065. };
  1066. static struct attribute_group mdev_type_group2 = {
  1067. .name = MBOCHS_TYPE_2,
  1068. .attrs = mdev_types_attrs,
  1069. };
  1070. static struct attribute_group mdev_type_group3 = {
  1071. .name = MBOCHS_TYPE_3,
  1072. .attrs = mdev_types_attrs,
  1073. };
  1074. static struct attribute_group *mdev_type_groups[] = {
  1075. &mdev_type_group1,
  1076. &mdev_type_group2,
  1077. &mdev_type_group3,
  1078. NULL,
  1079. };
  1080. static const struct mdev_parent_ops mdev_fops = {
  1081. .owner = THIS_MODULE,
  1082. .mdev_attr_groups = mdev_dev_groups,
  1083. .supported_type_groups = mdev_type_groups,
  1084. .create = mbochs_create,
  1085. .remove = mbochs_remove,
  1086. .open = mbochs_open,
  1087. .release = mbochs_close,
  1088. .read = mbochs_read,
  1089. .write = mbochs_write,
  1090. .ioctl = mbochs_ioctl,
  1091. .mmap = mbochs_mmap,
  1092. };
  1093. static const struct file_operations vd_fops = {
  1094. .owner = THIS_MODULE,
  1095. };
  1096. static void mbochs_device_release(struct device *dev)
  1097. {
  1098. /* nothing */
  1099. }
  1100. static int __init mbochs_dev_init(void)
  1101. {
  1102. int ret = 0;
  1103. ret = alloc_chrdev_region(&mbochs_devt, 0, MINORMASK, MBOCHS_NAME);
  1104. if (ret < 0) {
  1105. pr_err("Error: failed to register mbochs_dev, err: %d\n", ret);
  1106. return ret;
  1107. }
  1108. cdev_init(&mbochs_cdev, &vd_fops);
  1109. cdev_add(&mbochs_cdev, mbochs_devt, MINORMASK);
  1110. pr_info("%s: major %d\n", __func__, MAJOR(mbochs_devt));
  1111. mbochs_class = class_create(THIS_MODULE, MBOCHS_CLASS_NAME);
  1112. if (IS_ERR(mbochs_class)) {
  1113. pr_err("Error: failed to register mbochs_dev class\n");
  1114. ret = PTR_ERR(mbochs_class);
  1115. goto failed1;
  1116. }
  1117. mbochs_dev.class = mbochs_class;
  1118. mbochs_dev.release = mbochs_device_release;
  1119. dev_set_name(&mbochs_dev, "%s", MBOCHS_NAME);
  1120. ret = device_register(&mbochs_dev);
  1121. if (ret)
  1122. goto failed2;
  1123. ret = mdev_register_device(&mbochs_dev, &mdev_fops);
  1124. if (ret)
  1125. goto failed3;
  1126. return 0;
  1127. failed3:
  1128. device_unregister(&mbochs_dev);
  1129. failed2:
  1130. class_destroy(mbochs_class);
  1131. failed1:
  1132. cdev_del(&mbochs_cdev);
  1133. unregister_chrdev_region(mbochs_devt, MINORMASK);
  1134. return ret;
  1135. }
  1136. static void __exit mbochs_dev_exit(void)
  1137. {
  1138. mbochs_dev.bus = NULL;
  1139. mdev_unregister_device(&mbochs_dev);
  1140. device_unregister(&mbochs_dev);
  1141. cdev_del(&mbochs_cdev);
  1142. unregister_chrdev_region(mbochs_devt, MINORMASK);
  1143. class_destroy(mbochs_class);
  1144. mbochs_class = NULL;
  1145. }
  1146. module_init(mbochs_dev_init)
  1147. module_exit(mbochs_dev_exit)