sdhci-acpi.c 18 KB

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  1. /*
  2. * Secure Digital Host Controller Interface ACPI driver.
  3. *
  4. * Copyright (c) 2012, Intel Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program; if not, write to the Free Software Foundation, Inc.,
  17. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18. *
  19. */
  20. #include <linux/init.h>
  21. #include <linux/export.h>
  22. #include <linux/module.h>
  23. #include <linux/device.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/ioport.h>
  26. #include <linux/io.h>
  27. #include <linux/dma-mapping.h>
  28. #include <linux/compiler.h>
  29. #include <linux/stddef.h>
  30. #include <linux/bitops.h>
  31. #include <linux/types.h>
  32. #include <linux/err.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/acpi.h>
  35. #include <linux/pm.h>
  36. #include <linux/pm_runtime.h>
  37. #include <linux/delay.h>
  38. #include <linux/mmc/host.h>
  39. #include <linux/mmc/pm.h>
  40. #include <linux/mmc/slot-gpio.h>
  41. #ifdef CONFIG_X86
  42. #include <asm/cpu_device_id.h>
  43. #include <asm/intel-family.h>
  44. #include <asm/iosf_mbi.h>
  45. #include <linux/pci.h>
  46. #endif
  47. #include "sdhci.h"
  48. enum {
  49. SDHCI_ACPI_SD_CD = BIT(0),
  50. SDHCI_ACPI_RUNTIME_PM = BIT(1),
  51. SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL = BIT(2),
  52. };
  53. struct sdhci_acpi_chip {
  54. const struct sdhci_ops *ops;
  55. unsigned int quirks;
  56. unsigned int quirks2;
  57. unsigned long caps;
  58. unsigned int caps2;
  59. mmc_pm_flag_t pm_caps;
  60. };
  61. struct sdhci_acpi_slot {
  62. const struct sdhci_acpi_chip *chip;
  63. unsigned int quirks;
  64. unsigned int quirks2;
  65. unsigned long caps;
  66. unsigned int caps2;
  67. mmc_pm_flag_t pm_caps;
  68. unsigned int flags;
  69. size_t priv_size;
  70. int (*probe_slot)(struct platform_device *, const char *, const char *);
  71. int (*remove_slot)(struct platform_device *);
  72. };
  73. struct sdhci_acpi_host {
  74. struct sdhci_host *host;
  75. const struct sdhci_acpi_slot *slot;
  76. struct platform_device *pdev;
  77. bool use_runtime_pm;
  78. unsigned long private[0] ____cacheline_aligned;
  79. };
  80. static inline void *sdhci_acpi_priv(struct sdhci_acpi_host *c)
  81. {
  82. return (void *)c->private;
  83. }
  84. static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag)
  85. {
  86. return c->slot && (c->slot->flags & flag);
  87. }
  88. enum {
  89. INTEL_DSM_FNS = 0,
  90. INTEL_DSM_V18_SWITCH = 3,
  91. INTEL_DSM_V33_SWITCH = 4,
  92. };
  93. struct intel_host {
  94. u32 dsm_fns;
  95. };
  96. static const guid_t intel_dsm_guid =
  97. GUID_INIT(0xF6C13EA5, 0x65CD, 0x461F,
  98. 0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61);
  99. static int __intel_dsm(struct intel_host *intel_host, struct device *dev,
  100. unsigned int fn, u32 *result)
  101. {
  102. union acpi_object *obj;
  103. int err = 0;
  104. obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &intel_dsm_guid, 0, fn, NULL);
  105. if (!obj)
  106. return -EOPNOTSUPP;
  107. if (obj->type == ACPI_TYPE_INTEGER) {
  108. *result = obj->integer.value;
  109. } else if (obj->type == ACPI_TYPE_BUFFER && obj->buffer.length > 0) {
  110. size_t len = min_t(size_t, obj->buffer.length, 4);
  111. *result = 0;
  112. memcpy(result, obj->buffer.pointer, len);
  113. } else {
  114. dev_err(dev, "%s DSM fn %u obj->type %d obj->buffer.length %d\n",
  115. __func__, fn, obj->type, obj->buffer.length);
  116. err = -EINVAL;
  117. }
  118. ACPI_FREE(obj);
  119. return err;
  120. }
  121. static int intel_dsm(struct intel_host *intel_host, struct device *dev,
  122. unsigned int fn, u32 *result)
  123. {
  124. if (fn > 31 || !(intel_host->dsm_fns & (1 << fn)))
  125. return -EOPNOTSUPP;
  126. return __intel_dsm(intel_host, dev, fn, result);
  127. }
  128. static void intel_dsm_init(struct intel_host *intel_host, struct device *dev,
  129. struct mmc_host *mmc)
  130. {
  131. int err;
  132. err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns);
  133. if (err) {
  134. pr_debug("%s: DSM not supported, error %d\n",
  135. mmc_hostname(mmc), err);
  136. return;
  137. }
  138. pr_debug("%s: DSM function mask %#x\n",
  139. mmc_hostname(mmc), intel_host->dsm_fns);
  140. }
  141. static int intel_start_signal_voltage_switch(struct mmc_host *mmc,
  142. struct mmc_ios *ios)
  143. {
  144. struct device *dev = mmc_dev(mmc);
  145. struct sdhci_acpi_host *c = dev_get_drvdata(dev);
  146. struct intel_host *intel_host = sdhci_acpi_priv(c);
  147. unsigned int fn;
  148. u32 result = 0;
  149. int err;
  150. err = sdhci_start_signal_voltage_switch(mmc, ios);
  151. if (err)
  152. return err;
  153. switch (ios->signal_voltage) {
  154. case MMC_SIGNAL_VOLTAGE_330:
  155. fn = INTEL_DSM_V33_SWITCH;
  156. break;
  157. case MMC_SIGNAL_VOLTAGE_180:
  158. fn = INTEL_DSM_V18_SWITCH;
  159. break;
  160. default:
  161. return 0;
  162. }
  163. err = intel_dsm(intel_host, dev, fn, &result);
  164. pr_debug("%s: %s DSM fn %u error %d result %u\n",
  165. mmc_hostname(mmc), __func__, fn, err, result);
  166. return 0;
  167. }
  168. static void sdhci_acpi_int_hw_reset(struct sdhci_host *host)
  169. {
  170. u8 reg;
  171. reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
  172. reg |= 0x10;
  173. sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
  174. /* For eMMC, minimum is 1us but give it 9us for good measure */
  175. udelay(9);
  176. reg &= ~0x10;
  177. sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
  178. /* For eMMC, minimum is 200us but give it 300us for good measure */
  179. usleep_range(300, 1000);
  180. }
  181. static const struct sdhci_ops sdhci_acpi_ops_dflt = {
  182. .set_clock = sdhci_set_clock,
  183. .set_bus_width = sdhci_set_bus_width,
  184. .reset = sdhci_reset,
  185. .set_uhs_signaling = sdhci_set_uhs_signaling,
  186. };
  187. static const struct sdhci_ops sdhci_acpi_ops_int = {
  188. .set_clock = sdhci_set_clock,
  189. .set_bus_width = sdhci_set_bus_width,
  190. .reset = sdhci_reset,
  191. .set_uhs_signaling = sdhci_set_uhs_signaling,
  192. .hw_reset = sdhci_acpi_int_hw_reset,
  193. };
  194. static const struct sdhci_acpi_chip sdhci_acpi_chip_int = {
  195. .ops = &sdhci_acpi_ops_int,
  196. };
  197. #ifdef CONFIG_X86
  198. static bool sdhci_acpi_byt(void)
  199. {
  200. static const struct x86_cpu_id byt[] = {
  201. { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT1 },
  202. {}
  203. };
  204. return x86_match_cpu(byt);
  205. }
  206. static bool sdhci_acpi_cht(void)
  207. {
  208. static const struct x86_cpu_id cht[] = {
  209. { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT },
  210. {}
  211. };
  212. return x86_match_cpu(cht);
  213. }
  214. #define BYT_IOSF_SCCEP 0x63
  215. #define BYT_IOSF_OCP_NETCTRL0 0x1078
  216. #define BYT_IOSF_OCP_TIMEOUT_BASE GENMASK(10, 8)
  217. static void sdhci_acpi_byt_setting(struct device *dev)
  218. {
  219. u32 val = 0;
  220. if (!sdhci_acpi_byt())
  221. return;
  222. if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0,
  223. &val)) {
  224. dev_err(dev, "%s read error\n", __func__);
  225. return;
  226. }
  227. if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE))
  228. return;
  229. val &= ~BYT_IOSF_OCP_TIMEOUT_BASE;
  230. if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0,
  231. val)) {
  232. dev_err(dev, "%s write error\n", __func__);
  233. return;
  234. }
  235. dev_dbg(dev, "%s completed\n", __func__);
  236. }
  237. static bool sdhci_acpi_byt_defer(struct device *dev)
  238. {
  239. if (!sdhci_acpi_byt())
  240. return false;
  241. if (!iosf_mbi_available())
  242. return true;
  243. sdhci_acpi_byt_setting(dev);
  244. return false;
  245. }
  246. static bool sdhci_acpi_cht_pci_wifi(unsigned int vendor, unsigned int device,
  247. unsigned int slot, unsigned int parent_slot)
  248. {
  249. struct pci_dev *dev, *parent, *from = NULL;
  250. while (1) {
  251. dev = pci_get_device(vendor, device, from);
  252. pci_dev_put(from);
  253. if (!dev)
  254. break;
  255. parent = pci_upstream_bridge(dev);
  256. if (ACPI_COMPANION(&dev->dev) && PCI_SLOT(dev->devfn) == slot &&
  257. parent && PCI_SLOT(parent->devfn) == parent_slot &&
  258. !pci_upstream_bridge(parent)) {
  259. pci_dev_put(dev);
  260. return true;
  261. }
  262. from = dev;
  263. }
  264. return false;
  265. }
  266. /*
  267. * GPDwin uses PCI wifi which conflicts with SDIO's use of
  268. * acpi_device_fix_up_power() on child device nodes. Identifying GPDwin is
  269. * problematic, but since SDIO is only used for wifi, the presence of the PCI
  270. * wifi card in the expected slot with an ACPI companion node, is used to
  271. * indicate that acpi_device_fix_up_power() should be avoided.
  272. */
  273. static inline bool sdhci_acpi_no_fixup_child_power(const char *hid,
  274. const char *uid)
  275. {
  276. return sdhci_acpi_cht() &&
  277. !strcmp(hid, "80860F14") &&
  278. !strcmp(uid, "2") &&
  279. sdhci_acpi_cht_pci_wifi(0x14e4, 0x43ec, 0, 28);
  280. }
  281. #else
  282. static inline void sdhci_acpi_byt_setting(struct device *dev)
  283. {
  284. }
  285. static inline bool sdhci_acpi_byt_defer(struct device *dev)
  286. {
  287. return false;
  288. }
  289. static inline bool sdhci_acpi_no_fixup_child_power(const char *hid,
  290. const char *uid)
  291. {
  292. return false;
  293. }
  294. #endif
  295. static int bxt_get_cd(struct mmc_host *mmc)
  296. {
  297. int gpio_cd = mmc_gpio_get_cd(mmc);
  298. struct sdhci_host *host = mmc_priv(mmc);
  299. unsigned long flags;
  300. int ret = 0;
  301. if (!gpio_cd)
  302. return 0;
  303. spin_lock_irqsave(&host->lock, flags);
  304. if (host->flags & SDHCI_DEVICE_DEAD)
  305. goto out;
  306. ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
  307. out:
  308. spin_unlock_irqrestore(&host->lock, flags);
  309. return ret;
  310. }
  311. static int intel_probe_slot(struct platform_device *pdev, const char *hid,
  312. const char *uid)
  313. {
  314. struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
  315. struct intel_host *intel_host = sdhci_acpi_priv(c);
  316. struct sdhci_host *host = c->host;
  317. if (hid && uid && !strcmp(hid, "80860F14") && !strcmp(uid, "1") &&
  318. sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 &&
  319. sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807)
  320. host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
  321. if (hid && !strcmp(hid, "80865ACA"))
  322. host->mmc_host_ops.get_cd = bxt_get_cd;
  323. intel_dsm_init(intel_host, &pdev->dev, host->mmc);
  324. host->mmc_host_ops.start_signal_voltage_switch =
  325. intel_start_signal_voltage_switch;
  326. return 0;
  327. }
  328. static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = {
  329. .chip = &sdhci_acpi_chip_int,
  330. .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
  331. MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
  332. MMC_CAP_CMD_DURING_TFR | MMC_CAP_WAIT_WHILE_BUSY,
  333. .flags = SDHCI_ACPI_RUNTIME_PM,
  334. .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
  335. .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
  336. SDHCI_QUIRK2_STOP_WITH_TC |
  337. SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400,
  338. .probe_slot = intel_probe_slot,
  339. .priv_size = sizeof(struct intel_host),
  340. };
  341. static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = {
  342. .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
  343. SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
  344. .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
  345. .caps = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD |
  346. MMC_CAP_WAIT_WHILE_BUSY,
  347. .flags = SDHCI_ACPI_RUNTIME_PM,
  348. .pm_caps = MMC_PM_KEEP_POWER,
  349. .probe_slot = intel_probe_slot,
  350. .priv_size = sizeof(struct intel_host),
  351. };
  352. static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = {
  353. .flags = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL |
  354. SDHCI_ACPI_RUNTIME_PM,
  355. .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
  356. .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
  357. SDHCI_QUIRK2_STOP_WITH_TC,
  358. .caps = MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_AGGRESSIVE_PM,
  359. .probe_slot = intel_probe_slot,
  360. .priv_size = sizeof(struct intel_host),
  361. };
  362. static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd_3v = {
  363. .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
  364. .quirks2 = SDHCI_QUIRK2_NO_1_8_V,
  365. .caps = MMC_CAP_NONREMOVABLE,
  366. };
  367. static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = {
  368. .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
  369. .caps = MMC_CAP_NONREMOVABLE,
  370. };
  371. struct sdhci_acpi_uid_slot {
  372. const char *hid;
  373. const char *uid;
  374. const struct sdhci_acpi_slot *slot;
  375. };
  376. static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = {
  377. { "80865ACA", NULL, &sdhci_acpi_slot_int_sd },
  378. { "80865ACC", NULL, &sdhci_acpi_slot_int_emmc },
  379. { "80865AD0", NULL, &sdhci_acpi_slot_int_sdio },
  380. { "80860F14" , "1" , &sdhci_acpi_slot_int_emmc },
  381. { "80860F14" , "2" , &sdhci_acpi_slot_int_sdio },
  382. { "80860F14" , "3" , &sdhci_acpi_slot_int_sd },
  383. { "80860F16" , NULL, &sdhci_acpi_slot_int_sd },
  384. { "INT33BB" , "2" , &sdhci_acpi_slot_int_sdio },
  385. { "INT33BB" , "3" , &sdhci_acpi_slot_int_sd },
  386. { "INT33C6" , NULL, &sdhci_acpi_slot_int_sdio },
  387. { "INT3436" , NULL, &sdhci_acpi_slot_int_sdio },
  388. { "INT344D" , NULL, &sdhci_acpi_slot_int_sdio },
  389. { "PNP0FFF" , "3" , &sdhci_acpi_slot_int_sd },
  390. { "PNP0D40" },
  391. { "QCOM8051", NULL, &sdhci_acpi_slot_qcom_sd_3v },
  392. { "QCOM8052", NULL, &sdhci_acpi_slot_qcom_sd },
  393. { },
  394. };
  395. static const struct acpi_device_id sdhci_acpi_ids[] = {
  396. { "80865ACA" },
  397. { "80865ACC" },
  398. { "80865AD0" },
  399. { "80860F14" },
  400. { "80860F16" },
  401. { "INT33BB" },
  402. { "INT33C6" },
  403. { "INT3436" },
  404. { "INT344D" },
  405. { "PNP0D40" },
  406. { "QCOM8051" },
  407. { "QCOM8052" },
  408. { },
  409. };
  410. MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids);
  411. static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(const char *hid,
  412. const char *uid)
  413. {
  414. const struct sdhci_acpi_uid_slot *u;
  415. for (u = sdhci_acpi_uids; u->hid; u++) {
  416. if (strcmp(u->hid, hid))
  417. continue;
  418. if (!u->uid)
  419. return u->slot;
  420. if (uid && !strcmp(u->uid, uid))
  421. return u->slot;
  422. }
  423. return NULL;
  424. }
  425. static int sdhci_acpi_probe(struct platform_device *pdev)
  426. {
  427. struct device *dev = &pdev->dev;
  428. const struct sdhci_acpi_slot *slot;
  429. struct acpi_device *device, *child;
  430. struct sdhci_acpi_host *c;
  431. struct sdhci_host *host;
  432. struct resource *iomem;
  433. resource_size_t len;
  434. size_t priv_size;
  435. const char *hid;
  436. const char *uid;
  437. int err;
  438. device = ACPI_COMPANION(dev);
  439. if (!device)
  440. return -ENODEV;
  441. hid = acpi_device_hid(device);
  442. uid = acpi_device_uid(device);
  443. slot = sdhci_acpi_get_slot(hid, uid);
  444. /* Power on the SDHCI controller and its children */
  445. acpi_device_fix_up_power(device);
  446. if (!sdhci_acpi_no_fixup_child_power(hid, uid)) {
  447. list_for_each_entry(child, &device->children, node)
  448. if (child->status.present && child->status.enabled)
  449. acpi_device_fix_up_power(child);
  450. }
  451. if (sdhci_acpi_byt_defer(dev))
  452. return -EPROBE_DEFER;
  453. iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  454. if (!iomem)
  455. return -ENOMEM;
  456. len = resource_size(iomem);
  457. if (len < 0x100)
  458. dev_err(dev, "Invalid iomem size!\n");
  459. if (!devm_request_mem_region(dev, iomem->start, len, dev_name(dev)))
  460. return -ENOMEM;
  461. priv_size = slot ? slot->priv_size : 0;
  462. host = sdhci_alloc_host(dev, sizeof(struct sdhci_acpi_host) + priv_size);
  463. if (IS_ERR(host))
  464. return PTR_ERR(host);
  465. c = sdhci_priv(host);
  466. c->host = host;
  467. c->slot = slot;
  468. c->pdev = pdev;
  469. c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM);
  470. platform_set_drvdata(pdev, c);
  471. host->hw_name = "ACPI";
  472. host->ops = &sdhci_acpi_ops_dflt;
  473. host->irq = platform_get_irq(pdev, 0);
  474. host->ioaddr = devm_ioremap_nocache(dev, iomem->start,
  475. resource_size(iomem));
  476. if (host->ioaddr == NULL) {
  477. err = -ENOMEM;
  478. goto err_free;
  479. }
  480. if (c->slot) {
  481. if (c->slot->probe_slot) {
  482. err = c->slot->probe_slot(pdev, hid, uid);
  483. if (err)
  484. goto err_free;
  485. }
  486. if (c->slot->chip) {
  487. host->ops = c->slot->chip->ops;
  488. host->quirks |= c->slot->chip->quirks;
  489. host->quirks2 |= c->slot->chip->quirks2;
  490. host->mmc->caps |= c->slot->chip->caps;
  491. host->mmc->caps2 |= c->slot->chip->caps2;
  492. host->mmc->pm_caps |= c->slot->chip->pm_caps;
  493. }
  494. host->quirks |= c->slot->quirks;
  495. host->quirks2 |= c->slot->quirks2;
  496. host->mmc->caps |= c->slot->caps;
  497. host->mmc->caps2 |= c->slot->caps2;
  498. host->mmc->pm_caps |= c->slot->pm_caps;
  499. }
  500. host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
  501. if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) {
  502. bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL);
  503. err = mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0, NULL);
  504. if (err) {
  505. if (err == -EPROBE_DEFER)
  506. goto err_free;
  507. dev_warn(dev, "failed to setup card detect gpio\n");
  508. c->use_runtime_pm = false;
  509. }
  510. }
  511. err = sdhci_add_host(host);
  512. if (err)
  513. goto err_free;
  514. if (c->use_runtime_pm) {
  515. pm_runtime_set_active(dev);
  516. pm_suspend_ignore_children(dev, 1);
  517. pm_runtime_set_autosuspend_delay(dev, 50);
  518. pm_runtime_use_autosuspend(dev);
  519. pm_runtime_enable(dev);
  520. }
  521. device_enable_async_suspend(dev);
  522. return 0;
  523. err_free:
  524. sdhci_free_host(c->host);
  525. return err;
  526. }
  527. static int sdhci_acpi_remove(struct platform_device *pdev)
  528. {
  529. struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
  530. struct device *dev = &pdev->dev;
  531. int dead;
  532. if (c->use_runtime_pm) {
  533. pm_runtime_get_sync(dev);
  534. pm_runtime_disable(dev);
  535. pm_runtime_put_noidle(dev);
  536. }
  537. if (c->slot && c->slot->remove_slot)
  538. c->slot->remove_slot(pdev);
  539. dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0);
  540. sdhci_remove_host(c->host, dead);
  541. sdhci_free_host(c->host);
  542. return 0;
  543. }
  544. #ifdef CONFIG_PM_SLEEP
  545. static int sdhci_acpi_suspend(struct device *dev)
  546. {
  547. struct sdhci_acpi_host *c = dev_get_drvdata(dev);
  548. struct sdhci_host *host = c->host;
  549. if (host->tuning_mode != SDHCI_TUNING_MODE_3)
  550. mmc_retune_needed(host->mmc);
  551. return sdhci_suspend_host(host);
  552. }
  553. static int sdhci_acpi_resume(struct device *dev)
  554. {
  555. struct sdhci_acpi_host *c = dev_get_drvdata(dev);
  556. sdhci_acpi_byt_setting(&c->pdev->dev);
  557. return sdhci_resume_host(c->host);
  558. }
  559. #endif
  560. #ifdef CONFIG_PM
  561. static int sdhci_acpi_runtime_suspend(struct device *dev)
  562. {
  563. struct sdhci_acpi_host *c = dev_get_drvdata(dev);
  564. struct sdhci_host *host = c->host;
  565. if (host->tuning_mode != SDHCI_TUNING_MODE_3)
  566. mmc_retune_needed(host->mmc);
  567. return sdhci_runtime_suspend_host(host);
  568. }
  569. static int sdhci_acpi_runtime_resume(struct device *dev)
  570. {
  571. struct sdhci_acpi_host *c = dev_get_drvdata(dev);
  572. sdhci_acpi_byt_setting(&c->pdev->dev);
  573. return sdhci_runtime_resume_host(c->host);
  574. }
  575. #endif
  576. static const struct dev_pm_ops sdhci_acpi_pm_ops = {
  577. SET_SYSTEM_SLEEP_PM_OPS(sdhci_acpi_suspend, sdhci_acpi_resume)
  578. SET_RUNTIME_PM_OPS(sdhci_acpi_runtime_suspend,
  579. sdhci_acpi_runtime_resume, NULL)
  580. };
  581. static struct platform_driver sdhci_acpi_driver = {
  582. .driver = {
  583. .name = "sdhci-acpi",
  584. .acpi_match_table = sdhci_acpi_ids,
  585. .pm = &sdhci_acpi_pm_ops,
  586. },
  587. .probe = sdhci_acpi_probe,
  588. .remove = sdhci_acpi_remove,
  589. };
  590. module_platform_driver(sdhci_acpi_driver);
  591. MODULE_DESCRIPTION("Secure Digital Host Controller Interface ACPI driver");
  592. MODULE_AUTHOR("Adrian Hunter");
  593. MODULE_LICENSE("GPL v2");