vfio_pci.c 35 KB

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  1. /*
  2. * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
  3. * Author: Alex Williamson <alex.williamson@redhat.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * Derived from original vfio:
  10. * Copyright 2010 Cisco Systems, Inc. All rights reserved.
  11. * Author: Tom Lyon, pugs@cisco.com
  12. */
  13. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14. #include <linux/device.h>
  15. #include <linux/eventfd.h>
  16. #include <linux/file.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/iommu.h>
  19. #include <linux/module.h>
  20. #include <linux/mutex.h>
  21. #include <linux/notifier.h>
  22. #include <linux/pci.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/slab.h>
  25. #include <linux/types.h>
  26. #include <linux/uaccess.h>
  27. #include <linux/vfio.h>
  28. #include <linux/vgaarb.h>
  29. #include "vfio_pci_private.h"
  30. #define DRIVER_VERSION "0.2"
  31. #define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>"
  32. #define DRIVER_DESC "VFIO PCI - User Level meta-driver"
  33. static char ids[1024] __initdata;
  34. module_param_string(ids, ids, sizeof(ids), 0);
  35. MODULE_PARM_DESC(ids, "Initial PCI IDs to add to the vfio driver, format is \"vendor:device[:subvendor[:subdevice[:class[:class_mask]]]]\" and multiple comma separated entries can be specified");
  36. static bool nointxmask;
  37. module_param_named(nointxmask, nointxmask, bool, S_IRUGO | S_IWUSR);
  38. MODULE_PARM_DESC(nointxmask,
  39. "Disable support for PCI 2.3 style INTx masking. If this resolves problems for specific devices, report lspci -vvvxxx to linux-pci@vger.kernel.org so the device can be fixed automatically via the broken_intx_masking flag.");
  40. #ifdef CONFIG_VFIO_PCI_VGA
  41. static bool disable_vga;
  42. module_param(disable_vga, bool, S_IRUGO);
  43. MODULE_PARM_DESC(disable_vga, "Disable VGA resource access through vfio-pci");
  44. #endif
  45. static bool disable_idle_d3;
  46. module_param(disable_idle_d3, bool, S_IRUGO | S_IWUSR);
  47. MODULE_PARM_DESC(disable_idle_d3,
  48. "Disable using the PCI D3 low power state for idle, unused devices");
  49. static DEFINE_MUTEX(driver_lock);
  50. static inline bool vfio_vga_disabled(void)
  51. {
  52. #ifdef CONFIG_VFIO_PCI_VGA
  53. return disable_vga;
  54. #else
  55. return true;
  56. #endif
  57. }
  58. /*
  59. * Our VGA arbiter participation is limited since we don't know anything
  60. * about the device itself. However, if the device is the only VGA device
  61. * downstream of a bridge and VFIO VGA support is disabled, then we can
  62. * safely return legacy VGA IO and memory as not decoded since the user
  63. * has no way to get to it and routing can be disabled externally at the
  64. * bridge.
  65. */
  66. static unsigned int vfio_pci_set_vga_decode(void *opaque, bool single_vga)
  67. {
  68. struct vfio_pci_device *vdev = opaque;
  69. struct pci_dev *tmp = NULL, *pdev = vdev->pdev;
  70. unsigned char max_busnr;
  71. unsigned int decodes;
  72. if (single_vga || !vfio_vga_disabled() || pci_is_root_bus(pdev->bus))
  73. return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
  74. VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
  75. max_busnr = pci_bus_max_busnr(pdev->bus);
  76. decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
  77. while ((tmp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, tmp)) != NULL) {
  78. if (tmp == pdev ||
  79. pci_domain_nr(tmp->bus) != pci_domain_nr(pdev->bus) ||
  80. pci_is_root_bus(tmp->bus))
  81. continue;
  82. if (tmp->bus->number >= pdev->bus->number &&
  83. tmp->bus->number <= max_busnr) {
  84. pci_dev_put(tmp);
  85. decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
  86. break;
  87. }
  88. }
  89. return decodes;
  90. }
  91. static inline bool vfio_pci_is_vga(struct pci_dev *pdev)
  92. {
  93. return (pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA;
  94. }
  95. static void vfio_pci_probe_mmaps(struct vfio_pci_device *vdev)
  96. {
  97. struct resource *res;
  98. int bar;
  99. struct vfio_pci_dummy_resource *dummy_res;
  100. INIT_LIST_HEAD(&vdev->dummy_resources_list);
  101. for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
  102. res = vdev->pdev->resource + bar;
  103. if (!IS_ENABLED(CONFIG_VFIO_PCI_MMAP))
  104. goto no_mmap;
  105. if (!(res->flags & IORESOURCE_MEM))
  106. goto no_mmap;
  107. /*
  108. * The PCI core shouldn't set up a resource with a
  109. * type but zero size. But there may be bugs that
  110. * cause us to do that.
  111. */
  112. if (!resource_size(res))
  113. goto no_mmap;
  114. if (resource_size(res) >= PAGE_SIZE) {
  115. vdev->bar_mmap_supported[bar] = true;
  116. continue;
  117. }
  118. if (!(res->start & ~PAGE_MASK)) {
  119. /*
  120. * Add a dummy resource to reserve the remainder
  121. * of the exclusive page in case that hot-add
  122. * device's bar is assigned into it.
  123. */
  124. dummy_res = kzalloc(sizeof(*dummy_res), GFP_KERNEL);
  125. if (dummy_res == NULL)
  126. goto no_mmap;
  127. dummy_res->resource.name = "vfio sub-page reserved";
  128. dummy_res->resource.start = res->end + 1;
  129. dummy_res->resource.end = res->start + PAGE_SIZE - 1;
  130. dummy_res->resource.flags = res->flags;
  131. if (request_resource(res->parent,
  132. &dummy_res->resource)) {
  133. kfree(dummy_res);
  134. goto no_mmap;
  135. }
  136. dummy_res->index = bar;
  137. list_add(&dummy_res->res_next,
  138. &vdev->dummy_resources_list);
  139. vdev->bar_mmap_supported[bar] = true;
  140. continue;
  141. }
  142. /*
  143. * Here we don't handle the case when the BAR is not page
  144. * aligned because we can't expect the BAR will be
  145. * assigned into the same location in a page in guest
  146. * when we passthrough the BAR. And it's hard to access
  147. * this BAR in userspace because we have no way to get
  148. * the BAR's location in a page.
  149. */
  150. no_mmap:
  151. vdev->bar_mmap_supported[bar] = false;
  152. }
  153. }
  154. static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev);
  155. static void vfio_pci_disable(struct vfio_pci_device *vdev);
  156. /*
  157. * INTx masking requires the ability to disable INTx signaling via PCI_COMMAND
  158. * _and_ the ability detect when the device is asserting INTx via PCI_STATUS.
  159. * If a device implements the former but not the latter we would typically
  160. * expect broken_intx_masking be set and require an exclusive interrupt.
  161. * However since we do have control of the device's ability to assert INTx,
  162. * we can instead pretend that the device does not implement INTx, virtualizing
  163. * the pin register to report zero and maintaining DisINTx set on the host.
  164. */
  165. static bool vfio_pci_nointx(struct pci_dev *pdev)
  166. {
  167. switch (pdev->vendor) {
  168. case PCI_VENDOR_ID_INTEL:
  169. switch (pdev->device) {
  170. /* All i40e (XL710/X710/XXV710) 10/20/25/40GbE NICs */
  171. case 0x1572:
  172. case 0x1574:
  173. case 0x1580 ... 0x1581:
  174. case 0x1583 ... 0x158b:
  175. case 0x37d0 ... 0x37d2:
  176. return true;
  177. default:
  178. return false;
  179. }
  180. }
  181. if (!pdev->irq)
  182. return true;
  183. return false;
  184. }
  185. static int vfio_pci_enable(struct vfio_pci_device *vdev)
  186. {
  187. struct pci_dev *pdev = vdev->pdev;
  188. int ret;
  189. u16 cmd;
  190. u8 msix_pos;
  191. pci_set_power_state(pdev, PCI_D0);
  192. /* Don't allow our initial saved state to include busmaster */
  193. pci_clear_master(pdev);
  194. ret = pci_enable_device(pdev);
  195. if (ret)
  196. return ret;
  197. /* If reset fails because of the device lock, fail this path entirely */
  198. ret = pci_try_reset_function(pdev);
  199. if (ret == -EAGAIN) {
  200. pci_disable_device(pdev);
  201. return ret;
  202. }
  203. vdev->reset_works = !ret;
  204. pci_save_state(pdev);
  205. vdev->pci_saved_state = pci_store_saved_state(pdev);
  206. if (!vdev->pci_saved_state)
  207. pr_debug("%s: Couldn't store %s saved state\n",
  208. __func__, dev_name(&pdev->dev));
  209. if (likely(!nointxmask)) {
  210. if (vfio_pci_nointx(pdev)) {
  211. dev_info(&pdev->dev, "Masking broken INTx support\n");
  212. vdev->nointx = true;
  213. pci_intx(pdev, 0);
  214. } else
  215. vdev->pci_2_3 = pci_intx_mask_supported(pdev);
  216. }
  217. pci_read_config_word(pdev, PCI_COMMAND, &cmd);
  218. if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) {
  219. cmd &= ~PCI_COMMAND_INTX_DISABLE;
  220. pci_write_config_word(pdev, PCI_COMMAND, cmd);
  221. }
  222. ret = vfio_config_init(vdev);
  223. if (ret) {
  224. kfree(vdev->pci_saved_state);
  225. vdev->pci_saved_state = NULL;
  226. pci_disable_device(pdev);
  227. return ret;
  228. }
  229. msix_pos = pdev->msix_cap;
  230. if (msix_pos) {
  231. u16 flags;
  232. u32 table;
  233. pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags);
  234. pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table);
  235. vdev->msix_bar = table & PCI_MSIX_TABLE_BIR;
  236. vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET;
  237. vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16;
  238. } else
  239. vdev->msix_bar = 0xFF;
  240. if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev))
  241. vdev->has_vga = true;
  242. if (vfio_pci_is_vga(pdev) &&
  243. pdev->vendor == PCI_VENDOR_ID_INTEL &&
  244. IS_ENABLED(CONFIG_VFIO_PCI_IGD)) {
  245. ret = vfio_pci_igd_init(vdev);
  246. if (ret) {
  247. dev_warn(&vdev->pdev->dev,
  248. "Failed to setup Intel IGD regions\n");
  249. vfio_pci_disable(vdev);
  250. return ret;
  251. }
  252. }
  253. vfio_pci_probe_mmaps(vdev);
  254. return 0;
  255. }
  256. static void vfio_pci_disable(struct vfio_pci_device *vdev)
  257. {
  258. struct pci_dev *pdev = vdev->pdev;
  259. struct vfio_pci_dummy_resource *dummy_res, *tmp;
  260. int i, bar;
  261. /* Stop the device from further DMA */
  262. pci_clear_master(pdev);
  263. vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE |
  264. VFIO_IRQ_SET_ACTION_TRIGGER,
  265. vdev->irq_type, 0, 0, NULL);
  266. vdev->virq_disabled = false;
  267. for (i = 0; i < vdev->num_regions; i++)
  268. vdev->region[i].ops->release(vdev, &vdev->region[i]);
  269. vdev->num_regions = 0;
  270. kfree(vdev->region);
  271. vdev->region = NULL; /* don't krealloc a freed pointer */
  272. vfio_config_free(vdev);
  273. for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
  274. if (!vdev->barmap[bar])
  275. continue;
  276. pci_iounmap(pdev, vdev->barmap[bar]);
  277. pci_release_selected_regions(pdev, 1 << bar);
  278. vdev->barmap[bar] = NULL;
  279. }
  280. list_for_each_entry_safe(dummy_res, tmp,
  281. &vdev->dummy_resources_list, res_next) {
  282. list_del(&dummy_res->res_next);
  283. release_resource(&dummy_res->resource);
  284. kfree(dummy_res);
  285. }
  286. vdev->needs_reset = true;
  287. /*
  288. * If we have saved state, restore it. If we can reset the device,
  289. * even better. Resetting with current state seems better than
  290. * nothing, but saving and restoring current state without reset
  291. * is just busy work.
  292. */
  293. if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) {
  294. pr_info("%s: Couldn't reload %s saved state\n",
  295. __func__, dev_name(&pdev->dev));
  296. if (!vdev->reset_works)
  297. goto out;
  298. pci_save_state(pdev);
  299. }
  300. /*
  301. * Disable INTx and MSI, presumably to avoid spurious interrupts
  302. * during reset. Stolen from pci_reset_function()
  303. */
  304. pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
  305. /*
  306. * Try to reset the device. The success of this is dependent on
  307. * being able to lock the device, which is not always possible.
  308. */
  309. if (vdev->reset_works && !pci_try_reset_function(pdev))
  310. vdev->needs_reset = false;
  311. pci_restore_state(pdev);
  312. out:
  313. pci_disable_device(pdev);
  314. vfio_pci_try_bus_reset(vdev);
  315. if (!disable_idle_d3)
  316. pci_set_power_state(pdev, PCI_D3hot);
  317. }
  318. static void vfio_pci_release(void *device_data)
  319. {
  320. struct vfio_pci_device *vdev = device_data;
  321. mutex_lock(&driver_lock);
  322. if (!(--vdev->refcnt)) {
  323. vfio_spapr_pci_eeh_release(vdev->pdev);
  324. vfio_pci_disable(vdev);
  325. }
  326. mutex_unlock(&driver_lock);
  327. module_put(THIS_MODULE);
  328. }
  329. static int vfio_pci_open(void *device_data)
  330. {
  331. struct vfio_pci_device *vdev = device_data;
  332. int ret = 0;
  333. if (!try_module_get(THIS_MODULE))
  334. return -ENODEV;
  335. mutex_lock(&driver_lock);
  336. if (!vdev->refcnt) {
  337. ret = vfio_pci_enable(vdev);
  338. if (ret)
  339. goto error;
  340. vfio_spapr_pci_eeh_open(vdev->pdev);
  341. }
  342. vdev->refcnt++;
  343. error:
  344. mutex_unlock(&driver_lock);
  345. if (ret)
  346. module_put(THIS_MODULE);
  347. return ret;
  348. }
  349. static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
  350. {
  351. if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) {
  352. u8 pin;
  353. pci_read_config_byte(vdev->pdev, PCI_INTERRUPT_PIN, &pin);
  354. if (IS_ENABLED(CONFIG_VFIO_PCI_INTX) && !vdev->nointx && pin)
  355. return 1;
  356. } else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) {
  357. u8 pos;
  358. u16 flags;
  359. pos = vdev->pdev->msi_cap;
  360. if (pos) {
  361. pci_read_config_word(vdev->pdev,
  362. pos + PCI_MSI_FLAGS, &flags);
  363. return 1 << ((flags & PCI_MSI_FLAGS_QMASK) >> 1);
  364. }
  365. } else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) {
  366. u8 pos;
  367. u16 flags;
  368. pos = vdev->pdev->msix_cap;
  369. if (pos) {
  370. pci_read_config_word(vdev->pdev,
  371. pos + PCI_MSIX_FLAGS, &flags);
  372. return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
  373. }
  374. } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) {
  375. if (pci_is_pcie(vdev->pdev))
  376. return 1;
  377. } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) {
  378. return 1;
  379. }
  380. return 0;
  381. }
  382. static int vfio_pci_count_devs(struct pci_dev *pdev, void *data)
  383. {
  384. (*(int *)data)++;
  385. return 0;
  386. }
  387. struct vfio_pci_fill_info {
  388. int max;
  389. int cur;
  390. struct vfio_pci_dependent_device *devices;
  391. };
  392. static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data)
  393. {
  394. struct vfio_pci_fill_info *fill = data;
  395. struct iommu_group *iommu_group;
  396. if (fill->cur == fill->max)
  397. return -EAGAIN; /* Something changed, try again */
  398. iommu_group = iommu_group_get(&pdev->dev);
  399. if (!iommu_group)
  400. return -EPERM; /* Cannot reset non-isolated devices */
  401. fill->devices[fill->cur].group_id = iommu_group_id(iommu_group);
  402. fill->devices[fill->cur].segment = pci_domain_nr(pdev->bus);
  403. fill->devices[fill->cur].bus = pdev->bus->number;
  404. fill->devices[fill->cur].devfn = pdev->devfn;
  405. fill->cur++;
  406. iommu_group_put(iommu_group);
  407. return 0;
  408. }
  409. struct vfio_pci_group_entry {
  410. struct vfio_group *group;
  411. int id;
  412. };
  413. struct vfio_pci_group_info {
  414. int count;
  415. struct vfio_pci_group_entry *groups;
  416. };
  417. static int vfio_pci_validate_devs(struct pci_dev *pdev, void *data)
  418. {
  419. struct vfio_pci_group_info *info = data;
  420. struct iommu_group *group;
  421. int id, i;
  422. group = iommu_group_get(&pdev->dev);
  423. if (!group)
  424. return -EPERM;
  425. id = iommu_group_id(group);
  426. for (i = 0; i < info->count; i++)
  427. if (info->groups[i].id == id)
  428. break;
  429. iommu_group_put(group);
  430. return (i == info->count) ? -EINVAL : 0;
  431. }
  432. static bool vfio_pci_dev_below_slot(struct pci_dev *pdev, struct pci_slot *slot)
  433. {
  434. for (; pdev; pdev = pdev->bus->self)
  435. if (pdev->bus == slot->bus)
  436. return (pdev->slot == slot);
  437. return false;
  438. }
  439. struct vfio_pci_walk_info {
  440. int (*fn)(struct pci_dev *, void *data);
  441. void *data;
  442. struct pci_dev *pdev;
  443. bool slot;
  444. int ret;
  445. };
  446. static int vfio_pci_walk_wrapper(struct pci_dev *pdev, void *data)
  447. {
  448. struct vfio_pci_walk_info *walk = data;
  449. if (!walk->slot || vfio_pci_dev_below_slot(pdev, walk->pdev->slot))
  450. walk->ret = walk->fn(pdev, walk->data);
  451. return walk->ret;
  452. }
  453. static int vfio_pci_for_each_slot_or_bus(struct pci_dev *pdev,
  454. int (*fn)(struct pci_dev *,
  455. void *data), void *data,
  456. bool slot)
  457. {
  458. struct vfio_pci_walk_info walk = {
  459. .fn = fn, .data = data, .pdev = pdev, .slot = slot, .ret = 0,
  460. };
  461. pci_walk_bus(pdev->bus, vfio_pci_walk_wrapper, &walk);
  462. return walk.ret;
  463. }
  464. static int msix_mmappable_cap(struct vfio_pci_device *vdev,
  465. struct vfio_info_cap *caps)
  466. {
  467. struct vfio_info_cap_header header = {
  468. .id = VFIO_REGION_INFO_CAP_MSIX_MAPPABLE,
  469. .version = 1
  470. };
  471. return vfio_info_add_capability(caps, &header, sizeof(header));
  472. }
  473. int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
  474. unsigned int type, unsigned int subtype,
  475. const struct vfio_pci_regops *ops,
  476. size_t size, u32 flags, void *data)
  477. {
  478. struct vfio_pci_region *region;
  479. region = krealloc(vdev->region,
  480. (vdev->num_regions + 1) * sizeof(*region),
  481. GFP_KERNEL);
  482. if (!region)
  483. return -ENOMEM;
  484. vdev->region = region;
  485. vdev->region[vdev->num_regions].type = type;
  486. vdev->region[vdev->num_regions].subtype = subtype;
  487. vdev->region[vdev->num_regions].ops = ops;
  488. vdev->region[vdev->num_regions].size = size;
  489. vdev->region[vdev->num_regions].flags = flags;
  490. vdev->region[vdev->num_regions].data = data;
  491. vdev->num_regions++;
  492. return 0;
  493. }
  494. static long vfio_pci_ioctl(void *device_data,
  495. unsigned int cmd, unsigned long arg)
  496. {
  497. struct vfio_pci_device *vdev = device_data;
  498. unsigned long minsz;
  499. if (cmd == VFIO_DEVICE_GET_INFO) {
  500. struct vfio_device_info info;
  501. minsz = offsetofend(struct vfio_device_info, num_irqs);
  502. if (copy_from_user(&info, (void __user *)arg, minsz))
  503. return -EFAULT;
  504. if (info.argsz < minsz)
  505. return -EINVAL;
  506. info.flags = VFIO_DEVICE_FLAGS_PCI;
  507. if (vdev->reset_works)
  508. info.flags |= VFIO_DEVICE_FLAGS_RESET;
  509. info.num_regions = VFIO_PCI_NUM_REGIONS + vdev->num_regions;
  510. info.num_irqs = VFIO_PCI_NUM_IRQS;
  511. return copy_to_user((void __user *)arg, &info, minsz) ?
  512. -EFAULT : 0;
  513. } else if (cmd == VFIO_DEVICE_GET_REGION_INFO) {
  514. struct pci_dev *pdev = vdev->pdev;
  515. struct vfio_region_info info;
  516. struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
  517. int i, ret;
  518. minsz = offsetofend(struct vfio_region_info, offset);
  519. if (copy_from_user(&info, (void __user *)arg, minsz))
  520. return -EFAULT;
  521. if (info.argsz < minsz)
  522. return -EINVAL;
  523. switch (info.index) {
  524. case VFIO_PCI_CONFIG_REGION_INDEX:
  525. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  526. info.size = pdev->cfg_size;
  527. info.flags = VFIO_REGION_INFO_FLAG_READ |
  528. VFIO_REGION_INFO_FLAG_WRITE;
  529. break;
  530. case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
  531. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  532. info.size = pci_resource_len(pdev, info.index);
  533. if (!info.size) {
  534. info.flags = 0;
  535. break;
  536. }
  537. info.flags = VFIO_REGION_INFO_FLAG_READ |
  538. VFIO_REGION_INFO_FLAG_WRITE;
  539. if (vdev->bar_mmap_supported[info.index]) {
  540. info.flags |= VFIO_REGION_INFO_FLAG_MMAP;
  541. if (info.index == vdev->msix_bar) {
  542. ret = msix_mmappable_cap(vdev, &caps);
  543. if (ret)
  544. return ret;
  545. }
  546. }
  547. break;
  548. case VFIO_PCI_ROM_REGION_INDEX:
  549. {
  550. void __iomem *io;
  551. size_t size;
  552. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  553. info.flags = 0;
  554. /* Report the BAR size, not the ROM size */
  555. info.size = pci_resource_len(pdev, info.index);
  556. if (!info.size) {
  557. /* Shadow ROMs appear as PCI option ROMs */
  558. if (pdev->resource[PCI_ROM_RESOURCE].flags &
  559. IORESOURCE_ROM_SHADOW)
  560. info.size = 0x20000;
  561. else
  562. break;
  563. }
  564. /* Is it really there? */
  565. io = pci_map_rom(pdev, &size);
  566. if (!io || !size) {
  567. info.size = 0;
  568. break;
  569. }
  570. pci_unmap_rom(pdev, io);
  571. info.flags = VFIO_REGION_INFO_FLAG_READ;
  572. break;
  573. }
  574. case VFIO_PCI_VGA_REGION_INDEX:
  575. if (!vdev->has_vga)
  576. return -EINVAL;
  577. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  578. info.size = 0xc0000;
  579. info.flags = VFIO_REGION_INFO_FLAG_READ |
  580. VFIO_REGION_INFO_FLAG_WRITE;
  581. break;
  582. default:
  583. {
  584. struct vfio_region_info_cap_type cap_type = {
  585. .header.id = VFIO_REGION_INFO_CAP_TYPE,
  586. .header.version = 1 };
  587. if (info.index >=
  588. VFIO_PCI_NUM_REGIONS + vdev->num_regions)
  589. return -EINVAL;
  590. i = info.index - VFIO_PCI_NUM_REGIONS;
  591. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  592. info.size = vdev->region[i].size;
  593. info.flags = vdev->region[i].flags;
  594. cap_type.type = vdev->region[i].type;
  595. cap_type.subtype = vdev->region[i].subtype;
  596. ret = vfio_info_add_capability(&caps, &cap_type.header,
  597. sizeof(cap_type));
  598. if (ret)
  599. return ret;
  600. }
  601. }
  602. if (caps.size) {
  603. info.flags |= VFIO_REGION_INFO_FLAG_CAPS;
  604. if (info.argsz < sizeof(info) + caps.size) {
  605. info.argsz = sizeof(info) + caps.size;
  606. info.cap_offset = 0;
  607. } else {
  608. vfio_info_cap_shift(&caps, sizeof(info));
  609. if (copy_to_user((void __user *)arg +
  610. sizeof(info), caps.buf,
  611. caps.size)) {
  612. kfree(caps.buf);
  613. return -EFAULT;
  614. }
  615. info.cap_offset = sizeof(info);
  616. }
  617. kfree(caps.buf);
  618. }
  619. return copy_to_user((void __user *)arg, &info, minsz) ?
  620. -EFAULT : 0;
  621. } else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) {
  622. struct vfio_irq_info info;
  623. minsz = offsetofend(struct vfio_irq_info, count);
  624. if (copy_from_user(&info, (void __user *)arg, minsz))
  625. return -EFAULT;
  626. if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
  627. return -EINVAL;
  628. switch (info.index) {
  629. case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
  630. case VFIO_PCI_REQ_IRQ_INDEX:
  631. break;
  632. case VFIO_PCI_ERR_IRQ_INDEX:
  633. if (pci_is_pcie(vdev->pdev))
  634. break;
  635. /* pass thru to return error */
  636. default:
  637. return -EINVAL;
  638. }
  639. info.flags = VFIO_IRQ_INFO_EVENTFD;
  640. info.count = vfio_pci_get_irq_count(vdev, info.index);
  641. if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
  642. info.flags |= (VFIO_IRQ_INFO_MASKABLE |
  643. VFIO_IRQ_INFO_AUTOMASKED);
  644. else
  645. info.flags |= VFIO_IRQ_INFO_NORESIZE;
  646. return copy_to_user((void __user *)arg, &info, minsz) ?
  647. -EFAULT : 0;
  648. } else if (cmd == VFIO_DEVICE_SET_IRQS) {
  649. struct vfio_irq_set hdr;
  650. u8 *data = NULL;
  651. int max, ret = 0;
  652. size_t data_size = 0;
  653. minsz = offsetofend(struct vfio_irq_set, count);
  654. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  655. return -EFAULT;
  656. max = vfio_pci_get_irq_count(vdev, hdr.index);
  657. ret = vfio_set_irqs_validate_and_prepare(&hdr, max,
  658. VFIO_PCI_NUM_IRQS, &data_size);
  659. if (ret)
  660. return ret;
  661. if (data_size) {
  662. data = memdup_user((void __user *)(arg + minsz),
  663. data_size);
  664. if (IS_ERR(data))
  665. return PTR_ERR(data);
  666. }
  667. mutex_lock(&vdev->igate);
  668. ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index,
  669. hdr.start, hdr.count, data);
  670. mutex_unlock(&vdev->igate);
  671. kfree(data);
  672. return ret;
  673. } else if (cmd == VFIO_DEVICE_RESET) {
  674. return vdev->reset_works ?
  675. pci_try_reset_function(vdev->pdev) : -EINVAL;
  676. } else if (cmd == VFIO_DEVICE_GET_PCI_HOT_RESET_INFO) {
  677. struct vfio_pci_hot_reset_info hdr;
  678. struct vfio_pci_fill_info fill = { 0 };
  679. struct vfio_pci_dependent_device *devices = NULL;
  680. bool slot = false;
  681. int ret = 0;
  682. minsz = offsetofend(struct vfio_pci_hot_reset_info, count);
  683. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  684. return -EFAULT;
  685. if (hdr.argsz < minsz)
  686. return -EINVAL;
  687. hdr.flags = 0;
  688. /* Can we do a slot or bus reset or neither? */
  689. if (!pci_probe_reset_slot(vdev->pdev->slot))
  690. slot = true;
  691. else if (pci_probe_reset_bus(vdev->pdev->bus))
  692. return -ENODEV;
  693. /* How many devices are affected? */
  694. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  695. vfio_pci_count_devs,
  696. &fill.max, slot);
  697. if (ret)
  698. return ret;
  699. WARN_ON(!fill.max); /* Should always be at least one */
  700. /*
  701. * If there's enough space, fill it now, otherwise return
  702. * -ENOSPC and the number of devices affected.
  703. */
  704. if (hdr.argsz < sizeof(hdr) + (fill.max * sizeof(*devices))) {
  705. ret = -ENOSPC;
  706. hdr.count = fill.max;
  707. goto reset_info_exit;
  708. }
  709. devices = kcalloc(fill.max, sizeof(*devices), GFP_KERNEL);
  710. if (!devices)
  711. return -ENOMEM;
  712. fill.devices = devices;
  713. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  714. vfio_pci_fill_devs,
  715. &fill, slot);
  716. /*
  717. * If a device was removed between counting and filling,
  718. * we may come up short of fill.max. If a device was
  719. * added, we'll have a return of -EAGAIN above.
  720. */
  721. if (!ret)
  722. hdr.count = fill.cur;
  723. reset_info_exit:
  724. if (copy_to_user((void __user *)arg, &hdr, minsz))
  725. ret = -EFAULT;
  726. if (!ret) {
  727. if (copy_to_user((void __user *)(arg + minsz), devices,
  728. hdr.count * sizeof(*devices)))
  729. ret = -EFAULT;
  730. }
  731. kfree(devices);
  732. return ret;
  733. } else if (cmd == VFIO_DEVICE_PCI_HOT_RESET) {
  734. struct vfio_pci_hot_reset hdr;
  735. int32_t *group_fds;
  736. struct vfio_pci_group_entry *groups;
  737. struct vfio_pci_group_info info;
  738. bool slot = false;
  739. int i, count = 0, ret = 0;
  740. minsz = offsetofend(struct vfio_pci_hot_reset, count);
  741. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  742. return -EFAULT;
  743. if (hdr.argsz < minsz || hdr.flags)
  744. return -EINVAL;
  745. /* Can we do a slot or bus reset or neither? */
  746. if (!pci_probe_reset_slot(vdev->pdev->slot))
  747. slot = true;
  748. else if (pci_probe_reset_bus(vdev->pdev->bus))
  749. return -ENODEV;
  750. /*
  751. * We can't let userspace give us an arbitrarily large
  752. * buffer to copy, so verify how many we think there
  753. * could be. Note groups can have multiple devices so
  754. * one group per device is the max.
  755. */
  756. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  757. vfio_pci_count_devs,
  758. &count, slot);
  759. if (ret)
  760. return ret;
  761. /* Somewhere between 1 and count is OK */
  762. if (!hdr.count || hdr.count > count)
  763. return -EINVAL;
  764. group_fds = kcalloc(hdr.count, sizeof(*group_fds), GFP_KERNEL);
  765. groups = kcalloc(hdr.count, sizeof(*groups), GFP_KERNEL);
  766. if (!group_fds || !groups) {
  767. kfree(group_fds);
  768. kfree(groups);
  769. return -ENOMEM;
  770. }
  771. if (copy_from_user(group_fds, (void __user *)(arg + minsz),
  772. hdr.count * sizeof(*group_fds))) {
  773. kfree(group_fds);
  774. kfree(groups);
  775. return -EFAULT;
  776. }
  777. /*
  778. * For each group_fd, get the group through the vfio external
  779. * user interface and store the group and iommu ID. This
  780. * ensures the group is held across the reset.
  781. */
  782. for (i = 0; i < hdr.count; i++) {
  783. struct vfio_group *group;
  784. struct fd f = fdget(group_fds[i]);
  785. if (!f.file) {
  786. ret = -EBADF;
  787. break;
  788. }
  789. group = vfio_group_get_external_user(f.file);
  790. fdput(f);
  791. if (IS_ERR(group)) {
  792. ret = PTR_ERR(group);
  793. break;
  794. }
  795. groups[i].group = group;
  796. groups[i].id = vfio_external_user_iommu_id(group);
  797. }
  798. kfree(group_fds);
  799. /* release reference to groups on error */
  800. if (ret)
  801. goto hot_reset_release;
  802. info.count = hdr.count;
  803. info.groups = groups;
  804. /*
  805. * Test whether all the affected devices are contained
  806. * by the set of groups provided by the user.
  807. */
  808. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  809. vfio_pci_validate_devs,
  810. &info, slot);
  811. if (!ret)
  812. /* User has access, do the reset */
  813. ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
  814. pci_try_reset_bus(vdev->pdev->bus);
  815. hot_reset_release:
  816. for (i--; i >= 0; i--)
  817. vfio_group_put_external_user(groups[i].group);
  818. kfree(groups);
  819. return ret;
  820. }
  821. return -ENOTTY;
  822. }
  823. static ssize_t vfio_pci_rw(void *device_data, char __user *buf,
  824. size_t count, loff_t *ppos, bool iswrite)
  825. {
  826. unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
  827. struct vfio_pci_device *vdev = device_data;
  828. if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
  829. return -EINVAL;
  830. switch (index) {
  831. case VFIO_PCI_CONFIG_REGION_INDEX:
  832. return vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);
  833. case VFIO_PCI_ROM_REGION_INDEX:
  834. if (iswrite)
  835. return -EINVAL;
  836. return vfio_pci_bar_rw(vdev, buf, count, ppos, false);
  837. case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
  838. return vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);
  839. case VFIO_PCI_VGA_REGION_INDEX:
  840. return vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite);
  841. default:
  842. index -= VFIO_PCI_NUM_REGIONS;
  843. return vdev->region[index].ops->rw(vdev, buf,
  844. count, ppos, iswrite);
  845. }
  846. return -EINVAL;
  847. }
  848. static ssize_t vfio_pci_read(void *device_data, char __user *buf,
  849. size_t count, loff_t *ppos)
  850. {
  851. if (!count)
  852. return 0;
  853. return vfio_pci_rw(device_data, buf, count, ppos, false);
  854. }
  855. static ssize_t vfio_pci_write(void *device_data, const char __user *buf,
  856. size_t count, loff_t *ppos)
  857. {
  858. if (!count)
  859. return 0;
  860. return vfio_pci_rw(device_data, (char __user *)buf, count, ppos, true);
  861. }
  862. static int vfio_pci_mmap(void *device_data, struct vm_area_struct *vma)
  863. {
  864. struct vfio_pci_device *vdev = device_data;
  865. struct pci_dev *pdev = vdev->pdev;
  866. unsigned int index;
  867. u64 phys_len, req_len, pgoff, req_start;
  868. int ret;
  869. index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
  870. if (vma->vm_end < vma->vm_start)
  871. return -EINVAL;
  872. if ((vma->vm_flags & VM_SHARED) == 0)
  873. return -EINVAL;
  874. if (index >= VFIO_PCI_ROM_REGION_INDEX)
  875. return -EINVAL;
  876. if (!vdev->bar_mmap_supported[index])
  877. return -EINVAL;
  878. phys_len = PAGE_ALIGN(pci_resource_len(pdev, index));
  879. req_len = vma->vm_end - vma->vm_start;
  880. pgoff = vma->vm_pgoff &
  881. ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
  882. req_start = pgoff << PAGE_SHIFT;
  883. if (req_start + req_len > phys_len)
  884. return -EINVAL;
  885. /*
  886. * Even though we don't make use of the barmap for the mmap,
  887. * we need to request the region and the barmap tracks that.
  888. */
  889. if (!vdev->barmap[index]) {
  890. ret = pci_request_selected_regions(pdev,
  891. 1 << index, "vfio-pci");
  892. if (ret)
  893. return ret;
  894. vdev->barmap[index] = pci_iomap(pdev, index, 0);
  895. if (!vdev->barmap[index]) {
  896. pci_release_selected_regions(pdev, 1 << index);
  897. return -ENOMEM;
  898. }
  899. }
  900. vma->vm_private_data = vdev;
  901. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  902. vma->vm_pgoff = (pci_resource_start(pdev, index) >> PAGE_SHIFT) + pgoff;
  903. return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
  904. req_len, vma->vm_page_prot);
  905. }
  906. static void vfio_pci_request(void *device_data, unsigned int count)
  907. {
  908. struct vfio_pci_device *vdev = device_data;
  909. mutex_lock(&vdev->igate);
  910. if (vdev->req_trigger) {
  911. if (!(count % 10))
  912. dev_notice_ratelimited(&vdev->pdev->dev,
  913. "Relaying device request to user (#%u)\n",
  914. count);
  915. eventfd_signal(vdev->req_trigger, 1);
  916. } else if (count == 0) {
  917. dev_warn(&vdev->pdev->dev,
  918. "No device request channel registered, blocked until released by user\n");
  919. }
  920. mutex_unlock(&vdev->igate);
  921. }
  922. static const struct vfio_device_ops vfio_pci_ops = {
  923. .name = "vfio-pci",
  924. .open = vfio_pci_open,
  925. .release = vfio_pci_release,
  926. .ioctl = vfio_pci_ioctl,
  927. .read = vfio_pci_read,
  928. .write = vfio_pci_write,
  929. .mmap = vfio_pci_mmap,
  930. .request = vfio_pci_request,
  931. };
  932. static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  933. {
  934. struct vfio_pci_device *vdev;
  935. struct iommu_group *group;
  936. int ret;
  937. if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL)
  938. return -EINVAL;
  939. group = vfio_iommu_group_get(&pdev->dev);
  940. if (!group)
  941. return -EINVAL;
  942. vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
  943. if (!vdev) {
  944. vfio_iommu_group_put(group, &pdev->dev);
  945. return -ENOMEM;
  946. }
  947. vdev->pdev = pdev;
  948. vdev->irq_type = VFIO_PCI_NUM_IRQS;
  949. mutex_init(&vdev->igate);
  950. spin_lock_init(&vdev->irqlock);
  951. ret = vfio_add_group_dev(&pdev->dev, &vfio_pci_ops, vdev);
  952. if (ret) {
  953. vfio_iommu_group_put(group, &pdev->dev);
  954. kfree(vdev);
  955. return ret;
  956. }
  957. if (vfio_pci_is_vga(pdev)) {
  958. vga_client_register(pdev, vdev, NULL, vfio_pci_set_vga_decode);
  959. vga_set_legacy_decoding(pdev,
  960. vfio_pci_set_vga_decode(vdev, false));
  961. }
  962. if (!disable_idle_d3) {
  963. /*
  964. * pci-core sets the device power state to an unknown value at
  965. * bootup and after being removed from a driver. The only
  966. * transition it allows from this unknown state is to D0, which
  967. * typically happens when a driver calls pci_enable_device().
  968. * We're not ready to enable the device yet, but we do want to
  969. * be able to get to D3. Therefore first do a D0 transition
  970. * before going to D3.
  971. */
  972. pci_set_power_state(pdev, PCI_D0);
  973. pci_set_power_state(pdev, PCI_D3hot);
  974. }
  975. return ret;
  976. }
  977. static void vfio_pci_remove(struct pci_dev *pdev)
  978. {
  979. struct vfio_pci_device *vdev;
  980. vdev = vfio_del_group_dev(&pdev->dev);
  981. if (!vdev)
  982. return;
  983. vfio_iommu_group_put(pdev->dev.iommu_group, &pdev->dev);
  984. kfree(vdev->region);
  985. kfree(vdev);
  986. if (vfio_pci_is_vga(pdev)) {
  987. vga_client_register(pdev, NULL, NULL, NULL);
  988. vga_set_legacy_decoding(pdev,
  989. VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
  990. VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM);
  991. }
  992. if (!disable_idle_d3)
  993. pci_set_power_state(pdev, PCI_D0);
  994. }
  995. static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev,
  996. pci_channel_state_t state)
  997. {
  998. struct vfio_pci_device *vdev;
  999. struct vfio_device *device;
  1000. device = vfio_device_get_from_dev(&pdev->dev);
  1001. if (device == NULL)
  1002. return PCI_ERS_RESULT_DISCONNECT;
  1003. vdev = vfio_device_data(device);
  1004. if (vdev == NULL) {
  1005. vfio_device_put(device);
  1006. return PCI_ERS_RESULT_DISCONNECT;
  1007. }
  1008. mutex_lock(&vdev->igate);
  1009. if (vdev->err_trigger)
  1010. eventfd_signal(vdev->err_trigger, 1);
  1011. mutex_unlock(&vdev->igate);
  1012. vfio_device_put(device);
  1013. return PCI_ERS_RESULT_CAN_RECOVER;
  1014. }
  1015. static const struct pci_error_handlers vfio_err_handlers = {
  1016. .error_detected = vfio_pci_aer_err_detected,
  1017. };
  1018. static struct pci_driver vfio_pci_driver = {
  1019. .name = "vfio-pci",
  1020. .id_table = NULL, /* only dynamic ids */
  1021. .probe = vfio_pci_probe,
  1022. .remove = vfio_pci_remove,
  1023. .err_handler = &vfio_err_handlers,
  1024. };
  1025. struct vfio_devices {
  1026. struct vfio_device **devices;
  1027. int cur_index;
  1028. int max_index;
  1029. };
  1030. static int vfio_pci_get_devs(struct pci_dev *pdev, void *data)
  1031. {
  1032. struct vfio_devices *devs = data;
  1033. struct vfio_device *device;
  1034. if (devs->cur_index == devs->max_index)
  1035. return -ENOSPC;
  1036. device = vfio_device_get_from_dev(&pdev->dev);
  1037. if (!device)
  1038. return -EINVAL;
  1039. if (pci_dev_driver(pdev) != &vfio_pci_driver) {
  1040. vfio_device_put(device);
  1041. return -EBUSY;
  1042. }
  1043. devs->devices[devs->cur_index++] = device;
  1044. return 0;
  1045. }
  1046. /*
  1047. * Attempt to do a bus/slot reset if there are devices affected by a reset for
  1048. * this device that are needs_reset and all of the affected devices are unused
  1049. * (!refcnt). Callers are required to hold driver_lock when calling this to
  1050. * prevent device opens and concurrent bus reset attempts. We prevent device
  1051. * unbinds by acquiring and holding a reference to the vfio_device.
  1052. *
  1053. * NB: vfio-core considers a group to be viable even if some devices are
  1054. * bound to drivers like pci-stub or pcieport. Here we require all devices
  1055. * to be bound to vfio_pci since that's the only way we can be sure they
  1056. * stay put.
  1057. */
  1058. static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev)
  1059. {
  1060. struct vfio_devices devs = { .cur_index = 0 };
  1061. int i = 0, ret = -EINVAL;
  1062. bool needs_reset = false, slot = false;
  1063. struct vfio_pci_device *tmp;
  1064. if (!pci_probe_reset_slot(vdev->pdev->slot))
  1065. slot = true;
  1066. else if (pci_probe_reset_bus(vdev->pdev->bus))
  1067. return;
  1068. if (vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
  1069. &i, slot) || !i)
  1070. return;
  1071. devs.max_index = i;
  1072. devs.devices = kcalloc(i, sizeof(struct vfio_device *), GFP_KERNEL);
  1073. if (!devs.devices)
  1074. return;
  1075. if (vfio_pci_for_each_slot_or_bus(vdev->pdev,
  1076. vfio_pci_get_devs, &devs, slot))
  1077. goto put_devs;
  1078. for (i = 0; i < devs.cur_index; i++) {
  1079. tmp = vfio_device_data(devs.devices[i]);
  1080. if (tmp->needs_reset)
  1081. needs_reset = true;
  1082. if (tmp->refcnt)
  1083. goto put_devs;
  1084. }
  1085. if (needs_reset)
  1086. ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
  1087. pci_try_reset_bus(vdev->pdev->bus);
  1088. put_devs:
  1089. for (i = 0; i < devs.cur_index; i++) {
  1090. tmp = vfio_device_data(devs.devices[i]);
  1091. if (!ret)
  1092. tmp->needs_reset = false;
  1093. if (!tmp->refcnt && !disable_idle_d3)
  1094. pci_set_power_state(tmp->pdev, PCI_D3hot);
  1095. vfio_device_put(devs.devices[i]);
  1096. }
  1097. kfree(devs.devices);
  1098. }
  1099. static void __exit vfio_pci_cleanup(void)
  1100. {
  1101. pci_unregister_driver(&vfio_pci_driver);
  1102. vfio_pci_uninit_perm_bits();
  1103. }
  1104. static void __init vfio_pci_fill_ids(void)
  1105. {
  1106. char *p, *id;
  1107. int rc;
  1108. /* no ids passed actually */
  1109. if (ids[0] == '\0')
  1110. return;
  1111. /* add ids specified in the module parameter */
  1112. p = ids;
  1113. while ((id = strsep(&p, ","))) {
  1114. unsigned int vendor, device, subvendor = PCI_ANY_ID,
  1115. subdevice = PCI_ANY_ID, class = 0, class_mask = 0;
  1116. int fields;
  1117. if (!strlen(id))
  1118. continue;
  1119. fields = sscanf(id, "%x:%x:%x:%x:%x:%x",
  1120. &vendor, &device, &subvendor, &subdevice,
  1121. &class, &class_mask);
  1122. if (fields < 2) {
  1123. pr_warn("invalid id string \"%s\"\n", id);
  1124. continue;
  1125. }
  1126. rc = pci_add_dynid(&vfio_pci_driver, vendor, device,
  1127. subvendor, subdevice, class, class_mask, 0);
  1128. if (rc)
  1129. pr_warn("failed to add dynamic id [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x (%d)\n",
  1130. vendor, device, subvendor, subdevice,
  1131. class, class_mask, rc);
  1132. else
  1133. pr_info("add [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x\n",
  1134. vendor, device, subvendor, subdevice,
  1135. class, class_mask);
  1136. }
  1137. }
  1138. static int __init vfio_pci_init(void)
  1139. {
  1140. int ret;
  1141. /* Allocate shared config space permision data used by all devices */
  1142. ret = vfio_pci_init_perm_bits();
  1143. if (ret)
  1144. return ret;
  1145. /* Register and scan for devices */
  1146. ret = pci_register_driver(&vfio_pci_driver);
  1147. if (ret)
  1148. goto out_driver;
  1149. vfio_pci_fill_ids();
  1150. return 0;
  1151. out_driver:
  1152. vfio_pci_uninit_perm_bits();
  1153. return ret;
  1154. }
  1155. module_init(vfio_pci_init);
  1156. module_exit(vfio_pci_cleanup);
  1157. MODULE_VERSION(DRIVER_VERSION);
  1158. MODULE_LICENSE("GPL v2");
  1159. MODULE_AUTHOR(DRIVER_AUTHOR);
  1160. MODULE_DESCRIPTION(DRIVER_DESC);