nouveau_drm.c 28 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/delay.h>
  26. #include <linux/module.h>
  27. #include <linux/pci.h>
  28. #include <linux/pm_runtime.h>
  29. #include <linux/vga_switcheroo.h>
  30. #include "drmP.h"
  31. #include "drm_crtc_helper.h"
  32. #include <core/gpuobj.h>
  33. #include <core/option.h>
  34. #include <core/pci.h>
  35. #include <core/tegra.h>
  36. #include <nvif/class.h>
  37. #include <nvif/cl0002.h>
  38. #include <nvif/cla06f.h>
  39. #include <nvif/if0004.h>
  40. #include "nouveau_drv.h"
  41. #include "nouveau_dma.h"
  42. #include "nouveau_ttm.h"
  43. #include "nouveau_gem.h"
  44. #include "nouveau_vga.h"
  45. #include "nouveau_hwmon.h"
  46. #include "nouveau_acpi.h"
  47. #include "nouveau_bios.h"
  48. #include "nouveau_ioctl.h"
  49. #include "nouveau_abi16.h"
  50. #include "nouveau_fbcon.h"
  51. #include "nouveau_fence.h"
  52. #include "nouveau_debugfs.h"
  53. #include "nouveau_usif.h"
  54. #include "nouveau_connector.h"
  55. #include "nouveau_platform.h"
  56. MODULE_PARM_DESC(config, "option string to pass to driver core");
  57. static char *nouveau_config;
  58. module_param_named(config, nouveau_config, charp, 0400);
  59. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  60. static char *nouveau_debug;
  61. module_param_named(debug, nouveau_debug, charp, 0400);
  62. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  63. static int nouveau_noaccel = 0;
  64. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  65. MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
  66. "0 = disabled, 1 = enabled, 2 = headless)");
  67. int nouveau_modeset = -1;
  68. module_param_named(modeset, nouveau_modeset, int, 0400);
  69. MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
  70. int nouveau_runtime_pm = -1;
  71. module_param_named(runpm, nouveau_runtime_pm, int, 0400);
  72. static struct drm_driver driver_stub;
  73. static struct drm_driver driver_pci;
  74. static struct drm_driver driver_platform;
  75. static u64
  76. nouveau_pci_name(struct pci_dev *pdev)
  77. {
  78. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  79. name |= pdev->bus->number << 16;
  80. name |= PCI_SLOT(pdev->devfn) << 8;
  81. return name | PCI_FUNC(pdev->devfn);
  82. }
  83. static u64
  84. nouveau_platform_name(struct platform_device *platformdev)
  85. {
  86. return platformdev->id;
  87. }
  88. static u64
  89. nouveau_name(struct drm_device *dev)
  90. {
  91. if (dev->pdev)
  92. return nouveau_pci_name(dev->pdev);
  93. else
  94. return nouveau_platform_name(dev->platformdev);
  95. }
  96. static int
  97. nouveau_cli_create(struct drm_device *dev, const char *sname,
  98. int size, void **pcli)
  99. {
  100. struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL);
  101. int ret;
  102. if (cli) {
  103. snprintf(cli->name, sizeof(cli->name), "%s", sname);
  104. cli->dev = dev;
  105. ret = nvif_client_init(NULL, cli->name, nouveau_name(dev),
  106. nouveau_config, nouveau_debug,
  107. &cli->base);
  108. if (ret == 0) {
  109. mutex_init(&cli->mutex);
  110. usif_client_init(cli);
  111. }
  112. return ret;
  113. }
  114. return -ENOMEM;
  115. }
  116. static void
  117. nouveau_cli_destroy(struct nouveau_cli *cli)
  118. {
  119. nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL);
  120. nvif_client_fini(&cli->base);
  121. usif_client_fini(cli);
  122. kfree(cli);
  123. }
  124. static void
  125. nouveau_accel_fini(struct nouveau_drm *drm)
  126. {
  127. nouveau_channel_idle(drm->channel);
  128. nvif_object_fini(&drm->ntfy);
  129. nvkm_gpuobj_del(&drm->notify);
  130. nvif_notify_fini(&drm->flip);
  131. nvif_object_fini(&drm->nvsw);
  132. nouveau_channel_del(&drm->channel);
  133. nouveau_channel_idle(drm->cechan);
  134. nvif_object_fini(&drm->ttm.copy);
  135. nouveau_channel_del(&drm->cechan);
  136. if (drm->fence)
  137. nouveau_fence(drm)->dtor(drm);
  138. }
  139. static void
  140. nouveau_accel_init(struct nouveau_drm *drm)
  141. {
  142. struct nvif_device *device = &drm->device;
  143. struct nvif_sclass *sclass;
  144. u32 arg0, arg1;
  145. int ret, i, n;
  146. if (nouveau_noaccel)
  147. return;
  148. /* initialise synchronisation routines */
  149. /*XXX: this is crap, but the fence/channel stuff is a little
  150. * backwards in some places. this will be fixed.
  151. */
  152. ret = n = nvif_object_sclass_get(&device->object, &sclass);
  153. if (ret < 0)
  154. return;
  155. for (ret = -ENOSYS, i = 0; i < n; i++) {
  156. switch (sclass[i].oclass) {
  157. case NV03_CHANNEL_DMA:
  158. ret = nv04_fence_create(drm);
  159. break;
  160. case NV10_CHANNEL_DMA:
  161. ret = nv10_fence_create(drm);
  162. break;
  163. case NV17_CHANNEL_DMA:
  164. case NV40_CHANNEL_DMA:
  165. ret = nv17_fence_create(drm);
  166. break;
  167. case NV50_CHANNEL_GPFIFO:
  168. ret = nv50_fence_create(drm);
  169. break;
  170. case G82_CHANNEL_GPFIFO:
  171. ret = nv84_fence_create(drm);
  172. break;
  173. case FERMI_CHANNEL_GPFIFO:
  174. case KEPLER_CHANNEL_GPFIFO_A:
  175. case KEPLER_CHANNEL_GPFIFO_B:
  176. case MAXWELL_CHANNEL_GPFIFO_A:
  177. ret = nvc0_fence_create(drm);
  178. break;
  179. default:
  180. break;
  181. }
  182. }
  183. nvif_object_sclass_put(&sclass);
  184. if (ret) {
  185. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  186. nouveau_accel_fini(drm);
  187. return;
  188. }
  189. if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
  190. ret = nouveau_channel_new(drm, &drm->device,
  191. NVA06F_V0_ENGINE_CE0 |
  192. NVA06F_V0_ENGINE_CE1,
  193. 0, &drm->cechan);
  194. if (ret)
  195. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  196. arg0 = NVA06F_V0_ENGINE_GR;
  197. arg1 = 1;
  198. } else
  199. if (device->info.chipset >= 0xa3 &&
  200. device->info.chipset != 0xaa &&
  201. device->info.chipset != 0xac) {
  202. ret = nouveau_channel_new(drm, &drm->device,
  203. NvDmaFB, NvDmaTT, &drm->cechan);
  204. if (ret)
  205. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  206. arg0 = NvDmaFB;
  207. arg1 = NvDmaTT;
  208. } else {
  209. arg0 = NvDmaFB;
  210. arg1 = NvDmaTT;
  211. }
  212. ret = nouveau_channel_new(drm, &drm->device, arg0, arg1, &drm->channel);
  213. if (ret) {
  214. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  215. nouveau_accel_fini(drm);
  216. return;
  217. }
  218. ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
  219. nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
  220. if (ret == 0) {
  221. ret = RING_SPACE(drm->channel, 2);
  222. if (ret == 0) {
  223. if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
  224. BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
  225. OUT_RING (drm->channel, NVDRM_NVSW);
  226. } else
  227. if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
  228. BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
  229. OUT_RING (drm->channel, 0x001f0000);
  230. }
  231. }
  232. ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete,
  233. false, NV04_NVSW_NTFY_UEVENT,
  234. NULL, 0, 0, &drm->flip);
  235. if (ret == 0)
  236. ret = nvif_notify_get(&drm->flip);
  237. if (ret) {
  238. nouveau_accel_fini(drm);
  239. return;
  240. }
  241. }
  242. if (ret) {
  243. NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
  244. nouveau_accel_fini(drm);
  245. return;
  246. }
  247. if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
  248. ret = nvkm_gpuobj_new(nvxx_device(&drm->device), 32, 0, false,
  249. NULL, &drm->notify);
  250. if (ret) {
  251. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  252. nouveau_accel_fini(drm);
  253. return;
  254. }
  255. ret = nvif_object_init(&drm->channel->user, NvNotify0,
  256. NV_DMA_IN_MEMORY,
  257. &(struct nv_dma_v0) {
  258. .target = NV_DMA_V0_TARGET_VRAM,
  259. .access = NV_DMA_V0_ACCESS_RDWR,
  260. .start = drm->notify->addr,
  261. .limit = drm->notify->addr + 31
  262. }, sizeof(struct nv_dma_v0),
  263. &drm->ntfy);
  264. if (ret) {
  265. nouveau_accel_fini(drm);
  266. return;
  267. }
  268. }
  269. nouveau_bo_move_init(drm);
  270. }
  271. static int nouveau_drm_probe(struct pci_dev *pdev,
  272. const struct pci_device_id *pent)
  273. {
  274. struct nvkm_device *device;
  275. struct apertures_struct *aper;
  276. bool boot = false;
  277. int ret;
  278. if (vga_switcheroo_client_probe_defer(pdev))
  279. return -EPROBE_DEFER;
  280. /* remove conflicting drivers (vesafb, efifb etc) */
  281. aper = alloc_apertures(3);
  282. if (!aper)
  283. return -ENOMEM;
  284. aper->ranges[0].base = pci_resource_start(pdev, 1);
  285. aper->ranges[0].size = pci_resource_len(pdev, 1);
  286. aper->count = 1;
  287. if (pci_resource_len(pdev, 2)) {
  288. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  289. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  290. aper->count++;
  291. }
  292. if (pci_resource_len(pdev, 3)) {
  293. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  294. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  295. aper->count++;
  296. }
  297. #ifdef CONFIG_X86
  298. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  299. #endif
  300. if (nouveau_modeset != 2)
  301. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  302. kfree(aper);
  303. ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
  304. true, true, ~0ULL, &device);
  305. if (ret)
  306. return ret;
  307. pci_set_master(pdev);
  308. ret = drm_get_pci_dev(pdev, pent, &driver_pci);
  309. if (ret) {
  310. nvkm_device_del(&device);
  311. return ret;
  312. }
  313. return 0;
  314. }
  315. #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
  316. static void
  317. nouveau_get_hdmi_dev(struct nouveau_drm *drm)
  318. {
  319. struct pci_dev *pdev = drm->dev->pdev;
  320. if (!pdev) {
  321. NV_DEBUG(drm, "not a PCI device; no HDMI\n");
  322. drm->hdmi_device = NULL;
  323. return;
  324. }
  325. /* subfunction one is a hdmi audio device? */
  326. drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
  327. PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
  328. if (!drm->hdmi_device) {
  329. NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
  330. return;
  331. }
  332. if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
  333. NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
  334. pci_dev_put(drm->hdmi_device);
  335. drm->hdmi_device = NULL;
  336. return;
  337. }
  338. }
  339. static int
  340. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  341. {
  342. struct nouveau_drm *drm;
  343. int ret;
  344. ret = nouveau_cli_create(dev, "DRM", sizeof(*drm), (void **)&drm);
  345. if (ret)
  346. return ret;
  347. dev->dev_private = drm;
  348. drm->dev = dev;
  349. nvxx_client(&drm->client.base)->debug =
  350. nvkm_dbgopt(nouveau_debug, "DRM");
  351. INIT_LIST_HEAD(&drm->clients);
  352. spin_lock_init(&drm->tile.lock);
  353. nouveau_get_hdmi_dev(drm);
  354. ret = nvif_device_init(&drm->client.base.object, 0, NV_DEVICE,
  355. &(struct nv_device_v0) {
  356. .device = ~0,
  357. }, sizeof(struct nv_device_v0),
  358. &drm->device);
  359. if (ret)
  360. goto fail_device;
  361. dev->irq_enabled = true;
  362. /* workaround an odd issue on nvc1 by disabling the device's
  363. * nosnoop capability. hopefully won't cause issues until a
  364. * better fix is found - assuming there is one...
  365. */
  366. if (drm->device.info.chipset == 0xc1)
  367. nvif_mask(&drm->device.object, 0x00088080, 0x00000800, 0x00000000);
  368. nouveau_vga_init(drm);
  369. if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
  370. ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
  371. 0x1000, NULL, &drm->client.vm);
  372. if (ret)
  373. goto fail_device;
  374. nvxx_client(&drm->client.base)->vm = drm->client.vm;
  375. }
  376. ret = nouveau_ttm_init(drm);
  377. if (ret)
  378. goto fail_ttm;
  379. ret = nouveau_bios_init(dev);
  380. if (ret)
  381. goto fail_bios;
  382. ret = nouveau_display_create(dev);
  383. if (ret)
  384. goto fail_dispctor;
  385. if (dev->mode_config.num_crtc) {
  386. ret = nouveau_display_init(dev);
  387. if (ret)
  388. goto fail_dispinit;
  389. }
  390. nouveau_debugfs_init(drm);
  391. nouveau_hwmon_init(dev);
  392. nouveau_accel_init(drm);
  393. nouveau_fbcon_init(dev);
  394. if (nouveau_runtime_pm != 0) {
  395. pm_runtime_use_autosuspend(dev->dev);
  396. pm_runtime_set_autosuspend_delay(dev->dev, 5000);
  397. pm_runtime_set_active(dev->dev);
  398. pm_runtime_allow(dev->dev);
  399. pm_runtime_mark_last_busy(dev->dev);
  400. pm_runtime_put(dev->dev);
  401. }
  402. return 0;
  403. fail_dispinit:
  404. nouveau_display_destroy(dev);
  405. fail_dispctor:
  406. nouveau_bios_takedown(dev);
  407. fail_bios:
  408. nouveau_ttm_fini(drm);
  409. fail_ttm:
  410. nouveau_vga_fini(drm);
  411. fail_device:
  412. nvif_device_fini(&drm->device);
  413. nouveau_cli_destroy(&drm->client);
  414. return ret;
  415. }
  416. static int
  417. nouveau_drm_unload(struct drm_device *dev)
  418. {
  419. struct nouveau_drm *drm = nouveau_drm(dev);
  420. pm_runtime_get_sync(dev->dev);
  421. nouveau_fbcon_fini(dev);
  422. nouveau_accel_fini(drm);
  423. nouveau_hwmon_fini(dev);
  424. nouveau_debugfs_fini(drm);
  425. if (dev->mode_config.num_crtc)
  426. nouveau_display_fini(dev);
  427. nouveau_display_destroy(dev);
  428. nouveau_bios_takedown(dev);
  429. nouveau_ttm_fini(drm);
  430. nouveau_vga_fini(drm);
  431. nvif_device_fini(&drm->device);
  432. if (drm->hdmi_device)
  433. pci_dev_put(drm->hdmi_device);
  434. nouveau_cli_destroy(&drm->client);
  435. return 0;
  436. }
  437. void
  438. nouveau_drm_device_remove(struct drm_device *dev)
  439. {
  440. struct nouveau_drm *drm = nouveau_drm(dev);
  441. struct nvkm_client *client;
  442. struct nvkm_device *device;
  443. dev->irq_enabled = false;
  444. client = nvxx_client(&drm->client.base);
  445. device = nvkm_device_find(client->device);
  446. drm_put_dev(dev);
  447. nvkm_device_del(&device);
  448. }
  449. static void
  450. nouveau_drm_remove(struct pci_dev *pdev)
  451. {
  452. struct drm_device *dev = pci_get_drvdata(pdev);
  453. nouveau_drm_device_remove(dev);
  454. }
  455. static int
  456. nouveau_do_suspend(struct drm_device *dev, bool runtime)
  457. {
  458. struct nouveau_drm *drm = nouveau_drm(dev);
  459. struct nouveau_cli *cli;
  460. int ret;
  461. if (dev->mode_config.num_crtc) {
  462. NV_INFO(drm, "suspending console...\n");
  463. nouveau_fbcon_set_suspend(dev, 1);
  464. NV_INFO(drm, "suspending display...\n");
  465. ret = nouveau_display_suspend(dev, runtime);
  466. if (ret)
  467. return ret;
  468. }
  469. NV_INFO(drm, "evicting buffers...\n");
  470. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  471. NV_INFO(drm, "waiting for kernel channels to go idle...\n");
  472. if (drm->cechan) {
  473. ret = nouveau_channel_idle(drm->cechan);
  474. if (ret)
  475. goto fail_display;
  476. }
  477. if (drm->channel) {
  478. ret = nouveau_channel_idle(drm->channel);
  479. if (ret)
  480. goto fail_display;
  481. }
  482. NV_INFO(drm, "suspending client object trees...\n");
  483. if (drm->fence && nouveau_fence(drm)->suspend) {
  484. if (!nouveau_fence(drm)->suspend(drm)) {
  485. ret = -ENOMEM;
  486. goto fail_display;
  487. }
  488. }
  489. list_for_each_entry(cli, &drm->clients, head) {
  490. ret = nvif_client_suspend(&cli->base);
  491. if (ret)
  492. goto fail_client;
  493. }
  494. NV_INFO(drm, "suspending kernel object tree...\n");
  495. ret = nvif_client_suspend(&drm->client.base);
  496. if (ret)
  497. goto fail_client;
  498. return 0;
  499. fail_client:
  500. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  501. nvif_client_resume(&cli->base);
  502. }
  503. if (drm->fence && nouveau_fence(drm)->resume)
  504. nouveau_fence(drm)->resume(drm);
  505. fail_display:
  506. if (dev->mode_config.num_crtc) {
  507. NV_INFO(drm, "resuming display...\n");
  508. nouveau_display_resume(dev, runtime);
  509. }
  510. return ret;
  511. }
  512. static int
  513. nouveau_do_resume(struct drm_device *dev, bool runtime)
  514. {
  515. struct nouveau_drm *drm = nouveau_drm(dev);
  516. struct nouveau_cli *cli;
  517. NV_INFO(drm, "resuming kernel object tree...\n");
  518. nvif_client_resume(&drm->client.base);
  519. NV_INFO(drm, "resuming client object trees...\n");
  520. if (drm->fence && nouveau_fence(drm)->resume)
  521. nouveau_fence(drm)->resume(drm);
  522. list_for_each_entry(cli, &drm->clients, head) {
  523. nvif_client_resume(&cli->base);
  524. }
  525. nouveau_run_vbios_init(dev);
  526. if (dev->mode_config.num_crtc) {
  527. NV_INFO(drm, "resuming display...\n");
  528. nouveau_display_resume(dev, runtime);
  529. NV_INFO(drm, "resuming console...\n");
  530. nouveau_fbcon_set_suspend(dev, 0);
  531. }
  532. return 0;
  533. }
  534. int
  535. nouveau_pmops_suspend(struct device *dev)
  536. {
  537. struct pci_dev *pdev = to_pci_dev(dev);
  538. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  539. int ret;
  540. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  541. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  542. return 0;
  543. ret = nouveau_do_suspend(drm_dev, false);
  544. if (ret)
  545. return ret;
  546. pci_save_state(pdev);
  547. pci_disable_device(pdev);
  548. pci_set_power_state(pdev, PCI_D3hot);
  549. udelay(200);
  550. return 0;
  551. }
  552. int
  553. nouveau_pmops_resume(struct device *dev)
  554. {
  555. struct pci_dev *pdev = to_pci_dev(dev);
  556. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  557. int ret;
  558. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  559. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  560. return 0;
  561. pci_set_power_state(pdev, PCI_D0);
  562. pci_restore_state(pdev);
  563. ret = pci_enable_device(pdev);
  564. if (ret)
  565. return ret;
  566. pci_set_master(pdev);
  567. return nouveau_do_resume(drm_dev, false);
  568. }
  569. static int
  570. nouveau_pmops_freeze(struct device *dev)
  571. {
  572. struct pci_dev *pdev = to_pci_dev(dev);
  573. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  574. return nouveau_do_suspend(drm_dev, false);
  575. }
  576. static int
  577. nouveau_pmops_thaw(struct device *dev)
  578. {
  579. struct pci_dev *pdev = to_pci_dev(dev);
  580. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  581. return nouveau_do_resume(drm_dev, false);
  582. }
  583. static int
  584. nouveau_pmops_runtime_suspend(struct device *dev)
  585. {
  586. struct pci_dev *pdev = to_pci_dev(dev);
  587. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  588. int ret;
  589. if (nouveau_runtime_pm == 0) {
  590. pm_runtime_forbid(dev);
  591. return -EBUSY;
  592. }
  593. /* are we optimus enabled? */
  594. if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
  595. DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
  596. pm_runtime_forbid(dev);
  597. return -EBUSY;
  598. }
  599. drm_kms_helper_poll_disable(drm_dev);
  600. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
  601. nouveau_switcheroo_optimus_dsm();
  602. ret = nouveau_do_suspend(drm_dev, true);
  603. pci_save_state(pdev);
  604. pci_disable_device(pdev);
  605. pci_ignore_hotplug(pdev);
  606. pci_set_power_state(pdev, PCI_D3cold);
  607. drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
  608. return ret;
  609. }
  610. static int
  611. nouveau_pmops_runtime_resume(struct device *dev)
  612. {
  613. struct pci_dev *pdev = to_pci_dev(dev);
  614. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  615. struct nvif_device *device = &nouveau_drm(drm_dev)->device;
  616. int ret;
  617. if (nouveau_runtime_pm == 0)
  618. return -EINVAL;
  619. pci_set_power_state(pdev, PCI_D0);
  620. pci_restore_state(pdev);
  621. ret = pci_enable_device(pdev);
  622. if (ret)
  623. return ret;
  624. pci_set_master(pdev);
  625. ret = nouveau_do_resume(drm_dev, true);
  626. drm_kms_helper_poll_enable(drm_dev);
  627. /* do magic */
  628. nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
  629. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
  630. drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
  631. return ret;
  632. }
  633. static int
  634. nouveau_pmops_runtime_idle(struct device *dev)
  635. {
  636. struct pci_dev *pdev = to_pci_dev(dev);
  637. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  638. struct nouveau_drm *drm = nouveau_drm(drm_dev);
  639. struct drm_crtc *crtc;
  640. if (nouveau_runtime_pm == 0) {
  641. pm_runtime_forbid(dev);
  642. return -EBUSY;
  643. }
  644. /* are we optimus enabled? */
  645. if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
  646. DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
  647. pm_runtime_forbid(dev);
  648. return -EBUSY;
  649. }
  650. /* if we have a hdmi audio device - make sure it has a driver loaded */
  651. if (drm->hdmi_device) {
  652. if (!drm->hdmi_device->driver) {
  653. DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
  654. pm_runtime_mark_last_busy(dev);
  655. return -EBUSY;
  656. }
  657. }
  658. list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
  659. if (crtc->enabled) {
  660. DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
  661. return -EBUSY;
  662. }
  663. }
  664. pm_runtime_mark_last_busy(dev);
  665. pm_runtime_autosuspend(dev);
  666. /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
  667. return 1;
  668. }
  669. static int
  670. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  671. {
  672. struct nouveau_drm *drm = nouveau_drm(dev);
  673. struct nouveau_cli *cli;
  674. char name[32], tmpname[TASK_COMM_LEN];
  675. int ret;
  676. /* need to bring up power immediately if opening device */
  677. ret = pm_runtime_get_sync(dev->dev);
  678. if (ret < 0 && ret != -EACCES)
  679. return ret;
  680. get_task_comm(tmpname, current);
  681. snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
  682. ret = nouveau_cli_create(dev, name, sizeof(*cli), (void **)&cli);
  683. if (ret)
  684. goto out_suspend;
  685. cli->base.super = false;
  686. if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
  687. ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
  688. 0x1000, NULL, &cli->vm);
  689. if (ret) {
  690. nouveau_cli_destroy(cli);
  691. goto out_suspend;
  692. }
  693. nvxx_client(&cli->base)->vm = cli->vm;
  694. }
  695. fpriv->driver_priv = cli;
  696. mutex_lock(&drm->client.mutex);
  697. list_add(&cli->head, &drm->clients);
  698. mutex_unlock(&drm->client.mutex);
  699. out_suspend:
  700. pm_runtime_mark_last_busy(dev->dev);
  701. pm_runtime_put_autosuspend(dev->dev);
  702. return ret;
  703. }
  704. static void
  705. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  706. {
  707. struct nouveau_cli *cli = nouveau_cli(fpriv);
  708. struct nouveau_drm *drm = nouveau_drm(dev);
  709. pm_runtime_get_sync(dev->dev);
  710. mutex_lock(&cli->mutex);
  711. if (cli->abi16)
  712. nouveau_abi16_fini(cli->abi16);
  713. mutex_unlock(&cli->mutex);
  714. mutex_lock(&drm->client.mutex);
  715. list_del(&cli->head);
  716. mutex_unlock(&drm->client.mutex);
  717. }
  718. static void
  719. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  720. {
  721. struct nouveau_cli *cli = nouveau_cli(fpriv);
  722. nouveau_cli_destroy(cli);
  723. pm_runtime_mark_last_busy(dev->dev);
  724. pm_runtime_put_autosuspend(dev->dev);
  725. }
  726. static const struct drm_ioctl_desc
  727. nouveau_ioctls[] = {
  728. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
  729. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  730. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
  731. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
  732. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
  733. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
  734. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
  735. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
  736. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
  737. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
  738. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
  739. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
  740. };
  741. long
  742. nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  743. {
  744. struct drm_file *filp = file->private_data;
  745. struct drm_device *dev = filp->minor->dev;
  746. long ret;
  747. ret = pm_runtime_get_sync(dev->dev);
  748. if (ret < 0 && ret != -EACCES)
  749. return ret;
  750. switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
  751. case DRM_NOUVEAU_NVIF:
  752. ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
  753. break;
  754. default:
  755. ret = drm_ioctl(file, cmd, arg);
  756. break;
  757. }
  758. pm_runtime_mark_last_busy(dev->dev);
  759. pm_runtime_put_autosuspend(dev->dev);
  760. return ret;
  761. }
  762. static const struct file_operations
  763. nouveau_driver_fops = {
  764. .owner = THIS_MODULE,
  765. .open = drm_open,
  766. .release = drm_release,
  767. .unlocked_ioctl = nouveau_drm_ioctl,
  768. .mmap = nouveau_ttm_mmap,
  769. .poll = drm_poll,
  770. .read = drm_read,
  771. #if defined(CONFIG_COMPAT)
  772. .compat_ioctl = nouveau_compat_ioctl,
  773. #endif
  774. .llseek = noop_llseek,
  775. };
  776. static struct drm_driver
  777. driver_stub = {
  778. .driver_features =
  779. DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
  780. DRIVER_KMS_LEGACY_CONTEXT,
  781. .load = nouveau_drm_load,
  782. .unload = nouveau_drm_unload,
  783. .open = nouveau_drm_open,
  784. .preclose = nouveau_drm_preclose,
  785. .postclose = nouveau_drm_postclose,
  786. .lastclose = nouveau_vga_lastclose,
  787. #if defined(CONFIG_DEBUG_FS)
  788. .debugfs_init = nouveau_drm_debugfs_init,
  789. .debugfs_cleanup = nouveau_drm_debugfs_cleanup,
  790. #endif
  791. .get_vblank_counter = drm_vblank_no_hw_counter,
  792. .enable_vblank = nouveau_display_vblank_enable,
  793. .disable_vblank = nouveau_display_vblank_disable,
  794. .get_scanout_position = nouveau_display_scanoutpos,
  795. .get_vblank_timestamp = nouveau_display_vblstamp,
  796. .ioctls = nouveau_ioctls,
  797. .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
  798. .fops = &nouveau_driver_fops,
  799. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  800. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  801. .gem_prime_export = drm_gem_prime_export,
  802. .gem_prime_import = drm_gem_prime_import,
  803. .gem_prime_pin = nouveau_gem_prime_pin,
  804. .gem_prime_res_obj = nouveau_gem_prime_res_obj,
  805. .gem_prime_unpin = nouveau_gem_prime_unpin,
  806. .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
  807. .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
  808. .gem_prime_vmap = nouveau_gem_prime_vmap,
  809. .gem_prime_vunmap = nouveau_gem_prime_vunmap,
  810. .gem_free_object_unlocked = nouveau_gem_object_del,
  811. .gem_open_object = nouveau_gem_object_open,
  812. .gem_close_object = nouveau_gem_object_close,
  813. .dumb_create = nouveau_display_dumb_create,
  814. .dumb_map_offset = nouveau_display_dumb_map_offset,
  815. .dumb_destroy = drm_gem_dumb_destroy,
  816. .name = DRIVER_NAME,
  817. .desc = DRIVER_DESC,
  818. #ifdef GIT_REVISION
  819. .date = GIT_REVISION,
  820. #else
  821. .date = DRIVER_DATE,
  822. #endif
  823. .major = DRIVER_MAJOR,
  824. .minor = DRIVER_MINOR,
  825. .patchlevel = DRIVER_PATCHLEVEL,
  826. };
  827. static struct pci_device_id
  828. nouveau_drm_pci_table[] = {
  829. {
  830. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  831. .class = PCI_BASE_CLASS_DISPLAY << 16,
  832. .class_mask = 0xff << 16,
  833. },
  834. {
  835. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  836. .class = PCI_BASE_CLASS_DISPLAY << 16,
  837. .class_mask = 0xff << 16,
  838. },
  839. {}
  840. };
  841. static void nouveau_display_options(void)
  842. {
  843. DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
  844. DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
  845. DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
  846. DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
  847. DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
  848. DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
  849. DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
  850. DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
  851. DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
  852. DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
  853. DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
  854. }
  855. static const struct dev_pm_ops nouveau_pm_ops = {
  856. .suspend = nouveau_pmops_suspend,
  857. .resume = nouveau_pmops_resume,
  858. .freeze = nouveau_pmops_freeze,
  859. .thaw = nouveau_pmops_thaw,
  860. .poweroff = nouveau_pmops_freeze,
  861. .restore = nouveau_pmops_resume,
  862. .runtime_suspend = nouveau_pmops_runtime_suspend,
  863. .runtime_resume = nouveau_pmops_runtime_resume,
  864. .runtime_idle = nouveau_pmops_runtime_idle,
  865. };
  866. static struct pci_driver
  867. nouveau_drm_pci_driver = {
  868. .name = "nouveau",
  869. .id_table = nouveau_drm_pci_table,
  870. .probe = nouveau_drm_probe,
  871. .remove = nouveau_drm_remove,
  872. .driver.pm = &nouveau_pm_ops,
  873. };
  874. struct drm_device *
  875. nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
  876. struct platform_device *pdev,
  877. struct nvkm_device **pdevice)
  878. {
  879. struct drm_device *drm;
  880. int err;
  881. err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
  882. true, true, ~0ULL, pdevice);
  883. if (err)
  884. goto err_free;
  885. drm = drm_dev_alloc(&driver_platform, &pdev->dev);
  886. if (!drm) {
  887. err = -ENOMEM;
  888. goto err_free;
  889. }
  890. drm->platformdev = pdev;
  891. platform_set_drvdata(pdev, drm);
  892. return drm;
  893. err_free:
  894. nvkm_device_del(pdevice);
  895. return ERR_PTR(err);
  896. }
  897. static int __init
  898. nouveau_drm_init(void)
  899. {
  900. driver_pci = driver_stub;
  901. driver_pci.set_busid = drm_pci_set_busid;
  902. driver_platform = driver_stub;
  903. driver_platform.set_busid = drm_platform_set_busid;
  904. nouveau_display_options();
  905. if (nouveau_modeset == -1) {
  906. if (vgacon_text_force())
  907. nouveau_modeset = 0;
  908. }
  909. if (!nouveau_modeset)
  910. return 0;
  911. #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
  912. platform_driver_register(&nouveau_platform_driver);
  913. #endif
  914. nouveau_register_dsm_handler();
  915. return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver);
  916. }
  917. static void __exit
  918. nouveau_drm_exit(void)
  919. {
  920. if (!nouveau_modeset)
  921. return;
  922. drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver);
  923. nouveau_unregister_dsm_handler();
  924. #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
  925. platform_driver_unregister(&nouveau_platform_driver);
  926. #endif
  927. }
  928. module_init(nouveau_drm_init);
  929. module_exit(nouveau_drm_exit);
  930. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  931. MODULE_AUTHOR(DRIVER_AUTHOR);
  932. MODULE_DESCRIPTION(DRIVER_DESC);
  933. MODULE_LICENSE("GPL and additional rights");