pmcraid.c 167 KB

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  1. /*
  2. * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters
  3. *
  4. * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
  5. * PMC-Sierra Inc
  6. *
  7. * Copyright (C) 2008, 2009 PMC Sierra Inc
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307,
  22. * USA
  23. *
  24. */
  25. #include <linux/fs.h>
  26. #include <linux/init.h>
  27. #include <linux/types.h>
  28. #include <linux/errno.h>
  29. #include <linux/kernel.h>
  30. #include <linux/ioport.h>
  31. #include <linux/delay.h>
  32. #include <linux/pci.h>
  33. #include <linux/wait.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/sched.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/blkdev.h>
  38. #include <linux/firmware.h>
  39. #include <linux/module.h>
  40. #include <linux/moduleparam.h>
  41. #include <linux/hdreg.h>
  42. #include <linux/io.h>
  43. #include <linux/slab.h>
  44. #include <asm/irq.h>
  45. #include <asm/processor.h>
  46. #include <linux/libata.h>
  47. #include <linux/mutex.h>
  48. #include <linux/ktime.h>
  49. #include <scsi/scsi.h>
  50. #include <scsi/scsi_host.h>
  51. #include <scsi/scsi_device.h>
  52. #include <scsi/scsi_tcq.h>
  53. #include <scsi/scsi_eh.h>
  54. #include <scsi/scsi_cmnd.h>
  55. #include <scsi/scsicam.h>
  56. #include "pmcraid.h"
  57. /*
  58. * Module configuration parameters
  59. */
  60. static unsigned int pmcraid_debug_log;
  61. static unsigned int pmcraid_disable_aen;
  62. static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST;
  63. static unsigned int pmcraid_enable_msix;
  64. /*
  65. * Data structures to support multiple adapters by the LLD.
  66. * pmcraid_adapter_count - count of configured adapters
  67. */
  68. static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0);
  69. /*
  70. * Supporting user-level control interface through IOCTL commands.
  71. * pmcraid_major - major number to use
  72. * pmcraid_minor - minor number(s) to use
  73. */
  74. static unsigned int pmcraid_major;
  75. static struct class *pmcraid_class;
  76. DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
  77. /*
  78. * Module parameters
  79. */
  80. MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>");
  81. MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver");
  82. MODULE_LICENSE("GPL");
  83. MODULE_VERSION(PMCRAID_DRIVER_VERSION);
  84. module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR));
  85. MODULE_PARM_DESC(log_level,
  86. "Enables firmware error code logging, default :1 high-severity"
  87. " errors, 2: all errors including high-severity errors,"
  88. " 0: disables logging");
  89. module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR));
  90. MODULE_PARM_DESC(debug,
  91. "Enable driver verbose message logging. Set 1 to enable."
  92. "(default: 0)");
  93. module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR));
  94. MODULE_PARM_DESC(disable_aen,
  95. "Disable driver aen notifications to apps. Set 1 to disable."
  96. "(default: 0)");
  97. /* chip specific constants for PMC MaxRAID controllers (same for
  98. * 0x5220 and 0x8010
  99. */
  100. static struct pmcraid_chip_details pmcraid_chip_cfg[] = {
  101. {
  102. .ioastatus = 0x0,
  103. .ioarrin = 0x00040,
  104. .mailbox = 0x7FC30,
  105. .global_intr_mask = 0x00034,
  106. .ioa_host_intr = 0x0009C,
  107. .ioa_host_intr_clr = 0x000A0,
  108. .ioa_host_msix_intr = 0x7FC40,
  109. .ioa_host_mask = 0x7FC28,
  110. .ioa_host_mask_clr = 0x7FC28,
  111. .host_ioa_intr = 0x00020,
  112. .host_ioa_intr_clr = 0x00020,
  113. .transop_timeout = 300
  114. }
  115. };
  116. /*
  117. * PCI device ids supported by pmcraid driver
  118. */
  119. static struct pci_device_id pmcraid_pci_table[] = {
  120. { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID),
  121. 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0]
  122. },
  123. {}
  124. };
  125. MODULE_DEVICE_TABLE(pci, pmcraid_pci_table);
  126. /**
  127. * pmcraid_slave_alloc - Prepare for commands to a device
  128. * @scsi_dev: scsi device struct
  129. *
  130. * This function is called by mid-layer prior to sending any command to the new
  131. * device. Stores resource entry details of the device in scsi_device struct.
  132. * Queuecommand uses the resource handle and other details to fill up IOARCB
  133. * while sending commands to the device.
  134. *
  135. * Return value:
  136. * 0 on success / -ENXIO if device does not exist
  137. */
  138. static int pmcraid_slave_alloc(struct scsi_device *scsi_dev)
  139. {
  140. struct pmcraid_resource_entry *temp, *res = NULL;
  141. struct pmcraid_instance *pinstance;
  142. u8 target, bus, lun;
  143. unsigned long lock_flags;
  144. int rc = -ENXIO;
  145. u16 fw_version;
  146. pinstance = shost_priv(scsi_dev->host);
  147. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  148. /* Driver exposes VSET and GSCSI resources only; all other device types
  149. * are not exposed. Resource list is synchronized using resource lock
  150. * so any traversal or modifications to the list should be done inside
  151. * this lock
  152. */
  153. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  154. list_for_each_entry(temp, &pinstance->used_res_q, queue) {
  155. /* do not expose VSETs with order-ids > MAX_VSET_TARGETS */
  156. if (RES_IS_VSET(temp->cfg_entry)) {
  157. if (fw_version <= PMCRAID_FW_VERSION_1)
  158. target = temp->cfg_entry.unique_flags1;
  159. else
  160. target = temp->cfg_entry.array_id & 0xFF;
  161. if (target > PMCRAID_MAX_VSET_TARGETS)
  162. continue;
  163. bus = PMCRAID_VSET_BUS_ID;
  164. lun = 0;
  165. } else if (RES_IS_GSCSI(temp->cfg_entry)) {
  166. target = RES_TARGET(temp->cfg_entry.resource_address);
  167. bus = PMCRAID_PHYS_BUS_ID;
  168. lun = RES_LUN(temp->cfg_entry.resource_address);
  169. } else {
  170. continue;
  171. }
  172. if (bus == scsi_dev->channel &&
  173. target == scsi_dev->id &&
  174. lun == scsi_dev->lun) {
  175. res = temp;
  176. break;
  177. }
  178. }
  179. if (res) {
  180. res->scsi_dev = scsi_dev;
  181. scsi_dev->hostdata = res;
  182. res->change_detected = 0;
  183. atomic_set(&res->read_failures, 0);
  184. atomic_set(&res->write_failures, 0);
  185. rc = 0;
  186. }
  187. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  188. return rc;
  189. }
  190. /**
  191. * pmcraid_slave_configure - Configures a SCSI device
  192. * @scsi_dev: scsi device struct
  193. *
  194. * This function is executed by SCSI mid layer just after a device is first
  195. * scanned (i.e. it has responded to an INQUIRY). For VSET resources, the
  196. * timeout value (default 30s) will be over-written to a higher value (60s)
  197. * and max_sectors value will be over-written to 512. It also sets queue depth
  198. * to host->cmd_per_lun value
  199. *
  200. * Return value:
  201. * 0 on success
  202. */
  203. static int pmcraid_slave_configure(struct scsi_device *scsi_dev)
  204. {
  205. struct pmcraid_resource_entry *res = scsi_dev->hostdata;
  206. if (!res)
  207. return 0;
  208. /* LLD exposes VSETs and Enclosure devices only */
  209. if (RES_IS_GSCSI(res->cfg_entry) &&
  210. scsi_dev->type != TYPE_ENCLOSURE)
  211. return -ENXIO;
  212. pmcraid_info("configuring %x:%x:%x:%x\n",
  213. scsi_dev->host->unique_id,
  214. scsi_dev->channel,
  215. scsi_dev->id,
  216. (u8)scsi_dev->lun);
  217. if (RES_IS_GSCSI(res->cfg_entry)) {
  218. scsi_dev->allow_restart = 1;
  219. } else if (RES_IS_VSET(res->cfg_entry)) {
  220. scsi_dev->allow_restart = 1;
  221. blk_queue_rq_timeout(scsi_dev->request_queue,
  222. PMCRAID_VSET_IO_TIMEOUT);
  223. blk_queue_max_hw_sectors(scsi_dev->request_queue,
  224. PMCRAID_VSET_MAX_SECTORS);
  225. }
  226. /*
  227. * We never want to report TCQ support for these types of devices.
  228. */
  229. if (!RES_IS_GSCSI(res->cfg_entry) && !RES_IS_VSET(res->cfg_entry))
  230. scsi_dev->tagged_supported = 0;
  231. return 0;
  232. }
  233. /**
  234. * pmcraid_slave_destroy - Unconfigure a SCSI device before removing it
  235. *
  236. * @scsi_dev: scsi device struct
  237. *
  238. * This is called by mid-layer before removing a device. Pointer assignments
  239. * done in pmcraid_slave_alloc will be reset to NULL here.
  240. *
  241. * Return value
  242. * none
  243. */
  244. static void pmcraid_slave_destroy(struct scsi_device *scsi_dev)
  245. {
  246. struct pmcraid_resource_entry *res;
  247. res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
  248. if (res)
  249. res->scsi_dev = NULL;
  250. scsi_dev->hostdata = NULL;
  251. }
  252. /**
  253. * pmcraid_change_queue_depth - Change the device's queue depth
  254. * @scsi_dev: scsi device struct
  255. * @depth: depth to set
  256. *
  257. * Return value
  258. * actual depth set
  259. */
  260. static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth)
  261. {
  262. if (depth > PMCRAID_MAX_CMD_PER_LUN)
  263. depth = PMCRAID_MAX_CMD_PER_LUN;
  264. return scsi_change_queue_depth(scsi_dev, depth);
  265. }
  266. /**
  267. * pmcraid_init_cmdblk - initializes a command block
  268. *
  269. * @cmd: pointer to struct pmcraid_cmd to be initialized
  270. * @index: if >=0 first time initialization; otherwise reinitialization
  271. *
  272. * Return Value
  273. * None
  274. */
  275. static void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index)
  276. {
  277. struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
  278. dma_addr_t dma_addr = cmd->ioa_cb_bus_addr;
  279. if (index >= 0) {
  280. /* first time initialization (called from probe) */
  281. u32 ioasa_offset =
  282. offsetof(struct pmcraid_control_block, ioasa);
  283. cmd->index = index;
  284. ioarcb->response_handle = cpu_to_le32(index << 2);
  285. ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr);
  286. ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset);
  287. ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa));
  288. } else {
  289. /* re-initialization of various lengths, called once command is
  290. * processed by IOA
  291. */
  292. memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN);
  293. ioarcb->hrrq_id = 0;
  294. ioarcb->request_flags0 = 0;
  295. ioarcb->request_flags1 = 0;
  296. ioarcb->cmd_timeout = 0;
  297. ioarcb->ioarcb_bus_addr &= (~0x1FULL);
  298. ioarcb->ioadl_bus_addr = 0;
  299. ioarcb->ioadl_length = 0;
  300. ioarcb->data_transfer_length = 0;
  301. ioarcb->add_cmd_param_length = 0;
  302. ioarcb->add_cmd_param_offset = 0;
  303. cmd->ioa_cb->ioasa.ioasc = 0;
  304. cmd->ioa_cb->ioasa.residual_data_length = 0;
  305. cmd->time_left = 0;
  306. }
  307. cmd->cmd_done = NULL;
  308. cmd->scsi_cmd = NULL;
  309. cmd->release = 0;
  310. cmd->completion_req = 0;
  311. cmd->sense_buffer = 0;
  312. cmd->sense_buffer_dma = 0;
  313. cmd->dma_handle = 0;
  314. init_timer(&cmd->timer);
  315. }
  316. /**
  317. * pmcraid_reinit_cmdblk - reinitialize a command block
  318. *
  319. * @cmd: pointer to struct pmcraid_cmd to be reinitialized
  320. *
  321. * Return Value
  322. * None
  323. */
  324. static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd)
  325. {
  326. pmcraid_init_cmdblk(cmd, -1);
  327. }
  328. /**
  329. * pmcraid_get_free_cmd - get a free cmd block from command block pool
  330. * @pinstance: adapter instance structure
  331. *
  332. * Return Value:
  333. * returns pointer to cmd block or NULL if no blocks are available
  334. */
  335. static struct pmcraid_cmd *pmcraid_get_free_cmd(
  336. struct pmcraid_instance *pinstance
  337. )
  338. {
  339. struct pmcraid_cmd *cmd = NULL;
  340. unsigned long lock_flags;
  341. /* free cmd block list is protected by free_pool_lock */
  342. spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
  343. if (!list_empty(&pinstance->free_cmd_pool)) {
  344. cmd = list_entry(pinstance->free_cmd_pool.next,
  345. struct pmcraid_cmd, free_list);
  346. list_del(&cmd->free_list);
  347. }
  348. spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
  349. /* Initialize the command block before giving it the caller */
  350. if (cmd != NULL)
  351. pmcraid_reinit_cmdblk(cmd);
  352. return cmd;
  353. }
  354. /**
  355. * pmcraid_return_cmd - return a completed command block back into free pool
  356. * @cmd: pointer to the command block
  357. *
  358. * Return Value:
  359. * nothing
  360. */
  361. static void pmcraid_return_cmd(struct pmcraid_cmd *cmd)
  362. {
  363. struct pmcraid_instance *pinstance = cmd->drv_inst;
  364. unsigned long lock_flags;
  365. spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
  366. list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool);
  367. spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
  368. }
  369. /**
  370. * pmcraid_read_interrupts - reads IOA interrupts
  371. *
  372. * @pinstance: pointer to adapter instance structure
  373. *
  374. * Return value
  375. * interrupts read from IOA
  376. */
  377. static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance)
  378. {
  379. return (pinstance->interrupt_mode) ?
  380. ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) :
  381. ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  382. }
  383. /**
  384. * pmcraid_disable_interrupts - Masks and clears all specified interrupts
  385. *
  386. * @pinstance: pointer to per adapter instance structure
  387. * @intrs: interrupts to disable
  388. *
  389. * Return Value
  390. * None
  391. */
  392. static void pmcraid_disable_interrupts(
  393. struct pmcraid_instance *pinstance,
  394. u32 intrs
  395. )
  396. {
  397. u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
  398. u32 nmask = gmask | GLOBAL_INTERRUPT_MASK;
  399. iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg);
  400. iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
  401. ioread32(pinstance->int_regs.global_interrupt_mask_reg);
  402. if (!pinstance->interrupt_mode) {
  403. iowrite32(intrs,
  404. pinstance->int_regs.ioa_host_interrupt_mask_reg);
  405. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  406. }
  407. }
  408. /**
  409. * pmcraid_enable_interrupts - Enables specified interrupts
  410. *
  411. * @pinstance: pointer to per adapter instance structure
  412. * @intr: interrupts to enable
  413. *
  414. * Return Value
  415. * None
  416. */
  417. static void pmcraid_enable_interrupts(
  418. struct pmcraid_instance *pinstance,
  419. u32 intrs
  420. )
  421. {
  422. u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
  423. u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK);
  424. iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
  425. if (!pinstance->interrupt_mode) {
  426. iowrite32(~intrs,
  427. pinstance->int_regs.ioa_host_interrupt_mask_reg);
  428. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  429. }
  430. pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n",
  431. ioread32(pinstance->int_regs.global_interrupt_mask_reg),
  432. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg));
  433. }
  434. /**
  435. * pmcraid_clr_trans_op - clear trans to op interrupt
  436. *
  437. * @pinstance: pointer to per adapter instance structure
  438. *
  439. * Return Value
  440. * None
  441. */
  442. static void pmcraid_clr_trans_op(
  443. struct pmcraid_instance *pinstance
  444. )
  445. {
  446. unsigned long lock_flags;
  447. if (!pinstance->interrupt_mode) {
  448. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  449. pinstance->int_regs.ioa_host_interrupt_mask_reg);
  450. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  451. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  452. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  453. ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg);
  454. }
  455. if (pinstance->reset_cmd != NULL) {
  456. del_timer(&pinstance->reset_cmd->timer);
  457. spin_lock_irqsave(
  458. pinstance->host->host_lock, lock_flags);
  459. pinstance->reset_cmd->cmd_done(pinstance->reset_cmd);
  460. spin_unlock_irqrestore(
  461. pinstance->host->host_lock, lock_flags);
  462. }
  463. }
  464. /**
  465. * pmcraid_reset_type - Determine the required reset type
  466. * @pinstance: pointer to adapter instance structure
  467. *
  468. * IOA requires hard reset if any of the following conditions is true.
  469. * 1. If HRRQ valid interrupt is not masked
  470. * 2. IOA reset alert doorbell is set
  471. * 3. If there are any error interrupts
  472. */
  473. static void pmcraid_reset_type(struct pmcraid_instance *pinstance)
  474. {
  475. u32 mask;
  476. u32 intrs;
  477. u32 alerts;
  478. mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  479. intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  480. alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  481. if ((mask & INTRS_HRRQ_VALID) == 0 ||
  482. (alerts & DOORBELL_IOA_RESET_ALERT) ||
  483. (intrs & PMCRAID_ERROR_INTERRUPTS)) {
  484. pmcraid_info("IOA requires hard reset\n");
  485. pinstance->ioa_hard_reset = 1;
  486. }
  487. /* If unit check is active, trigger the dump */
  488. if (intrs & INTRS_IOA_UNIT_CHECK)
  489. pinstance->ioa_unit_check = 1;
  490. }
  491. /**
  492. * pmcraid_bist_done - completion function for PCI BIST
  493. * @cmd: pointer to reset command
  494. * Return Value
  495. * none
  496. */
  497. static void pmcraid_ioa_reset(struct pmcraid_cmd *);
  498. static void pmcraid_bist_done(struct pmcraid_cmd *cmd)
  499. {
  500. struct pmcraid_instance *pinstance = cmd->drv_inst;
  501. unsigned long lock_flags;
  502. int rc;
  503. u16 pci_reg;
  504. rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
  505. /* If PCI config space can't be accessed wait for another two secs */
  506. if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
  507. cmd->time_left > 0) {
  508. pmcraid_info("BIST not complete, waiting another 2 secs\n");
  509. cmd->timer.expires = jiffies + cmd->time_left;
  510. cmd->time_left = 0;
  511. cmd->timer.data = (unsigned long)cmd;
  512. cmd->timer.function =
  513. (void (*)(unsigned long))pmcraid_bist_done;
  514. add_timer(&cmd->timer);
  515. } else {
  516. cmd->time_left = 0;
  517. pmcraid_info("BIST is complete, proceeding with reset\n");
  518. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  519. pmcraid_ioa_reset(cmd);
  520. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  521. }
  522. }
  523. /**
  524. * pmcraid_start_bist - starts BIST
  525. * @cmd: pointer to reset cmd
  526. * Return Value
  527. * none
  528. */
  529. static void pmcraid_start_bist(struct pmcraid_cmd *cmd)
  530. {
  531. struct pmcraid_instance *pinstance = cmd->drv_inst;
  532. u32 doorbells, intrs;
  533. /* proceed with bist and wait for 2 seconds */
  534. iowrite32(DOORBELL_IOA_START_BIST,
  535. pinstance->int_regs.host_ioa_interrupt_reg);
  536. doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  537. intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  538. pmcraid_info("doorbells after start bist: %x intrs: %x\n",
  539. doorbells, intrs);
  540. cmd->time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
  541. cmd->timer.data = (unsigned long)cmd;
  542. cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
  543. cmd->timer.function = (void (*)(unsigned long))pmcraid_bist_done;
  544. add_timer(&cmd->timer);
  545. }
  546. /**
  547. * pmcraid_reset_alert_done - completion routine for reset_alert
  548. * @cmd: pointer to command block used in reset sequence
  549. * Return value
  550. * None
  551. */
  552. static void pmcraid_reset_alert_done(struct pmcraid_cmd *cmd)
  553. {
  554. struct pmcraid_instance *pinstance = cmd->drv_inst;
  555. u32 status = ioread32(pinstance->ioa_status);
  556. unsigned long lock_flags;
  557. /* if the critical operation in progress bit is set or the wait times
  558. * out, invoke reset engine to proceed with hard reset. If there is
  559. * some more time to wait, restart the timer
  560. */
  561. if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) ||
  562. cmd->time_left <= 0) {
  563. pmcraid_info("critical op is reset proceeding with reset\n");
  564. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  565. pmcraid_ioa_reset(cmd);
  566. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  567. } else {
  568. pmcraid_info("critical op is not yet reset waiting again\n");
  569. /* restart timer if some more time is available to wait */
  570. cmd->time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  571. cmd->timer.data = (unsigned long)cmd;
  572. cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  573. cmd->timer.function =
  574. (void (*)(unsigned long))pmcraid_reset_alert_done;
  575. add_timer(&cmd->timer);
  576. }
  577. }
  578. /**
  579. * pmcraid_reset_alert - alerts IOA for a possible reset
  580. * @cmd : command block to be used for reset sequence.
  581. *
  582. * Return Value
  583. * returns 0 if pci config-space is accessible and RESET_DOORBELL is
  584. * successfully written to IOA. Returns non-zero in case pci_config_space
  585. * is not accessible
  586. */
  587. static void pmcraid_notify_ioastate(struct pmcraid_instance *, u32);
  588. static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
  589. {
  590. struct pmcraid_instance *pinstance = cmd->drv_inst;
  591. u32 doorbells;
  592. int rc;
  593. u16 pci_reg;
  594. /* If we are able to access IOA PCI config space, alert IOA that we are
  595. * going to reset it soon. This enables IOA to preserv persistent error
  596. * data if any. In case memory space is not accessible, proceed with
  597. * BIST or slot_reset
  598. */
  599. rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
  600. if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) {
  601. /* wait for IOA permission i.e until CRITICAL_OPERATION bit is
  602. * reset IOA doesn't generate any interrupts when CRITICAL
  603. * OPERATION bit is reset. A timer is started to wait for this
  604. * bit to be reset.
  605. */
  606. cmd->time_left = PMCRAID_RESET_TIMEOUT;
  607. cmd->timer.data = (unsigned long)cmd;
  608. cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  609. cmd->timer.function =
  610. (void (*)(unsigned long))pmcraid_reset_alert_done;
  611. add_timer(&cmd->timer);
  612. iowrite32(DOORBELL_IOA_RESET_ALERT,
  613. pinstance->int_regs.host_ioa_interrupt_reg);
  614. doorbells =
  615. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  616. pmcraid_info("doorbells after reset alert: %x\n", doorbells);
  617. } else {
  618. pmcraid_info("PCI config is not accessible starting BIST\n");
  619. pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
  620. pmcraid_start_bist(cmd);
  621. }
  622. }
  623. /**
  624. * pmcraid_timeout_handler - Timeout handler for internally generated ops
  625. *
  626. * @cmd : pointer to command structure, that got timedout
  627. *
  628. * This function blocks host requests and initiates an adapter reset.
  629. *
  630. * Return value:
  631. * None
  632. */
  633. static void pmcraid_timeout_handler(struct pmcraid_cmd *cmd)
  634. {
  635. struct pmcraid_instance *pinstance = cmd->drv_inst;
  636. unsigned long lock_flags;
  637. dev_info(&pinstance->pdev->dev,
  638. "Adapter being reset due to cmd(CDB[0] = %x) timeout\n",
  639. cmd->ioa_cb->ioarcb.cdb[0]);
  640. /* Command timeouts result in hard reset sequence. The command that got
  641. * timed out may be the one used as part of reset sequence. In this
  642. * case restart reset sequence using the same command block even if
  643. * reset is in progress. Otherwise fail this command and get a free
  644. * command block to restart the reset sequence.
  645. */
  646. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  647. if (!pinstance->ioa_reset_in_progress) {
  648. pinstance->ioa_reset_attempts = 0;
  649. cmd = pmcraid_get_free_cmd(pinstance);
  650. /* If we are out of command blocks, just return here itself.
  651. * Some other command's timeout handler can do the reset job
  652. */
  653. if (cmd == NULL) {
  654. spin_unlock_irqrestore(pinstance->host->host_lock,
  655. lock_flags);
  656. pmcraid_err("no free cmnd block for timeout handler\n");
  657. return;
  658. }
  659. pinstance->reset_cmd = cmd;
  660. pinstance->ioa_reset_in_progress = 1;
  661. } else {
  662. pmcraid_info("reset is already in progress\n");
  663. if (pinstance->reset_cmd != cmd) {
  664. /* This command should have been given to IOA, this
  665. * command will be completed by fail_outstanding_cmds
  666. * anyway
  667. */
  668. pmcraid_err("cmd is pending but reset in progress\n");
  669. }
  670. /* If this command was being used as part of the reset
  671. * sequence, set cmd_done pointer to pmcraid_ioa_reset. This
  672. * causes fail_outstanding_commands not to return the command
  673. * block back to free pool
  674. */
  675. if (cmd == pinstance->reset_cmd)
  676. cmd->cmd_done = pmcraid_ioa_reset;
  677. }
  678. /* Notify apps of important IOA bringup/bringdown sequences */
  679. if (pinstance->scn.ioa_state != PMC_DEVICE_EVENT_RESET_START &&
  680. pinstance->scn.ioa_state != PMC_DEVICE_EVENT_SHUTDOWN_START)
  681. pmcraid_notify_ioastate(pinstance,
  682. PMC_DEVICE_EVENT_RESET_START);
  683. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  684. scsi_block_requests(pinstance->host);
  685. pmcraid_reset_alert(cmd);
  686. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  687. }
  688. /**
  689. * pmcraid_internal_done - completion routine for internally generated cmds
  690. *
  691. * @cmd: command that got response from IOA
  692. *
  693. * Return Value:
  694. * none
  695. */
  696. static void pmcraid_internal_done(struct pmcraid_cmd *cmd)
  697. {
  698. pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
  699. cmd->ioa_cb->ioarcb.cdb[0],
  700. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  701. /* Some of the internal commands are sent with callers blocking for the
  702. * response. Same will be indicated as part of cmd->completion_req
  703. * field. Response path needs to wake up any waiters waiting for cmd
  704. * completion if this flag is set.
  705. */
  706. if (cmd->completion_req) {
  707. cmd->completion_req = 0;
  708. complete(&cmd->wait_for_completion);
  709. }
  710. /* most of the internal commands are completed by caller itself, so
  711. * no need to return the command block back to free pool until we are
  712. * required to do so (e.g once done with initialization).
  713. */
  714. if (cmd->release) {
  715. cmd->release = 0;
  716. pmcraid_return_cmd(cmd);
  717. }
  718. }
  719. /**
  720. * pmcraid_reinit_cfgtable_done - done function for cfg table reinitialization
  721. *
  722. * @cmd: command that got response from IOA
  723. *
  724. * This routine is called after driver re-reads configuration table due to a
  725. * lost CCN. It returns the command block back to free pool and schedules
  726. * worker thread to add/delete devices into the system.
  727. *
  728. * Return Value:
  729. * none
  730. */
  731. static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd)
  732. {
  733. pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
  734. cmd->ioa_cb->ioarcb.cdb[0],
  735. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  736. if (cmd->release) {
  737. cmd->release = 0;
  738. pmcraid_return_cmd(cmd);
  739. }
  740. pmcraid_info("scheduling worker for config table reinitialization\n");
  741. schedule_work(&cmd->drv_inst->worker_q);
  742. }
  743. /**
  744. * pmcraid_erp_done - Process completion of SCSI error response from device
  745. * @cmd: pmcraid_command
  746. *
  747. * This function copies the sense buffer into the scsi_cmd struct and completes
  748. * scsi_cmd by calling scsi_done function.
  749. *
  750. * Return value:
  751. * none
  752. */
  753. static void pmcraid_erp_done(struct pmcraid_cmd *cmd)
  754. {
  755. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  756. struct pmcraid_instance *pinstance = cmd->drv_inst;
  757. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  758. if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) {
  759. scsi_cmd->result |= (DID_ERROR << 16);
  760. scmd_printk(KERN_INFO, scsi_cmd,
  761. "command CDB[0] = %x failed with IOASC: 0x%08X\n",
  762. cmd->ioa_cb->ioarcb.cdb[0], ioasc);
  763. }
  764. /* if we had allocated sense buffers for request sense, copy the sense
  765. * release the buffers
  766. */
  767. if (cmd->sense_buffer != NULL) {
  768. memcpy(scsi_cmd->sense_buffer,
  769. cmd->sense_buffer,
  770. SCSI_SENSE_BUFFERSIZE);
  771. pci_free_consistent(pinstance->pdev,
  772. SCSI_SENSE_BUFFERSIZE,
  773. cmd->sense_buffer, cmd->sense_buffer_dma);
  774. cmd->sense_buffer = NULL;
  775. cmd->sense_buffer_dma = 0;
  776. }
  777. scsi_dma_unmap(scsi_cmd);
  778. pmcraid_return_cmd(cmd);
  779. scsi_cmd->scsi_done(scsi_cmd);
  780. }
  781. /**
  782. * pmcraid_fire_command - sends an IOA command to adapter
  783. *
  784. * This function adds the given block into pending command list
  785. * and returns without waiting
  786. *
  787. * @cmd : command to be sent to the device
  788. *
  789. * Return Value
  790. * None
  791. */
  792. static void _pmcraid_fire_command(struct pmcraid_cmd *cmd)
  793. {
  794. struct pmcraid_instance *pinstance = cmd->drv_inst;
  795. unsigned long lock_flags;
  796. /* Add this command block to pending cmd pool. We do this prior to
  797. * writting IOARCB to ioarrin because IOA might complete the command
  798. * by the time we are about to add it to the list. Response handler
  799. * (isr/tasklet) looks for cmd block in the pending pending list.
  800. */
  801. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  802. list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool);
  803. spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
  804. atomic_inc(&pinstance->outstanding_cmds);
  805. /* driver writes lower 32-bit value of IOARCB address only */
  806. mb();
  807. iowrite32(le32_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr),
  808. pinstance->ioarrin);
  809. }
  810. /**
  811. * pmcraid_send_cmd - fires a command to IOA
  812. *
  813. * This function also sets up timeout function, and command completion
  814. * function
  815. *
  816. * @cmd: pointer to the command block to be fired to IOA
  817. * @cmd_done: command completion function, called once IOA responds
  818. * @timeout: timeout to wait for this command completion
  819. * @timeout_func: timeout handler
  820. *
  821. * Return value
  822. * none
  823. */
  824. static void pmcraid_send_cmd(
  825. struct pmcraid_cmd *cmd,
  826. void (*cmd_done) (struct pmcraid_cmd *),
  827. unsigned long timeout,
  828. void (*timeout_func) (struct pmcraid_cmd *)
  829. )
  830. {
  831. /* initialize done function */
  832. cmd->cmd_done = cmd_done;
  833. if (timeout_func) {
  834. /* setup timeout handler */
  835. cmd->timer.data = (unsigned long)cmd;
  836. cmd->timer.expires = jiffies + timeout;
  837. cmd->timer.function = (void (*)(unsigned long))timeout_func;
  838. add_timer(&cmd->timer);
  839. }
  840. /* fire the command to IOA */
  841. _pmcraid_fire_command(cmd);
  842. }
  843. /**
  844. * pmcraid_ioa_shutdown_done - completion function for IOA shutdown command
  845. * @cmd: pointer to the command block used for sending IOA shutdown command
  846. *
  847. * Return value
  848. * None
  849. */
  850. static void pmcraid_ioa_shutdown_done(struct pmcraid_cmd *cmd)
  851. {
  852. struct pmcraid_instance *pinstance = cmd->drv_inst;
  853. unsigned long lock_flags;
  854. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  855. pmcraid_ioa_reset(cmd);
  856. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  857. }
  858. /**
  859. * pmcraid_ioa_shutdown - sends SHUTDOWN command to ioa
  860. *
  861. * @cmd: pointer to the command block used as part of reset sequence
  862. *
  863. * Return Value
  864. * None
  865. */
  866. static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd)
  867. {
  868. pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n",
  869. cmd->ioa_cb->ioarcb.cdb[0],
  870. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  871. /* Note that commands sent during reset require next command to be sent
  872. * to IOA. Hence reinit the done function as well as timeout function
  873. */
  874. pmcraid_reinit_cmdblk(cmd);
  875. cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD;
  876. cmd->ioa_cb->ioarcb.resource_handle =
  877. cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  878. cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN;
  879. cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL;
  880. /* fire shutdown command to hardware. */
  881. pmcraid_info("firing normal shutdown command (%d) to IOA\n",
  882. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle));
  883. pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START);
  884. pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done,
  885. PMCRAID_SHUTDOWN_TIMEOUT,
  886. pmcraid_timeout_handler);
  887. }
  888. /**
  889. * pmcraid_get_fwversion_done - completion function for get_fwversion
  890. *
  891. * @cmd: pointer to command block used to send INQUIRY command
  892. *
  893. * Return Value
  894. * none
  895. */
  896. static void pmcraid_querycfg(struct pmcraid_cmd *);
  897. static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd)
  898. {
  899. struct pmcraid_instance *pinstance = cmd->drv_inst;
  900. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  901. unsigned long lock_flags;
  902. /* configuration table entry size depends on firmware version. If fw
  903. * version is not known, it is not possible to interpret IOA config
  904. * table
  905. */
  906. if (ioasc) {
  907. pmcraid_err("IOA Inquiry failed with %x\n", ioasc);
  908. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  909. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  910. pmcraid_reset_alert(cmd);
  911. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  912. } else {
  913. pmcraid_querycfg(cmd);
  914. }
  915. }
  916. /**
  917. * pmcraid_get_fwversion - reads firmware version information
  918. *
  919. * @cmd: pointer to command block used to send INQUIRY command
  920. *
  921. * Return Value
  922. * none
  923. */
  924. static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd)
  925. {
  926. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  927. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  928. struct pmcraid_instance *pinstance = cmd->drv_inst;
  929. u16 data_size = sizeof(struct pmcraid_inquiry_data);
  930. pmcraid_reinit_cmdblk(cmd);
  931. ioarcb->request_type = REQ_TYPE_SCSI;
  932. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  933. ioarcb->cdb[0] = INQUIRY;
  934. ioarcb->cdb[1] = 1;
  935. ioarcb->cdb[2] = 0xD0;
  936. ioarcb->cdb[3] = (data_size >> 8) & 0xFF;
  937. ioarcb->cdb[4] = data_size & 0xFF;
  938. /* Since entire inquiry data it can be part of IOARCB itself
  939. */
  940. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  941. offsetof(struct pmcraid_ioarcb,
  942. add_data.u.ioadl[0]));
  943. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  944. ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
  945. ioarcb->request_flags0 |= NO_LINK_DESCS;
  946. ioarcb->data_transfer_length = cpu_to_le32(data_size);
  947. ioadl = &(ioarcb->add_data.u.ioadl[0]);
  948. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  949. ioadl->address = cpu_to_le64(pinstance->inq_data_baddr);
  950. ioadl->data_len = cpu_to_le32(data_size);
  951. pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done,
  952. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  953. }
  954. /**
  955. * pmcraid_identify_hrrq - registers host rrq buffers with IOA
  956. * @cmd: pointer to command block to be used for identify hrrq
  957. *
  958. * Return Value
  959. * none
  960. */
  961. static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd)
  962. {
  963. struct pmcraid_instance *pinstance = cmd->drv_inst;
  964. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  965. int index = cmd->hrrq_index;
  966. __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]);
  967. u32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD);
  968. void (*done_function)(struct pmcraid_cmd *);
  969. pmcraid_reinit_cmdblk(cmd);
  970. cmd->hrrq_index = index + 1;
  971. if (cmd->hrrq_index < pinstance->num_hrrq) {
  972. done_function = pmcraid_identify_hrrq;
  973. } else {
  974. cmd->hrrq_index = 0;
  975. done_function = pmcraid_get_fwversion;
  976. }
  977. /* Initialize ioarcb */
  978. ioarcb->request_type = REQ_TYPE_IOACMD;
  979. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  980. /* initialize the hrrq number where IOA will respond to this command */
  981. ioarcb->hrrq_id = index;
  982. ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ;
  983. ioarcb->cdb[1] = index;
  984. /* IOA expects 64-bit pci address to be written in B.E format
  985. * (i.e cdb[2]=MSByte..cdb[9]=LSB.
  986. */
  987. pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n",
  988. hrrq_addr, ioarcb->ioarcb_bus_addr, index);
  989. memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr));
  990. memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size));
  991. /* Subsequent commands require HRRQ identification to be successful.
  992. * Note that this gets called even during reset from SCSI mid-layer
  993. * or tasklet
  994. */
  995. pmcraid_send_cmd(cmd, done_function,
  996. PMCRAID_INTERNAL_TIMEOUT,
  997. pmcraid_timeout_handler);
  998. }
  999. static void pmcraid_process_ccn(struct pmcraid_cmd *cmd);
  1000. static void pmcraid_process_ldn(struct pmcraid_cmd *cmd);
  1001. /**
  1002. * pmcraid_send_hcam_cmd - send an initialized command block(HCAM) to IOA
  1003. *
  1004. * @cmd: initialized command block pointer
  1005. *
  1006. * Return Value
  1007. * none
  1008. */
  1009. static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd)
  1010. {
  1011. if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE)
  1012. atomic_set(&(cmd->drv_inst->ccn.ignore), 0);
  1013. else
  1014. atomic_set(&(cmd->drv_inst->ldn.ignore), 0);
  1015. pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL);
  1016. }
  1017. /**
  1018. * pmcraid_init_hcam - send an initialized command block(HCAM) to IOA
  1019. *
  1020. * @pinstance: pointer to adapter instance structure
  1021. * @type: HCAM type
  1022. *
  1023. * Return Value
  1024. * pointer to initialized pmcraid_cmd structure or NULL
  1025. */
  1026. static struct pmcraid_cmd *pmcraid_init_hcam
  1027. (
  1028. struct pmcraid_instance *pinstance,
  1029. u8 type
  1030. )
  1031. {
  1032. struct pmcraid_cmd *cmd;
  1033. struct pmcraid_ioarcb *ioarcb;
  1034. struct pmcraid_ioadl_desc *ioadl;
  1035. struct pmcraid_hostrcb *hcam;
  1036. void (*cmd_done) (struct pmcraid_cmd *);
  1037. dma_addr_t dma;
  1038. int rcb_size;
  1039. cmd = pmcraid_get_free_cmd(pinstance);
  1040. if (!cmd) {
  1041. pmcraid_err("no free command blocks for hcam\n");
  1042. return cmd;
  1043. }
  1044. if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) {
  1045. rcb_size = sizeof(struct pmcraid_hcam_ccn_ext);
  1046. cmd_done = pmcraid_process_ccn;
  1047. dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE;
  1048. hcam = &pinstance->ccn;
  1049. } else {
  1050. rcb_size = sizeof(struct pmcraid_hcam_ldn);
  1051. cmd_done = pmcraid_process_ldn;
  1052. dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE;
  1053. hcam = &pinstance->ldn;
  1054. }
  1055. /* initialize command pointer used for HCAM registration */
  1056. hcam->cmd = cmd;
  1057. ioarcb = &cmd->ioa_cb->ioarcb;
  1058. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  1059. offsetof(struct pmcraid_ioarcb,
  1060. add_data.u.ioadl[0]));
  1061. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  1062. ioadl = ioarcb->add_data.u.ioadl;
  1063. /* Initialize ioarcb */
  1064. ioarcb->request_type = REQ_TYPE_HCAM;
  1065. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  1066. ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC;
  1067. ioarcb->cdb[1] = type;
  1068. ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF;
  1069. ioarcb->cdb[8] = (rcb_size) & 0xFF;
  1070. ioarcb->data_transfer_length = cpu_to_le32(rcb_size);
  1071. ioadl[0].flags |= IOADL_FLAGS_READ_LAST;
  1072. ioadl[0].data_len = cpu_to_le32(rcb_size);
  1073. ioadl[0].address = cpu_to_le32(dma);
  1074. cmd->cmd_done = cmd_done;
  1075. return cmd;
  1076. }
  1077. /**
  1078. * pmcraid_send_hcam - Send an HCAM to IOA
  1079. * @pinstance: ioa config struct
  1080. * @type: HCAM type
  1081. *
  1082. * This function will send a Host Controlled Async command to IOA.
  1083. *
  1084. * Return value:
  1085. * none
  1086. */
  1087. static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type)
  1088. {
  1089. struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type);
  1090. pmcraid_send_hcam_cmd(cmd);
  1091. }
  1092. /**
  1093. * pmcraid_prepare_cancel_cmd - prepares a command block to abort another
  1094. *
  1095. * @cmd: pointer to cmd that is used as cancelling command
  1096. * @cmd_to_cancel: pointer to the command that needs to be cancelled
  1097. */
  1098. static void pmcraid_prepare_cancel_cmd(
  1099. struct pmcraid_cmd *cmd,
  1100. struct pmcraid_cmd *cmd_to_cancel
  1101. )
  1102. {
  1103. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  1104. __be64 ioarcb_addr = cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr;
  1105. /* Get the resource handle to where the command to be aborted has been
  1106. * sent.
  1107. */
  1108. ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle;
  1109. ioarcb->request_type = REQ_TYPE_IOACMD;
  1110. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  1111. ioarcb->cdb[0] = PMCRAID_ABORT_CMD;
  1112. /* IOARCB address of the command to be cancelled is given in
  1113. * cdb[2]..cdb[9] is Big-Endian format. Note that length bits in
  1114. * IOARCB address are not masked.
  1115. */
  1116. ioarcb_addr = cpu_to_be64(ioarcb_addr);
  1117. memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr));
  1118. }
  1119. /**
  1120. * pmcraid_cancel_hcam - sends ABORT task to abort a given HCAM
  1121. *
  1122. * @cmd: command to be used as cancelling command
  1123. * @type: HCAM type
  1124. * @cmd_done: op done function for the cancelling command
  1125. */
  1126. static void pmcraid_cancel_hcam(
  1127. struct pmcraid_cmd *cmd,
  1128. u8 type,
  1129. void (*cmd_done) (struct pmcraid_cmd *)
  1130. )
  1131. {
  1132. struct pmcraid_instance *pinstance;
  1133. struct pmcraid_hostrcb *hcam;
  1134. pinstance = cmd->drv_inst;
  1135. hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ?
  1136. &pinstance->ldn : &pinstance->ccn;
  1137. /* prepare for cancelling previous hcam command. If the HCAM is
  1138. * currently not pending with IOA, we would have hcam->cmd as non-null
  1139. */
  1140. if (hcam->cmd == NULL)
  1141. return;
  1142. pmcraid_prepare_cancel_cmd(cmd, hcam->cmd);
  1143. /* writing to IOARRIN must be protected by host_lock, as mid-layer
  1144. * schedule queuecommand while we are doing this
  1145. */
  1146. pmcraid_send_cmd(cmd, cmd_done,
  1147. PMCRAID_INTERNAL_TIMEOUT,
  1148. pmcraid_timeout_handler);
  1149. }
  1150. /**
  1151. * pmcraid_cancel_ccn - cancel CCN HCAM already registered with IOA
  1152. *
  1153. * @cmd: command block to be used for cancelling the HCAM
  1154. */
  1155. static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd)
  1156. {
  1157. pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n",
  1158. cmd->ioa_cb->ioarcb.cdb[0],
  1159. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  1160. pmcraid_reinit_cmdblk(cmd);
  1161. pmcraid_cancel_hcam(cmd,
  1162. PMCRAID_HCAM_CODE_CONFIG_CHANGE,
  1163. pmcraid_ioa_shutdown);
  1164. }
  1165. /**
  1166. * pmcraid_cancel_ldn - cancel LDN HCAM already registered with IOA
  1167. *
  1168. * @cmd: command block to be used for cancelling the HCAM
  1169. */
  1170. static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd)
  1171. {
  1172. pmcraid_cancel_hcam(cmd,
  1173. PMCRAID_HCAM_CODE_LOG_DATA,
  1174. pmcraid_cancel_ccn);
  1175. }
  1176. /**
  1177. * pmcraid_expose_resource - check if the resource can be exposed to OS
  1178. *
  1179. * @fw_version: firmware version code
  1180. * @cfgte: pointer to configuration table entry of the resource
  1181. *
  1182. * Return value:
  1183. * true if resource can be added to midlayer, false(0) otherwise
  1184. */
  1185. static int pmcraid_expose_resource(u16 fw_version,
  1186. struct pmcraid_config_table_entry *cfgte)
  1187. {
  1188. int retval = 0;
  1189. if (cfgte->resource_type == RES_TYPE_VSET) {
  1190. if (fw_version <= PMCRAID_FW_VERSION_1)
  1191. retval = ((cfgte->unique_flags1 & 0x80) == 0);
  1192. else
  1193. retval = ((cfgte->unique_flags0 & 0x80) == 0 &&
  1194. (cfgte->unique_flags1 & 0x80) == 0);
  1195. } else if (cfgte->resource_type == RES_TYPE_GSCSI)
  1196. retval = (RES_BUS(cfgte->resource_address) !=
  1197. PMCRAID_VIRTUAL_ENCL_BUS_ID);
  1198. return retval;
  1199. }
  1200. /* attributes supported by pmcraid_event_family */
  1201. enum {
  1202. PMCRAID_AEN_ATTR_UNSPEC,
  1203. PMCRAID_AEN_ATTR_EVENT,
  1204. __PMCRAID_AEN_ATTR_MAX,
  1205. };
  1206. #define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1)
  1207. /* commands supported by pmcraid_event_family */
  1208. enum {
  1209. PMCRAID_AEN_CMD_UNSPEC,
  1210. PMCRAID_AEN_CMD_EVENT,
  1211. __PMCRAID_AEN_CMD_MAX,
  1212. };
  1213. #define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1)
  1214. static struct genl_multicast_group pmcraid_mcgrps[] = {
  1215. { .name = "events", /* not really used - see ID discussion below */ },
  1216. };
  1217. static struct genl_family pmcraid_event_family = {
  1218. .name = "pmcraid",
  1219. .version = 1,
  1220. .maxattr = PMCRAID_AEN_ATTR_MAX,
  1221. .mcgrps = pmcraid_mcgrps,
  1222. .n_mcgrps = ARRAY_SIZE(pmcraid_mcgrps),
  1223. };
  1224. /**
  1225. * pmcraid_netlink_init - registers pmcraid_event_family
  1226. *
  1227. * Return value:
  1228. * 0 if the pmcraid_event_family is successfully registered
  1229. * with netlink generic, non-zero otherwise
  1230. */
  1231. static int pmcraid_netlink_init(void)
  1232. {
  1233. int result;
  1234. result = genl_register_family(&pmcraid_event_family);
  1235. if (result)
  1236. return result;
  1237. pmcraid_info("registered NETLINK GENERIC group: %d\n",
  1238. pmcraid_event_family.id);
  1239. return result;
  1240. }
  1241. /**
  1242. * pmcraid_netlink_release - unregisters pmcraid_event_family
  1243. *
  1244. * Return value:
  1245. * none
  1246. */
  1247. static void pmcraid_netlink_release(void)
  1248. {
  1249. genl_unregister_family(&pmcraid_event_family);
  1250. }
  1251. /**
  1252. * pmcraid_notify_aen - sends event msg to user space application
  1253. * @pinstance: pointer to adapter instance structure
  1254. * @type: HCAM type
  1255. *
  1256. * Return value:
  1257. * 0 if success, error value in case of any failure.
  1258. */
  1259. static int pmcraid_notify_aen(
  1260. struct pmcraid_instance *pinstance,
  1261. struct pmcraid_aen_msg *aen_msg,
  1262. u32 data_size
  1263. )
  1264. {
  1265. struct sk_buff *skb;
  1266. void *msg_header;
  1267. u32 total_size, nla_genl_hdr_total_size;
  1268. int result;
  1269. aen_msg->hostno = (pinstance->host->unique_id << 16 |
  1270. MINOR(pinstance->cdev.dev));
  1271. aen_msg->length = data_size;
  1272. data_size += sizeof(*aen_msg);
  1273. total_size = nla_total_size(data_size);
  1274. /* Add GENL_HDR to total_size */
  1275. nla_genl_hdr_total_size =
  1276. (total_size + (GENL_HDRLEN +
  1277. ((struct genl_family *)&pmcraid_event_family)->hdrsize)
  1278. + NLMSG_HDRLEN);
  1279. skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC);
  1280. if (!skb) {
  1281. pmcraid_err("Failed to allocate aen data SKB of size: %x\n",
  1282. total_size);
  1283. return -ENOMEM;
  1284. }
  1285. /* add the genetlink message header */
  1286. msg_header = genlmsg_put(skb, 0, 0,
  1287. &pmcraid_event_family, 0,
  1288. PMCRAID_AEN_CMD_EVENT);
  1289. if (!msg_header) {
  1290. pmcraid_err("failed to copy command details\n");
  1291. nlmsg_free(skb);
  1292. return -ENOMEM;
  1293. }
  1294. result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg);
  1295. if (result) {
  1296. pmcraid_err("failed to copy AEN attribute data\n");
  1297. nlmsg_free(skb);
  1298. return -EINVAL;
  1299. }
  1300. /* send genetlink multicast message to notify appplications */
  1301. genlmsg_end(skb, msg_header);
  1302. result = genlmsg_multicast(&pmcraid_event_family, skb,
  1303. 0, 0, GFP_ATOMIC);
  1304. /* If there are no listeners, genlmsg_multicast may return non-zero
  1305. * value.
  1306. */
  1307. if (result)
  1308. pmcraid_info("error (%x) sending aen event message\n", result);
  1309. return result;
  1310. }
  1311. /**
  1312. * pmcraid_notify_ccn - notifies about CCN event msg to user space
  1313. * @pinstance: pointer adapter instance structure
  1314. *
  1315. * Return value:
  1316. * 0 if success, error value in case of any failure
  1317. */
  1318. static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance)
  1319. {
  1320. return pmcraid_notify_aen(pinstance,
  1321. pinstance->ccn.msg,
  1322. pinstance->ccn.hcam->data_len +
  1323. sizeof(struct pmcraid_hcam_hdr));
  1324. }
  1325. /**
  1326. * pmcraid_notify_ldn - notifies about CCN event msg to user space
  1327. * @pinstance: pointer adapter instance structure
  1328. *
  1329. * Return value:
  1330. * 0 if success, error value in case of any failure
  1331. */
  1332. static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance)
  1333. {
  1334. return pmcraid_notify_aen(pinstance,
  1335. pinstance->ldn.msg,
  1336. pinstance->ldn.hcam->data_len +
  1337. sizeof(struct pmcraid_hcam_hdr));
  1338. }
  1339. /**
  1340. * pmcraid_notify_ioastate - sends IOA state event msg to user space
  1341. * @pinstance: pointer adapter instance structure
  1342. * @evt: controller state event to be sent
  1343. *
  1344. * Return value:
  1345. * 0 if success, error value in case of any failure
  1346. */
  1347. static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt)
  1348. {
  1349. pinstance->scn.ioa_state = evt;
  1350. pmcraid_notify_aen(pinstance,
  1351. &pinstance->scn.msg,
  1352. sizeof(u32));
  1353. }
  1354. /**
  1355. * pmcraid_handle_config_change - Handle a config change from the adapter
  1356. * @pinstance: pointer to per adapter instance structure
  1357. *
  1358. * Return value:
  1359. * none
  1360. */
  1361. static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
  1362. {
  1363. struct pmcraid_config_table_entry *cfg_entry;
  1364. struct pmcraid_hcam_ccn *ccn_hcam;
  1365. struct pmcraid_cmd *cmd;
  1366. struct pmcraid_cmd *cfgcmd;
  1367. struct pmcraid_resource_entry *res = NULL;
  1368. unsigned long lock_flags;
  1369. unsigned long host_lock_flags;
  1370. u32 new_entry = 1;
  1371. u32 hidden_entry = 0;
  1372. u16 fw_version;
  1373. int rc;
  1374. ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam;
  1375. cfg_entry = &ccn_hcam->cfg_entry;
  1376. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  1377. pmcraid_info("CCN(%x): %x timestamp: %llx type: %x lost: %x flags: %x \
  1378. res: %x:%x:%x:%x\n",
  1379. pinstance->ccn.hcam->ilid,
  1380. pinstance->ccn.hcam->op_code,
  1381. ((pinstance->ccn.hcam->timestamp1) |
  1382. ((pinstance->ccn.hcam->timestamp2 & 0xffffffffLL) << 32)),
  1383. pinstance->ccn.hcam->notification_type,
  1384. pinstance->ccn.hcam->notification_lost,
  1385. pinstance->ccn.hcam->flags,
  1386. pinstance->host->unique_id,
  1387. RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID :
  1388. (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID :
  1389. RES_BUS(cfg_entry->resource_address)),
  1390. RES_IS_VSET(*cfg_entry) ?
  1391. (fw_version <= PMCRAID_FW_VERSION_1 ?
  1392. cfg_entry->unique_flags1 :
  1393. cfg_entry->array_id & 0xFF) :
  1394. RES_TARGET(cfg_entry->resource_address),
  1395. RES_LUN(cfg_entry->resource_address));
  1396. /* If this HCAM indicates a lost notification, read the config table */
  1397. if (pinstance->ccn.hcam->notification_lost) {
  1398. cfgcmd = pmcraid_get_free_cmd(pinstance);
  1399. if (cfgcmd) {
  1400. pmcraid_info("lost CCN, reading config table\b");
  1401. pinstance->reinit_cfg_table = 1;
  1402. pmcraid_querycfg(cfgcmd);
  1403. } else {
  1404. pmcraid_err("lost CCN, no free cmd for querycfg\n");
  1405. }
  1406. goto out_notify_apps;
  1407. }
  1408. /* If this resource is not going to be added to mid-layer, just notify
  1409. * applications and return. If this notification is about hiding a VSET
  1410. * resource, check if it was exposed already.
  1411. */
  1412. if (pinstance->ccn.hcam->notification_type ==
  1413. NOTIFICATION_TYPE_ENTRY_CHANGED &&
  1414. cfg_entry->resource_type == RES_TYPE_VSET) {
  1415. if (fw_version <= PMCRAID_FW_VERSION_1)
  1416. hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0;
  1417. else
  1418. hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0;
  1419. } else if (!pmcraid_expose_resource(fw_version, cfg_entry)) {
  1420. goto out_notify_apps;
  1421. }
  1422. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  1423. list_for_each_entry(res, &pinstance->used_res_q, queue) {
  1424. rc = memcmp(&res->cfg_entry.resource_address,
  1425. &cfg_entry->resource_address,
  1426. sizeof(cfg_entry->resource_address));
  1427. if (!rc) {
  1428. new_entry = 0;
  1429. break;
  1430. }
  1431. }
  1432. if (new_entry) {
  1433. if (hidden_entry) {
  1434. spin_unlock_irqrestore(&pinstance->resource_lock,
  1435. lock_flags);
  1436. goto out_notify_apps;
  1437. }
  1438. /* If there are more number of resources than what driver can
  1439. * manage, do not notify the applications about the CCN. Just
  1440. * ignore this notifications and re-register the same HCAM
  1441. */
  1442. if (list_empty(&pinstance->free_res_q)) {
  1443. spin_unlock_irqrestore(&pinstance->resource_lock,
  1444. lock_flags);
  1445. pmcraid_err("too many resources attached\n");
  1446. spin_lock_irqsave(pinstance->host->host_lock,
  1447. host_lock_flags);
  1448. pmcraid_send_hcam(pinstance,
  1449. PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1450. spin_unlock_irqrestore(pinstance->host->host_lock,
  1451. host_lock_flags);
  1452. return;
  1453. }
  1454. res = list_entry(pinstance->free_res_q.next,
  1455. struct pmcraid_resource_entry, queue);
  1456. list_del(&res->queue);
  1457. res->scsi_dev = NULL;
  1458. res->reset_progress = 0;
  1459. list_add_tail(&res->queue, &pinstance->used_res_q);
  1460. }
  1461. memcpy(&res->cfg_entry, cfg_entry, pinstance->config_table_entry_size);
  1462. if (pinstance->ccn.hcam->notification_type ==
  1463. NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) {
  1464. if (res->scsi_dev) {
  1465. if (fw_version <= PMCRAID_FW_VERSION_1)
  1466. res->cfg_entry.unique_flags1 &= 0x7F;
  1467. else
  1468. res->cfg_entry.array_id &= 0xFF;
  1469. res->change_detected = RES_CHANGE_DEL;
  1470. res->cfg_entry.resource_handle =
  1471. PMCRAID_INVALID_RES_HANDLE;
  1472. schedule_work(&pinstance->worker_q);
  1473. } else {
  1474. /* This may be one of the non-exposed resources */
  1475. list_move_tail(&res->queue, &pinstance->free_res_q);
  1476. }
  1477. } else if (!res->scsi_dev) {
  1478. res->change_detected = RES_CHANGE_ADD;
  1479. schedule_work(&pinstance->worker_q);
  1480. }
  1481. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  1482. out_notify_apps:
  1483. /* Notify configuration changes to registered applications.*/
  1484. if (!pmcraid_disable_aen)
  1485. pmcraid_notify_ccn(pinstance);
  1486. cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1487. if (cmd)
  1488. pmcraid_send_hcam_cmd(cmd);
  1489. }
  1490. /**
  1491. * pmcraid_get_error_info - return error string for an ioasc
  1492. * @ioasc: ioasc code
  1493. * Return Value
  1494. * none
  1495. */
  1496. static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc)
  1497. {
  1498. int i;
  1499. for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) {
  1500. if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc)
  1501. return &pmcraid_ioasc_error_table[i];
  1502. }
  1503. return NULL;
  1504. }
  1505. /**
  1506. * pmcraid_ioasc_logger - log IOASC information based user-settings
  1507. * @ioasc: ioasc code
  1508. * @cmd: pointer to command that resulted in 'ioasc'
  1509. */
  1510. static void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd)
  1511. {
  1512. struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc);
  1513. if (error_info == NULL ||
  1514. cmd->drv_inst->current_log_level < error_info->log_level)
  1515. return;
  1516. /* log the error string */
  1517. pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n",
  1518. cmd->ioa_cb->ioarcb.cdb[0],
  1519. cmd->ioa_cb->ioarcb.resource_handle,
  1520. le32_to_cpu(ioasc), error_info->error_string);
  1521. }
  1522. /**
  1523. * pmcraid_handle_error_log - Handle a config change (error log) from the IOA
  1524. *
  1525. * @pinstance: pointer to per adapter instance structure
  1526. *
  1527. * Return value:
  1528. * none
  1529. */
  1530. static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance)
  1531. {
  1532. struct pmcraid_hcam_ldn *hcam_ldn;
  1533. u32 ioasc;
  1534. hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
  1535. pmcraid_info
  1536. ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n",
  1537. pinstance->ldn.hcam->ilid,
  1538. pinstance->ldn.hcam->op_code,
  1539. pinstance->ldn.hcam->notification_type,
  1540. pinstance->ldn.hcam->notification_lost,
  1541. pinstance->ldn.hcam->flags,
  1542. pinstance->ldn.hcam->overlay_id);
  1543. /* log only the errors, no need to log informational log entries */
  1544. if (pinstance->ldn.hcam->notification_type !=
  1545. NOTIFICATION_TYPE_ERROR_LOG)
  1546. return;
  1547. if (pinstance->ldn.hcam->notification_lost ==
  1548. HOSTRCB_NOTIFICATIONS_LOST)
  1549. dev_info(&pinstance->pdev->dev, "Error notifications lost\n");
  1550. ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc);
  1551. if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
  1552. ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) {
  1553. dev_info(&pinstance->pdev->dev,
  1554. "UnitAttention due to IOA Bus Reset\n");
  1555. scsi_report_bus_reset(
  1556. pinstance->host,
  1557. RES_BUS(hcam_ldn->error_log.fd_ra));
  1558. }
  1559. return;
  1560. }
  1561. /**
  1562. * pmcraid_process_ccn - Op done function for a CCN.
  1563. * @cmd: pointer to command struct
  1564. *
  1565. * This function is the op done function for a configuration
  1566. * change notification
  1567. *
  1568. * Return value:
  1569. * none
  1570. */
  1571. static void pmcraid_process_ccn(struct pmcraid_cmd *cmd)
  1572. {
  1573. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1574. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  1575. unsigned long lock_flags;
  1576. pinstance->ccn.cmd = NULL;
  1577. pmcraid_return_cmd(cmd);
  1578. /* If driver initiated IOA reset happened while this hcam was pending
  1579. * with IOA, or IOA bringdown sequence is in progress, no need to
  1580. * re-register the hcam
  1581. */
  1582. if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
  1583. atomic_read(&pinstance->ccn.ignore) == 1) {
  1584. return;
  1585. } else if (ioasc) {
  1586. dev_info(&pinstance->pdev->dev,
  1587. "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc);
  1588. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  1589. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1590. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  1591. } else {
  1592. pmcraid_handle_config_change(pinstance);
  1593. }
  1594. }
  1595. /**
  1596. * pmcraid_process_ldn - op done function for an LDN
  1597. * @cmd: pointer to command block
  1598. *
  1599. * Return value
  1600. * none
  1601. */
  1602. static void pmcraid_initiate_reset(struct pmcraid_instance *);
  1603. static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd);
  1604. static void pmcraid_process_ldn(struct pmcraid_cmd *cmd)
  1605. {
  1606. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1607. struct pmcraid_hcam_ldn *ldn_hcam =
  1608. (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
  1609. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  1610. u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc);
  1611. unsigned long lock_flags;
  1612. /* return the command block back to freepool */
  1613. pinstance->ldn.cmd = NULL;
  1614. pmcraid_return_cmd(cmd);
  1615. /* If driver initiated IOA reset happened while this hcam was pending
  1616. * with IOA, no need to re-register the hcam as reset engine will do it
  1617. * once reset sequence is complete
  1618. */
  1619. if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
  1620. atomic_read(&pinstance->ccn.ignore) == 1) {
  1621. return;
  1622. } else if (!ioasc) {
  1623. pmcraid_handle_error_log(pinstance);
  1624. if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) {
  1625. spin_lock_irqsave(pinstance->host->host_lock,
  1626. lock_flags);
  1627. pmcraid_initiate_reset(pinstance);
  1628. spin_unlock_irqrestore(pinstance->host->host_lock,
  1629. lock_flags);
  1630. return;
  1631. }
  1632. if (fd_ioasc == PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC) {
  1633. pinstance->timestamp_error = 1;
  1634. pmcraid_set_timestamp(cmd);
  1635. }
  1636. } else {
  1637. dev_info(&pinstance->pdev->dev,
  1638. "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc);
  1639. }
  1640. /* send netlink message for HCAM notification if enabled */
  1641. if (!pmcraid_disable_aen)
  1642. pmcraid_notify_ldn(pinstance);
  1643. cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
  1644. if (cmd)
  1645. pmcraid_send_hcam_cmd(cmd);
  1646. }
  1647. /**
  1648. * pmcraid_register_hcams - register HCAMs for CCN and LDN
  1649. *
  1650. * @pinstance: pointer per adapter instance structure
  1651. *
  1652. * Return Value
  1653. * none
  1654. */
  1655. static void pmcraid_register_hcams(struct pmcraid_instance *pinstance)
  1656. {
  1657. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1658. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
  1659. }
  1660. /**
  1661. * pmcraid_unregister_hcams - cancel HCAMs registered already
  1662. * @cmd: pointer to command used as part of reset sequence
  1663. */
  1664. static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd)
  1665. {
  1666. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1667. /* During IOA bringdown, HCAM gets fired and tasklet proceeds with
  1668. * handling hcam response though it is not necessary. In order to
  1669. * prevent this, set 'ignore', so that bring-down sequence doesn't
  1670. * re-send any more hcams
  1671. */
  1672. atomic_set(&pinstance->ccn.ignore, 1);
  1673. atomic_set(&pinstance->ldn.ignore, 1);
  1674. /* If adapter reset was forced as part of runtime reset sequence,
  1675. * start the reset sequence. Reset will be triggered even in case
  1676. * IOA unit_check.
  1677. */
  1678. if ((pinstance->force_ioa_reset && !pinstance->ioa_bringdown) ||
  1679. pinstance->ioa_unit_check) {
  1680. pinstance->force_ioa_reset = 0;
  1681. pinstance->ioa_unit_check = 0;
  1682. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1683. pmcraid_reset_alert(cmd);
  1684. return;
  1685. }
  1686. /* Driver tries to cancel HCAMs by sending ABORT TASK for each HCAM
  1687. * one after the other. So CCN cancellation will be triggered by
  1688. * pmcraid_cancel_ldn itself.
  1689. */
  1690. pmcraid_cancel_ldn(cmd);
  1691. }
  1692. /**
  1693. * pmcraid_reset_enable_ioa - re-enable IOA after a hard reset
  1694. * @pinstance: pointer to adapter instance structure
  1695. * Return Value
  1696. * 1 if TRANSITION_TO_OPERATIONAL is active, otherwise 0
  1697. */
  1698. static void pmcraid_reinit_buffers(struct pmcraid_instance *);
  1699. static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance)
  1700. {
  1701. u32 intrs;
  1702. pmcraid_reinit_buffers(pinstance);
  1703. intrs = pmcraid_read_interrupts(pinstance);
  1704. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  1705. if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
  1706. if (!pinstance->interrupt_mode) {
  1707. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  1708. pinstance->int_regs.
  1709. ioa_host_interrupt_mask_reg);
  1710. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  1711. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  1712. }
  1713. return 1;
  1714. } else {
  1715. return 0;
  1716. }
  1717. }
  1718. /**
  1719. * pmcraid_soft_reset - performs a soft reset and makes IOA become ready
  1720. * @cmd : pointer to reset command block
  1721. *
  1722. * Return Value
  1723. * none
  1724. */
  1725. static void pmcraid_soft_reset(struct pmcraid_cmd *cmd)
  1726. {
  1727. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1728. u32 int_reg;
  1729. u32 doorbell;
  1730. /* There will be an interrupt when Transition to Operational bit is
  1731. * set so tasklet would execute next reset task. The timeout handler
  1732. * would re-initiate a reset
  1733. */
  1734. cmd->cmd_done = pmcraid_ioa_reset;
  1735. cmd->timer.data = (unsigned long)cmd;
  1736. cmd->timer.expires = jiffies +
  1737. msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT);
  1738. cmd->timer.function = (void (*)(unsigned long))pmcraid_timeout_handler;
  1739. if (!timer_pending(&cmd->timer))
  1740. add_timer(&cmd->timer);
  1741. /* Enable destructive diagnostics on IOA if it is not yet in
  1742. * operational state
  1743. */
  1744. doorbell = DOORBELL_RUNTIME_RESET |
  1745. DOORBELL_ENABLE_DESTRUCTIVE_DIAGS;
  1746. /* Since we do RESET_ALERT and Start BIST we have to again write
  1747. * MSIX Doorbell to indicate the interrupt mode
  1748. */
  1749. if (pinstance->interrupt_mode) {
  1750. iowrite32(DOORBELL_INTR_MODE_MSIX,
  1751. pinstance->int_regs.host_ioa_interrupt_reg);
  1752. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  1753. }
  1754. iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg);
  1755. ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
  1756. int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  1757. pmcraid_info("Waiting for IOA to become operational %x:%x\n",
  1758. ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
  1759. int_reg);
  1760. }
  1761. /**
  1762. * pmcraid_get_dump - retrieves IOA dump in case of Unit Check interrupt
  1763. *
  1764. * @pinstance: pointer to adapter instance structure
  1765. *
  1766. * Return Value
  1767. * none
  1768. */
  1769. static void pmcraid_get_dump(struct pmcraid_instance *pinstance)
  1770. {
  1771. pmcraid_info("%s is not yet implemented\n", __func__);
  1772. }
  1773. /**
  1774. * pmcraid_fail_outstanding_cmds - Fails all outstanding ops.
  1775. * @pinstance: pointer to adapter instance structure
  1776. *
  1777. * This function fails all outstanding ops. If they are submitted to IOA
  1778. * already, it sends cancel all messages if IOA is still accepting IOARCBs,
  1779. * otherwise just completes the commands and returns the cmd blocks to free
  1780. * pool.
  1781. *
  1782. * Return value:
  1783. * none
  1784. */
  1785. static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance)
  1786. {
  1787. struct pmcraid_cmd *cmd, *temp;
  1788. unsigned long lock_flags;
  1789. /* pending command list is protected by pending_pool_lock. Its
  1790. * traversal must be done as within this lock
  1791. */
  1792. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  1793. list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool,
  1794. free_list) {
  1795. list_del(&cmd->free_list);
  1796. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  1797. lock_flags);
  1798. cmd->ioa_cb->ioasa.ioasc =
  1799. cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET);
  1800. cmd->ioa_cb->ioasa.ilid =
  1801. cpu_to_be32(PMCRAID_DRIVER_ILID);
  1802. /* In case the command timer is still running */
  1803. del_timer(&cmd->timer);
  1804. /* If this is an IO command, complete it by invoking scsi_done
  1805. * function. If this is one of the internal commands other
  1806. * than pmcraid_ioa_reset and HCAM commands invoke cmd_done to
  1807. * complete it
  1808. */
  1809. if (cmd->scsi_cmd) {
  1810. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  1811. __le32 resp = cmd->ioa_cb->ioarcb.response_handle;
  1812. scsi_cmd->result |= DID_ERROR << 16;
  1813. scsi_dma_unmap(scsi_cmd);
  1814. pmcraid_return_cmd(cmd);
  1815. pmcraid_info("failing(%d) CDB[0] = %x result: %x\n",
  1816. le32_to_cpu(resp) >> 2,
  1817. cmd->ioa_cb->ioarcb.cdb[0],
  1818. scsi_cmd->result);
  1819. scsi_cmd->scsi_done(scsi_cmd);
  1820. } else if (cmd->cmd_done == pmcraid_internal_done ||
  1821. cmd->cmd_done == pmcraid_erp_done) {
  1822. cmd->cmd_done(cmd);
  1823. } else if (cmd->cmd_done != pmcraid_ioa_reset &&
  1824. cmd->cmd_done != pmcraid_ioa_shutdown_done) {
  1825. pmcraid_return_cmd(cmd);
  1826. }
  1827. atomic_dec(&pinstance->outstanding_cmds);
  1828. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  1829. }
  1830. spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
  1831. }
  1832. /**
  1833. * pmcraid_ioa_reset - Implementation of IOA reset logic
  1834. *
  1835. * @cmd: pointer to the cmd block to be used for entire reset process
  1836. *
  1837. * This function executes most of the steps required for IOA reset. This gets
  1838. * called by user threads (modprobe/insmod/rmmod) timer, tasklet and midlayer's
  1839. * 'eh_' thread. Access to variables used for controlling the reset sequence is
  1840. * synchronized using host lock. Various functions called during reset process
  1841. * would make use of a single command block, pointer to which is also stored in
  1842. * adapter instance structure.
  1843. *
  1844. * Return Value
  1845. * None
  1846. */
  1847. static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd)
  1848. {
  1849. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1850. u8 reset_complete = 0;
  1851. pinstance->ioa_reset_in_progress = 1;
  1852. if (pinstance->reset_cmd != cmd) {
  1853. pmcraid_err("reset is called with different command block\n");
  1854. pinstance->reset_cmd = cmd;
  1855. }
  1856. pmcraid_info("reset_engine: state = %d, command = %p\n",
  1857. pinstance->ioa_state, cmd);
  1858. switch (pinstance->ioa_state) {
  1859. case IOA_STATE_DEAD:
  1860. /* If IOA is offline, whatever may be the reset reason, just
  1861. * return. callers might be waiting on the reset wait_q, wake
  1862. * up them
  1863. */
  1864. pmcraid_err("IOA is offline no reset is possible\n");
  1865. reset_complete = 1;
  1866. break;
  1867. case IOA_STATE_IN_BRINGDOWN:
  1868. /* we enter here, once ioa shutdown command is processed by IOA
  1869. * Alert IOA for a possible reset. If reset alert fails, IOA
  1870. * goes through hard-reset
  1871. */
  1872. pmcraid_disable_interrupts(pinstance, ~0);
  1873. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1874. pmcraid_reset_alert(cmd);
  1875. break;
  1876. case IOA_STATE_UNKNOWN:
  1877. /* We may be called during probe or resume. Some pre-processing
  1878. * is required for prior to reset
  1879. */
  1880. scsi_block_requests(pinstance->host);
  1881. /* If asked to reset while IOA was processing responses or
  1882. * there are any error responses then IOA may require
  1883. * hard-reset.
  1884. */
  1885. if (pinstance->ioa_hard_reset == 0) {
  1886. if (ioread32(pinstance->ioa_status) &
  1887. INTRS_TRANSITION_TO_OPERATIONAL) {
  1888. pmcraid_info("sticky bit set, bring-up\n");
  1889. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1890. pmcraid_reinit_cmdblk(cmd);
  1891. pmcraid_identify_hrrq(cmd);
  1892. } else {
  1893. pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
  1894. pmcraid_soft_reset(cmd);
  1895. }
  1896. } else {
  1897. /* Alert IOA of a possible reset and wait for critical
  1898. * operation in progress bit to reset
  1899. */
  1900. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1901. pmcraid_reset_alert(cmd);
  1902. }
  1903. break;
  1904. case IOA_STATE_IN_RESET_ALERT:
  1905. /* If critical operation in progress bit is reset or wait gets
  1906. * timed out, reset proceeds with starting BIST on the IOA.
  1907. * pmcraid_ioa_hard_reset keeps a count of reset attempts. If
  1908. * they are 3 or more, reset engine marks IOA dead and returns
  1909. */
  1910. pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
  1911. pmcraid_start_bist(cmd);
  1912. break;
  1913. case IOA_STATE_IN_HARD_RESET:
  1914. pinstance->ioa_reset_attempts++;
  1915. /* retry reset if we haven't reached maximum allowed limit */
  1916. if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) {
  1917. pinstance->ioa_reset_attempts = 0;
  1918. pmcraid_err("IOA didn't respond marking it as dead\n");
  1919. pinstance->ioa_state = IOA_STATE_DEAD;
  1920. if (pinstance->ioa_bringdown)
  1921. pmcraid_notify_ioastate(pinstance,
  1922. PMC_DEVICE_EVENT_SHUTDOWN_FAILED);
  1923. else
  1924. pmcraid_notify_ioastate(pinstance,
  1925. PMC_DEVICE_EVENT_RESET_FAILED);
  1926. reset_complete = 1;
  1927. break;
  1928. }
  1929. /* Once either bist or pci reset is done, restore PCI config
  1930. * space. If this fails, proceed with hard reset again
  1931. */
  1932. pci_restore_state(pinstance->pdev);
  1933. /* fail all pending commands */
  1934. pmcraid_fail_outstanding_cmds(pinstance);
  1935. /* check if unit check is active, if so extract dump */
  1936. if (pinstance->ioa_unit_check) {
  1937. pmcraid_info("unit check is active\n");
  1938. pinstance->ioa_unit_check = 0;
  1939. pmcraid_get_dump(pinstance);
  1940. pinstance->ioa_reset_attempts--;
  1941. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1942. pmcraid_reset_alert(cmd);
  1943. break;
  1944. }
  1945. /* if the reset reason is to bring-down the ioa, we might be
  1946. * done with the reset restore pci_config_space and complete
  1947. * the reset
  1948. */
  1949. if (pinstance->ioa_bringdown) {
  1950. pmcraid_info("bringing down the adapter\n");
  1951. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  1952. pinstance->ioa_bringdown = 0;
  1953. pinstance->ioa_state = IOA_STATE_UNKNOWN;
  1954. pmcraid_notify_ioastate(pinstance,
  1955. PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS);
  1956. reset_complete = 1;
  1957. } else {
  1958. /* bring-up IOA, so proceed with soft reset
  1959. * Reinitialize hrrq_buffers and their indices also
  1960. * enable interrupts after a pci_restore_state
  1961. */
  1962. if (pmcraid_reset_enable_ioa(pinstance)) {
  1963. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1964. pmcraid_info("bringing up the adapter\n");
  1965. pmcraid_reinit_cmdblk(cmd);
  1966. pmcraid_identify_hrrq(cmd);
  1967. } else {
  1968. pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
  1969. pmcraid_soft_reset(cmd);
  1970. }
  1971. }
  1972. break;
  1973. case IOA_STATE_IN_SOFT_RESET:
  1974. /* TRANSITION TO OPERATIONAL is on so start initialization
  1975. * sequence
  1976. */
  1977. pmcraid_info("In softreset proceeding with bring-up\n");
  1978. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1979. /* Initialization commands start with HRRQ identification. From
  1980. * now on tasklet completes most of the commands as IOA is up
  1981. * and intrs are enabled
  1982. */
  1983. pmcraid_identify_hrrq(cmd);
  1984. break;
  1985. case IOA_STATE_IN_BRINGUP:
  1986. /* we are done with bringing up of IOA, change the ioa_state to
  1987. * operational and wake up any waiters
  1988. */
  1989. pinstance->ioa_state = IOA_STATE_OPERATIONAL;
  1990. reset_complete = 1;
  1991. break;
  1992. case IOA_STATE_OPERATIONAL:
  1993. default:
  1994. /* When IOA is operational and a reset is requested, check for
  1995. * the reset reason. If reset is to bring down IOA, unregister
  1996. * HCAMs and initiate shutdown; if adapter reset is forced then
  1997. * restart reset sequence again
  1998. */
  1999. if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE &&
  2000. pinstance->force_ioa_reset == 0) {
  2001. pmcraid_notify_ioastate(pinstance,
  2002. PMC_DEVICE_EVENT_RESET_SUCCESS);
  2003. reset_complete = 1;
  2004. } else {
  2005. if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE)
  2006. pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN;
  2007. pmcraid_reinit_cmdblk(cmd);
  2008. pmcraid_unregister_hcams(cmd);
  2009. }
  2010. break;
  2011. }
  2012. /* reset will be completed if ioa_state is either DEAD or UNKNOWN or
  2013. * OPERATIONAL. Reset all control variables used during reset, wake up
  2014. * any waiting threads and let the SCSI mid-layer send commands. Note
  2015. * that host_lock must be held before invoking scsi_report_bus_reset.
  2016. */
  2017. if (reset_complete) {
  2018. pinstance->ioa_reset_in_progress = 0;
  2019. pinstance->ioa_reset_attempts = 0;
  2020. pinstance->reset_cmd = NULL;
  2021. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  2022. pinstance->ioa_bringdown = 0;
  2023. pmcraid_return_cmd(cmd);
  2024. /* If target state is to bring up the adapter, proceed with
  2025. * hcam registration and resource exposure to mid-layer.
  2026. */
  2027. if (pinstance->ioa_state == IOA_STATE_OPERATIONAL)
  2028. pmcraid_register_hcams(pinstance);
  2029. wake_up_all(&pinstance->reset_wait_q);
  2030. }
  2031. return;
  2032. }
  2033. /**
  2034. * pmcraid_initiate_reset - initiates reset sequence. This is called from
  2035. * ISR/tasklet during error interrupts including IOA unit check. If reset
  2036. * is already in progress, it just returns, otherwise initiates IOA reset
  2037. * to bring IOA up to operational state.
  2038. *
  2039. * @pinstance: pointer to adapter instance structure
  2040. *
  2041. * Return value
  2042. * none
  2043. */
  2044. static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance)
  2045. {
  2046. struct pmcraid_cmd *cmd;
  2047. /* If the reset is already in progress, just return, otherwise start
  2048. * reset sequence and return
  2049. */
  2050. if (!pinstance->ioa_reset_in_progress) {
  2051. scsi_block_requests(pinstance->host);
  2052. cmd = pmcraid_get_free_cmd(pinstance);
  2053. if (cmd == NULL) {
  2054. pmcraid_err("no cmnd blocks for initiate_reset\n");
  2055. return;
  2056. }
  2057. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  2058. pinstance->reset_cmd = cmd;
  2059. pinstance->force_ioa_reset = 1;
  2060. pmcraid_notify_ioastate(pinstance,
  2061. PMC_DEVICE_EVENT_RESET_START);
  2062. pmcraid_ioa_reset(cmd);
  2063. }
  2064. }
  2065. /**
  2066. * pmcraid_reset_reload - utility routine for doing IOA reset either to bringup
  2067. * or bringdown IOA
  2068. * @pinstance: pointer adapter instance structure
  2069. * @shutdown_type: shutdown type to be used NONE, NORMAL or ABRREV
  2070. * @target_state: expected target state after reset
  2071. *
  2072. * Note: This command initiates reset and waits for its completion. Hence this
  2073. * should not be called from isr/timer/tasklet functions (timeout handlers,
  2074. * error response handlers and interrupt handlers).
  2075. *
  2076. * Return Value
  2077. * 1 in case ioa_state is not target_state, 0 otherwise.
  2078. */
  2079. static int pmcraid_reset_reload(
  2080. struct pmcraid_instance *pinstance,
  2081. u8 shutdown_type,
  2082. u8 target_state
  2083. )
  2084. {
  2085. struct pmcraid_cmd *reset_cmd = NULL;
  2086. unsigned long lock_flags;
  2087. int reset = 1;
  2088. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  2089. if (pinstance->ioa_reset_in_progress) {
  2090. pmcraid_info("reset_reload: reset is already in progress\n");
  2091. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2092. wait_event(pinstance->reset_wait_q,
  2093. !pinstance->ioa_reset_in_progress);
  2094. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  2095. if (pinstance->ioa_state == IOA_STATE_DEAD) {
  2096. spin_unlock_irqrestore(pinstance->host->host_lock,
  2097. lock_flags);
  2098. pmcraid_info("reset_reload: IOA is dead\n");
  2099. return reset;
  2100. } else if (pinstance->ioa_state == target_state) {
  2101. reset = 0;
  2102. }
  2103. }
  2104. if (reset) {
  2105. pmcraid_info("reset_reload: proceeding with reset\n");
  2106. scsi_block_requests(pinstance->host);
  2107. reset_cmd = pmcraid_get_free_cmd(pinstance);
  2108. if (reset_cmd == NULL) {
  2109. pmcraid_err("no free cmnd for reset_reload\n");
  2110. spin_unlock_irqrestore(pinstance->host->host_lock,
  2111. lock_flags);
  2112. return reset;
  2113. }
  2114. if (shutdown_type == SHUTDOWN_NORMAL)
  2115. pinstance->ioa_bringdown = 1;
  2116. pinstance->ioa_shutdown_type = shutdown_type;
  2117. pinstance->reset_cmd = reset_cmd;
  2118. pinstance->force_ioa_reset = reset;
  2119. pmcraid_info("reset_reload: initiating reset\n");
  2120. pmcraid_ioa_reset(reset_cmd);
  2121. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2122. pmcraid_info("reset_reload: waiting for reset to complete\n");
  2123. wait_event(pinstance->reset_wait_q,
  2124. !pinstance->ioa_reset_in_progress);
  2125. pmcraid_info("reset_reload: reset is complete !!\n");
  2126. scsi_unblock_requests(pinstance->host);
  2127. if (pinstance->ioa_state == target_state)
  2128. reset = 0;
  2129. }
  2130. return reset;
  2131. }
  2132. /**
  2133. * pmcraid_reset_bringdown - wrapper over pmcraid_reset_reload to bringdown IOA
  2134. *
  2135. * @pinstance: pointer to adapter instance structure
  2136. *
  2137. * Return Value
  2138. * whatever is returned from pmcraid_reset_reload
  2139. */
  2140. static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance)
  2141. {
  2142. return pmcraid_reset_reload(pinstance,
  2143. SHUTDOWN_NORMAL,
  2144. IOA_STATE_UNKNOWN);
  2145. }
  2146. /**
  2147. * pmcraid_reset_bringup - wrapper over pmcraid_reset_reload to bring up IOA
  2148. *
  2149. * @pinstance: pointer to adapter instance structure
  2150. *
  2151. * Return Value
  2152. * whatever is returned from pmcraid_reset_reload
  2153. */
  2154. static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance)
  2155. {
  2156. pmcraid_notify_ioastate(pinstance, PMC_DEVICE_EVENT_RESET_START);
  2157. return pmcraid_reset_reload(pinstance,
  2158. SHUTDOWN_NONE,
  2159. IOA_STATE_OPERATIONAL);
  2160. }
  2161. /**
  2162. * pmcraid_request_sense - Send request sense to a device
  2163. * @cmd: pmcraid command struct
  2164. *
  2165. * This function sends a request sense to a device as a result of a check
  2166. * condition. This method re-uses the same command block that failed earlier.
  2167. */
  2168. static void pmcraid_request_sense(struct pmcraid_cmd *cmd)
  2169. {
  2170. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2171. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  2172. /* allocate DMAable memory for sense buffers */
  2173. cmd->sense_buffer = pci_alloc_consistent(cmd->drv_inst->pdev,
  2174. SCSI_SENSE_BUFFERSIZE,
  2175. &cmd->sense_buffer_dma);
  2176. if (cmd->sense_buffer == NULL) {
  2177. pmcraid_err
  2178. ("couldn't allocate sense buffer for request sense\n");
  2179. pmcraid_erp_done(cmd);
  2180. return;
  2181. }
  2182. /* re-use the command block */
  2183. memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa));
  2184. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  2185. ioarcb->request_flags0 = (SYNC_COMPLETE |
  2186. NO_LINK_DESCS |
  2187. INHIBIT_UL_CHECK);
  2188. ioarcb->request_type = REQ_TYPE_SCSI;
  2189. ioarcb->cdb[0] = REQUEST_SENSE;
  2190. ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE;
  2191. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  2192. offsetof(struct pmcraid_ioarcb,
  2193. add_data.u.ioadl[0]));
  2194. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  2195. ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
  2196. ioadl->address = cpu_to_le64(cmd->sense_buffer_dma);
  2197. ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
  2198. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  2199. /* request sense might be called as part of error response processing
  2200. * which runs in tasklets context. It is possible that mid-layer might
  2201. * schedule queuecommand during this time, hence, writting to IOARRIN
  2202. * must be protect by host_lock
  2203. */
  2204. pmcraid_send_cmd(cmd, pmcraid_erp_done,
  2205. PMCRAID_REQUEST_SENSE_TIMEOUT,
  2206. pmcraid_timeout_handler);
  2207. }
  2208. /**
  2209. * pmcraid_cancel_all - cancel all outstanding IOARCBs as part of error recovery
  2210. * @cmd: command that failed
  2211. * @sense: true if request_sense is required after cancel all
  2212. *
  2213. * This function sends a cancel all to a device to clear the queue.
  2214. */
  2215. static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, u32 sense)
  2216. {
  2217. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2218. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2219. struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
  2220. void (*cmd_done) (struct pmcraid_cmd *) = sense ? pmcraid_erp_done
  2221. : pmcraid_request_sense;
  2222. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  2223. ioarcb->request_flags0 = SYNC_OVERRIDE;
  2224. ioarcb->request_type = REQ_TYPE_IOACMD;
  2225. ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS;
  2226. if (RES_IS_GSCSI(res->cfg_entry))
  2227. ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL;
  2228. ioarcb->ioadl_bus_addr = 0;
  2229. ioarcb->ioadl_length = 0;
  2230. ioarcb->data_transfer_length = 0;
  2231. ioarcb->ioarcb_bus_addr &= (~0x1FULL);
  2232. /* writing to IOARRIN must be protected by host_lock, as mid-layer
  2233. * schedule queuecommand while we are doing this
  2234. */
  2235. pmcraid_send_cmd(cmd, cmd_done,
  2236. PMCRAID_REQUEST_SENSE_TIMEOUT,
  2237. pmcraid_timeout_handler);
  2238. }
  2239. /**
  2240. * pmcraid_frame_auto_sense: frame fixed format sense information
  2241. *
  2242. * @cmd: pointer to failing command block
  2243. *
  2244. * Return value
  2245. * none
  2246. */
  2247. static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd)
  2248. {
  2249. u8 *sense_buf = cmd->scsi_cmd->sense_buffer;
  2250. struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata;
  2251. struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
  2252. u32 ioasc = le32_to_cpu(ioasa->ioasc);
  2253. u32 failing_lba = 0;
  2254. memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
  2255. cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
  2256. if (RES_IS_VSET(res->cfg_entry) &&
  2257. ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC &&
  2258. ioasa->u.vset.failing_lba_hi != 0) {
  2259. sense_buf[0] = 0x72;
  2260. sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc);
  2261. sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc);
  2262. sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
  2263. sense_buf[7] = 12;
  2264. sense_buf[8] = 0;
  2265. sense_buf[9] = 0x0A;
  2266. sense_buf[10] = 0x80;
  2267. failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi);
  2268. sense_buf[12] = (failing_lba & 0xff000000) >> 24;
  2269. sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
  2270. sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
  2271. sense_buf[15] = failing_lba & 0x000000ff;
  2272. failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo);
  2273. sense_buf[16] = (failing_lba & 0xff000000) >> 24;
  2274. sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
  2275. sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
  2276. sense_buf[19] = failing_lba & 0x000000ff;
  2277. } else {
  2278. sense_buf[0] = 0x70;
  2279. sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc);
  2280. sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc);
  2281. sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
  2282. if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) {
  2283. if (RES_IS_VSET(res->cfg_entry))
  2284. failing_lba =
  2285. le32_to_cpu(ioasa->u.
  2286. vset.failing_lba_lo);
  2287. sense_buf[0] |= 0x80;
  2288. sense_buf[3] = (failing_lba >> 24) & 0xff;
  2289. sense_buf[4] = (failing_lba >> 16) & 0xff;
  2290. sense_buf[5] = (failing_lba >> 8) & 0xff;
  2291. sense_buf[6] = failing_lba & 0xff;
  2292. }
  2293. sense_buf[7] = 6; /* additional length */
  2294. }
  2295. }
  2296. /**
  2297. * pmcraid_error_handler - Error response handlers for a SCSI op
  2298. * @cmd: pointer to pmcraid_cmd that has failed
  2299. *
  2300. * This function determines whether or not to initiate ERP on the affected
  2301. * device. This is called from a tasklet, which doesn't hold any locks.
  2302. *
  2303. * Return value:
  2304. * 0 it caller can complete the request, otherwise 1 where in error
  2305. * handler itself completes the request and returns the command block
  2306. * back to free-pool
  2307. */
  2308. static int pmcraid_error_handler(struct pmcraid_cmd *cmd)
  2309. {
  2310. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2311. struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
  2312. struct pmcraid_instance *pinstance = cmd->drv_inst;
  2313. struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
  2314. u32 ioasc = le32_to_cpu(ioasa->ioasc);
  2315. u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK;
  2316. u32 sense_copied = 0;
  2317. if (!res) {
  2318. pmcraid_info("resource pointer is NULL\n");
  2319. return 0;
  2320. }
  2321. /* If this was a SCSI read/write command keep count of errors */
  2322. if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD)
  2323. atomic_inc(&res->read_failures);
  2324. else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD)
  2325. atomic_inc(&res->write_failures);
  2326. if (!RES_IS_GSCSI(res->cfg_entry) &&
  2327. masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) {
  2328. pmcraid_frame_auto_sense(cmd);
  2329. }
  2330. /* Log IOASC/IOASA information based on user settings */
  2331. pmcraid_ioasc_logger(ioasc, cmd);
  2332. switch (masked_ioasc) {
  2333. case PMCRAID_IOASC_AC_TERMINATED_BY_HOST:
  2334. scsi_cmd->result |= (DID_ABORT << 16);
  2335. break;
  2336. case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE:
  2337. case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE:
  2338. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  2339. break;
  2340. case PMCRAID_IOASC_NR_SYNC_REQUIRED:
  2341. res->sync_reqd = 1;
  2342. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  2343. break;
  2344. case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC:
  2345. scsi_cmd->result |= (DID_PASSTHROUGH << 16);
  2346. break;
  2347. case PMCRAID_IOASC_UA_BUS_WAS_RESET:
  2348. case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER:
  2349. if (!res->reset_progress)
  2350. scsi_report_bus_reset(pinstance->host,
  2351. scsi_cmd->device->channel);
  2352. scsi_cmd->result |= (DID_ERROR << 16);
  2353. break;
  2354. case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR:
  2355. scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc);
  2356. res->sync_reqd = 1;
  2357. /* if check_condition is not active return with error otherwise
  2358. * get/frame the sense buffer
  2359. */
  2360. if (PMCRAID_IOASC_SENSE_STATUS(ioasc) !=
  2361. SAM_STAT_CHECK_CONDITION &&
  2362. PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE)
  2363. return 0;
  2364. /* If we have auto sense data as part of IOASA pass it to
  2365. * mid-layer
  2366. */
  2367. if (ioasa->auto_sense_length != 0) {
  2368. short sense_len = ioasa->auto_sense_length;
  2369. int data_size = min_t(u16, le16_to_cpu(sense_len),
  2370. SCSI_SENSE_BUFFERSIZE);
  2371. memcpy(scsi_cmd->sense_buffer,
  2372. ioasa->sense_data,
  2373. data_size);
  2374. sense_copied = 1;
  2375. }
  2376. if (RES_IS_GSCSI(res->cfg_entry))
  2377. pmcraid_cancel_all(cmd, sense_copied);
  2378. else if (sense_copied)
  2379. pmcraid_erp_done(cmd);
  2380. else
  2381. pmcraid_request_sense(cmd);
  2382. return 1;
  2383. case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED:
  2384. break;
  2385. default:
  2386. if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  2387. scsi_cmd->result |= (DID_ERROR << 16);
  2388. break;
  2389. }
  2390. return 0;
  2391. }
  2392. /**
  2393. * pmcraid_reset_device - device reset handler functions
  2394. *
  2395. * @scsi_cmd: scsi command struct
  2396. * @modifier: reset modifier indicating the reset sequence to be performed
  2397. *
  2398. * This function issues a device reset to the affected device.
  2399. * A LUN reset will be sent to the device first. If that does
  2400. * not work, a target reset will be sent.
  2401. *
  2402. * Return value:
  2403. * SUCCESS / FAILED
  2404. */
  2405. static int pmcraid_reset_device(
  2406. struct scsi_cmnd *scsi_cmd,
  2407. unsigned long timeout,
  2408. u8 modifier
  2409. )
  2410. {
  2411. struct pmcraid_cmd *cmd;
  2412. struct pmcraid_instance *pinstance;
  2413. struct pmcraid_resource_entry *res;
  2414. struct pmcraid_ioarcb *ioarcb;
  2415. unsigned long lock_flags;
  2416. u32 ioasc;
  2417. pinstance =
  2418. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  2419. res = scsi_cmd->device->hostdata;
  2420. if (!res) {
  2421. sdev_printk(KERN_ERR, scsi_cmd->device,
  2422. "reset_device: NULL resource pointer\n");
  2423. return FAILED;
  2424. }
  2425. /* If adapter is currently going through reset/reload, return failed.
  2426. * This will force the mid-layer to call _eh_bus/host reset, which
  2427. * will then go to sleep and wait for the reset to complete
  2428. */
  2429. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  2430. if (pinstance->ioa_reset_in_progress ||
  2431. pinstance->ioa_state == IOA_STATE_DEAD) {
  2432. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2433. return FAILED;
  2434. }
  2435. res->reset_progress = 1;
  2436. pmcraid_info("Resetting %s resource with addr %x\n",
  2437. ((modifier & RESET_DEVICE_LUN) ? "LUN" :
  2438. ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")),
  2439. le32_to_cpu(res->cfg_entry.resource_address));
  2440. /* get a free cmd block */
  2441. cmd = pmcraid_get_free_cmd(pinstance);
  2442. if (cmd == NULL) {
  2443. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2444. pmcraid_err("%s: no cmd blocks are available\n", __func__);
  2445. return FAILED;
  2446. }
  2447. ioarcb = &cmd->ioa_cb->ioarcb;
  2448. ioarcb->resource_handle = res->cfg_entry.resource_handle;
  2449. ioarcb->request_type = REQ_TYPE_IOACMD;
  2450. ioarcb->cdb[0] = PMCRAID_RESET_DEVICE;
  2451. /* Initialize reset modifier bits */
  2452. if (modifier)
  2453. modifier = ENABLE_RESET_MODIFIER | modifier;
  2454. ioarcb->cdb[1] = modifier;
  2455. init_completion(&cmd->wait_for_completion);
  2456. cmd->completion_req = 1;
  2457. pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n",
  2458. cmd->ioa_cb->ioarcb.cdb[0],
  2459. le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
  2460. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
  2461. pmcraid_send_cmd(cmd,
  2462. pmcraid_internal_done,
  2463. timeout,
  2464. pmcraid_timeout_handler);
  2465. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2466. /* RESET_DEVICE command completes after all pending IOARCBs are
  2467. * completed. Once this command is completed, pmcraind_internal_done
  2468. * will wake up the 'completion' queue.
  2469. */
  2470. wait_for_completion(&cmd->wait_for_completion);
  2471. /* complete the command here itself and return the command block
  2472. * to free list
  2473. */
  2474. pmcraid_return_cmd(cmd);
  2475. res->reset_progress = 0;
  2476. ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  2477. /* set the return value based on the returned ioasc */
  2478. return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  2479. }
  2480. /**
  2481. * _pmcraid_io_done - helper for pmcraid_io_done function
  2482. *
  2483. * @cmd: pointer to pmcraid command struct
  2484. * @reslen: residual data length to be set in the ioasa
  2485. * @ioasc: ioasc either returned by IOA or set by driver itself.
  2486. *
  2487. * This function is invoked by pmcraid_io_done to complete mid-layer
  2488. * scsi ops.
  2489. *
  2490. * Return value:
  2491. * 0 if caller is required to return it to free_pool. Returns 1 if
  2492. * caller need not worry about freeing command block as error handler
  2493. * will take care of that.
  2494. */
  2495. static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc)
  2496. {
  2497. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2498. int rc = 0;
  2499. scsi_set_resid(scsi_cmd, reslen);
  2500. pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n",
  2501. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
  2502. cmd->ioa_cb->ioarcb.cdb[0],
  2503. ioasc, scsi_cmd->result);
  2504. if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0)
  2505. rc = pmcraid_error_handler(cmd);
  2506. if (rc == 0) {
  2507. scsi_dma_unmap(scsi_cmd);
  2508. scsi_cmd->scsi_done(scsi_cmd);
  2509. }
  2510. return rc;
  2511. }
  2512. /**
  2513. * pmcraid_io_done - SCSI completion function
  2514. *
  2515. * @cmd: pointer to pmcraid command struct
  2516. *
  2517. * This function is invoked by tasklet/mid-layer error handler to completing
  2518. * the SCSI ops sent from mid-layer.
  2519. *
  2520. * Return value
  2521. * none
  2522. */
  2523. static void pmcraid_io_done(struct pmcraid_cmd *cmd)
  2524. {
  2525. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  2526. u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length);
  2527. if (_pmcraid_io_done(cmd, reslen, ioasc) == 0)
  2528. pmcraid_return_cmd(cmd);
  2529. }
  2530. /**
  2531. * pmcraid_abort_cmd - Aborts a single IOARCB already submitted to IOA
  2532. *
  2533. * @cmd: command block of the command to be aborted
  2534. *
  2535. * Return Value:
  2536. * returns pointer to command structure used as cancelling cmd
  2537. */
  2538. static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd)
  2539. {
  2540. struct pmcraid_cmd *cancel_cmd;
  2541. struct pmcraid_instance *pinstance;
  2542. struct pmcraid_resource_entry *res;
  2543. pinstance = (struct pmcraid_instance *)cmd->drv_inst;
  2544. res = cmd->scsi_cmd->device->hostdata;
  2545. cancel_cmd = pmcraid_get_free_cmd(pinstance);
  2546. if (cancel_cmd == NULL) {
  2547. pmcraid_err("%s: no cmd blocks are available\n", __func__);
  2548. return NULL;
  2549. }
  2550. pmcraid_prepare_cancel_cmd(cancel_cmd, cmd);
  2551. pmcraid_info("aborting command CDB[0]= %x with index = %d\n",
  2552. cmd->ioa_cb->ioarcb.cdb[0],
  2553. cmd->ioa_cb->ioarcb.response_handle >> 2);
  2554. init_completion(&cancel_cmd->wait_for_completion);
  2555. cancel_cmd->completion_req = 1;
  2556. pmcraid_info("command (%d) CDB[0] = %x for %x\n",
  2557. le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2,
  2558. cancel_cmd->ioa_cb->ioarcb.cdb[0],
  2559. le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle));
  2560. pmcraid_send_cmd(cancel_cmd,
  2561. pmcraid_internal_done,
  2562. PMCRAID_INTERNAL_TIMEOUT,
  2563. pmcraid_timeout_handler);
  2564. return cancel_cmd;
  2565. }
  2566. /**
  2567. * pmcraid_abort_complete - Waits for ABORT TASK completion
  2568. *
  2569. * @cancel_cmd: command block use as cancelling command
  2570. *
  2571. * Return Value:
  2572. * returns SUCCESS if ABORT TASK has good completion
  2573. * otherwise FAILED
  2574. */
  2575. static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd)
  2576. {
  2577. struct pmcraid_resource_entry *res;
  2578. u32 ioasc;
  2579. wait_for_completion(&cancel_cmd->wait_for_completion);
  2580. res = cancel_cmd->res;
  2581. cancel_cmd->res = NULL;
  2582. ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
  2583. /* If the abort task is not timed out we will get a Good completion
  2584. * as sense_key, otherwise we may get one the following responses
  2585. * due to subsequent bus reset or device reset. In case IOASC is
  2586. * NR_SYNC_REQUIRED, set sync_reqd flag for the corresponding resource
  2587. */
  2588. if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
  2589. ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) {
  2590. if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED)
  2591. res->sync_reqd = 1;
  2592. ioasc = 0;
  2593. }
  2594. /* complete the command here itself */
  2595. pmcraid_return_cmd(cancel_cmd);
  2596. return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  2597. }
  2598. /**
  2599. * pmcraid_eh_abort_handler - entry point for aborting a single task on errors
  2600. *
  2601. * @scsi_cmd: scsi command struct given by mid-layer. When this is called
  2602. * mid-layer ensures that no other commands are queued. This
  2603. * never gets called under interrupt, but a separate eh thread.
  2604. *
  2605. * Return value:
  2606. * SUCCESS / FAILED
  2607. */
  2608. static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd)
  2609. {
  2610. struct pmcraid_instance *pinstance;
  2611. struct pmcraid_cmd *cmd;
  2612. struct pmcraid_resource_entry *res;
  2613. unsigned long host_lock_flags;
  2614. unsigned long pending_lock_flags;
  2615. struct pmcraid_cmd *cancel_cmd = NULL;
  2616. int cmd_found = 0;
  2617. int rc = FAILED;
  2618. pinstance =
  2619. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  2620. scmd_printk(KERN_INFO, scsi_cmd,
  2621. "I/O command timed out, aborting it.\n");
  2622. res = scsi_cmd->device->hostdata;
  2623. if (res == NULL)
  2624. return rc;
  2625. /* If we are currently going through reset/reload, return failed.
  2626. * This will force the mid-layer to eventually call
  2627. * pmcraid_eh_host_reset which will then go to sleep and wait for the
  2628. * reset to complete
  2629. */
  2630. spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags);
  2631. if (pinstance->ioa_reset_in_progress ||
  2632. pinstance->ioa_state == IOA_STATE_DEAD) {
  2633. spin_unlock_irqrestore(pinstance->host->host_lock,
  2634. host_lock_flags);
  2635. return rc;
  2636. }
  2637. /* loop over pending cmd list to find cmd corresponding to this
  2638. * scsi_cmd. Note that this command might not have been completed
  2639. * already. locking: all pending commands are protected with
  2640. * pending_pool_lock.
  2641. */
  2642. spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags);
  2643. list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) {
  2644. if (cmd->scsi_cmd == scsi_cmd) {
  2645. cmd_found = 1;
  2646. break;
  2647. }
  2648. }
  2649. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  2650. pending_lock_flags);
  2651. /* If the command to be aborted was given to IOA and still pending with
  2652. * it, send ABORT_TASK to abort this and wait for its completion
  2653. */
  2654. if (cmd_found)
  2655. cancel_cmd = pmcraid_abort_cmd(cmd);
  2656. spin_unlock_irqrestore(pinstance->host->host_lock,
  2657. host_lock_flags);
  2658. if (cancel_cmd) {
  2659. cancel_cmd->res = cmd->scsi_cmd->device->hostdata;
  2660. rc = pmcraid_abort_complete(cancel_cmd);
  2661. }
  2662. return cmd_found ? rc : SUCCESS;
  2663. }
  2664. /**
  2665. * pmcraid_eh_xxxx_reset_handler - bus/target/device reset handler callbacks
  2666. *
  2667. * @scmd: pointer to scsi_cmd that was sent to the resource to be reset.
  2668. *
  2669. * All these routines invokve pmcraid_reset_device with appropriate parameters.
  2670. * Since these are called from mid-layer EH thread, no other IO will be queued
  2671. * to the resource being reset. However, control path (IOCTL) may be active so
  2672. * it is necessary to synchronize IOARRIN writes which pmcraid_reset_device
  2673. * takes care by locking/unlocking host_lock.
  2674. *
  2675. * Return value
  2676. * SUCCESS or FAILED
  2677. */
  2678. static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd)
  2679. {
  2680. scmd_printk(KERN_INFO, scmd,
  2681. "resetting device due to an I/O command timeout.\n");
  2682. return pmcraid_reset_device(scmd,
  2683. PMCRAID_INTERNAL_TIMEOUT,
  2684. RESET_DEVICE_LUN);
  2685. }
  2686. static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd)
  2687. {
  2688. scmd_printk(KERN_INFO, scmd,
  2689. "Doing bus reset due to an I/O command timeout.\n");
  2690. return pmcraid_reset_device(scmd,
  2691. PMCRAID_RESET_BUS_TIMEOUT,
  2692. RESET_DEVICE_BUS);
  2693. }
  2694. static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd)
  2695. {
  2696. scmd_printk(KERN_INFO, scmd,
  2697. "Doing target reset due to an I/O command timeout.\n");
  2698. return pmcraid_reset_device(scmd,
  2699. PMCRAID_INTERNAL_TIMEOUT,
  2700. RESET_DEVICE_TARGET);
  2701. }
  2702. /**
  2703. * pmcraid_eh_host_reset_handler - adapter reset handler callback
  2704. *
  2705. * @scmd: pointer to scsi_cmd that was sent to a resource of adapter
  2706. *
  2707. * Initiates adapter reset to bring it up to operational state
  2708. *
  2709. * Return value
  2710. * SUCCESS or FAILED
  2711. */
  2712. static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd)
  2713. {
  2714. unsigned long interval = 10000; /* 10 seconds interval */
  2715. int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval;
  2716. struct pmcraid_instance *pinstance =
  2717. (struct pmcraid_instance *)(scmd->device->host->hostdata);
  2718. /* wait for an additional 150 seconds just in case firmware could come
  2719. * up and if it could complete all the pending commands excluding the
  2720. * two HCAM (CCN and LDN).
  2721. */
  2722. while (waits--) {
  2723. if (atomic_read(&pinstance->outstanding_cmds) <=
  2724. PMCRAID_MAX_HCAM_CMD)
  2725. return SUCCESS;
  2726. msleep(interval);
  2727. }
  2728. dev_err(&pinstance->pdev->dev,
  2729. "Adapter being reset due to an I/O command timeout.\n");
  2730. return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED;
  2731. }
  2732. /**
  2733. * pmcraid_init_ioadls - initializes IOADL related fields in IOARCB
  2734. * @cmd: pmcraid command struct
  2735. * @sgcount: count of scatter-gather elements
  2736. *
  2737. * Return value
  2738. * returns pointer pmcraid_ioadl_desc, initialized to point to internal
  2739. * or external IOADLs
  2740. */
  2741. static struct pmcraid_ioadl_desc *
  2742. pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount)
  2743. {
  2744. struct pmcraid_ioadl_desc *ioadl;
  2745. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2746. int ioadl_count = 0;
  2747. if (ioarcb->add_cmd_param_length)
  2748. ioadl_count = DIV_ROUND_UP(ioarcb->add_cmd_param_length, 16);
  2749. ioarcb->ioadl_length =
  2750. sizeof(struct pmcraid_ioadl_desc) * sgcount;
  2751. if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) {
  2752. /* external ioadls start at offset 0x80 from control_block
  2753. * structure, re-using 24 out of 27 ioadls part of IOARCB.
  2754. * It is necessary to indicate to firmware that driver is
  2755. * using ioadls to be treated as external to IOARCB.
  2756. */
  2757. ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
  2758. ioarcb->ioadl_bus_addr =
  2759. cpu_to_le64((cmd->ioa_cb_bus_addr) +
  2760. offsetof(struct pmcraid_ioarcb,
  2761. add_data.u.ioadl[3]));
  2762. ioadl = &ioarcb->add_data.u.ioadl[3];
  2763. } else {
  2764. ioarcb->ioadl_bus_addr =
  2765. cpu_to_le64((cmd->ioa_cb_bus_addr) +
  2766. offsetof(struct pmcraid_ioarcb,
  2767. add_data.u.ioadl[ioadl_count]));
  2768. ioadl = &ioarcb->add_data.u.ioadl[ioadl_count];
  2769. ioarcb->ioarcb_bus_addr |=
  2770. DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8);
  2771. }
  2772. return ioadl;
  2773. }
  2774. /**
  2775. * pmcraid_build_ioadl - Build a scatter/gather list and map the buffer
  2776. * @pinstance: pointer to adapter instance structure
  2777. * @cmd: pmcraid command struct
  2778. *
  2779. * This function is invoked by queuecommand entry point while sending a command
  2780. * to firmware. This builds ioadl descriptors and sets up ioarcb fields.
  2781. *
  2782. * Return value:
  2783. * 0 on success or -1 on failure
  2784. */
  2785. static int pmcraid_build_ioadl(
  2786. struct pmcraid_instance *pinstance,
  2787. struct pmcraid_cmd *cmd
  2788. )
  2789. {
  2790. int i, nseg;
  2791. struct scatterlist *sglist;
  2792. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2793. struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
  2794. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  2795. u32 length = scsi_bufflen(scsi_cmd);
  2796. if (!length)
  2797. return 0;
  2798. nseg = scsi_dma_map(scsi_cmd);
  2799. if (nseg < 0) {
  2800. scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n");
  2801. return -1;
  2802. } else if (nseg > PMCRAID_MAX_IOADLS) {
  2803. scsi_dma_unmap(scsi_cmd);
  2804. scmd_printk(KERN_ERR, scsi_cmd,
  2805. "sg count is (%d) more than allowed!\n", nseg);
  2806. return -1;
  2807. }
  2808. /* Initialize IOARCB data transfer length fields */
  2809. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE)
  2810. ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
  2811. ioarcb->request_flags0 |= NO_LINK_DESCS;
  2812. ioarcb->data_transfer_length = cpu_to_le32(length);
  2813. ioadl = pmcraid_init_ioadls(cmd, nseg);
  2814. /* Initialize IOADL descriptor addresses */
  2815. scsi_for_each_sg(scsi_cmd, sglist, nseg, i) {
  2816. ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist));
  2817. ioadl[i].address = cpu_to_le64(sg_dma_address(sglist));
  2818. ioadl[i].flags = 0;
  2819. }
  2820. /* setup last descriptor */
  2821. ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
  2822. return 0;
  2823. }
  2824. /**
  2825. * pmcraid_free_sglist - Frees an allocated SG buffer list
  2826. * @sglist: scatter/gather list pointer
  2827. *
  2828. * Free a DMA'able memory previously allocated with pmcraid_alloc_sglist
  2829. *
  2830. * Return value:
  2831. * none
  2832. */
  2833. static void pmcraid_free_sglist(struct pmcraid_sglist *sglist)
  2834. {
  2835. int i;
  2836. for (i = 0; i < sglist->num_sg; i++)
  2837. __free_pages(sg_page(&(sglist->scatterlist[i])),
  2838. sglist->order);
  2839. kfree(sglist);
  2840. }
  2841. /**
  2842. * pmcraid_alloc_sglist - Allocates memory for a SG list
  2843. * @buflen: buffer length
  2844. *
  2845. * Allocates a DMA'able buffer in chunks and assembles a scatter/gather
  2846. * list.
  2847. *
  2848. * Return value
  2849. * pointer to sglist / NULL on failure
  2850. */
  2851. static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen)
  2852. {
  2853. struct pmcraid_sglist *sglist;
  2854. struct scatterlist *scatterlist;
  2855. struct page *page;
  2856. int num_elem, i, j;
  2857. int sg_size;
  2858. int order;
  2859. int bsize_elem;
  2860. sg_size = buflen / (PMCRAID_MAX_IOADLS - 1);
  2861. order = (sg_size > 0) ? get_order(sg_size) : 0;
  2862. bsize_elem = PAGE_SIZE * (1 << order);
  2863. /* Determine the actual number of sg entries needed */
  2864. if (buflen % bsize_elem)
  2865. num_elem = (buflen / bsize_elem) + 1;
  2866. else
  2867. num_elem = buflen / bsize_elem;
  2868. /* Allocate a scatter/gather list for the DMA */
  2869. sglist = kzalloc(sizeof(struct pmcraid_sglist) +
  2870. (sizeof(struct scatterlist) * (num_elem - 1)),
  2871. GFP_KERNEL);
  2872. if (sglist == NULL)
  2873. return NULL;
  2874. scatterlist = sglist->scatterlist;
  2875. sg_init_table(scatterlist, num_elem);
  2876. sglist->order = order;
  2877. sglist->num_sg = num_elem;
  2878. sg_size = buflen;
  2879. for (i = 0; i < num_elem; i++) {
  2880. page = alloc_pages(GFP_KERNEL|GFP_DMA|__GFP_ZERO, order);
  2881. if (!page) {
  2882. for (j = i - 1; j >= 0; j--)
  2883. __free_pages(sg_page(&scatterlist[j]), order);
  2884. kfree(sglist);
  2885. return NULL;
  2886. }
  2887. sg_set_page(&scatterlist[i], page,
  2888. sg_size < bsize_elem ? sg_size : bsize_elem, 0);
  2889. sg_size -= bsize_elem;
  2890. }
  2891. return sglist;
  2892. }
  2893. /**
  2894. * pmcraid_copy_sglist - Copy user buffer to kernel buffer's SG list
  2895. * @sglist: scatter/gather list pointer
  2896. * @buffer: buffer pointer
  2897. * @len: buffer length
  2898. * @direction: data transfer direction
  2899. *
  2900. * Copy a user buffer into a buffer allocated by pmcraid_alloc_sglist
  2901. *
  2902. * Return value:
  2903. * 0 on success / other on failure
  2904. */
  2905. static int pmcraid_copy_sglist(
  2906. struct pmcraid_sglist *sglist,
  2907. unsigned long buffer,
  2908. u32 len,
  2909. int direction
  2910. )
  2911. {
  2912. struct scatterlist *scatterlist;
  2913. void *kaddr;
  2914. int bsize_elem;
  2915. int i;
  2916. int rc = 0;
  2917. /* Determine the actual number of bytes per element */
  2918. bsize_elem = PAGE_SIZE * (1 << sglist->order);
  2919. scatterlist = sglist->scatterlist;
  2920. for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
  2921. struct page *page = sg_page(&scatterlist[i]);
  2922. kaddr = kmap(page);
  2923. if (direction == DMA_TO_DEVICE)
  2924. rc = __copy_from_user(kaddr,
  2925. (void *)buffer,
  2926. bsize_elem);
  2927. else
  2928. rc = __copy_to_user((void *)buffer, kaddr, bsize_elem);
  2929. kunmap(page);
  2930. if (rc) {
  2931. pmcraid_err("failed to copy user data into sg list\n");
  2932. return -EFAULT;
  2933. }
  2934. scatterlist[i].length = bsize_elem;
  2935. }
  2936. if (len % bsize_elem) {
  2937. struct page *page = sg_page(&scatterlist[i]);
  2938. kaddr = kmap(page);
  2939. if (direction == DMA_TO_DEVICE)
  2940. rc = __copy_from_user(kaddr,
  2941. (void *)buffer,
  2942. len % bsize_elem);
  2943. else
  2944. rc = __copy_to_user((void *)buffer,
  2945. kaddr,
  2946. len % bsize_elem);
  2947. kunmap(page);
  2948. scatterlist[i].length = len % bsize_elem;
  2949. }
  2950. if (rc) {
  2951. pmcraid_err("failed to copy user data into sg list\n");
  2952. rc = -EFAULT;
  2953. }
  2954. return rc;
  2955. }
  2956. /**
  2957. * pmcraid_queuecommand - Queue a mid-layer request
  2958. * @scsi_cmd: scsi command struct
  2959. * @done: done function
  2960. *
  2961. * This function queues a request generated by the mid-layer. Midlayer calls
  2962. * this routine within host->lock. Some of the functions called by queuecommand
  2963. * would use cmd block queue locks (free_pool_lock and pending_pool_lock)
  2964. *
  2965. * Return value:
  2966. * 0 on success
  2967. * SCSI_MLQUEUE_DEVICE_BUSY if device is busy
  2968. * SCSI_MLQUEUE_HOST_BUSY if host is busy
  2969. */
  2970. static int pmcraid_queuecommand_lck(
  2971. struct scsi_cmnd *scsi_cmd,
  2972. void (*done) (struct scsi_cmnd *)
  2973. )
  2974. {
  2975. struct pmcraid_instance *pinstance;
  2976. struct pmcraid_resource_entry *res;
  2977. struct pmcraid_ioarcb *ioarcb;
  2978. struct pmcraid_cmd *cmd;
  2979. u32 fw_version;
  2980. int rc = 0;
  2981. pinstance =
  2982. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  2983. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  2984. scsi_cmd->scsi_done = done;
  2985. res = scsi_cmd->device->hostdata;
  2986. scsi_cmd->result = (DID_OK << 16);
  2987. /* if adapter is marked as dead, set result to DID_NO_CONNECT complete
  2988. * the command
  2989. */
  2990. if (pinstance->ioa_state == IOA_STATE_DEAD) {
  2991. pmcraid_info("IOA is dead, but queuecommand is scheduled\n");
  2992. scsi_cmd->result = (DID_NO_CONNECT << 16);
  2993. scsi_cmd->scsi_done(scsi_cmd);
  2994. return 0;
  2995. }
  2996. /* If IOA reset is in progress, can't queue the commands */
  2997. if (pinstance->ioa_reset_in_progress)
  2998. return SCSI_MLQUEUE_HOST_BUSY;
  2999. /* Firmware doesn't support SYNCHRONIZE_CACHE command (0x35), complete
  3000. * the command here itself with success return
  3001. */
  3002. if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) {
  3003. pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n");
  3004. scsi_cmd->scsi_done(scsi_cmd);
  3005. return 0;
  3006. }
  3007. /* initialize the command and IOARCB to be sent to IOA */
  3008. cmd = pmcraid_get_free_cmd(pinstance);
  3009. if (cmd == NULL) {
  3010. pmcraid_err("free command block is not available\n");
  3011. return SCSI_MLQUEUE_HOST_BUSY;
  3012. }
  3013. cmd->scsi_cmd = scsi_cmd;
  3014. ioarcb = &(cmd->ioa_cb->ioarcb);
  3015. memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
  3016. ioarcb->resource_handle = res->cfg_entry.resource_handle;
  3017. ioarcb->request_type = REQ_TYPE_SCSI;
  3018. /* set hrrq number where the IOA should respond to. Note that all cmds
  3019. * generated internally uses hrrq_id 0, exception to this is the cmd
  3020. * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses
  3021. * hrrq_id assigned here in queuecommand
  3022. */
  3023. ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
  3024. pinstance->num_hrrq;
  3025. cmd->cmd_done = pmcraid_io_done;
  3026. if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) {
  3027. if (scsi_cmd->underflow == 0)
  3028. ioarcb->request_flags0 |= INHIBIT_UL_CHECK;
  3029. if (res->sync_reqd) {
  3030. ioarcb->request_flags0 |= SYNC_COMPLETE;
  3031. res->sync_reqd = 0;
  3032. }
  3033. ioarcb->request_flags0 |= NO_LINK_DESCS;
  3034. if (scsi_cmd->flags & SCMD_TAGGED)
  3035. ioarcb->request_flags1 |= TASK_TAG_SIMPLE;
  3036. if (RES_IS_GSCSI(res->cfg_entry))
  3037. ioarcb->request_flags1 |= DELAY_AFTER_RESET;
  3038. }
  3039. rc = pmcraid_build_ioadl(pinstance, cmd);
  3040. pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n",
  3041. le32_to_cpu(ioarcb->response_handle) >> 2,
  3042. scsi_cmd->cmnd[0], pinstance->host->unique_id,
  3043. RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID :
  3044. PMCRAID_PHYS_BUS_ID,
  3045. RES_IS_VSET(res->cfg_entry) ?
  3046. (fw_version <= PMCRAID_FW_VERSION_1 ?
  3047. res->cfg_entry.unique_flags1 :
  3048. res->cfg_entry.array_id & 0xFF) :
  3049. RES_TARGET(res->cfg_entry.resource_address),
  3050. RES_LUN(res->cfg_entry.resource_address));
  3051. if (likely(rc == 0)) {
  3052. _pmcraid_fire_command(cmd);
  3053. } else {
  3054. pmcraid_err("queuecommand could not build ioadl\n");
  3055. pmcraid_return_cmd(cmd);
  3056. rc = SCSI_MLQUEUE_HOST_BUSY;
  3057. }
  3058. return rc;
  3059. }
  3060. static DEF_SCSI_QCMD(pmcraid_queuecommand)
  3061. /**
  3062. * pmcraid_open -char node "open" entry, allowed only users with admin access
  3063. */
  3064. static int pmcraid_chr_open(struct inode *inode, struct file *filep)
  3065. {
  3066. struct pmcraid_instance *pinstance;
  3067. if (!capable(CAP_SYS_ADMIN))
  3068. return -EACCES;
  3069. /* Populate adapter instance * pointer for use by ioctl */
  3070. pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev);
  3071. filep->private_data = pinstance;
  3072. return 0;
  3073. }
  3074. /**
  3075. * pmcraid_fasync - Async notifier registration from applications
  3076. *
  3077. * This function adds the calling process to a driver global queue. When an
  3078. * event occurs, SIGIO will be sent to all processes in this queue.
  3079. */
  3080. static int pmcraid_chr_fasync(int fd, struct file *filep, int mode)
  3081. {
  3082. struct pmcraid_instance *pinstance;
  3083. int rc;
  3084. pinstance = filep->private_data;
  3085. mutex_lock(&pinstance->aen_queue_lock);
  3086. rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue);
  3087. mutex_unlock(&pinstance->aen_queue_lock);
  3088. return rc;
  3089. }
  3090. /**
  3091. * pmcraid_build_passthrough_ioadls - builds SG elements for passthrough
  3092. * commands sent over IOCTL interface
  3093. *
  3094. * @cmd : pointer to struct pmcraid_cmd
  3095. * @buflen : length of the request buffer
  3096. * @direction : data transfer direction
  3097. *
  3098. * Return value
  3099. * 0 on success, non-zero error code on failure
  3100. */
  3101. static int pmcraid_build_passthrough_ioadls(
  3102. struct pmcraid_cmd *cmd,
  3103. int buflen,
  3104. int direction
  3105. )
  3106. {
  3107. struct pmcraid_sglist *sglist = NULL;
  3108. struct scatterlist *sg = NULL;
  3109. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  3110. struct pmcraid_ioadl_desc *ioadl;
  3111. int i;
  3112. sglist = pmcraid_alloc_sglist(buflen);
  3113. if (!sglist) {
  3114. pmcraid_err("can't allocate memory for passthrough SGls\n");
  3115. return -ENOMEM;
  3116. }
  3117. sglist->num_dma_sg = pci_map_sg(cmd->drv_inst->pdev,
  3118. sglist->scatterlist,
  3119. sglist->num_sg, direction);
  3120. if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) {
  3121. dev_err(&cmd->drv_inst->pdev->dev,
  3122. "Failed to map passthrough buffer!\n");
  3123. pmcraid_free_sglist(sglist);
  3124. return -EIO;
  3125. }
  3126. cmd->sglist = sglist;
  3127. ioarcb->request_flags0 |= NO_LINK_DESCS;
  3128. ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg);
  3129. /* Initialize IOADL descriptor addresses */
  3130. for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) {
  3131. ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg));
  3132. ioadl[i].address = cpu_to_le64(sg_dma_address(sg));
  3133. ioadl[i].flags = 0;
  3134. }
  3135. /* setup the last descriptor */
  3136. ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
  3137. return 0;
  3138. }
  3139. /**
  3140. * pmcraid_release_passthrough_ioadls - release passthrough ioadls
  3141. *
  3142. * @cmd: pointer to struct pmcraid_cmd for which ioadls were allocated
  3143. * @buflen: size of the request buffer
  3144. * @direction: data transfer direction
  3145. *
  3146. * Return value
  3147. * 0 on success, non-zero error code on failure
  3148. */
  3149. static void pmcraid_release_passthrough_ioadls(
  3150. struct pmcraid_cmd *cmd,
  3151. int buflen,
  3152. int direction
  3153. )
  3154. {
  3155. struct pmcraid_sglist *sglist = cmd->sglist;
  3156. if (buflen > 0) {
  3157. pci_unmap_sg(cmd->drv_inst->pdev,
  3158. sglist->scatterlist,
  3159. sglist->num_sg,
  3160. direction);
  3161. pmcraid_free_sglist(sglist);
  3162. cmd->sglist = NULL;
  3163. }
  3164. }
  3165. /**
  3166. * pmcraid_ioctl_passthrough - handling passthrough IOCTL commands
  3167. *
  3168. * @pinstance: pointer to adapter instance structure
  3169. * @cmd: ioctl code
  3170. * @arg: pointer to pmcraid_passthrough_buffer user buffer
  3171. *
  3172. * Return value
  3173. * 0 on success, non-zero error code on failure
  3174. */
  3175. static long pmcraid_ioctl_passthrough(
  3176. struct pmcraid_instance *pinstance,
  3177. unsigned int ioctl_cmd,
  3178. unsigned int buflen,
  3179. unsigned long arg
  3180. )
  3181. {
  3182. struct pmcraid_passthrough_ioctl_buffer *buffer;
  3183. struct pmcraid_ioarcb *ioarcb;
  3184. struct pmcraid_cmd *cmd;
  3185. struct pmcraid_cmd *cancel_cmd;
  3186. unsigned long request_buffer;
  3187. unsigned long request_offset;
  3188. unsigned long lock_flags;
  3189. void *ioasa;
  3190. u32 ioasc;
  3191. int request_size;
  3192. int buffer_size;
  3193. u8 access, direction;
  3194. int rc = 0;
  3195. /* If IOA reset is in progress, wait 10 secs for reset to complete */
  3196. if (pinstance->ioa_reset_in_progress) {
  3197. rc = wait_event_interruptible_timeout(
  3198. pinstance->reset_wait_q,
  3199. !pinstance->ioa_reset_in_progress,
  3200. msecs_to_jiffies(10000));
  3201. if (!rc)
  3202. return -ETIMEDOUT;
  3203. else if (rc < 0)
  3204. return -ERESTARTSYS;
  3205. }
  3206. /* If adapter is not in operational state, return error */
  3207. if (pinstance->ioa_state != IOA_STATE_OPERATIONAL) {
  3208. pmcraid_err("IOA is not operational\n");
  3209. return -ENOTTY;
  3210. }
  3211. buffer_size = sizeof(struct pmcraid_passthrough_ioctl_buffer);
  3212. buffer = kmalloc(buffer_size, GFP_KERNEL);
  3213. if (!buffer) {
  3214. pmcraid_err("no memory for passthrough buffer\n");
  3215. return -ENOMEM;
  3216. }
  3217. request_offset =
  3218. offsetof(struct pmcraid_passthrough_ioctl_buffer, request_buffer);
  3219. request_buffer = arg + request_offset;
  3220. rc = __copy_from_user(buffer,
  3221. (struct pmcraid_passthrough_ioctl_buffer *) arg,
  3222. sizeof(struct pmcraid_passthrough_ioctl_buffer));
  3223. ioasa =
  3224. (void *)(arg +
  3225. offsetof(struct pmcraid_passthrough_ioctl_buffer, ioasa));
  3226. if (rc) {
  3227. pmcraid_err("ioctl: can't copy passthrough buffer\n");
  3228. rc = -EFAULT;
  3229. goto out_free_buffer;
  3230. }
  3231. request_size = buffer->ioarcb.data_transfer_length;
  3232. if (buffer->ioarcb.request_flags0 & TRANSFER_DIR_WRITE) {
  3233. access = VERIFY_READ;
  3234. direction = DMA_TO_DEVICE;
  3235. } else {
  3236. access = VERIFY_WRITE;
  3237. direction = DMA_FROM_DEVICE;
  3238. }
  3239. if (request_size > 0) {
  3240. rc = access_ok(access, arg, request_offset + request_size);
  3241. if (!rc) {
  3242. rc = -EFAULT;
  3243. goto out_free_buffer;
  3244. }
  3245. } else if (request_size < 0) {
  3246. rc = -EINVAL;
  3247. goto out_free_buffer;
  3248. }
  3249. /* check if we have any additional command parameters */
  3250. if (buffer->ioarcb.add_cmd_param_length > PMCRAID_ADD_CMD_PARAM_LEN) {
  3251. rc = -EINVAL;
  3252. goto out_free_buffer;
  3253. }
  3254. cmd = pmcraid_get_free_cmd(pinstance);
  3255. if (!cmd) {
  3256. pmcraid_err("free command block is not available\n");
  3257. rc = -ENOMEM;
  3258. goto out_free_buffer;
  3259. }
  3260. cmd->scsi_cmd = NULL;
  3261. ioarcb = &(cmd->ioa_cb->ioarcb);
  3262. /* Copy the user-provided IOARCB stuff field by field */
  3263. ioarcb->resource_handle = buffer->ioarcb.resource_handle;
  3264. ioarcb->data_transfer_length = buffer->ioarcb.data_transfer_length;
  3265. ioarcb->cmd_timeout = buffer->ioarcb.cmd_timeout;
  3266. ioarcb->request_type = buffer->ioarcb.request_type;
  3267. ioarcb->request_flags0 = buffer->ioarcb.request_flags0;
  3268. ioarcb->request_flags1 = buffer->ioarcb.request_flags1;
  3269. memcpy(ioarcb->cdb, buffer->ioarcb.cdb, PMCRAID_MAX_CDB_LEN);
  3270. if (buffer->ioarcb.add_cmd_param_length) {
  3271. ioarcb->add_cmd_param_length =
  3272. buffer->ioarcb.add_cmd_param_length;
  3273. ioarcb->add_cmd_param_offset =
  3274. buffer->ioarcb.add_cmd_param_offset;
  3275. memcpy(ioarcb->add_data.u.add_cmd_params,
  3276. buffer->ioarcb.add_data.u.add_cmd_params,
  3277. buffer->ioarcb.add_cmd_param_length);
  3278. }
  3279. /* set hrrq number where the IOA should respond to. Note that all cmds
  3280. * generated internally uses hrrq_id 0, exception to this is the cmd
  3281. * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses
  3282. * hrrq_id assigned here in queuecommand
  3283. */
  3284. ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
  3285. pinstance->num_hrrq;
  3286. if (request_size) {
  3287. rc = pmcraid_build_passthrough_ioadls(cmd,
  3288. request_size,
  3289. direction);
  3290. if (rc) {
  3291. pmcraid_err("couldn't build passthrough ioadls\n");
  3292. goto out_free_buffer;
  3293. }
  3294. } else if (request_size < 0) {
  3295. rc = -EINVAL;
  3296. goto out_free_buffer;
  3297. }
  3298. /* If data is being written into the device, copy the data from user
  3299. * buffers
  3300. */
  3301. if (direction == DMA_TO_DEVICE && request_size > 0) {
  3302. rc = pmcraid_copy_sglist(cmd->sglist,
  3303. request_buffer,
  3304. request_size,
  3305. direction);
  3306. if (rc) {
  3307. pmcraid_err("failed to copy user buffer\n");
  3308. goto out_free_sglist;
  3309. }
  3310. }
  3311. /* passthrough ioctl is a blocking command so, put the user to sleep
  3312. * until timeout. Note that a timeout value of 0 means, do timeout.
  3313. */
  3314. cmd->cmd_done = pmcraid_internal_done;
  3315. init_completion(&cmd->wait_for_completion);
  3316. cmd->completion_req = 1;
  3317. pmcraid_info("command(%d) (CDB[0] = %x) for %x\n",
  3318. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
  3319. cmd->ioa_cb->ioarcb.cdb[0],
  3320. le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle));
  3321. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  3322. _pmcraid_fire_command(cmd);
  3323. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3324. /* NOTE ! Remove the below line once abort_task is implemented
  3325. * in firmware. This line disables ioctl command timeout handling logic
  3326. * similar to IO command timeout handling, making ioctl commands to wait
  3327. * until the command completion regardless of timeout value specified in
  3328. * ioarcb
  3329. */
  3330. buffer->ioarcb.cmd_timeout = 0;
  3331. /* If command timeout is specified put caller to wait till that time,
  3332. * otherwise it would be blocking wait. If command gets timed out, it
  3333. * will be aborted.
  3334. */
  3335. if (buffer->ioarcb.cmd_timeout == 0) {
  3336. wait_for_completion(&cmd->wait_for_completion);
  3337. } else if (!wait_for_completion_timeout(
  3338. &cmd->wait_for_completion,
  3339. msecs_to_jiffies(buffer->ioarcb.cmd_timeout * 1000))) {
  3340. pmcraid_info("aborting cmd %d (CDB[0] = %x) due to timeout\n",
  3341. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle >> 2),
  3342. cmd->ioa_cb->ioarcb.cdb[0]);
  3343. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  3344. cancel_cmd = pmcraid_abort_cmd(cmd);
  3345. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3346. if (cancel_cmd) {
  3347. wait_for_completion(&cancel_cmd->wait_for_completion);
  3348. ioasc = cancel_cmd->ioa_cb->ioasa.ioasc;
  3349. pmcraid_return_cmd(cancel_cmd);
  3350. /* if abort task couldn't find the command i.e it got
  3351. * completed prior to aborting, return good completion.
  3352. * if command got aborted successfully or there was IOA
  3353. * reset due to abort task itself getting timedout then
  3354. * return -ETIMEDOUT
  3355. */
  3356. if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
  3357. PMCRAID_IOASC_SENSE_KEY(ioasc) == 0x00) {
  3358. if (ioasc != PMCRAID_IOASC_GC_IOARCB_NOTFOUND)
  3359. rc = -ETIMEDOUT;
  3360. goto out_handle_response;
  3361. }
  3362. }
  3363. /* no command block for abort task or abort task failed to abort
  3364. * the IOARCB, then wait for 150 more seconds and initiate reset
  3365. * sequence after timeout
  3366. */
  3367. if (!wait_for_completion_timeout(
  3368. &cmd->wait_for_completion,
  3369. msecs_to_jiffies(150 * 1000))) {
  3370. pmcraid_reset_bringup(cmd->drv_inst);
  3371. rc = -ETIMEDOUT;
  3372. }
  3373. }
  3374. out_handle_response:
  3375. /* copy entire IOASA buffer and return IOCTL success.
  3376. * If copying IOASA to user-buffer fails, return
  3377. * EFAULT
  3378. */
  3379. if (copy_to_user(ioasa, &cmd->ioa_cb->ioasa,
  3380. sizeof(struct pmcraid_ioasa))) {
  3381. pmcraid_err("failed to copy ioasa buffer to user\n");
  3382. rc = -EFAULT;
  3383. }
  3384. /* If the data transfer was from device, copy the data onto user
  3385. * buffers
  3386. */
  3387. else if (direction == DMA_FROM_DEVICE && request_size > 0) {
  3388. rc = pmcraid_copy_sglist(cmd->sglist,
  3389. request_buffer,
  3390. request_size,
  3391. direction);
  3392. if (rc) {
  3393. pmcraid_err("failed to copy user buffer\n");
  3394. rc = -EFAULT;
  3395. }
  3396. }
  3397. out_free_sglist:
  3398. pmcraid_release_passthrough_ioadls(cmd, request_size, direction);
  3399. pmcraid_return_cmd(cmd);
  3400. out_free_buffer:
  3401. kfree(buffer);
  3402. return rc;
  3403. }
  3404. /**
  3405. * pmcraid_ioctl_driver - ioctl handler for commands handled by driver itself
  3406. *
  3407. * @pinstance: pointer to adapter instance structure
  3408. * @cmd: ioctl command passed in
  3409. * @buflen: length of user_buffer
  3410. * @user_buffer: user buffer pointer
  3411. *
  3412. * Return Value
  3413. * 0 in case of success, otherwise appropriate error code
  3414. */
  3415. static long pmcraid_ioctl_driver(
  3416. struct pmcraid_instance *pinstance,
  3417. unsigned int cmd,
  3418. unsigned int buflen,
  3419. void __user *user_buffer
  3420. )
  3421. {
  3422. int rc = -ENOSYS;
  3423. if (!access_ok(VERIFY_READ, user_buffer, _IOC_SIZE(cmd))) {
  3424. pmcraid_err("ioctl_driver: access fault in request buffer\n");
  3425. return -EFAULT;
  3426. }
  3427. switch (cmd) {
  3428. case PMCRAID_IOCTL_RESET_ADAPTER:
  3429. pmcraid_reset_bringup(pinstance);
  3430. rc = 0;
  3431. break;
  3432. default:
  3433. break;
  3434. }
  3435. return rc;
  3436. }
  3437. /**
  3438. * pmcraid_check_ioctl_buffer - check for proper access to user buffer
  3439. *
  3440. * @cmd: ioctl command
  3441. * @arg: user buffer
  3442. * @hdr: pointer to kernel memory for pmcraid_ioctl_header
  3443. *
  3444. * Return Value
  3445. * negetive error code if there are access issues, otherwise zero.
  3446. * Upon success, returns ioctl header copied out of user buffer.
  3447. */
  3448. static int pmcraid_check_ioctl_buffer(
  3449. int cmd,
  3450. void __user *arg,
  3451. struct pmcraid_ioctl_header *hdr
  3452. )
  3453. {
  3454. int rc = 0;
  3455. int access = VERIFY_READ;
  3456. if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) {
  3457. pmcraid_err("couldn't copy ioctl header from user buffer\n");
  3458. return -EFAULT;
  3459. }
  3460. /* check for valid driver signature */
  3461. rc = memcmp(hdr->signature,
  3462. PMCRAID_IOCTL_SIGNATURE,
  3463. sizeof(hdr->signature));
  3464. if (rc) {
  3465. pmcraid_err("signature verification failed\n");
  3466. return -EINVAL;
  3467. }
  3468. /* check for appropriate buffer access */
  3469. if ((_IOC_DIR(cmd) & _IOC_READ) == _IOC_READ)
  3470. access = VERIFY_WRITE;
  3471. rc = access_ok(access,
  3472. (arg + sizeof(struct pmcraid_ioctl_header)),
  3473. hdr->buffer_length);
  3474. if (!rc) {
  3475. pmcraid_err("access failed for user buffer of size %d\n",
  3476. hdr->buffer_length);
  3477. return -EFAULT;
  3478. }
  3479. return 0;
  3480. }
  3481. /**
  3482. * pmcraid_ioctl - char node ioctl entry point
  3483. */
  3484. static long pmcraid_chr_ioctl(
  3485. struct file *filep,
  3486. unsigned int cmd,
  3487. unsigned long arg
  3488. )
  3489. {
  3490. struct pmcraid_instance *pinstance = NULL;
  3491. struct pmcraid_ioctl_header *hdr = NULL;
  3492. int retval = -ENOTTY;
  3493. hdr = kmalloc(sizeof(struct pmcraid_ioctl_header), GFP_KERNEL);
  3494. if (!hdr) {
  3495. pmcraid_err("failed to allocate memory for ioctl header\n");
  3496. return -ENOMEM;
  3497. }
  3498. retval = pmcraid_check_ioctl_buffer(cmd, (void *)arg, hdr);
  3499. if (retval) {
  3500. pmcraid_info("chr_ioctl: header check failed\n");
  3501. kfree(hdr);
  3502. return retval;
  3503. }
  3504. pinstance = filep->private_data;
  3505. if (!pinstance) {
  3506. pmcraid_info("adapter instance is not found\n");
  3507. kfree(hdr);
  3508. return -ENOTTY;
  3509. }
  3510. switch (_IOC_TYPE(cmd)) {
  3511. case PMCRAID_PASSTHROUGH_IOCTL:
  3512. /* If ioctl code is to download microcode, we need to block
  3513. * mid-layer requests.
  3514. */
  3515. if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
  3516. scsi_block_requests(pinstance->host);
  3517. retval = pmcraid_ioctl_passthrough(pinstance,
  3518. cmd,
  3519. hdr->buffer_length,
  3520. arg);
  3521. if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
  3522. scsi_unblock_requests(pinstance->host);
  3523. break;
  3524. case PMCRAID_DRIVER_IOCTL:
  3525. arg += sizeof(struct pmcraid_ioctl_header);
  3526. retval = pmcraid_ioctl_driver(pinstance,
  3527. cmd,
  3528. hdr->buffer_length,
  3529. (void __user *)arg);
  3530. break;
  3531. default:
  3532. retval = -ENOTTY;
  3533. break;
  3534. }
  3535. kfree(hdr);
  3536. return retval;
  3537. }
  3538. /**
  3539. * File operations structure for management interface
  3540. */
  3541. static const struct file_operations pmcraid_fops = {
  3542. .owner = THIS_MODULE,
  3543. .open = pmcraid_chr_open,
  3544. .fasync = pmcraid_chr_fasync,
  3545. .unlocked_ioctl = pmcraid_chr_ioctl,
  3546. #ifdef CONFIG_COMPAT
  3547. .compat_ioctl = pmcraid_chr_ioctl,
  3548. #endif
  3549. .llseek = noop_llseek,
  3550. };
  3551. /**
  3552. * pmcraid_show_log_level - Display adapter's error logging level
  3553. * @dev: class device struct
  3554. * @buf: buffer
  3555. *
  3556. * Return value:
  3557. * number of bytes printed to buffer
  3558. */
  3559. static ssize_t pmcraid_show_log_level(
  3560. struct device *dev,
  3561. struct device_attribute *attr,
  3562. char *buf)
  3563. {
  3564. struct Scsi_Host *shost = class_to_shost(dev);
  3565. struct pmcraid_instance *pinstance =
  3566. (struct pmcraid_instance *)shost->hostdata;
  3567. return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level);
  3568. }
  3569. /**
  3570. * pmcraid_store_log_level - Change the adapter's error logging level
  3571. * @dev: class device struct
  3572. * @buf: buffer
  3573. * @count: not used
  3574. *
  3575. * Return value:
  3576. * number of bytes printed to buffer
  3577. */
  3578. static ssize_t pmcraid_store_log_level(
  3579. struct device *dev,
  3580. struct device_attribute *attr,
  3581. const char *buf,
  3582. size_t count
  3583. )
  3584. {
  3585. struct Scsi_Host *shost;
  3586. struct pmcraid_instance *pinstance;
  3587. u8 val;
  3588. if (kstrtou8(buf, 10, &val))
  3589. return -EINVAL;
  3590. /* log-level should be from 0 to 2 */
  3591. if (val > 2)
  3592. return -EINVAL;
  3593. shost = class_to_shost(dev);
  3594. pinstance = (struct pmcraid_instance *)shost->hostdata;
  3595. pinstance->current_log_level = val;
  3596. return strlen(buf);
  3597. }
  3598. static struct device_attribute pmcraid_log_level_attr = {
  3599. .attr = {
  3600. .name = "log_level",
  3601. .mode = S_IRUGO | S_IWUSR,
  3602. },
  3603. .show = pmcraid_show_log_level,
  3604. .store = pmcraid_store_log_level,
  3605. };
  3606. /**
  3607. * pmcraid_show_drv_version - Display driver version
  3608. * @dev: class device struct
  3609. * @buf: buffer
  3610. *
  3611. * Return value:
  3612. * number of bytes printed to buffer
  3613. */
  3614. static ssize_t pmcraid_show_drv_version(
  3615. struct device *dev,
  3616. struct device_attribute *attr,
  3617. char *buf
  3618. )
  3619. {
  3620. return snprintf(buf, PAGE_SIZE, "version: %s\n",
  3621. PMCRAID_DRIVER_VERSION);
  3622. }
  3623. static struct device_attribute pmcraid_driver_version_attr = {
  3624. .attr = {
  3625. .name = "drv_version",
  3626. .mode = S_IRUGO,
  3627. },
  3628. .show = pmcraid_show_drv_version,
  3629. };
  3630. /**
  3631. * pmcraid_show_io_adapter_id - Display driver assigned adapter id
  3632. * @dev: class device struct
  3633. * @buf: buffer
  3634. *
  3635. * Return value:
  3636. * number of bytes printed to buffer
  3637. */
  3638. static ssize_t pmcraid_show_adapter_id(
  3639. struct device *dev,
  3640. struct device_attribute *attr,
  3641. char *buf
  3642. )
  3643. {
  3644. struct Scsi_Host *shost = class_to_shost(dev);
  3645. struct pmcraid_instance *pinstance =
  3646. (struct pmcraid_instance *)shost->hostdata;
  3647. u32 adapter_id = (pinstance->pdev->bus->number << 8) |
  3648. pinstance->pdev->devfn;
  3649. u32 aen_group = pmcraid_event_family.id;
  3650. return snprintf(buf, PAGE_SIZE,
  3651. "adapter id: %d\nminor: %d\naen group: %d\n",
  3652. adapter_id, MINOR(pinstance->cdev.dev), aen_group);
  3653. }
  3654. static struct device_attribute pmcraid_adapter_id_attr = {
  3655. .attr = {
  3656. .name = "adapter_id",
  3657. .mode = S_IRUGO,
  3658. },
  3659. .show = pmcraid_show_adapter_id,
  3660. };
  3661. static struct device_attribute *pmcraid_host_attrs[] = {
  3662. &pmcraid_log_level_attr,
  3663. &pmcraid_driver_version_attr,
  3664. &pmcraid_adapter_id_attr,
  3665. NULL,
  3666. };
  3667. /* host template structure for pmcraid driver */
  3668. static struct scsi_host_template pmcraid_host_template = {
  3669. .module = THIS_MODULE,
  3670. .name = PMCRAID_DRIVER_NAME,
  3671. .queuecommand = pmcraid_queuecommand,
  3672. .eh_abort_handler = pmcraid_eh_abort_handler,
  3673. .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler,
  3674. .eh_target_reset_handler = pmcraid_eh_target_reset_handler,
  3675. .eh_device_reset_handler = pmcraid_eh_device_reset_handler,
  3676. .eh_host_reset_handler = pmcraid_eh_host_reset_handler,
  3677. .slave_alloc = pmcraid_slave_alloc,
  3678. .slave_configure = pmcraid_slave_configure,
  3679. .slave_destroy = pmcraid_slave_destroy,
  3680. .change_queue_depth = pmcraid_change_queue_depth,
  3681. .can_queue = PMCRAID_MAX_IO_CMD,
  3682. .this_id = -1,
  3683. .sg_tablesize = PMCRAID_MAX_IOADLS,
  3684. .max_sectors = PMCRAID_IOA_MAX_SECTORS,
  3685. .no_write_same = 1,
  3686. .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN,
  3687. .use_clustering = ENABLE_CLUSTERING,
  3688. .shost_attrs = pmcraid_host_attrs,
  3689. .proc_name = PMCRAID_DRIVER_NAME,
  3690. };
  3691. /*
  3692. * pmcraid_isr_msix - implements MSI-X interrupt handling routine
  3693. * @irq: interrupt vector number
  3694. * @dev_id: pointer hrrq_vector
  3695. *
  3696. * Return Value
  3697. * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
  3698. */
  3699. static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id)
  3700. {
  3701. struct pmcraid_isr_param *hrrq_vector;
  3702. struct pmcraid_instance *pinstance;
  3703. unsigned long lock_flags;
  3704. u32 intrs_val;
  3705. int hrrq_id;
  3706. hrrq_vector = (struct pmcraid_isr_param *)dev_id;
  3707. hrrq_id = hrrq_vector->hrrq_id;
  3708. pinstance = hrrq_vector->drv_inst;
  3709. if (!hrrq_id) {
  3710. /* Read the interrupt */
  3711. intrs_val = pmcraid_read_interrupts(pinstance);
  3712. if (intrs_val &&
  3713. ((ioread32(pinstance->int_regs.host_ioa_interrupt_reg)
  3714. & DOORBELL_INTR_MSIX_CLR) == 0)) {
  3715. /* Any error interrupts including unit_check,
  3716. * initiate IOA reset.In case of unit check indicate
  3717. * to reset_sequence that IOA unit checked and prepare
  3718. * for a dump during reset sequence
  3719. */
  3720. if (intrs_val & PMCRAID_ERROR_INTERRUPTS) {
  3721. if (intrs_val & INTRS_IOA_UNIT_CHECK)
  3722. pinstance->ioa_unit_check = 1;
  3723. pmcraid_err("ISR: error interrupts: %x \
  3724. initiating reset\n", intrs_val);
  3725. spin_lock_irqsave(pinstance->host->host_lock,
  3726. lock_flags);
  3727. pmcraid_initiate_reset(pinstance);
  3728. spin_unlock_irqrestore(
  3729. pinstance->host->host_lock,
  3730. lock_flags);
  3731. }
  3732. /* If interrupt was as part of the ioa initialization,
  3733. * clear it. Delete the timer and wakeup the
  3734. * reset engine to proceed with reset sequence
  3735. */
  3736. if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL)
  3737. pmcraid_clr_trans_op(pinstance);
  3738. /* Clear the interrupt register by writing
  3739. * to host to ioa doorbell. Once done
  3740. * FW will clear the interrupt.
  3741. */
  3742. iowrite32(DOORBELL_INTR_MSIX_CLR,
  3743. pinstance->int_regs.host_ioa_interrupt_reg);
  3744. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  3745. }
  3746. }
  3747. tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id]));
  3748. return IRQ_HANDLED;
  3749. }
  3750. /**
  3751. * pmcraid_isr - implements legacy interrupt handling routine
  3752. *
  3753. * @irq: interrupt vector number
  3754. * @dev_id: pointer hrrq_vector
  3755. *
  3756. * Return Value
  3757. * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
  3758. */
  3759. static irqreturn_t pmcraid_isr(int irq, void *dev_id)
  3760. {
  3761. struct pmcraid_isr_param *hrrq_vector;
  3762. struct pmcraid_instance *pinstance;
  3763. u32 intrs;
  3764. unsigned long lock_flags;
  3765. int hrrq_id = 0;
  3766. /* In case of legacy interrupt mode where interrupts are shared across
  3767. * isrs, it may be possible that the current interrupt is not from IOA
  3768. */
  3769. if (!dev_id) {
  3770. printk(KERN_INFO "%s(): NULL host pointer\n", __func__);
  3771. return IRQ_NONE;
  3772. }
  3773. hrrq_vector = (struct pmcraid_isr_param *)dev_id;
  3774. pinstance = hrrq_vector->drv_inst;
  3775. intrs = pmcraid_read_interrupts(pinstance);
  3776. if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0))
  3777. return IRQ_NONE;
  3778. /* Any error interrupts including unit_check, initiate IOA reset.
  3779. * In case of unit check indicate to reset_sequence that IOA unit
  3780. * checked and prepare for a dump during reset sequence
  3781. */
  3782. if (intrs & PMCRAID_ERROR_INTERRUPTS) {
  3783. if (intrs & INTRS_IOA_UNIT_CHECK)
  3784. pinstance->ioa_unit_check = 1;
  3785. iowrite32(intrs,
  3786. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3787. pmcraid_err("ISR: error interrupts: %x initiating reset\n",
  3788. intrs);
  3789. intrs = ioread32(
  3790. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3791. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  3792. pmcraid_initiate_reset(pinstance);
  3793. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3794. } else {
  3795. /* If interrupt was as part of the ioa initialization,
  3796. * clear. Delete the timer and wakeup the
  3797. * reset engine to proceed with reset sequence
  3798. */
  3799. if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
  3800. pmcraid_clr_trans_op(pinstance);
  3801. } else {
  3802. iowrite32(intrs,
  3803. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3804. ioread32(
  3805. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3806. tasklet_schedule(
  3807. &(pinstance->isr_tasklet[hrrq_id]));
  3808. }
  3809. }
  3810. return IRQ_HANDLED;
  3811. }
  3812. /**
  3813. * pmcraid_worker_function - worker thread function
  3814. *
  3815. * @workp: pointer to struct work queue
  3816. *
  3817. * Return Value
  3818. * None
  3819. */
  3820. static void pmcraid_worker_function(struct work_struct *workp)
  3821. {
  3822. struct pmcraid_instance *pinstance;
  3823. struct pmcraid_resource_entry *res;
  3824. struct pmcraid_resource_entry *temp;
  3825. struct scsi_device *sdev;
  3826. unsigned long lock_flags;
  3827. unsigned long host_lock_flags;
  3828. u16 fw_version;
  3829. u8 bus, target, lun;
  3830. pinstance = container_of(workp, struct pmcraid_instance, worker_q);
  3831. /* add resources only after host is added into system */
  3832. if (!atomic_read(&pinstance->expose_resources))
  3833. return;
  3834. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  3835. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  3836. list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) {
  3837. if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) {
  3838. sdev = res->scsi_dev;
  3839. /* host_lock must be held before calling
  3840. * scsi_device_get
  3841. */
  3842. spin_lock_irqsave(pinstance->host->host_lock,
  3843. host_lock_flags);
  3844. if (!scsi_device_get(sdev)) {
  3845. spin_unlock_irqrestore(
  3846. pinstance->host->host_lock,
  3847. host_lock_flags);
  3848. pmcraid_info("deleting %x from midlayer\n",
  3849. res->cfg_entry.resource_address);
  3850. list_move_tail(&res->queue,
  3851. &pinstance->free_res_q);
  3852. spin_unlock_irqrestore(
  3853. &pinstance->resource_lock,
  3854. lock_flags);
  3855. scsi_remove_device(sdev);
  3856. scsi_device_put(sdev);
  3857. spin_lock_irqsave(&pinstance->resource_lock,
  3858. lock_flags);
  3859. res->change_detected = 0;
  3860. } else {
  3861. spin_unlock_irqrestore(
  3862. pinstance->host->host_lock,
  3863. host_lock_flags);
  3864. }
  3865. }
  3866. }
  3867. list_for_each_entry(res, &pinstance->used_res_q, queue) {
  3868. if (res->change_detected == RES_CHANGE_ADD) {
  3869. if (!pmcraid_expose_resource(fw_version,
  3870. &res->cfg_entry))
  3871. continue;
  3872. if (RES_IS_VSET(res->cfg_entry)) {
  3873. bus = PMCRAID_VSET_BUS_ID;
  3874. if (fw_version <= PMCRAID_FW_VERSION_1)
  3875. target = res->cfg_entry.unique_flags1;
  3876. else
  3877. target = res->cfg_entry.array_id & 0xFF;
  3878. lun = PMCRAID_VSET_LUN_ID;
  3879. } else {
  3880. bus = PMCRAID_PHYS_BUS_ID;
  3881. target =
  3882. RES_TARGET(
  3883. res->cfg_entry.resource_address);
  3884. lun = RES_LUN(res->cfg_entry.resource_address);
  3885. }
  3886. res->change_detected = 0;
  3887. spin_unlock_irqrestore(&pinstance->resource_lock,
  3888. lock_flags);
  3889. scsi_add_device(pinstance->host, bus, target, lun);
  3890. spin_lock_irqsave(&pinstance->resource_lock,
  3891. lock_flags);
  3892. }
  3893. }
  3894. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  3895. }
  3896. /**
  3897. * pmcraid_tasklet_function - Tasklet function
  3898. *
  3899. * @instance: pointer to msix param structure
  3900. *
  3901. * Return Value
  3902. * None
  3903. */
  3904. static void pmcraid_tasklet_function(unsigned long instance)
  3905. {
  3906. struct pmcraid_isr_param *hrrq_vector;
  3907. struct pmcraid_instance *pinstance;
  3908. unsigned long hrrq_lock_flags;
  3909. unsigned long pending_lock_flags;
  3910. unsigned long host_lock_flags;
  3911. spinlock_t *lockp; /* hrrq buffer lock */
  3912. int id;
  3913. __le32 resp;
  3914. hrrq_vector = (struct pmcraid_isr_param *)instance;
  3915. pinstance = hrrq_vector->drv_inst;
  3916. id = hrrq_vector->hrrq_id;
  3917. lockp = &(pinstance->hrrq_lock[id]);
  3918. /* loop through each of the commands responded by IOA. Each HRRQ buf is
  3919. * protected by its own lock. Traversals must be done within this lock
  3920. * as there may be multiple tasklets running on multiple CPUs. Note
  3921. * that the lock is held just for picking up the response handle and
  3922. * manipulating hrrq_curr/toggle_bit values.
  3923. */
  3924. spin_lock_irqsave(lockp, hrrq_lock_flags);
  3925. resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
  3926. while ((resp & HRRQ_TOGGLE_BIT) ==
  3927. pinstance->host_toggle_bit[id]) {
  3928. int cmd_index = resp >> 2;
  3929. struct pmcraid_cmd *cmd = NULL;
  3930. if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) {
  3931. pinstance->hrrq_curr[id]++;
  3932. } else {
  3933. pinstance->hrrq_curr[id] = pinstance->hrrq_start[id];
  3934. pinstance->host_toggle_bit[id] ^= 1u;
  3935. }
  3936. if (cmd_index >= PMCRAID_MAX_CMD) {
  3937. /* In case of invalid response handle, log message */
  3938. pmcraid_err("Invalid response handle %d\n", cmd_index);
  3939. resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
  3940. continue;
  3941. }
  3942. cmd = pinstance->cmd_list[cmd_index];
  3943. spin_unlock_irqrestore(lockp, hrrq_lock_flags);
  3944. spin_lock_irqsave(&pinstance->pending_pool_lock,
  3945. pending_lock_flags);
  3946. list_del(&cmd->free_list);
  3947. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  3948. pending_lock_flags);
  3949. del_timer(&cmd->timer);
  3950. atomic_dec(&pinstance->outstanding_cmds);
  3951. if (cmd->cmd_done == pmcraid_ioa_reset) {
  3952. spin_lock_irqsave(pinstance->host->host_lock,
  3953. host_lock_flags);
  3954. cmd->cmd_done(cmd);
  3955. spin_unlock_irqrestore(pinstance->host->host_lock,
  3956. host_lock_flags);
  3957. } else if (cmd->cmd_done != NULL) {
  3958. cmd->cmd_done(cmd);
  3959. }
  3960. /* loop over until we are done with all responses */
  3961. spin_lock_irqsave(lockp, hrrq_lock_flags);
  3962. resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
  3963. }
  3964. spin_unlock_irqrestore(lockp, hrrq_lock_flags);
  3965. }
  3966. /**
  3967. * pmcraid_unregister_interrupt_handler - de-register interrupts handlers
  3968. * @pinstance: pointer to adapter instance structure
  3969. *
  3970. * This routine un-registers registered interrupt handler and
  3971. * also frees irqs/vectors.
  3972. *
  3973. * Retun Value
  3974. * None
  3975. */
  3976. static
  3977. void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance)
  3978. {
  3979. int i;
  3980. for (i = 0; i < pinstance->num_hrrq; i++)
  3981. free_irq(pinstance->hrrq_vector[i].vector,
  3982. &(pinstance->hrrq_vector[i]));
  3983. if (pinstance->interrupt_mode) {
  3984. pci_disable_msix(pinstance->pdev);
  3985. pinstance->interrupt_mode = 0;
  3986. }
  3987. }
  3988. /**
  3989. * pmcraid_register_interrupt_handler - registers interrupt handler
  3990. * @pinstance: pointer to per-adapter instance structure
  3991. *
  3992. * Return Value
  3993. * 0 on success, non-zero error code otherwise.
  3994. */
  3995. static int
  3996. pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance)
  3997. {
  3998. int rc;
  3999. struct pci_dev *pdev = pinstance->pdev;
  4000. if ((pmcraid_enable_msix) &&
  4001. (pci_find_capability(pdev, PCI_CAP_ID_MSIX))) {
  4002. int num_hrrq = PMCRAID_NUM_MSIX_VECTORS;
  4003. struct msix_entry entries[PMCRAID_NUM_MSIX_VECTORS];
  4004. int i;
  4005. for (i = 0; i < PMCRAID_NUM_MSIX_VECTORS; i++)
  4006. entries[i].entry = i;
  4007. num_hrrq = pci_enable_msix_range(pdev, entries, 1, num_hrrq);
  4008. if (num_hrrq < 0)
  4009. goto pmcraid_isr_legacy;
  4010. for (i = 0; i < num_hrrq; i++) {
  4011. pinstance->hrrq_vector[i].hrrq_id = i;
  4012. pinstance->hrrq_vector[i].drv_inst = pinstance;
  4013. pinstance->hrrq_vector[i].vector = entries[i].vector;
  4014. rc = request_irq(pinstance->hrrq_vector[i].vector,
  4015. pmcraid_isr_msix, 0,
  4016. PMCRAID_DRIVER_NAME,
  4017. &(pinstance->hrrq_vector[i]));
  4018. if (rc) {
  4019. int j;
  4020. for (j = 0; j < i; j++)
  4021. free_irq(entries[j].vector,
  4022. &(pinstance->hrrq_vector[j]));
  4023. pci_disable_msix(pdev);
  4024. goto pmcraid_isr_legacy;
  4025. }
  4026. }
  4027. pinstance->num_hrrq = num_hrrq;
  4028. pinstance->interrupt_mode = 1;
  4029. iowrite32(DOORBELL_INTR_MODE_MSIX,
  4030. pinstance->int_regs.host_ioa_interrupt_reg);
  4031. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  4032. goto pmcraid_isr_out;
  4033. }
  4034. pmcraid_isr_legacy:
  4035. /* If MSI-X registration failed fallback to legacy mode, where
  4036. * only one hrrq entry will be used
  4037. */
  4038. pinstance->hrrq_vector[0].hrrq_id = 0;
  4039. pinstance->hrrq_vector[0].drv_inst = pinstance;
  4040. pinstance->hrrq_vector[0].vector = pdev->irq;
  4041. pinstance->num_hrrq = 1;
  4042. rc = request_irq(pdev->irq, pmcraid_isr, IRQF_SHARED,
  4043. PMCRAID_DRIVER_NAME, &pinstance->hrrq_vector[0]);
  4044. pmcraid_isr_out:
  4045. return rc;
  4046. }
  4047. /**
  4048. * pmcraid_release_cmd_blocks - release buufers allocated for command blocks
  4049. * @pinstance: per adapter instance structure pointer
  4050. * @max_index: number of buffer blocks to release
  4051. *
  4052. * Return Value
  4053. * None
  4054. */
  4055. static void
  4056. pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index)
  4057. {
  4058. int i;
  4059. for (i = 0; i < max_index; i++) {
  4060. kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]);
  4061. pinstance->cmd_list[i] = NULL;
  4062. }
  4063. kmem_cache_destroy(pinstance->cmd_cachep);
  4064. pinstance->cmd_cachep = NULL;
  4065. }
  4066. /**
  4067. * pmcraid_release_control_blocks - releases buffers alloced for control blocks
  4068. * @pinstance: pointer to per adapter instance structure
  4069. * @max_index: number of buffers (from 0 onwards) to release
  4070. *
  4071. * This function assumes that the command blocks for which control blocks are
  4072. * linked are not released.
  4073. *
  4074. * Return Value
  4075. * None
  4076. */
  4077. static void
  4078. pmcraid_release_control_blocks(
  4079. struct pmcraid_instance *pinstance,
  4080. int max_index
  4081. )
  4082. {
  4083. int i;
  4084. if (pinstance->control_pool == NULL)
  4085. return;
  4086. for (i = 0; i < max_index; i++) {
  4087. pci_pool_free(pinstance->control_pool,
  4088. pinstance->cmd_list[i]->ioa_cb,
  4089. pinstance->cmd_list[i]->ioa_cb_bus_addr);
  4090. pinstance->cmd_list[i]->ioa_cb = NULL;
  4091. pinstance->cmd_list[i]->ioa_cb_bus_addr = 0;
  4092. }
  4093. pci_pool_destroy(pinstance->control_pool);
  4094. pinstance->control_pool = NULL;
  4095. }
  4096. /**
  4097. * pmcraid_allocate_cmd_blocks - allocate memory for cmd block structures
  4098. * @pinstance - pointer to per adapter instance structure
  4099. *
  4100. * Allocates memory for command blocks using kernel slab allocator.
  4101. *
  4102. * Return Value
  4103. * 0 in case of success; -ENOMEM in case of failure
  4104. */
  4105. static int pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance)
  4106. {
  4107. int i;
  4108. sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d",
  4109. pinstance->host->unique_id);
  4110. pinstance->cmd_cachep = kmem_cache_create(
  4111. pinstance->cmd_pool_name,
  4112. sizeof(struct pmcraid_cmd), 0,
  4113. SLAB_HWCACHE_ALIGN, NULL);
  4114. if (!pinstance->cmd_cachep)
  4115. return -ENOMEM;
  4116. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  4117. pinstance->cmd_list[i] =
  4118. kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL);
  4119. if (!pinstance->cmd_list[i]) {
  4120. pmcraid_release_cmd_blocks(pinstance, i);
  4121. return -ENOMEM;
  4122. }
  4123. }
  4124. return 0;
  4125. }
  4126. /**
  4127. * pmcraid_allocate_control_blocks - allocates memory control blocks
  4128. * @pinstance : pointer to per adapter instance structure
  4129. *
  4130. * This function allocates PCI memory for DMAable buffers like IOARCB, IOADLs
  4131. * and IOASAs. This is called after command blocks are already allocated.
  4132. *
  4133. * Return Value
  4134. * 0 in case it can allocate all control blocks, otherwise -ENOMEM
  4135. */
  4136. static int pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance)
  4137. {
  4138. int i;
  4139. sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d",
  4140. pinstance->host->unique_id);
  4141. pinstance->control_pool =
  4142. pci_pool_create(pinstance->ctl_pool_name,
  4143. pinstance->pdev,
  4144. sizeof(struct pmcraid_control_block),
  4145. PMCRAID_IOARCB_ALIGNMENT, 0);
  4146. if (!pinstance->control_pool)
  4147. return -ENOMEM;
  4148. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  4149. pinstance->cmd_list[i]->ioa_cb =
  4150. pci_pool_alloc(
  4151. pinstance->control_pool,
  4152. GFP_KERNEL,
  4153. &(pinstance->cmd_list[i]->ioa_cb_bus_addr));
  4154. if (!pinstance->cmd_list[i]->ioa_cb) {
  4155. pmcraid_release_control_blocks(pinstance, i);
  4156. return -ENOMEM;
  4157. }
  4158. memset(pinstance->cmd_list[i]->ioa_cb, 0,
  4159. sizeof(struct pmcraid_control_block));
  4160. }
  4161. return 0;
  4162. }
  4163. /**
  4164. * pmcraid_release_host_rrqs - release memory allocated for hrrq buffer(s)
  4165. * @pinstance: pointer to per adapter instance structure
  4166. * @maxindex: size of hrrq buffer pointer array
  4167. *
  4168. * Return Value
  4169. * None
  4170. */
  4171. static void
  4172. pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex)
  4173. {
  4174. int i;
  4175. for (i = 0; i < maxindex; i++) {
  4176. pci_free_consistent(pinstance->pdev,
  4177. HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD,
  4178. pinstance->hrrq_start[i],
  4179. pinstance->hrrq_start_bus_addr[i]);
  4180. /* reset pointers and toggle bit to zeros */
  4181. pinstance->hrrq_start[i] = NULL;
  4182. pinstance->hrrq_start_bus_addr[i] = 0;
  4183. pinstance->host_toggle_bit[i] = 0;
  4184. }
  4185. }
  4186. /**
  4187. * pmcraid_allocate_host_rrqs - Allocate and initialize host RRQ buffers
  4188. * @pinstance: pointer to per adapter instance structure
  4189. *
  4190. * Return value
  4191. * 0 hrrq buffers are allocated, -ENOMEM otherwise.
  4192. */
  4193. static int pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance)
  4194. {
  4195. int i, buffer_size;
  4196. buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
  4197. for (i = 0; i < pinstance->num_hrrq; i++) {
  4198. pinstance->hrrq_start[i] =
  4199. pci_alloc_consistent(
  4200. pinstance->pdev,
  4201. buffer_size,
  4202. &(pinstance->hrrq_start_bus_addr[i]));
  4203. if (pinstance->hrrq_start[i] == 0) {
  4204. pmcraid_err("pci_alloc failed for hrrq vector : %d\n",
  4205. i);
  4206. pmcraid_release_host_rrqs(pinstance, i);
  4207. return -ENOMEM;
  4208. }
  4209. memset(pinstance->hrrq_start[i], 0, buffer_size);
  4210. pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
  4211. pinstance->hrrq_end[i] =
  4212. pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
  4213. pinstance->host_toggle_bit[i] = 1;
  4214. spin_lock_init(&pinstance->hrrq_lock[i]);
  4215. }
  4216. return 0;
  4217. }
  4218. /**
  4219. * pmcraid_release_hcams - release HCAM buffers
  4220. *
  4221. * @pinstance: pointer to per adapter instance structure
  4222. *
  4223. * Return value
  4224. * none
  4225. */
  4226. static void pmcraid_release_hcams(struct pmcraid_instance *pinstance)
  4227. {
  4228. if (pinstance->ccn.msg != NULL) {
  4229. pci_free_consistent(pinstance->pdev,
  4230. PMCRAID_AEN_HDR_SIZE +
  4231. sizeof(struct pmcraid_hcam_ccn_ext),
  4232. pinstance->ccn.msg,
  4233. pinstance->ccn.baddr);
  4234. pinstance->ccn.msg = NULL;
  4235. pinstance->ccn.hcam = NULL;
  4236. pinstance->ccn.baddr = 0;
  4237. }
  4238. if (pinstance->ldn.msg != NULL) {
  4239. pci_free_consistent(pinstance->pdev,
  4240. PMCRAID_AEN_HDR_SIZE +
  4241. sizeof(struct pmcraid_hcam_ldn),
  4242. pinstance->ldn.msg,
  4243. pinstance->ldn.baddr);
  4244. pinstance->ldn.msg = NULL;
  4245. pinstance->ldn.hcam = NULL;
  4246. pinstance->ldn.baddr = 0;
  4247. }
  4248. }
  4249. /**
  4250. * pmcraid_allocate_hcams - allocates HCAM buffers
  4251. * @pinstance : pointer to per adapter instance structure
  4252. *
  4253. * Return Value:
  4254. * 0 in case of successful allocation, non-zero otherwise
  4255. */
  4256. static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance)
  4257. {
  4258. pinstance->ccn.msg = pci_alloc_consistent(
  4259. pinstance->pdev,
  4260. PMCRAID_AEN_HDR_SIZE +
  4261. sizeof(struct pmcraid_hcam_ccn_ext),
  4262. &(pinstance->ccn.baddr));
  4263. pinstance->ldn.msg = pci_alloc_consistent(
  4264. pinstance->pdev,
  4265. PMCRAID_AEN_HDR_SIZE +
  4266. sizeof(struct pmcraid_hcam_ldn),
  4267. &(pinstance->ldn.baddr));
  4268. if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) {
  4269. pmcraid_release_hcams(pinstance);
  4270. } else {
  4271. pinstance->ccn.hcam =
  4272. (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE;
  4273. pinstance->ldn.hcam =
  4274. (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE;
  4275. atomic_set(&pinstance->ccn.ignore, 0);
  4276. atomic_set(&pinstance->ldn.ignore, 0);
  4277. }
  4278. return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0;
  4279. }
  4280. /**
  4281. * pmcraid_release_config_buffers - release config.table buffers
  4282. * @pinstance: pointer to per adapter instance structure
  4283. *
  4284. * Return Value
  4285. * none
  4286. */
  4287. static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance)
  4288. {
  4289. if (pinstance->cfg_table != NULL &&
  4290. pinstance->cfg_table_bus_addr != 0) {
  4291. pci_free_consistent(pinstance->pdev,
  4292. sizeof(struct pmcraid_config_table),
  4293. pinstance->cfg_table,
  4294. pinstance->cfg_table_bus_addr);
  4295. pinstance->cfg_table = NULL;
  4296. pinstance->cfg_table_bus_addr = 0;
  4297. }
  4298. if (pinstance->res_entries != NULL) {
  4299. int i;
  4300. for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
  4301. list_del(&pinstance->res_entries[i].queue);
  4302. kfree(pinstance->res_entries);
  4303. pinstance->res_entries = NULL;
  4304. }
  4305. pmcraid_release_hcams(pinstance);
  4306. }
  4307. /**
  4308. * pmcraid_allocate_config_buffers - allocates DMAable memory for config table
  4309. * @pinstance : pointer to per adapter instance structure
  4310. *
  4311. * Return Value
  4312. * 0 for successful allocation, -ENOMEM for any failure
  4313. */
  4314. static int pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance)
  4315. {
  4316. int i;
  4317. pinstance->res_entries =
  4318. kzalloc(sizeof(struct pmcraid_resource_entry) *
  4319. PMCRAID_MAX_RESOURCES, GFP_KERNEL);
  4320. if (NULL == pinstance->res_entries) {
  4321. pmcraid_err("failed to allocate memory for resource table\n");
  4322. return -ENOMEM;
  4323. }
  4324. for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
  4325. list_add_tail(&pinstance->res_entries[i].queue,
  4326. &pinstance->free_res_q);
  4327. pinstance->cfg_table =
  4328. pci_alloc_consistent(pinstance->pdev,
  4329. sizeof(struct pmcraid_config_table),
  4330. &pinstance->cfg_table_bus_addr);
  4331. if (NULL == pinstance->cfg_table) {
  4332. pmcraid_err("couldn't alloc DMA memory for config table\n");
  4333. pmcraid_release_config_buffers(pinstance);
  4334. return -ENOMEM;
  4335. }
  4336. if (pmcraid_allocate_hcams(pinstance)) {
  4337. pmcraid_err("could not alloc DMA memory for HCAMS\n");
  4338. pmcraid_release_config_buffers(pinstance);
  4339. return -ENOMEM;
  4340. }
  4341. return 0;
  4342. }
  4343. /**
  4344. * pmcraid_init_tasklets - registers tasklets for response handling
  4345. *
  4346. * @pinstance: pointer adapter instance structure
  4347. *
  4348. * Return value
  4349. * none
  4350. */
  4351. static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance)
  4352. {
  4353. int i;
  4354. for (i = 0; i < pinstance->num_hrrq; i++)
  4355. tasklet_init(&pinstance->isr_tasklet[i],
  4356. pmcraid_tasklet_function,
  4357. (unsigned long)&pinstance->hrrq_vector[i]);
  4358. }
  4359. /**
  4360. * pmcraid_kill_tasklets - destroys tasklets registered for response handling
  4361. *
  4362. * @pinstance: pointer to adapter instance structure
  4363. *
  4364. * Return value
  4365. * none
  4366. */
  4367. static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance)
  4368. {
  4369. int i;
  4370. for (i = 0; i < pinstance->num_hrrq; i++)
  4371. tasklet_kill(&pinstance->isr_tasklet[i]);
  4372. }
  4373. /**
  4374. * pmcraid_release_buffers - release per-adapter buffers allocated
  4375. *
  4376. * @pinstance: pointer to adapter soft state
  4377. *
  4378. * Return Value
  4379. * none
  4380. */
  4381. static void pmcraid_release_buffers(struct pmcraid_instance *pinstance)
  4382. {
  4383. pmcraid_release_config_buffers(pinstance);
  4384. pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD);
  4385. pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
  4386. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4387. if (pinstance->inq_data != NULL) {
  4388. pci_free_consistent(pinstance->pdev,
  4389. sizeof(struct pmcraid_inquiry_data),
  4390. pinstance->inq_data,
  4391. pinstance->inq_data_baddr);
  4392. pinstance->inq_data = NULL;
  4393. pinstance->inq_data_baddr = 0;
  4394. }
  4395. if (pinstance->timestamp_data != NULL) {
  4396. pci_free_consistent(pinstance->pdev,
  4397. sizeof(struct pmcraid_timestamp_data),
  4398. pinstance->timestamp_data,
  4399. pinstance->timestamp_data_baddr);
  4400. pinstance->timestamp_data = NULL;
  4401. pinstance->timestamp_data_baddr = 0;
  4402. }
  4403. }
  4404. /**
  4405. * pmcraid_init_buffers - allocates memory and initializes various structures
  4406. * @pinstance: pointer to per adapter instance structure
  4407. *
  4408. * This routine pre-allocates memory based on the type of block as below:
  4409. * cmdblocks(PMCRAID_MAX_CMD): kernel memory using kernel's slab_allocator,
  4410. * IOARCBs(PMCRAID_MAX_CMD) : DMAable memory, using pci pool allocator
  4411. * config-table entries : DMAable memory using pci_alloc_consistent
  4412. * HostRRQs : DMAable memory, using pci_alloc_consistent
  4413. *
  4414. * Return Value
  4415. * 0 in case all of the blocks are allocated, -ENOMEM otherwise.
  4416. */
  4417. static int pmcraid_init_buffers(struct pmcraid_instance *pinstance)
  4418. {
  4419. int i;
  4420. if (pmcraid_allocate_host_rrqs(pinstance)) {
  4421. pmcraid_err("couldn't allocate memory for %d host rrqs\n",
  4422. pinstance->num_hrrq);
  4423. return -ENOMEM;
  4424. }
  4425. if (pmcraid_allocate_config_buffers(pinstance)) {
  4426. pmcraid_err("couldn't allocate memory for config buffers\n");
  4427. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4428. return -ENOMEM;
  4429. }
  4430. if (pmcraid_allocate_cmd_blocks(pinstance)) {
  4431. pmcraid_err("couldn't allocate memory for cmd blocks\n");
  4432. pmcraid_release_config_buffers(pinstance);
  4433. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4434. return -ENOMEM;
  4435. }
  4436. if (pmcraid_allocate_control_blocks(pinstance)) {
  4437. pmcraid_err("couldn't allocate memory control blocks\n");
  4438. pmcraid_release_config_buffers(pinstance);
  4439. pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
  4440. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4441. return -ENOMEM;
  4442. }
  4443. /* allocate DMAable memory for page D0 INQUIRY buffer */
  4444. pinstance->inq_data = pci_alloc_consistent(
  4445. pinstance->pdev,
  4446. sizeof(struct pmcraid_inquiry_data),
  4447. &pinstance->inq_data_baddr);
  4448. if (pinstance->inq_data == NULL) {
  4449. pmcraid_err("couldn't allocate DMA memory for INQUIRY\n");
  4450. pmcraid_release_buffers(pinstance);
  4451. return -ENOMEM;
  4452. }
  4453. /* allocate DMAable memory for set timestamp data buffer */
  4454. pinstance->timestamp_data = pci_alloc_consistent(
  4455. pinstance->pdev,
  4456. sizeof(struct pmcraid_timestamp_data),
  4457. &pinstance->timestamp_data_baddr);
  4458. if (pinstance->timestamp_data == NULL) {
  4459. pmcraid_err("couldn't allocate DMA memory for \
  4460. set time_stamp \n");
  4461. pmcraid_release_buffers(pinstance);
  4462. return -ENOMEM;
  4463. }
  4464. /* Initialize all the command blocks and add them to free pool. No
  4465. * need to lock (free_pool_lock) as this is done in initialization
  4466. * itself
  4467. */
  4468. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  4469. struct pmcraid_cmd *cmdp = pinstance->cmd_list[i];
  4470. pmcraid_init_cmdblk(cmdp, i);
  4471. cmdp->drv_inst = pinstance;
  4472. list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool);
  4473. }
  4474. return 0;
  4475. }
  4476. /**
  4477. * pmcraid_reinit_buffers - resets various buffer pointers
  4478. * @pinstance: pointer to adapter instance
  4479. * Return value
  4480. * none
  4481. */
  4482. static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance)
  4483. {
  4484. int i;
  4485. int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
  4486. for (i = 0; i < pinstance->num_hrrq; i++) {
  4487. memset(pinstance->hrrq_start[i], 0, buffer_size);
  4488. pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
  4489. pinstance->hrrq_end[i] =
  4490. pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
  4491. pinstance->host_toggle_bit[i] = 1;
  4492. }
  4493. }
  4494. /**
  4495. * pmcraid_init_instance - initialize per instance data structure
  4496. * @pdev: pointer to pci device structure
  4497. * @host: pointer to Scsi_Host structure
  4498. * @mapped_pci_addr: memory mapped IOA configuration registers
  4499. *
  4500. * Return Value
  4501. * 0 on success, non-zero in case of any failure
  4502. */
  4503. static int pmcraid_init_instance(struct pci_dev *pdev, struct Scsi_Host *host,
  4504. void __iomem *mapped_pci_addr)
  4505. {
  4506. struct pmcraid_instance *pinstance =
  4507. (struct pmcraid_instance *)host->hostdata;
  4508. pinstance->host = host;
  4509. pinstance->pdev = pdev;
  4510. /* Initialize register addresses */
  4511. pinstance->mapped_dma_addr = mapped_pci_addr;
  4512. /* Initialize chip-specific details */
  4513. {
  4514. struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg;
  4515. struct pmcraid_interrupts *pint_regs = &pinstance->int_regs;
  4516. pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin;
  4517. pint_regs->ioa_host_interrupt_reg =
  4518. mapped_pci_addr + chip_cfg->ioa_host_intr;
  4519. pint_regs->ioa_host_interrupt_clr_reg =
  4520. mapped_pci_addr + chip_cfg->ioa_host_intr_clr;
  4521. pint_regs->ioa_host_msix_interrupt_reg =
  4522. mapped_pci_addr + chip_cfg->ioa_host_msix_intr;
  4523. pint_regs->host_ioa_interrupt_reg =
  4524. mapped_pci_addr + chip_cfg->host_ioa_intr;
  4525. pint_regs->host_ioa_interrupt_clr_reg =
  4526. mapped_pci_addr + chip_cfg->host_ioa_intr_clr;
  4527. /* Current version of firmware exposes interrupt mask set
  4528. * and mask clr registers through memory mapped bar0.
  4529. */
  4530. pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox;
  4531. pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus;
  4532. pint_regs->ioa_host_interrupt_mask_reg =
  4533. mapped_pci_addr + chip_cfg->ioa_host_mask;
  4534. pint_regs->ioa_host_interrupt_mask_clr_reg =
  4535. mapped_pci_addr + chip_cfg->ioa_host_mask_clr;
  4536. pint_regs->global_interrupt_mask_reg =
  4537. mapped_pci_addr + chip_cfg->global_intr_mask;
  4538. };
  4539. pinstance->ioa_reset_attempts = 0;
  4540. init_waitqueue_head(&pinstance->reset_wait_q);
  4541. atomic_set(&pinstance->outstanding_cmds, 0);
  4542. atomic_set(&pinstance->last_message_id, 0);
  4543. atomic_set(&pinstance->expose_resources, 0);
  4544. INIT_LIST_HEAD(&pinstance->free_res_q);
  4545. INIT_LIST_HEAD(&pinstance->used_res_q);
  4546. INIT_LIST_HEAD(&pinstance->free_cmd_pool);
  4547. INIT_LIST_HEAD(&pinstance->pending_cmd_pool);
  4548. spin_lock_init(&pinstance->free_pool_lock);
  4549. spin_lock_init(&pinstance->pending_pool_lock);
  4550. spin_lock_init(&pinstance->resource_lock);
  4551. mutex_init(&pinstance->aen_queue_lock);
  4552. /* Work-queue (Shared) for deferred processing error handling */
  4553. INIT_WORK(&pinstance->worker_q, pmcraid_worker_function);
  4554. /* Initialize the default log_level */
  4555. pinstance->current_log_level = pmcraid_log_level;
  4556. /* Setup variables required for reset engine */
  4557. pinstance->ioa_state = IOA_STATE_UNKNOWN;
  4558. pinstance->reset_cmd = NULL;
  4559. return 0;
  4560. }
  4561. /**
  4562. * pmcraid_shutdown - shutdown adapter controller.
  4563. * @pdev: pci device struct
  4564. *
  4565. * Issues an adapter shutdown to the card waits for its completion
  4566. *
  4567. * Return value
  4568. * none
  4569. */
  4570. static void pmcraid_shutdown(struct pci_dev *pdev)
  4571. {
  4572. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4573. pmcraid_reset_bringdown(pinstance);
  4574. }
  4575. /**
  4576. * pmcraid_get_minor - returns unused minor number from minor number bitmap
  4577. */
  4578. static unsigned short pmcraid_get_minor(void)
  4579. {
  4580. int minor;
  4581. minor = find_first_zero_bit(pmcraid_minor, sizeof(pmcraid_minor));
  4582. __set_bit(minor, pmcraid_minor);
  4583. return minor;
  4584. }
  4585. /**
  4586. * pmcraid_release_minor - releases given minor back to minor number bitmap
  4587. */
  4588. static void pmcraid_release_minor(unsigned short minor)
  4589. {
  4590. __clear_bit(minor, pmcraid_minor);
  4591. }
  4592. /**
  4593. * pmcraid_setup_chrdev - allocates a minor number and registers a char device
  4594. *
  4595. * @pinstance: pointer to adapter instance for which to register device
  4596. *
  4597. * Return value
  4598. * 0 in case of success, otherwise non-zero
  4599. */
  4600. static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance)
  4601. {
  4602. int minor;
  4603. int error;
  4604. minor = pmcraid_get_minor();
  4605. cdev_init(&pinstance->cdev, &pmcraid_fops);
  4606. pinstance->cdev.owner = THIS_MODULE;
  4607. error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1);
  4608. if (error)
  4609. pmcraid_release_minor(minor);
  4610. else
  4611. device_create(pmcraid_class, NULL, MKDEV(pmcraid_major, minor),
  4612. NULL, "%s%u", PMCRAID_DEVFILE, minor);
  4613. return error;
  4614. }
  4615. /**
  4616. * pmcraid_release_chrdev - unregisters per-adapter management interface
  4617. *
  4618. * @pinstance: pointer to adapter instance structure
  4619. *
  4620. * Return value
  4621. * none
  4622. */
  4623. static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance)
  4624. {
  4625. pmcraid_release_minor(MINOR(pinstance->cdev.dev));
  4626. device_destroy(pmcraid_class,
  4627. MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev)));
  4628. cdev_del(&pinstance->cdev);
  4629. }
  4630. /**
  4631. * pmcraid_remove - IOA hot plug remove entry point
  4632. * @pdev: pci device struct
  4633. *
  4634. * Return value
  4635. * none
  4636. */
  4637. static void pmcraid_remove(struct pci_dev *pdev)
  4638. {
  4639. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4640. /* remove the management interface (/dev file) for this device */
  4641. pmcraid_release_chrdev(pinstance);
  4642. /* remove host template from scsi midlayer */
  4643. scsi_remove_host(pinstance->host);
  4644. /* block requests from mid-layer */
  4645. scsi_block_requests(pinstance->host);
  4646. /* initiate shutdown adapter */
  4647. pmcraid_shutdown(pdev);
  4648. pmcraid_disable_interrupts(pinstance, ~0);
  4649. flush_work(&pinstance->worker_q);
  4650. pmcraid_kill_tasklets(pinstance);
  4651. pmcraid_unregister_interrupt_handler(pinstance);
  4652. pmcraid_release_buffers(pinstance);
  4653. iounmap(pinstance->mapped_dma_addr);
  4654. pci_release_regions(pdev);
  4655. scsi_host_put(pinstance->host);
  4656. pci_disable_device(pdev);
  4657. return;
  4658. }
  4659. #ifdef CONFIG_PM
  4660. /**
  4661. * pmcraid_suspend - driver suspend entry point for power management
  4662. * @pdev: PCI device structure
  4663. * @state: PCI power state to suspend routine
  4664. *
  4665. * Return Value - 0 always
  4666. */
  4667. static int pmcraid_suspend(struct pci_dev *pdev, pm_message_t state)
  4668. {
  4669. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4670. pmcraid_shutdown(pdev);
  4671. pmcraid_disable_interrupts(pinstance, ~0);
  4672. pmcraid_kill_tasklets(pinstance);
  4673. pci_set_drvdata(pinstance->pdev, pinstance);
  4674. pmcraid_unregister_interrupt_handler(pinstance);
  4675. pci_save_state(pdev);
  4676. pci_disable_device(pdev);
  4677. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  4678. return 0;
  4679. }
  4680. /**
  4681. * pmcraid_resume - driver resume entry point PCI power management
  4682. * @pdev: PCI device structure
  4683. *
  4684. * Return Value - 0 in case of success. Error code in case of any failure
  4685. */
  4686. static int pmcraid_resume(struct pci_dev *pdev)
  4687. {
  4688. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4689. struct Scsi_Host *host = pinstance->host;
  4690. int rc;
  4691. pci_set_power_state(pdev, PCI_D0);
  4692. pci_enable_wake(pdev, PCI_D0, 0);
  4693. pci_restore_state(pdev);
  4694. rc = pci_enable_device(pdev);
  4695. if (rc) {
  4696. dev_err(&pdev->dev, "resume: Enable device failed\n");
  4697. return rc;
  4698. }
  4699. pci_set_master(pdev);
  4700. if ((sizeof(dma_addr_t) == 4) ||
  4701. pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  4702. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  4703. if (rc == 0)
  4704. rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  4705. if (rc != 0) {
  4706. dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n");
  4707. goto disable_device;
  4708. }
  4709. pmcraid_disable_interrupts(pinstance, ~0);
  4710. atomic_set(&pinstance->outstanding_cmds, 0);
  4711. rc = pmcraid_register_interrupt_handler(pinstance);
  4712. if (rc) {
  4713. dev_err(&pdev->dev,
  4714. "resume: couldn't register interrupt handlers\n");
  4715. rc = -ENODEV;
  4716. goto release_host;
  4717. }
  4718. pmcraid_init_tasklets(pinstance);
  4719. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  4720. /* Start with hard reset sequence which brings up IOA to operational
  4721. * state as well as completes the reset sequence.
  4722. */
  4723. pinstance->ioa_hard_reset = 1;
  4724. /* Start IOA firmware initialization and bring card to Operational
  4725. * state.
  4726. */
  4727. if (pmcraid_reset_bringup(pinstance)) {
  4728. dev_err(&pdev->dev, "couldn't initialize IOA\n");
  4729. rc = -ENODEV;
  4730. goto release_tasklets;
  4731. }
  4732. return 0;
  4733. release_tasklets:
  4734. pmcraid_disable_interrupts(pinstance, ~0);
  4735. pmcraid_kill_tasklets(pinstance);
  4736. pmcraid_unregister_interrupt_handler(pinstance);
  4737. release_host:
  4738. scsi_host_put(host);
  4739. disable_device:
  4740. pci_disable_device(pdev);
  4741. return rc;
  4742. }
  4743. #else
  4744. #define pmcraid_suspend NULL
  4745. #define pmcraid_resume NULL
  4746. #endif /* CONFIG_PM */
  4747. /**
  4748. * pmcraid_complete_ioa_reset - Called by either timer or tasklet during
  4749. * completion of the ioa reset
  4750. * @cmd: pointer to reset command block
  4751. */
  4752. static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd)
  4753. {
  4754. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4755. unsigned long flags;
  4756. spin_lock_irqsave(pinstance->host->host_lock, flags);
  4757. pmcraid_ioa_reset(cmd);
  4758. spin_unlock_irqrestore(pinstance->host->host_lock, flags);
  4759. scsi_unblock_requests(pinstance->host);
  4760. schedule_work(&pinstance->worker_q);
  4761. }
  4762. /**
  4763. * pmcraid_set_supported_devs - sends SET SUPPORTED DEVICES to IOAFP
  4764. *
  4765. * @cmd: pointer to pmcraid_cmd structure
  4766. *
  4767. * Return Value
  4768. * 0 for success or non-zero for failure cases
  4769. */
  4770. static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd)
  4771. {
  4772. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  4773. void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset;
  4774. pmcraid_reinit_cmdblk(cmd);
  4775. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  4776. ioarcb->request_type = REQ_TYPE_IOACMD;
  4777. ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES;
  4778. ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED;
  4779. /* If this was called as part of resource table reinitialization due to
  4780. * lost CCN, it is enough to return the command block back to free pool
  4781. * as part of set_supported_devs completion function.
  4782. */
  4783. if (cmd->drv_inst->reinit_cfg_table) {
  4784. cmd->drv_inst->reinit_cfg_table = 0;
  4785. cmd->release = 1;
  4786. cmd_done = pmcraid_reinit_cfgtable_done;
  4787. }
  4788. /* we will be done with the reset sequence after set supported devices,
  4789. * setup the done function to return the command block back to free
  4790. * pool
  4791. */
  4792. pmcraid_send_cmd(cmd,
  4793. cmd_done,
  4794. PMCRAID_SET_SUP_DEV_TIMEOUT,
  4795. pmcraid_timeout_handler);
  4796. return;
  4797. }
  4798. /**
  4799. * pmcraid_set_timestamp - set the timestamp to IOAFP
  4800. *
  4801. * @cmd: pointer to pmcraid_cmd structure
  4802. *
  4803. * Return Value
  4804. * 0 for success or non-zero for failure cases
  4805. */
  4806. static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd)
  4807. {
  4808. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4809. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  4810. __be32 time_stamp_len = cpu_to_be32(PMCRAID_TIMESTAMP_LEN);
  4811. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  4812. __le64 timestamp;
  4813. timestamp = ktime_get_real_seconds() * 1000;
  4814. pinstance->timestamp_data->timestamp[0] = (__u8)(timestamp);
  4815. pinstance->timestamp_data->timestamp[1] = (__u8)((timestamp) >> 8);
  4816. pinstance->timestamp_data->timestamp[2] = (__u8)((timestamp) >> 16);
  4817. pinstance->timestamp_data->timestamp[3] = (__u8)((timestamp) >> 24);
  4818. pinstance->timestamp_data->timestamp[4] = (__u8)((timestamp) >> 32);
  4819. pinstance->timestamp_data->timestamp[5] = (__u8)((timestamp) >> 40);
  4820. pmcraid_reinit_cmdblk(cmd);
  4821. ioarcb->request_type = REQ_TYPE_SCSI;
  4822. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  4823. ioarcb->cdb[0] = PMCRAID_SCSI_SET_TIMESTAMP;
  4824. ioarcb->cdb[1] = PMCRAID_SCSI_SERVICE_ACTION;
  4825. memcpy(&(ioarcb->cdb[6]), &time_stamp_len, sizeof(time_stamp_len));
  4826. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  4827. offsetof(struct pmcraid_ioarcb,
  4828. add_data.u.ioadl[0]));
  4829. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  4830. ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
  4831. ioarcb->request_flags0 |= NO_LINK_DESCS;
  4832. ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
  4833. ioarcb->data_transfer_length =
  4834. cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
  4835. ioadl = &(ioarcb->add_data.u.ioadl[0]);
  4836. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  4837. ioadl->address = cpu_to_le64(pinstance->timestamp_data_baddr);
  4838. ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
  4839. if (!pinstance->timestamp_error) {
  4840. pinstance->timestamp_error = 0;
  4841. pmcraid_send_cmd(cmd, pmcraid_set_supported_devs,
  4842. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  4843. } else {
  4844. pmcraid_send_cmd(cmd, pmcraid_return_cmd,
  4845. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  4846. return;
  4847. }
  4848. }
  4849. /**
  4850. * pmcraid_init_res_table - Initialize the resource table
  4851. * @cmd: pointer to pmcraid command struct
  4852. *
  4853. * This function looks through the existing resource table, comparing
  4854. * it with the config table. This function will take care of old/new
  4855. * devices and schedule adding/removing them from the mid-layer
  4856. * as appropriate.
  4857. *
  4858. * Return value
  4859. * None
  4860. */
  4861. static void pmcraid_init_res_table(struct pmcraid_cmd *cmd)
  4862. {
  4863. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4864. struct pmcraid_resource_entry *res, *temp;
  4865. struct pmcraid_config_table_entry *cfgte;
  4866. unsigned long lock_flags;
  4867. int found, rc, i;
  4868. u16 fw_version;
  4869. LIST_HEAD(old_res);
  4870. if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED)
  4871. pmcraid_err("IOA requires microcode download\n");
  4872. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  4873. /* resource list is protected by pinstance->resource_lock.
  4874. * init_res_table can be called from probe (user-thread) or runtime
  4875. * reset (timer/tasklet)
  4876. */
  4877. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  4878. list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue)
  4879. list_move_tail(&res->queue, &old_res);
  4880. for (i = 0; i < pinstance->cfg_table->num_entries; i++) {
  4881. if (be16_to_cpu(pinstance->inq_data->fw_version) <=
  4882. PMCRAID_FW_VERSION_1)
  4883. cfgte = &pinstance->cfg_table->entries[i];
  4884. else
  4885. cfgte = (struct pmcraid_config_table_entry *)
  4886. &pinstance->cfg_table->entries_ext[i];
  4887. if (!pmcraid_expose_resource(fw_version, cfgte))
  4888. continue;
  4889. found = 0;
  4890. /* If this entry was already detected and initialized */
  4891. list_for_each_entry_safe(res, temp, &old_res, queue) {
  4892. rc = memcmp(&res->cfg_entry.resource_address,
  4893. &cfgte->resource_address,
  4894. sizeof(cfgte->resource_address));
  4895. if (!rc) {
  4896. list_move_tail(&res->queue,
  4897. &pinstance->used_res_q);
  4898. found = 1;
  4899. break;
  4900. }
  4901. }
  4902. /* If this is new entry, initialize it and add it the queue */
  4903. if (!found) {
  4904. if (list_empty(&pinstance->free_res_q)) {
  4905. pmcraid_err("Too many devices attached\n");
  4906. break;
  4907. }
  4908. found = 1;
  4909. res = list_entry(pinstance->free_res_q.next,
  4910. struct pmcraid_resource_entry, queue);
  4911. res->scsi_dev = NULL;
  4912. res->change_detected = RES_CHANGE_ADD;
  4913. res->reset_progress = 0;
  4914. list_move_tail(&res->queue, &pinstance->used_res_q);
  4915. }
  4916. /* copy new configuration table entry details into driver
  4917. * maintained resource entry
  4918. */
  4919. if (found) {
  4920. memcpy(&res->cfg_entry, cfgte,
  4921. pinstance->config_table_entry_size);
  4922. pmcraid_info("New res type:%x, vset:%x, addr:%x:\n",
  4923. res->cfg_entry.resource_type,
  4924. (fw_version <= PMCRAID_FW_VERSION_1 ?
  4925. res->cfg_entry.unique_flags1 :
  4926. res->cfg_entry.array_id & 0xFF),
  4927. le32_to_cpu(res->cfg_entry.resource_address));
  4928. }
  4929. }
  4930. /* Detect any deleted entries, mark them for deletion from mid-layer */
  4931. list_for_each_entry_safe(res, temp, &old_res, queue) {
  4932. if (res->scsi_dev) {
  4933. res->change_detected = RES_CHANGE_DEL;
  4934. res->cfg_entry.resource_handle =
  4935. PMCRAID_INVALID_RES_HANDLE;
  4936. list_move_tail(&res->queue, &pinstance->used_res_q);
  4937. } else {
  4938. list_move_tail(&res->queue, &pinstance->free_res_q);
  4939. }
  4940. }
  4941. /* release the resource list lock */
  4942. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  4943. pmcraid_set_timestamp(cmd);
  4944. }
  4945. /**
  4946. * pmcraid_querycfg - Send a Query IOA Config to the adapter.
  4947. * @cmd: pointer pmcraid_cmd struct
  4948. *
  4949. * This function sends a Query IOA Configuration command to the adapter to
  4950. * retrieve the IOA configuration table.
  4951. *
  4952. * Return value:
  4953. * none
  4954. */
  4955. static void pmcraid_querycfg(struct pmcraid_cmd *cmd)
  4956. {
  4957. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  4958. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  4959. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4960. int cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table));
  4961. if (be16_to_cpu(pinstance->inq_data->fw_version) <=
  4962. PMCRAID_FW_VERSION_1)
  4963. pinstance->config_table_entry_size =
  4964. sizeof(struct pmcraid_config_table_entry);
  4965. else
  4966. pinstance->config_table_entry_size =
  4967. sizeof(struct pmcraid_config_table_entry_ext);
  4968. ioarcb->request_type = REQ_TYPE_IOACMD;
  4969. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  4970. ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG;
  4971. /* firmware requires 4-byte length field, specified in B.E format */
  4972. memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size));
  4973. /* Since entire config table can be described by single IOADL, it can
  4974. * be part of IOARCB itself
  4975. */
  4976. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  4977. offsetof(struct pmcraid_ioarcb,
  4978. add_data.u.ioadl[0]));
  4979. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  4980. ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
  4981. ioarcb->request_flags0 |= NO_LINK_DESCS;
  4982. ioarcb->data_transfer_length =
  4983. cpu_to_le32(sizeof(struct pmcraid_config_table));
  4984. ioadl = &(ioarcb->add_data.u.ioadl[0]);
  4985. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  4986. ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr);
  4987. ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table));
  4988. pmcraid_send_cmd(cmd, pmcraid_init_res_table,
  4989. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  4990. }
  4991. /**
  4992. * pmcraid_probe - PCI probe entry pointer for PMC MaxRAID controller driver
  4993. * @pdev: pointer to pci device structure
  4994. * @dev_id: pointer to device ids structure
  4995. *
  4996. * Return Value
  4997. * returns 0 if the device is claimed and successfully configured.
  4998. * returns non-zero error code in case of any failure
  4999. */
  5000. static int pmcraid_probe(struct pci_dev *pdev,
  5001. const struct pci_device_id *dev_id)
  5002. {
  5003. struct pmcraid_instance *pinstance;
  5004. struct Scsi_Host *host;
  5005. void __iomem *mapped_pci_addr;
  5006. int rc = PCIBIOS_SUCCESSFUL;
  5007. if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) {
  5008. pmcraid_err
  5009. ("maximum number(%d) of supported adapters reached\n",
  5010. atomic_read(&pmcraid_adapter_count));
  5011. return -ENOMEM;
  5012. }
  5013. atomic_inc(&pmcraid_adapter_count);
  5014. rc = pci_enable_device(pdev);
  5015. if (rc) {
  5016. dev_err(&pdev->dev, "Cannot enable adapter\n");
  5017. atomic_dec(&pmcraid_adapter_count);
  5018. return rc;
  5019. }
  5020. dev_info(&pdev->dev,
  5021. "Found new IOA(%x:%x), Total IOA count: %d\n",
  5022. pdev->vendor, pdev->device,
  5023. atomic_read(&pmcraid_adapter_count));
  5024. rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME);
  5025. if (rc < 0) {
  5026. dev_err(&pdev->dev,
  5027. "Couldn't register memory range of registers\n");
  5028. goto out_disable_device;
  5029. }
  5030. mapped_pci_addr = pci_iomap(pdev, 0, 0);
  5031. if (!mapped_pci_addr) {
  5032. dev_err(&pdev->dev, "Couldn't map PCI registers memory\n");
  5033. rc = -ENOMEM;
  5034. goto out_release_regions;
  5035. }
  5036. pci_set_master(pdev);
  5037. /* Firmware requires the system bus address of IOARCB to be within
  5038. * 32-bit addressable range though it has 64-bit IOARRIN register.
  5039. * However, firmware supports 64-bit streaming DMA buffers, whereas
  5040. * coherent buffers are to be 32-bit. Since pci_alloc_consistent always
  5041. * returns memory within 4GB (if not, change this logic), coherent
  5042. * buffers are within firmware acceptable address ranges.
  5043. */
  5044. if ((sizeof(dma_addr_t) == 4) ||
  5045. pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  5046. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  5047. /* firmware expects 32-bit DMA addresses for IOARRIN register; set 32
  5048. * bit mask for pci_alloc_consistent to return addresses within 4GB
  5049. */
  5050. if (rc == 0)
  5051. rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  5052. if (rc != 0) {
  5053. dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
  5054. goto cleanup_nomem;
  5055. }
  5056. host = scsi_host_alloc(&pmcraid_host_template,
  5057. sizeof(struct pmcraid_instance));
  5058. if (!host) {
  5059. dev_err(&pdev->dev, "scsi_host_alloc failed!\n");
  5060. rc = -ENOMEM;
  5061. goto cleanup_nomem;
  5062. }
  5063. host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS;
  5064. host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET;
  5065. host->unique_id = host->host_no;
  5066. host->max_channel = PMCRAID_MAX_BUS_TO_SCAN;
  5067. host->max_cmd_len = PMCRAID_MAX_CDB_LEN;
  5068. /* zero out entire instance structure */
  5069. pinstance = (struct pmcraid_instance *)host->hostdata;
  5070. memset(pinstance, 0, sizeof(*pinstance));
  5071. pinstance->chip_cfg =
  5072. (struct pmcraid_chip_details *)(dev_id->driver_data);
  5073. rc = pmcraid_init_instance(pdev, host, mapped_pci_addr);
  5074. if (rc < 0) {
  5075. dev_err(&pdev->dev, "failed to initialize adapter instance\n");
  5076. goto out_scsi_host_put;
  5077. }
  5078. pci_set_drvdata(pdev, pinstance);
  5079. /* Save PCI config-space for use following the reset */
  5080. rc = pci_save_state(pinstance->pdev);
  5081. if (rc != 0) {
  5082. dev_err(&pdev->dev, "Failed to save PCI config space\n");
  5083. goto out_scsi_host_put;
  5084. }
  5085. pmcraid_disable_interrupts(pinstance, ~0);
  5086. rc = pmcraid_register_interrupt_handler(pinstance);
  5087. if (rc) {
  5088. dev_err(&pdev->dev, "couldn't register interrupt handler\n");
  5089. goto out_scsi_host_put;
  5090. }
  5091. pmcraid_init_tasklets(pinstance);
  5092. /* allocate verious buffers used by LLD.*/
  5093. rc = pmcraid_init_buffers(pinstance);
  5094. if (rc) {
  5095. pmcraid_err("couldn't allocate memory blocks\n");
  5096. goto out_unregister_isr;
  5097. }
  5098. /* check the reset type required */
  5099. pmcraid_reset_type(pinstance);
  5100. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  5101. /* Start IOA firmware initialization and bring card to Operational
  5102. * state.
  5103. */
  5104. pmcraid_info("starting IOA initialization sequence\n");
  5105. if (pmcraid_reset_bringup(pinstance)) {
  5106. dev_err(&pdev->dev, "couldn't initialize IOA\n");
  5107. rc = 1;
  5108. goto out_release_bufs;
  5109. }
  5110. /* Add adapter instance into mid-layer list */
  5111. rc = scsi_add_host(pinstance->host, &pdev->dev);
  5112. if (rc != 0) {
  5113. pmcraid_err("couldn't add host into mid-layer: %d\n", rc);
  5114. goto out_release_bufs;
  5115. }
  5116. scsi_scan_host(pinstance->host);
  5117. rc = pmcraid_setup_chrdev(pinstance);
  5118. if (rc != 0) {
  5119. pmcraid_err("couldn't create mgmt interface, error: %x\n",
  5120. rc);
  5121. goto out_remove_host;
  5122. }
  5123. /* Schedule worker thread to handle CCN and take care of adding and
  5124. * removing devices to OS
  5125. */
  5126. atomic_set(&pinstance->expose_resources, 1);
  5127. schedule_work(&pinstance->worker_q);
  5128. return rc;
  5129. out_remove_host:
  5130. scsi_remove_host(host);
  5131. out_release_bufs:
  5132. pmcraid_release_buffers(pinstance);
  5133. out_unregister_isr:
  5134. pmcraid_kill_tasklets(pinstance);
  5135. pmcraid_unregister_interrupt_handler(pinstance);
  5136. out_scsi_host_put:
  5137. scsi_host_put(host);
  5138. cleanup_nomem:
  5139. iounmap(mapped_pci_addr);
  5140. out_release_regions:
  5141. pci_release_regions(pdev);
  5142. out_disable_device:
  5143. atomic_dec(&pmcraid_adapter_count);
  5144. pci_disable_device(pdev);
  5145. return -ENODEV;
  5146. }
  5147. /*
  5148. * PCI driver structure of pcmraid driver
  5149. */
  5150. static struct pci_driver pmcraid_driver = {
  5151. .name = PMCRAID_DRIVER_NAME,
  5152. .id_table = pmcraid_pci_table,
  5153. .probe = pmcraid_probe,
  5154. .remove = pmcraid_remove,
  5155. .suspend = pmcraid_suspend,
  5156. .resume = pmcraid_resume,
  5157. .shutdown = pmcraid_shutdown
  5158. };
  5159. /**
  5160. * pmcraid_init - module load entry point
  5161. */
  5162. static int __init pmcraid_init(void)
  5163. {
  5164. dev_t dev;
  5165. int error;
  5166. pmcraid_info("%s Device Driver version: %s\n",
  5167. PMCRAID_DRIVER_NAME, PMCRAID_DRIVER_VERSION);
  5168. error = alloc_chrdev_region(&dev, 0,
  5169. PMCRAID_MAX_ADAPTERS,
  5170. PMCRAID_DEVFILE);
  5171. if (error) {
  5172. pmcraid_err("failed to get a major number for adapters\n");
  5173. goto out_init;
  5174. }
  5175. pmcraid_major = MAJOR(dev);
  5176. pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE);
  5177. if (IS_ERR(pmcraid_class)) {
  5178. error = PTR_ERR(pmcraid_class);
  5179. pmcraid_err("failed to register with sysfs, error = %x\n",
  5180. error);
  5181. goto out_unreg_chrdev;
  5182. }
  5183. error = pmcraid_netlink_init();
  5184. if (error)
  5185. goto out_unreg_chrdev;
  5186. error = pci_register_driver(&pmcraid_driver);
  5187. if (error == 0)
  5188. goto out_init;
  5189. pmcraid_err("failed to register pmcraid driver, error = %x\n",
  5190. error);
  5191. class_destroy(pmcraid_class);
  5192. pmcraid_netlink_release();
  5193. out_unreg_chrdev:
  5194. unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS);
  5195. out_init:
  5196. return error;
  5197. }
  5198. /**
  5199. * pmcraid_exit - module unload entry point
  5200. */
  5201. static void __exit pmcraid_exit(void)
  5202. {
  5203. pmcraid_netlink_release();
  5204. unregister_chrdev_region(MKDEV(pmcraid_major, 0),
  5205. PMCRAID_MAX_ADAPTERS);
  5206. pci_unregister_driver(&pmcraid_driver);
  5207. class_destroy(pmcraid_class);
  5208. }
  5209. module_init(pmcraid_init);
  5210. module_exit(pmcraid_exit);