i40e_virtchnl_pf.c 84 KB

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  1. /*******************************************************************************
  2. *
  3. * Intel Ethernet Controller XL710 Family Linux Driver
  4. * Copyright(c) 2013 - 2016 Intel Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along
  16. * with this program. If not, see <http://www.gnu.org/licenses/>.
  17. *
  18. * The full GNU General Public License is included in this distribution in
  19. * the file called "COPYING".
  20. *
  21. * Contact Information:
  22. * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  23. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24. *
  25. ******************************************************************************/
  26. #include "i40e.h"
  27. /*********************notification routines***********************/
  28. /**
  29. * i40e_vc_vf_broadcast
  30. * @pf: pointer to the PF structure
  31. * @opcode: operation code
  32. * @retval: return value
  33. * @msg: pointer to the msg buffer
  34. * @msglen: msg length
  35. *
  36. * send a message to all VFs on a given PF
  37. **/
  38. static void i40e_vc_vf_broadcast(struct i40e_pf *pf,
  39. enum i40e_virtchnl_ops v_opcode,
  40. i40e_status v_retval, u8 *msg,
  41. u16 msglen)
  42. {
  43. struct i40e_hw *hw = &pf->hw;
  44. struct i40e_vf *vf = pf->vf;
  45. int i;
  46. for (i = 0; i < pf->num_alloc_vfs; i++, vf++) {
  47. int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
  48. /* Not all vfs are enabled so skip the ones that are not */
  49. if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states) &&
  50. !test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
  51. continue;
  52. /* Ignore return value on purpose - a given VF may fail, but
  53. * we need to keep going and send to all of them
  54. */
  55. i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
  56. msg, msglen, NULL);
  57. }
  58. }
  59. /**
  60. * i40e_vc_notify_vf_link_state
  61. * @vf: pointer to the VF structure
  62. *
  63. * send a link status message to a single VF
  64. **/
  65. static void i40e_vc_notify_vf_link_state(struct i40e_vf *vf)
  66. {
  67. struct i40e_virtchnl_pf_event pfe;
  68. struct i40e_pf *pf = vf->pf;
  69. struct i40e_hw *hw = &pf->hw;
  70. struct i40e_link_status *ls = &pf->hw.phy.link_info;
  71. int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
  72. pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
  73. pfe.severity = I40E_PF_EVENT_SEVERITY_INFO;
  74. if (vf->link_forced) {
  75. pfe.event_data.link_event.link_status = vf->link_up;
  76. pfe.event_data.link_event.link_speed =
  77. (vf->link_up ? I40E_LINK_SPEED_40GB : 0);
  78. } else {
  79. pfe.event_data.link_event.link_status =
  80. ls->link_info & I40E_AQ_LINK_UP;
  81. pfe.event_data.link_event.link_speed = ls->link_speed;
  82. }
  83. i40e_aq_send_msg_to_vf(hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
  84. 0, (u8 *)&pfe, sizeof(pfe), NULL);
  85. }
  86. /**
  87. * i40e_vc_notify_link_state
  88. * @pf: pointer to the PF structure
  89. *
  90. * send a link status message to all VFs on a given PF
  91. **/
  92. void i40e_vc_notify_link_state(struct i40e_pf *pf)
  93. {
  94. int i;
  95. for (i = 0; i < pf->num_alloc_vfs; i++)
  96. i40e_vc_notify_vf_link_state(&pf->vf[i]);
  97. }
  98. /**
  99. * i40e_vc_notify_reset
  100. * @pf: pointer to the PF structure
  101. *
  102. * indicate a pending reset to all VFs on a given PF
  103. **/
  104. void i40e_vc_notify_reset(struct i40e_pf *pf)
  105. {
  106. struct i40e_virtchnl_pf_event pfe;
  107. pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
  108. pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
  109. i40e_vc_vf_broadcast(pf, I40E_VIRTCHNL_OP_EVENT, 0,
  110. (u8 *)&pfe, sizeof(struct i40e_virtchnl_pf_event));
  111. }
  112. /**
  113. * i40e_vc_notify_vf_reset
  114. * @vf: pointer to the VF structure
  115. *
  116. * indicate a pending reset to the given VF
  117. **/
  118. void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
  119. {
  120. struct i40e_virtchnl_pf_event pfe;
  121. int abs_vf_id;
  122. /* validate the request */
  123. if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
  124. return;
  125. /* verify if the VF is in either init or active before proceeding */
  126. if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states) &&
  127. !test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
  128. return;
  129. abs_vf_id = vf->vf_id + (int)vf->pf->hw.func_caps.vf_base_id;
  130. pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
  131. pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
  132. i40e_aq_send_msg_to_vf(&vf->pf->hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
  133. 0, (u8 *)&pfe,
  134. sizeof(struct i40e_virtchnl_pf_event), NULL);
  135. }
  136. /***********************misc routines*****************************/
  137. /**
  138. * i40e_vc_disable_vf
  139. * @pf: pointer to the PF info
  140. * @vf: pointer to the VF info
  141. *
  142. * Disable the VF through a SW reset
  143. **/
  144. static inline void i40e_vc_disable_vf(struct i40e_pf *pf, struct i40e_vf *vf)
  145. {
  146. i40e_vc_notify_vf_reset(vf);
  147. i40e_reset_vf(vf, false);
  148. }
  149. /**
  150. * i40e_vc_isvalid_vsi_id
  151. * @vf: pointer to the VF info
  152. * @vsi_id: VF relative VSI id
  153. *
  154. * check for the valid VSI id
  155. **/
  156. static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u16 vsi_id)
  157. {
  158. struct i40e_pf *pf = vf->pf;
  159. struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
  160. return (vsi && (vsi->vf_id == vf->vf_id));
  161. }
  162. /**
  163. * i40e_vc_isvalid_queue_id
  164. * @vf: pointer to the VF info
  165. * @vsi_id: vsi id
  166. * @qid: vsi relative queue id
  167. *
  168. * check for the valid queue id
  169. **/
  170. static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u16 vsi_id,
  171. u8 qid)
  172. {
  173. struct i40e_pf *pf = vf->pf;
  174. struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
  175. return (vsi && (qid < vsi->alloc_queue_pairs));
  176. }
  177. /**
  178. * i40e_vc_isvalid_vector_id
  179. * @vf: pointer to the VF info
  180. * @vector_id: VF relative vector id
  181. *
  182. * check for the valid vector id
  183. **/
  184. static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u8 vector_id)
  185. {
  186. struct i40e_pf *pf = vf->pf;
  187. return vector_id < pf->hw.func_caps.num_msix_vectors_vf;
  188. }
  189. /***********************vf resource mgmt routines*****************/
  190. /**
  191. * i40e_vc_get_pf_queue_id
  192. * @vf: pointer to the VF info
  193. * @vsi_id: id of VSI as provided by the FW
  194. * @vsi_queue_id: vsi relative queue id
  195. *
  196. * return PF relative queue id
  197. **/
  198. static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u16 vsi_id,
  199. u8 vsi_queue_id)
  200. {
  201. struct i40e_pf *pf = vf->pf;
  202. struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
  203. u16 pf_queue_id = I40E_QUEUE_END_OF_LIST;
  204. if (!vsi)
  205. return pf_queue_id;
  206. if (le16_to_cpu(vsi->info.mapping_flags) &
  207. I40E_AQ_VSI_QUE_MAP_NONCONTIG)
  208. pf_queue_id =
  209. le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]);
  210. else
  211. pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) +
  212. vsi_queue_id;
  213. return pf_queue_id;
  214. }
  215. /**
  216. * i40e_config_irq_link_list
  217. * @vf: pointer to the VF info
  218. * @vsi_id: id of VSI as given by the FW
  219. * @vecmap: irq map info
  220. *
  221. * configure irq link list from the map
  222. **/
  223. static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_id,
  224. struct i40e_virtchnl_vector_map *vecmap)
  225. {
  226. unsigned long linklistmap = 0, tempmap;
  227. struct i40e_pf *pf = vf->pf;
  228. struct i40e_hw *hw = &pf->hw;
  229. u16 vsi_queue_id, pf_queue_id;
  230. enum i40e_queue_type qtype;
  231. u16 next_q, vector_id;
  232. u32 reg, reg_idx;
  233. u16 itr_idx = 0;
  234. vector_id = vecmap->vector_id;
  235. /* setup the head */
  236. if (0 == vector_id)
  237. reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
  238. else
  239. reg_idx = I40E_VPINT_LNKLSTN(
  240. ((pf->hw.func_caps.num_msix_vectors_vf - 1) * vf->vf_id) +
  241. (vector_id - 1));
  242. if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) {
  243. /* Special case - No queues mapped on this vector */
  244. wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
  245. goto irq_list_done;
  246. }
  247. tempmap = vecmap->rxq_map;
  248. for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
  249. linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
  250. vsi_queue_id));
  251. }
  252. tempmap = vecmap->txq_map;
  253. for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
  254. linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
  255. vsi_queue_id + 1));
  256. }
  257. next_q = find_first_bit(&linklistmap,
  258. (I40E_MAX_VSI_QP *
  259. I40E_VIRTCHNL_SUPPORTED_QTYPES));
  260. vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
  261. qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
  262. pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
  263. reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id);
  264. wr32(hw, reg_idx, reg);
  265. while (next_q < (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
  266. switch (qtype) {
  267. case I40E_QUEUE_TYPE_RX:
  268. reg_idx = I40E_QINT_RQCTL(pf_queue_id);
  269. itr_idx = vecmap->rxitr_idx;
  270. break;
  271. case I40E_QUEUE_TYPE_TX:
  272. reg_idx = I40E_QINT_TQCTL(pf_queue_id);
  273. itr_idx = vecmap->txitr_idx;
  274. break;
  275. default:
  276. break;
  277. }
  278. next_q = find_next_bit(&linklistmap,
  279. (I40E_MAX_VSI_QP *
  280. I40E_VIRTCHNL_SUPPORTED_QTYPES),
  281. next_q + 1);
  282. if (next_q <
  283. (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
  284. vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
  285. qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
  286. pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id,
  287. vsi_queue_id);
  288. } else {
  289. pf_queue_id = I40E_QUEUE_END_OF_LIST;
  290. qtype = 0;
  291. }
  292. /* format for the RQCTL & TQCTL regs is same */
  293. reg = (vector_id) |
  294. (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
  295. (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
  296. BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
  297. (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
  298. wr32(hw, reg_idx, reg);
  299. }
  300. /* if the vf is running in polling mode and using interrupt zero,
  301. * need to disable auto-mask on enabling zero interrupt for VFs.
  302. */
  303. if ((vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING) &&
  304. (vector_id == 0)) {
  305. reg = rd32(hw, I40E_GLINT_CTL);
  306. if (!(reg & I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK)) {
  307. reg |= I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK;
  308. wr32(hw, I40E_GLINT_CTL, reg);
  309. }
  310. }
  311. irq_list_done:
  312. i40e_flush(hw);
  313. }
  314. /**
  315. * i40e_release_iwarp_qvlist
  316. * @vf: pointer to the VF.
  317. *
  318. **/
  319. static void i40e_release_iwarp_qvlist(struct i40e_vf *vf)
  320. {
  321. struct i40e_pf *pf = vf->pf;
  322. struct i40e_virtchnl_iwarp_qvlist_info *qvlist_info = vf->qvlist_info;
  323. u32 msix_vf;
  324. u32 i;
  325. if (!vf->qvlist_info)
  326. return;
  327. msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
  328. for (i = 0; i < qvlist_info->num_vectors; i++) {
  329. struct i40e_virtchnl_iwarp_qv_info *qv_info;
  330. u32 next_q_index, next_q_type;
  331. struct i40e_hw *hw = &pf->hw;
  332. u32 v_idx, reg_idx, reg;
  333. qv_info = &qvlist_info->qv_info[i];
  334. if (!qv_info)
  335. continue;
  336. v_idx = qv_info->v_idx;
  337. if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
  338. /* Figure out the queue after CEQ and make that the
  339. * first queue.
  340. */
  341. reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
  342. reg = rd32(hw, I40E_VPINT_CEQCTL(reg_idx));
  343. next_q_index = (reg & I40E_VPINT_CEQCTL_NEXTQ_INDX_MASK)
  344. >> I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT;
  345. next_q_type = (reg & I40E_VPINT_CEQCTL_NEXTQ_TYPE_MASK)
  346. >> I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT;
  347. reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
  348. reg = (next_q_index &
  349. I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
  350. (next_q_type <<
  351. I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
  352. wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
  353. }
  354. }
  355. kfree(vf->qvlist_info);
  356. vf->qvlist_info = NULL;
  357. }
  358. /**
  359. * i40e_config_iwarp_qvlist
  360. * @vf: pointer to the VF info
  361. * @qvlist_info: queue and vector list
  362. *
  363. * Return 0 on success or < 0 on error
  364. **/
  365. static int i40e_config_iwarp_qvlist(struct i40e_vf *vf,
  366. struct i40e_virtchnl_iwarp_qvlist_info *qvlist_info)
  367. {
  368. struct i40e_pf *pf = vf->pf;
  369. struct i40e_hw *hw = &pf->hw;
  370. struct i40e_virtchnl_iwarp_qv_info *qv_info;
  371. u32 v_idx, i, reg_idx, reg;
  372. u32 next_q_idx, next_q_type;
  373. u32 msix_vf, size;
  374. size = sizeof(struct i40e_virtchnl_iwarp_qvlist_info) +
  375. (sizeof(struct i40e_virtchnl_iwarp_qv_info) *
  376. (qvlist_info->num_vectors - 1));
  377. vf->qvlist_info = kzalloc(size, GFP_KERNEL);
  378. vf->qvlist_info->num_vectors = qvlist_info->num_vectors;
  379. msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
  380. for (i = 0; i < qvlist_info->num_vectors; i++) {
  381. qv_info = &qvlist_info->qv_info[i];
  382. if (!qv_info)
  383. continue;
  384. v_idx = qv_info->v_idx;
  385. /* Validate vector id belongs to this vf */
  386. if (!i40e_vc_isvalid_vector_id(vf, v_idx))
  387. goto err;
  388. vf->qvlist_info->qv_info[i] = *qv_info;
  389. reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
  390. /* We might be sharing the interrupt, so get the first queue
  391. * index and type, push it down the list by adding the new
  392. * queue on top. Also link it with the new queue in CEQCTL.
  393. */
  394. reg = rd32(hw, I40E_VPINT_LNKLSTN(reg_idx));
  395. next_q_idx = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) >>
  396. I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT);
  397. next_q_type = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK) >>
  398. I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
  399. if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
  400. reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
  401. reg = (I40E_VPINT_CEQCTL_CAUSE_ENA_MASK |
  402. (v_idx << I40E_VPINT_CEQCTL_MSIX_INDX_SHIFT) |
  403. (qv_info->itr_idx << I40E_VPINT_CEQCTL_ITR_INDX_SHIFT) |
  404. (next_q_type << I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT) |
  405. (next_q_idx << I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT));
  406. wr32(hw, I40E_VPINT_CEQCTL(reg_idx), reg);
  407. reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
  408. reg = (qv_info->ceq_idx &
  409. I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
  410. (I40E_QUEUE_TYPE_PE_CEQ <<
  411. I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
  412. wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
  413. }
  414. if (qv_info->aeq_idx != I40E_QUEUE_INVALID_IDX) {
  415. reg = (I40E_VPINT_AEQCTL_CAUSE_ENA_MASK |
  416. (v_idx << I40E_VPINT_AEQCTL_MSIX_INDX_SHIFT) |
  417. (qv_info->itr_idx << I40E_VPINT_AEQCTL_ITR_INDX_SHIFT));
  418. wr32(hw, I40E_VPINT_AEQCTL(vf->vf_id), reg);
  419. }
  420. }
  421. return 0;
  422. err:
  423. kfree(vf->qvlist_info);
  424. vf->qvlist_info = NULL;
  425. return -EINVAL;
  426. }
  427. /**
  428. * i40e_config_vsi_tx_queue
  429. * @vf: pointer to the VF info
  430. * @vsi_id: id of VSI as provided by the FW
  431. * @vsi_queue_id: vsi relative queue index
  432. * @info: config. info
  433. *
  434. * configure tx queue
  435. **/
  436. static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_id,
  437. u16 vsi_queue_id,
  438. struct i40e_virtchnl_txq_info *info)
  439. {
  440. struct i40e_pf *pf = vf->pf;
  441. struct i40e_hw *hw = &pf->hw;
  442. struct i40e_hmc_obj_txq tx_ctx;
  443. struct i40e_vsi *vsi;
  444. u16 pf_queue_id;
  445. u32 qtx_ctl;
  446. int ret = 0;
  447. pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
  448. vsi = i40e_find_vsi_from_id(pf, vsi_id);
  449. /* clear the context structure first */
  450. memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq));
  451. /* only set the required fields */
  452. tx_ctx.base = info->dma_ring_addr / 128;
  453. tx_ctx.qlen = info->ring_len;
  454. tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[0]);
  455. tx_ctx.rdylist_act = 0;
  456. tx_ctx.head_wb_ena = info->headwb_enabled;
  457. tx_ctx.head_wb_addr = info->dma_headwb_addr;
  458. /* clear the context in the HMC */
  459. ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id);
  460. if (ret) {
  461. dev_err(&pf->pdev->dev,
  462. "Failed to clear VF LAN Tx queue context %d, error: %d\n",
  463. pf_queue_id, ret);
  464. ret = -ENOENT;
  465. goto error_context;
  466. }
  467. /* set the context in the HMC */
  468. ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx);
  469. if (ret) {
  470. dev_err(&pf->pdev->dev,
  471. "Failed to set VF LAN Tx queue context %d error: %d\n",
  472. pf_queue_id, ret);
  473. ret = -ENOENT;
  474. goto error_context;
  475. }
  476. /* associate this queue with the PCI VF function */
  477. qtx_ctl = I40E_QTX_CTL_VF_QUEUE;
  478. qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT)
  479. & I40E_QTX_CTL_PF_INDX_MASK);
  480. qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id)
  481. << I40E_QTX_CTL_VFVM_INDX_SHIFT)
  482. & I40E_QTX_CTL_VFVM_INDX_MASK);
  483. wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl);
  484. i40e_flush(hw);
  485. error_context:
  486. return ret;
  487. }
  488. /**
  489. * i40e_config_vsi_rx_queue
  490. * @vf: pointer to the VF info
  491. * @vsi_id: id of VSI as provided by the FW
  492. * @vsi_queue_id: vsi relative queue index
  493. * @info: config. info
  494. *
  495. * configure rx queue
  496. **/
  497. static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id,
  498. u16 vsi_queue_id,
  499. struct i40e_virtchnl_rxq_info *info)
  500. {
  501. struct i40e_pf *pf = vf->pf;
  502. struct i40e_hw *hw = &pf->hw;
  503. struct i40e_hmc_obj_rxq rx_ctx;
  504. u16 pf_queue_id;
  505. int ret = 0;
  506. pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
  507. /* clear the context structure first */
  508. memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
  509. /* only set the required fields */
  510. rx_ctx.base = info->dma_ring_addr / 128;
  511. rx_ctx.qlen = info->ring_len;
  512. if (info->splithdr_enabled) {
  513. rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
  514. I40E_RX_SPLIT_IP |
  515. I40E_RX_SPLIT_TCP_UDP |
  516. I40E_RX_SPLIT_SCTP;
  517. /* header length validation */
  518. if (info->hdr_size > ((2 * 1024) - 64)) {
  519. ret = -EINVAL;
  520. goto error_param;
  521. }
  522. rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
  523. /* set split mode 10b */
  524. rx_ctx.dtype = I40E_RX_DTYPE_HEADER_SPLIT;
  525. }
  526. /* databuffer length validation */
  527. if (info->databuffer_size > ((16 * 1024) - 128)) {
  528. ret = -EINVAL;
  529. goto error_param;
  530. }
  531. rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
  532. /* max pkt. length validation */
  533. if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) {
  534. ret = -EINVAL;
  535. goto error_param;
  536. }
  537. rx_ctx.rxmax = info->max_pkt_size;
  538. /* enable 32bytes desc always */
  539. rx_ctx.dsize = 1;
  540. /* default values */
  541. rx_ctx.lrxqthresh = 2;
  542. rx_ctx.crcstrip = 1;
  543. rx_ctx.prefena = 1;
  544. rx_ctx.l2tsel = 1;
  545. /* clear the context in the HMC */
  546. ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id);
  547. if (ret) {
  548. dev_err(&pf->pdev->dev,
  549. "Failed to clear VF LAN Rx queue context %d, error: %d\n",
  550. pf_queue_id, ret);
  551. ret = -ENOENT;
  552. goto error_param;
  553. }
  554. /* set the context in the HMC */
  555. ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx);
  556. if (ret) {
  557. dev_err(&pf->pdev->dev,
  558. "Failed to set VF LAN Rx queue context %d error: %d\n",
  559. pf_queue_id, ret);
  560. ret = -ENOENT;
  561. goto error_param;
  562. }
  563. error_param:
  564. return ret;
  565. }
  566. /**
  567. * i40e_alloc_vsi_res
  568. * @vf: pointer to the VF info
  569. * @type: type of VSI to allocate
  570. *
  571. * alloc VF vsi context & resources
  572. **/
  573. static int i40e_alloc_vsi_res(struct i40e_vf *vf, enum i40e_vsi_type type)
  574. {
  575. struct i40e_mac_filter *f = NULL;
  576. struct i40e_pf *pf = vf->pf;
  577. struct i40e_vsi *vsi;
  578. int ret = 0;
  579. vsi = i40e_vsi_setup(pf, type, pf->vsi[pf->lan_vsi]->seid, vf->vf_id);
  580. if (!vsi) {
  581. dev_err(&pf->pdev->dev,
  582. "add vsi failed for VF %d, aq_err %d\n",
  583. vf->vf_id, pf->hw.aq.asq_last_status);
  584. ret = -ENOENT;
  585. goto error_alloc_vsi_res;
  586. }
  587. if (type == I40E_VSI_SRIOV) {
  588. u64 hena = i40e_pf_get_default_rss_hena(pf);
  589. vf->lan_vsi_idx = vsi->idx;
  590. vf->lan_vsi_id = vsi->id;
  591. /* If the port VLAN has been configured and then the
  592. * VF driver was removed then the VSI port VLAN
  593. * configuration was destroyed. Check if there is
  594. * a port VLAN and restore the VSI configuration if
  595. * needed.
  596. */
  597. if (vf->port_vlan_id)
  598. i40e_vsi_add_pvid(vsi, vf->port_vlan_id);
  599. spin_lock_bh(&vsi->mac_filter_list_lock);
  600. if (is_valid_ether_addr(vf->default_lan_addr.addr)) {
  601. f = i40e_add_filter(vsi, vf->default_lan_addr.addr,
  602. vf->port_vlan_id ? vf->port_vlan_id : -1,
  603. true, false);
  604. if (!f)
  605. dev_info(&pf->pdev->dev,
  606. "Could not add MAC filter %pM for VF %d\n",
  607. vf->default_lan_addr.addr, vf->vf_id);
  608. }
  609. spin_unlock_bh(&vsi->mac_filter_list_lock);
  610. i40e_write_rx_ctl(&pf->hw, I40E_VFQF_HENA1(0, vf->vf_id),
  611. (u32)hena);
  612. i40e_write_rx_ctl(&pf->hw, I40E_VFQF_HENA1(1, vf->vf_id),
  613. (u32)(hena >> 32));
  614. }
  615. /* program mac filter */
  616. ret = i40e_sync_vsi_filters(vsi);
  617. if (ret)
  618. dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
  619. /* Set VF bandwidth if specified */
  620. if (vf->tx_rate) {
  621. ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
  622. vf->tx_rate / 50, 0, NULL);
  623. if (ret)
  624. dev_err(&pf->pdev->dev, "Unable to set tx rate, VF %d, error code %d.\n",
  625. vf->vf_id, ret);
  626. }
  627. error_alloc_vsi_res:
  628. return ret;
  629. }
  630. /**
  631. * i40e_enable_vf_mappings
  632. * @vf: pointer to the VF info
  633. *
  634. * enable VF mappings
  635. **/
  636. static void i40e_enable_vf_mappings(struct i40e_vf *vf)
  637. {
  638. struct i40e_pf *pf = vf->pf;
  639. struct i40e_hw *hw = &pf->hw;
  640. u32 reg, total_queue_pairs = 0;
  641. int j;
  642. /* Tell the hardware we're using noncontiguous mapping. HW requires
  643. * that VF queues be mapped using this method, even when they are
  644. * contiguous in real life
  645. */
  646. i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id),
  647. I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
  648. /* enable VF vplan_qtable mappings */
  649. reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK;
  650. wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg);
  651. /* map PF queues to VF queues */
  652. for (j = 0; j < pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs; j++) {
  653. u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id, j);
  654. reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK);
  655. wr32(hw, I40E_VPLAN_QTABLE(total_queue_pairs, vf->vf_id), reg);
  656. total_queue_pairs++;
  657. }
  658. /* map PF queues to VSI */
  659. for (j = 0; j < 7; j++) {
  660. if (j * 2 >= pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs) {
  661. reg = 0x07FF07FF; /* unused */
  662. } else {
  663. u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id,
  664. j * 2);
  665. reg = qid;
  666. qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id,
  667. (j * 2) + 1);
  668. reg |= qid << 16;
  669. }
  670. i40e_write_rx_ctl(hw, I40E_VSILAN_QTABLE(j, vf->lan_vsi_id),
  671. reg);
  672. }
  673. i40e_flush(hw);
  674. }
  675. /**
  676. * i40e_disable_vf_mappings
  677. * @vf: pointer to the VF info
  678. *
  679. * disable VF mappings
  680. **/
  681. static void i40e_disable_vf_mappings(struct i40e_vf *vf)
  682. {
  683. struct i40e_pf *pf = vf->pf;
  684. struct i40e_hw *hw = &pf->hw;
  685. int i;
  686. /* disable qp mappings */
  687. wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0);
  688. for (i = 0; i < I40E_MAX_VSI_QP; i++)
  689. wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id),
  690. I40E_QUEUE_END_OF_LIST);
  691. i40e_flush(hw);
  692. }
  693. /**
  694. * i40e_free_vf_res
  695. * @vf: pointer to the VF info
  696. *
  697. * free VF resources
  698. **/
  699. static void i40e_free_vf_res(struct i40e_vf *vf)
  700. {
  701. struct i40e_pf *pf = vf->pf;
  702. struct i40e_hw *hw = &pf->hw;
  703. u32 reg_idx, reg;
  704. int i, msix_vf;
  705. /* free vsi & disconnect it from the parent uplink */
  706. if (vf->lan_vsi_idx) {
  707. i40e_vsi_release(pf->vsi[vf->lan_vsi_idx]);
  708. vf->lan_vsi_idx = 0;
  709. vf->lan_vsi_id = 0;
  710. }
  711. msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
  712. /* disable interrupts so the VF starts in a known state */
  713. for (i = 0; i < msix_vf; i++) {
  714. /* format is same for both registers */
  715. if (0 == i)
  716. reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id);
  717. else
  718. reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) *
  719. (vf->vf_id))
  720. + (i - 1));
  721. wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
  722. i40e_flush(hw);
  723. }
  724. /* clear the irq settings */
  725. for (i = 0; i < msix_vf; i++) {
  726. /* format is same for both registers */
  727. if (0 == i)
  728. reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
  729. else
  730. reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) *
  731. (vf->vf_id))
  732. + (i - 1));
  733. reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
  734. I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
  735. wr32(hw, reg_idx, reg);
  736. i40e_flush(hw);
  737. }
  738. /* reset some of the state varibles keeping
  739. * track of the resources
  740. */
  741. vf->num_queue_pairs = 0;
  742. vf->vf_states = 0;
  743. clear_bit(I40E_VF_STAT_INIT, &vf->vf_states);
  744. }
  745. /**
  746. * i40e_alloc_vf_res
  747. * @vf: pointer to the VF info
  748. *
  749. * allocate VF resources
  750. **/
  751. static int i40e_alloc_vf_res(struct i40e_vf *vf)
  752. {
  753. struct i40e_pf *pf = vf->pf;
  754. int total_queue_pairs = 0;
  755. int ret;
  756. /* allocate hw vsi context & associated resources */
  757. ret = i40e_alloc_vsi_res(vf, I40E_VSI_SRIOV);
  758. if (ret)
  759. goto error_alloc;
  760. total_queue_pairs += pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
  761. if (vf->trusted)
  762. set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
  763. else
  764. clear_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
  765. /* store the total qps number for the runtime
  766. * VF req validation
  767. */
  768. vf->num_queue_pairs = total_queue_pairs;
  769. /* VF is now completely initialized */
  770. set_bit(I40E_VF_STAT_INIT, &vf->vf_states);
  771. error_alloc:
  772. if (ret)
  773. i40e_free_vf_res(vf);
  774. return ret;
  775. }
  776. #define VF_DEVICE_STATUS 0xAA
  777. #define VF_TRANS_PENDING_MASK 0x20
  778. /**
  779. * i40e_quiesce_vf_pci
  780. * @vf: pointer to the VF structure
  781. *
  782. * Wait for VF PCI transactions to be cleared after reset. Returns -EIO
  783. * if the transactions never clear.
  784. **/
  785. static int i40e_quiesce_vf_pci(struct i40e_vf *vf)
  786. {
  787. struct i40e_pf *pf = vf->pf;
  788. struct i40e_hw *hw = &pf->hw;
  789. int vf_abs_id, i;
  790. u32 reg;
  791. vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id;
  792. wr32(hw, I40E_PF_PCI_CIAA,
  793. VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
  794. for (i = 0; i < 100; i++) {
  795. reg = rd32(hw, I40E_PF_PCI_CIAD);
  796. if ((reg & VF_TRANS_PENDING_MASK) == 0)
  797. return 0;
  798. udelay(1);
  799. }
  800. return -EIO;
  801. }
  802. /**
  803. * i40e_reset_vf
  804. * @vf: pointer to the VF structure
  805. * @flr: VFLR was issued or not
  806. *
  807. * reset the VF
  808. **/
  809. void i40e_reset_vf(struct i40e_vf *vf, bool flr)
  810. {
  811. struct i40e_pf *pf = vf->pf;
  812. struct i40e_hw *hw = &pf->hw;
  813. u32 reg, reg_idx, bit_idx;
  814. bool rsd = false;
  815. int i;
  816. if (test_and_set_bit(__I40E_VF_DISABLE, &pf->state))
  817. return;
  818. /* warn the VF */
  819. clear_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
  820. /* In the case of a VFLR, the HW has already reset the VF and we
  821. * just need to clean up, so don't hit the VFRTRIG register.
  822. */
  823. if (!flr) {
  824. /* reset VF using VPGEN_VFRTRIG reg */
  825. reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
  826. reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
  827. wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
  828. i40e_flush(hw);
  829. }
  830. /* clear the VFLR bit in GLGEN_VFLRSTAT */
  831. reg_idx = (hw->func_caps.vf_base_id + vf->vf_id) / 32;
  832. bit_idx = (hw->func_caps.vf_base_id + vf->vf_id) % 32;
  833. wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
  834. i40e_flush(hw);
  835. if (i40e_quiesce_vf_pci(vf))
  836. dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n",
  837. vf->vf_id);
  838. /* poll VPGEN_VFRSTAT reg to make sure
  839. * that reset is complete
  840. */
  841. for (i = 0; i < 10; i++) {
  842. /* VF reset requires driver to first reset the VF and then
  843. * poll the status register to make sure that the reset
  844. * completed successfully. Due to internal HW FIFO flushes,
  845. * we must wait 10ms before the register will be valid.
  846. */
  847. usleep_range(10000, 20000);
  848. reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
  849. if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
  850. rsd = true;
  851. break;
  852. }
  853. }
  854. if (flr)
  855. usleep_range(10000, 20000);
  856. if (!rsd)
  857. dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
  858. vf->vf_id);
  859. wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_COMPLETED);
  860. /* clear the reset bit in the VPGEN_VFRTRIG reg */
  861. reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
  862. reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
  863. wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
  864. /* On initial reset, we won't have any queues */
  865. if (vf->lan_vsi_idx == 0)
  866. goto complete_reset;
  867. i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], false);
  868. complete_reset:
  869. /* reallocate VF resources to reset the VSI state */
  870. i40e_free_vf_res(vf);
  871. if (!i40e_alloc_vf_res(vf)) {
  872. int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
  873. i40e_enable_vf_mappings(vf);
  874. set_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
  875. clear_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
  876. i40e_notify_client_of_vf_reset(pf, abs_vf_id);
  877. }
  878. /* tell the VF the reset is done */
  879. wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_VFACTIVE);
  880. i40e_flush(hw);
  881. clear_bit(__I40E_VF_DISABLE, &pf->state);
  882. }
  883. /**
  884. * i40e_free_vfs
  885. * @pf: pointer to the PF structure
  886. *
  887. * free VF resources
  888. **/
  889. void i40e_free_vfs(struct i40e_pf *pf)
  890. {
  891. struct i40e_hw *hw = &pf->hw;
  892. u32 reg_idx, bit_idx;
  893. int i, tmp, vf_id;
  894. if (!pf->vf)
  895. return;
  896. while (test_and_set_bit(__I40E_VF_DISABLE, &pf->state))
  897. usleep_range(1000, 2000);
  898. i40e_notify_client_of_vf_enable(pf, 0);
  899. for (i = 0; i < pf->num_alloc_vfs; i++)
  900. if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states))
  901. i40e_vsi_control_rings(pf->vsi[pf->vf[i].lan_vsi_idx],
  902. false);
  903. /* Disable IOV before freeing resources. This lets any VF drivers
  904. * running in the host get themselves cleaned up before we yank
  905. * the carpet out from underneath their feet.
  906. */
  907. if (!pci_vfs_assigned(pf->pdev))
  908. pci_disable_sriov(pf->pdev);
  909. else
  910. dev_warn(&pf->pdev->dev, "VFs are assigned - not disabling SR-IOV\n");
  911. msleep(20); /* let any messages in transit get finished up */
  912. /* free up VF resources */
  913. tmp = pf->num_alloc_vfs;
  914. pf->num_alloc_vfs = 0;
  915. for (i = 0; i < tmp; i++) {
  916. if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states))
  917. i40e_free_vf_res(&pf->vf[i]);
  918. /* disable qp mappings */
  919. i40e_disable_vf_mappings(&pf->vf[i]);
  920. }
  921. kfree(pf->vf);
  922. pf->vf = NULL;
  923. /* This check is for when the driver is unloaded while VFs are
  924. * assigned. Setting the number of VFs to 0 through sysfs is caught
  925. * before this function ever gets called.
  926. */
  927. if (!pci_vfs_assigned(pf->pdev)) {
  928. /* Acknowledge VFLR for all VFS. Without this, VFs will fail to
  929. * work correctly when SR-IOV gets re-enabled.
  930. */
  931. for (vf_id = 0; vf_id < tmp; vf_id++) {
  932. reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
  933. bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
  934. wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
  935. }
  936. }
  937. clear_bit(__I40E_VF_DISABLE, &pf->state);
  938. }
  939. #ifdef CONFIG_PCI_IOV
  940. /**
  941. * i40e_alloc_vfs
  942. * @pf: pointer to the PF structure
  943. * @num_alloc_vfs: number of VFs to allocate
  944. *
  945. * allocate VF resources
  946. **/
  947. int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
  948. {
  949. struct i40e_vf *vfs;
  950. int i, ret = 0;
  951. /* Disable interrupt 0 so we don't try to handle the VFLR. */
  952. i40e_irq_dynamic_disable_icr0(pf);
  953. /* Check to see if we're just allocating resources for extant VFs */
  954. if (pci_num_vf(pf->pdev) != num_alloc_vfs) {
  955. ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
  956. if (ret) {
  957. pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
  958. pf->num_alloc_vfs = 0;
  959. goto err_iov;
  960. }
  961. }
  962. i40e_notify_client_of_vf_enable(pf, num_alloc_vfs);
  963. /* allocate memory */
  964. vfs = kcalloc(num_alloc_vfs, sizeof(struct i40e_vf), GFP_KERNEL);
  965. if (!vfs) {
  966. ret = -ENOMEM;
  967. goto err_alloc;
  968. }
  969. pf->vf = vfs;
  970. /* apply default profile */
  971. for (i = 0; i < num_alloc_vfs; i++) {
  972. vfs[i].pf = pf;
  973. vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB;
  974. vfs[i].vf_id = i;
  975. /* assign default capabilities */
  976. set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps);
  977. vfs[i].spoofchk = true;
  978. /* VF resources get allocated during reset */
  979. i40e_reset_vf(&vfs[i], false);
  980. }
  981. pf->num_alloc_vfs = num_alloc_vfs;
  982. err_alloc:
  983. if (ret)
  984. i40e_free_vfs(pf);
  985. err_iov:
  986. /* Re-enable interrupt 0. */
  987. i40e_irq_dynamic_enable_icr0(pf, false);
  988. return ret;
  989. }
  990. #endif
  991. /**
  992. * i40e_pci_sriov_enable
  993. * @pdev: pointer to a pci_dev structure
  994. * @num_vfs: number of VFs to allocate
  995. *
  996. * Enable or change the number of VFs
  997. **/
  998. static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs)
  999. {
  1000. #ifdef CONFIG_PCI_IOV
  1001. struct i40e_pf *pf = pci_get_drvdata(pdev);
  1002. int pre_existing_vfs = pci_num_vf(pdev);
  1003. int err = 0;
  1004. if (test_bit(__I40E_TESTING, &pf->state)) {
  1005. dev_warn(&pdev->dev,
  1006. "Cannot enable SR-IOV virtual functions while the device is undergoing diagnostic testing\n");
  1007. err = -EPERM;
  1008. goto err_out;
  1009. }
  1010. if (pre_existing_vfs && pre_existing_vfs != num_vfs)
  1011. i40e_free_vfs(pf);
  1012. else if (pre_existing_vfs && pre_existing_vfs == num_vfs)
  1013. goto out;
  1014. if (num_vfs > pf->num_req_vfs) {
  1015. dev_warn(&pdev->dev, "Unable to enable %d VFs. Limited to %d VFs due to device resource constraints.\n",
  1016. num_vfs, pf->num_req_vfs);
  1017. err = -EPERM;
  1018. goto err_out;
  1019. }
  1020. dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs);
  1021. err = i40e_alloc_vfs(pf, num_vfs);
  1022. if (err) {
  1023. dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err);
  1024. goto err_out;
  1025. }
  1026. out:
  1027. return num_vfs;
  1028. err_out:
  1029. return err;
  1030. #endif
  1031. return 0;
  1032. }
  1033. /**
  1034. * i40e_pci_sriov_configure
  1035. * @pdev: pointer to a pci_dev structure
  1036. * @num_vfs: number of VFs to allocate
  1037. *
  1038. * Enable or change the number of VFs. Called when the user updates the number
  1039. * of VFs in sysfs.
  1040. **/
  1041. int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
  1042. {
  1043. struct i40e_pf *pf = pci_get_drvdata(pdev);
  1044. if (num_vfs) {
  1045. if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
  1046. pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
  1047. i40e_do_reset_safe(pf,
  1048. BIT_ULL(__I40E_PF_RESET_REQUESTED));
  1049. }
  1050. return i40e_pci_sriov_enable(pdev, num_vfs);
  1051. }
  1052. if (!pci_vfs_assigned(pf->pdev)) {
  1053. i40e_free_vfs(pf);
  1054. pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
  1055. i40e_do_reset_safe(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
  1056. } else {
  1057. dev_warn(&pdev->dev, "Unable to free VFs because some are assigned to VMs.\n");
  1058. return -EINVAL;
  1059. }
  1060. return 0;
  1061. }
  1062. /***********************virtual channel routines******************/
  1063. /**
  1064. * i40e_vc_send_msg_to_vf
  1065. * @vf: pointer to the VF info
  1066. * @v_opcode: virtual channel opcode
  1067. * @v_retval: virtual channel return value
  1068. * @msg: pointer to the msg buffer
  1069. * @msglen: msg length
  1070. *
  1071. * send msg to VF
  1072. **/
  1073. static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
  1074. u32 v_retval, u8 *msg, u16 msglen)
  1075. {
  1076. struct i40e_pf *pf;
  1077. struct i40e_hw *hw;
  1078. int abs_vf_id;
  1079. i40e_status aq_ret;
  1080. /* validate the request */
  1081. if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
  1082. return -EINVAL;
  1083. pf = vf->pf;
  1084. hw = &pf->hw;
  1085. abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
  1086. /* single place to detect unsuccessful return values */
  1087. if (v_retval) {
  1088. vf->num_invalid_msgs++;
  1089. dev_info(&pf->pdev->dev, "VF %d failed opcode %d, retval: %d\n",
  1090. vf->vf_id, v_opcode, v_retval);
  1091. if (vf->num_invalid_msgs >
  1092. I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) {
  1093. dev_err(&pf->pdev->dev,
  1094. "Number of invalid messages exceeded for VF %d\n",
  1095. vf->vf_id);
  1096. dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n");
  1097. set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
  1098. }
  1099. } else {
  1100. vf->num_valid_msgs++;
  1101. /* reset the invalid counter, if a valid message is received. */
  1102. vf->num_invalid_msgs = 0;
  1103. }
  1104. aq_ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
  1105. msg, msglen, NULL);
  1106. if (aq_ret) {
  1107. dev_info(&pf->pdev->dev,
  1108. "Unable to send the message to VF %d aq_err %d\n",
  1109. vf->vf_id, pf->hw.aq.asq_last_status);
  1110. return -EIO;
  1111. }
  1112. return 0;
  1113. }
  1114. /**
  1115. * i40e_vc_send_resp_to_vf
  1116. * @vf: pointer to the VF info
  1117. * @opcode: operation code
  1118. * @retval: return value
  1119. *
  1120. * send resp msg to VF
  1121. **/
  1122. static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf,
  1123. enum i40e_virtchnl_ops opcode,
  1124. i40e_status retval)
  1125. {
  1126. return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0);
  1127. }
  1128. /**
  1129. * i40e_vc_get_version_msg
  1130. * @vf: pointer to the VF info
  1131. *
  1132. * called from the VF to request the API version used by the PF
  1133. **/
  1134. static int i40e_vc_get_version_msg(struct i40e_vf *vf, u8 *msg)
  1135. {
  1136. struct i40e_virtchnl_version_info info = {
  1137. I40E_VIRTCHNL_VERSION_MAJOR, I40E_VIRTCHNL_VERSION_MINOR
  1138. };
  1139. vf->vf_ver = *(struct i40e_virtchnl_version_info *)msg;
  1140. /* VFs running the 1.0 API expect to get 1.0 back or they will cry. */
  1141. if (VF_IS_V10(vf))
  1142. info.minor = I40E_VIRTCHNL_VERSION_MINOR_NO_VF_CAPS;
  1143. return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
  1144. I40E_SUCCESS, (u8 *)&info,
  1145. sizeof(struct
  1146. i40e_virtchnl_version_info));
  1147. }
  1148. /**
  1149. * i40e_vc_get_vf_resources_msg
  1150. * @vf: pointer to the VF info
  1151. * @msg: pointer to the msg buffer
  1152. * @msglen: msg length
  1153. *
  1154. * called from the VF to request its resources
  1155. **/
  1156. static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
  1157. {
  1158. struct i40e_virtchnl_vf_resource *vfres = NULL;
  1159. struct i40e_pf *pf = vf->pf;
  1160. i40e_status aq_ret = 0;
  1161. struct i40e_vsi *vsi;
  1162. int num_vsis = 1;
  1163. int len = 0;
  1164. int ret;
  1165. if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
  1166. aq_ret = I40E_ERR_PARAM;
  1167. goto err;
  1168. }
  1169. len = (sizeof(struct i40e_virtchnl_vf_resource) +
  1170. sizeof(struct i40e_virtchnl_vsi_resource) * num_vsis);
  1171. vfres = kzalloc(len, GFP_KERNEL);
  1172. if (!vfres) {
  1173. aq_ret = I40E_ERR_NO_MEMORY;
  1174. len = 0;
  1175. goto err;
  1176. }
  1177. if (VF_IS_V11(vf))
  1178. vf->driver_caps = *(u32 *)msg;
  1179. else
  1180. vf->driver_caps = I40E_VIRTCHNL_VF_OFFLOAD_L2 |
  1181. I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG |
  1182. I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
  1183. vfres->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2;
  1184. vsi = pf->vsi[vf->lan_vsi_idx];
  1185. if (!vsi->info.pvid)
  1186. vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
  1187. if (i40e_vf_client_capable(pf, vf->vf_id, I40E_CLIENT_IWARP) &&
  1188. (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_IWARP)) {
  1189. vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_IWARP;
  1190. set_bit(I40E_VF_STAT_IWARPENA, &vf->vf_states);
  1191. }
  1192. if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PF) {
  1193. vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RSS_PF;
  1194. } else {
  1195. if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
  1196. (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ))
  1197. vfres->vf_offload_flags |=
  1198. I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ;
  1199. else
  1200. vfres->vf_offload_flags |=
  1201. I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG;
  1202. }
  1203. if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
  1204. if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
  1205. vfres->vf_offload_flags |=
  1206. I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2;
  1207. }
  1208. if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING) {
  1209. if (pf->flags & I40E_FLAG_MFP_ENABLED) {
  1210. dev_err(&pf->pdev->dev,
  1211. "VF %d requested polling mode: this feature is supported only when the device is running in single function per port (SFP) mode\n",
  1212. vf->vf_id);
  1213. ret = I40E_ERR_PARAM;
  1214. goto err;
  1215. }
  1216. vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING;
  1217. }
  1218. if (pf->flags & I40E_FLAG_WB_ON_ITR_CAPABLE) {
  1219. if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
  1220. vfres->vf_offload_flags |=
  1221. I40E_VIRTCHNL_VF_OFFLOAD_WB_ON_ITR;
  1222. }
  1223. vfres->num_vsis = num_vsis;
  1224. vfres->num_queue_pairs = vf->num_queue_pairs;
  1225. vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
  1226. vfres->rss_key_size = I40E_HKEY_ARRAY_SIZE;
  1227. vfres->rss_lut_size = I40E_VF_HLUT_ARRAY_SIZE;
  1228. if (vf->lan_vsi_idx) {
  1229. vfres->vsi_res[0].vsi_id = vf->lan_vsi_id;
  1230. vfres->vsi_res[0].vsi_type = I40E_VSI_SRIOV;
  1231. vfres->vsi_res[0].num_queue_pairs = vsi->alloc_queue_pairs;
  1232. /* VFs only use TC 0 */
  1233. vfres->vsi_res[0].qset_handle
  1234. = le16_to_cpu(vsi->info.qs_handle[0]);
  1235. ether_addr_copy(vfres->vsi_res[0].default_mac_addr,
  1236. vf->default_lan_addr.addr);
  1237. }
  1238. set_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
  1239. err:
  1240. /* send the response back to the VF */
  1241. ret = i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
  1242. aq_ret, (u8 *)vfres, len);
  1243. kfree(vfres);
  1244. return ret;
  1245. }
  1246. /**
  1247. * i40e_vc_reset_vf_msg
  1248. * @vf: pointer to the VF info
  1249. * @msg: pointer to the msg buffer
  1250. * @msglen: msg length
  1251. *
  1252. * called from the VF to reset itself,
  1253. * unlike other virtchnl messages, PF driver
  1254. * doesn't send the response back to the VF
  1255. **/
  1256. static void i40e_vc_reset_vf_msg(struct i40e_vf *vf)
  1257. {
  1258. if (test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
  1259. i40e_reset_vf(vf, false);
  1260. }
  1261. /**
  1262. * i40e_getnum_vf_vsi_vlan_filters
  1263. * @vsi: pointer to the vsi
  1264. *
  1265. * called to get the number of VLANs offloaded on this VF
  1266. **/
  1267. static inline int i40e_getnum_vf_vsi_vlan_filters(struct i40e_vsi *vsi)
  1268. {
  1269. struct i40e_mac_filter *f;
  1270. int num_vlans = 0;
  1271. list_for_each_entry(f, &vsi->mac_filter_list, list) {
  1272. if (f->vlan >= 0 && f->vlan <= I40E_MAX_VLANID)
  1273. num_vlans++;
  1274. }
  1275. return num_vlans;
  1276. }
  1277. /**
  1278. * i40e_vc_config_promiscuous_mode_msg
  1279. * @vf: pointer to the VF info
  1280. * @msg: pointer to the msg buffer
  1281. * @msglen: msg length
  1282. *
  1283. * called from the VF to configure the promiscuous mode of
  1284. * VF vsis
  1285. **/
  1286. static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf,
  1287. u8 *msg, u16 msglen)
  1288. {
  1289. struct i40e_virtchnl_promisc_info *info =
  1290. (struct i40e_virtchnl_promisc_info *)msg;
  1291. struct i40e_pf *pf = vf->pf;
  1292. struct i40e_hw *hw = &pf->hw;
  1293. struct i40e_mac_filter *f;
  1294. i40e_status aq_ret = 0;
  1295. bool allmulti = false;
  1296. struct i40e_vsi *vsi;
  1297. bool alluni = false;
  1298. int aq_err = 0;
  1299. vsi = i40e_find_vsi_from_id(pf, info->vsi_id);
  1300. if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
  1301. !i40e_vc_isvalid_vsi_id(vf, info->vsi_id)) {
  1302. aq_ret = I40E_ERR_PARAM;
  1303. goto error_param;
  1304. }
  1305. if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
  1306. dev_err(&pf->pdev->dev,
  1307. "Unprivileged VF %d is attempting to configure promiscuous mode\n",
  1308. vf->vf_id);
  1309. /* Lie to the VF on purpose. */
  1310. aq_ret = 0;
  1311. goto error_param;
  1312. }
  1313. /* Multicast promiscuous handling*/
  1314. if (info->flags & I40E_FLAG_VF_MULTICAST_PROMISC)
  1315. allmulti = true;
  1316. if (vf->port_vlan_id) {
  1317. aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw, vsi->seid,
  1318. allmulti,
  1319. vf->port_vlan_id,
  1320. NULL);
  1321. } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
  1322. list_for_each_entry(f, &vsi->mac_filter_list, list) {
  1323. if (f->vlan < 0 || f->vlan > I40E_MAX_VLANID)
  1324. continue;
  1325. aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw,
  1326. vsi->seid,
  1327. allmulti,
  1328. f->vlan,
  1329. NULL);
  1330. aq_err = pf->hw.aq.asq_last_status;
  1331. if (aq_ret) {
  1332. dev_err(&pf->pdev->dev,
  1333. "Could not add VLAN %d to multicast promiscuous domain err %s aq_err %s\n",
  1334. f->vlan,
  1335. i40e_stat_str(&pf->hw, aq_ret),
  1336. i40e_aq_str(&pf->hw, aq_err));
  1337. break;
  1338. }
  1339. }
  1340. } else {
  1341. aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vsi->seid,
  1342. allmulti, NULL);
  1343. aq_err = pf->hw.aq.asq_last_status;
  1344. if (aq_ret) {
  1345. dev_err(&pf->pdev->dev,
  1346. "VF %d failed to set multicast promiscuous mode err %s aq_err %s\n",
  1347. vf->vf_id,
  1348. i40e_stat_str(&pf->hw, aq_ret),
  1349. i40e_aq_str(&pf->hw, aq_err));
  1350. goto error_param_int;
  1351. }
  1352. }
  1353. if (!aq_ret) {
  1354. dev_info(&pf->pdev->dev,
  1355. "VF %d successfully set multicast promiscuous mode\n",
  1356. vf->vf_id);
  1357. if (allmulti)
  1358. set_bit(I40E_VF_STAT_MC_PROMISC, &vf->vf_states);
  1359. else
  1360. clear_bit(I40E_VF_STAT_MC_PROMISC, &vf->vf_states);
  1361. }
  1362. if (info->flags & I40E_FLAG_VF_UNICAST_PROMISC)
  1363. alluni = true;
  1364. if (vf->port_vlan_id) {
  1365. aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw, vsi->seid,
  1366. alluni,
  1367. vf->port_vlan_id,
  1368. NULL);
  1369. } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
  1370. list_for_each_entry(f, &vsi->mac_filter_list, list) {
  1371. aq_ret = 0;
  1372. if (f->vlan >= 0 && f->vlan <= I40E_MAX_VLANID) {
  1373. aq_ret =
  1374. i40e_aq_set_vsi_uc_promisc_on_vlan(hw,
  1375. vsi->seid,
  1376. alluni,
  1377. f->vlan,
  1378. NULL);
  1379. aq_err = pf->hw.aq.asq_last_status;
  1380. }
  1381. if (aq_ret)
  1382. dev_err(&pf->pdev->dev,
  1383. "Could not add VLAN %d to Unicast promiscuous domain err %s aq_err %s\n",
  1384. f->vlan,
  1385. i40e_stat_str(&pf->hw, aq_ret),
  1386. i40e_aq_str(&pf->hw, aq_err));
  1387. }
  1388. } else {
  1389. aq_ret = i40e_aq_set_vsi_unicast_promiscuous(hw, vsi->seid,
  1390. allmulti, NULL,
  1391. true);
  1392. aq_err = pf->hw.aq.asq_last_status;
  1393. if (aq_ret)
  1394. dev_err(&pf->pdev->dev,
  1395. "VF %d failed to set unicast promiscuous mode %8.8x err %s aq_err %s\n",
  1396. vf->vf_id, info->flags,
  1397. i40e_stat_str(&pf->hw, aq_ret),
  1398. i40e_aq_str(&pf->hw, aq_err));
  1399. }
  1400. error_param_int:
  1401. if (!aq_ret) {
  1402. dev_info(&pf->pdev->dev,
  1403. "VF %d successfully set unicast promiscuous mode\n",
  1404. vf->vf_id);
  1405. if (alluni)
  1406. set_bit(I40E_VF_STAT_UC_PROMISC, &vf->vf_states);
  1407. else
  1408. clear_bit(I40E_VF_STAT_UC_PROMISC, &vf->vf_states);
  1409. }
  1410. error_param:
  1411. /* send the response to the VF */
  1412. return i40e_vc_send_resp_to_vf(vf,
  1413. I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
  1414. aq_ret);
  1415. }
  1416. /**
  1417. * i40e_vc_config_queues_msg
  1418. * @vf: pointer to the VF info
  1419. * @msg: pointer to the msg buffer
  1420. * @msglen: msg length
  1421. *
  1422. * called from the VF to configure the rx/tx
  1423. * queues
  1424. **/
  1425. static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  1426. {
  1427. struct i40e_virtchnl_vsi_queue_config_info *qci =
  1428. (struct i40e_virtchnl_vsi_queue_config_info *)msg;
  1429. struct i40e_virtchnl_queue_pair_info *qpi;
  1430. struct i40e_pf *pf = vf->pf;
  1431. u16 vsi_id, vsi_queue_id;
  1432. i40e_status aq_ret = 0;
  1433. int i;
  1434. if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
  1435. aq_ret = I40E_ERR_PARAM;
  1436. goto error_param;
  1437. }
  1438. vsi_id = qci->vsi_id;
  1439. if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
  1440. aq_ret = I40E_ERR_PARAM;
  1441. goto error_param;
  1442. }
  1443. for (i = 0; i < qci->num_queue_pairs; i++) {
  1444. qpi = &qci->qpair[i];
  1445. vsi_queue_id = qpi->txq.queue_id;
  1446. if ((qpi->txq.vsi_id != vsi_id) ||
  1447. (qpi->rxq.vsi_id != vsi_id) ||
  1448. (qpi->rxq.queue_id != vsi_queue_id) ||
  1449. !i40e_vc_isvalid_queue_id(vf, vsi_id, vsi_queue_id)) {
  1450. aq_ret = I40E_ERR_PARAM;
  1451. goto error_param;
  1452. }
  1453. if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id,
  1454. &qpi->rxq) ||
  1455. i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id,
  1456. &qpi->txq)) {
  1457. aq_ret = I40E_ERR_PARAM;
  1458. goto error_param;
  1459. }
  1460. }
  1461. /* set vsi num_queue_pairs in use to num configured by VF */
  1462. pf->vsi[vf->lan_vsi_idx]->num_queue_pairs = qci->num_queue_pairs;
  1463. error_param:
  1464. /* send the response to the VF */
  1465. return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
  1466. aq_ret);
  1467. }
  1468. /**
  1469. * i40e_vc_config_irq_map_msg
  1470. * @vf: pointer to the VF info
  1471. * @msg: pointer to the msg buffer
  1472. * @msglen: msg length
  1473. *
  1474. * called from the VF to configure the irq to
  1475. * queue map
  1476. **/
  1477. static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  1478. {
  1479. struct i40e_virtchnl_irq_map_info *irqmap_info =
  1480. (struct i40e_virtchnl_irq_map_info *)msg;
  1481. struct i40e_virtchnl_vector_map *map;
  1482. u16 vsi_id, vsi_queue_id, vector_id;
  1483. i40e_status aq_ret = 0;
  1484. unsigned long tempmap;
  1485. int i;
  1486. if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
  1487. aq_ret = I40E_ERR_PARAM;
  1488. goto error_param;
  1489. }
  1490. for (i = 0; i < irqmap_info->num_vectors; i++) {
  1491. map = &irqmap_info->vecmap[i];
  1492. vector_id = map->vector_id;
  1493. vsi_id = map->vsi_id;
  1494. /* validate msg params */
  1495. if (!i40e_vc_isvalid_vector_id(vf, vector_id) ||
  1496. !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
  1497. aq_ret = I40E_ERR_PARAM;
  1498. goto error_param;
  1499. }
  1500. /* lookout for the invalid queue index */
  1501. tempmap = map->rxq_map;
  1502. for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
  1503. if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
  1504. vsi_queue_id)) {
  1505. aq_ret = I40E_ERR_PARAM;
  1506. goto error_param;
  1507. }
  1508. }
  1509. tempmap = map->txq_map;
  1510. for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
  1511. if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
  1512. vsi_queue_id)) {
  1513. aq_ret = I40E_ERR_PARAM;
  1514. goto error_param;
  1515. }
  1516. }
  1517. i40e_config_irq_link_list(vf, vsi_id, map);
  1518. }
  1519. error_param:
  1520. /* send the response to the VF */
  1521. return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
  1522. aq_ret);
  1523. }
  1524. /**
  1525. * i40e_vc_enable_queues_msg
  1526. * @vf: pointer to the VF info
  1527. * @msg: pointer to the msg buffer
  1528. * @msglen: msg length
  1529. *
  1530. * called from the VF to enable all or specific queue(s)
  1531. **/
  1532. static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  1533. {
  1534. struct i40e_virtchnl_queue_select *vqs =
  1535. (struct i40e_virtchnl_queue_select *)msg;
  1536. struct i40e_pf *pf = vf->pf;
  1537. u16 vsi_id = vqs->vsi_id;
  1538. i40e_status aq_ret = 0;
  1539. if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
  1540. aq_ret = I40E_ERR_PARAM;
  1541. goto error_param;
  1542. }
  1543. if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
  1544. aq_ret = I40E_ERR_PARAM;
  1545. goto error_param;
  1546. }
  1547. if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
  1548. aq_ret = I40E_ERR_PARAM;
  1549. goto error_param;
  1550. }
  1551. if (i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], true))
  1552. aq_ret = I40E_ERR_TIMEOUT;
  1553. error_param:
  1554. /* send the response to the VF */
  1555. return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
  1556. aq_ret);
  1557. }
  1558. /**
  1559. * i40e_vc_disable_queues_msg
  1560. * @vf: pointer to the VF info
  1561. * @msg: pointer to the msg buffer
  1562. * @msglen: msg length
  1563. *
  1564. * called from the VF to disable all or specific
  1565. * queue(s)
  1566. **/
  1567. static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  1568. {
  1569. struct i40e_virtchnl_queue_select *vqs =
  1570. (struct i40e_virtchnl_queue_select *)msg;
  1571. struct i40e_pf *pf = vf->pf;
  1572. i40e_status aq_ret = 0;
  1573. if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
  1574. aq_ret = I40E_ERR_PARAM;
  1575. goto error_param;
  1576. }
  1577. if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
  1578. aq_ret = I40E_ERR_PARAM;
  1579. goto error_param;
  1580. }
  1581. if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
  1582. aq_ret = I40E_ERR_PARAM;
  1583. goto error_param;
  1584. }
  1585. if (i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], false))
  1586. aq_ret = I40E_ERR_TIMEOUT;
  1587. error_param:
  1588. /* send the response to the VF */
  1589. return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
  1590. aq_ret);
  1591. }
  1592. /**
  1593. * i40e_vc_get_stats_msg
  1594. * @vf: pointer to the VF info
  1595. * @msg: pointer to the msg buffer
  1596. * @msglen: msg length
  1597. *
  1598. * called from the VF to get vsi stats
  1599. **/
  1600. static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  1601. {
  1602. struct i40e_virtchnl_queue_select *vqs =
  1603. (struct i40e_virtchnl_queue_select *)msg;
  1604. struct i40e_pf *pf = vf->pf;
  1605. struct i40e_eth_stats stats;
  1606. i40e_status aq_ret = 0;
  1607. struct i40e_vsi *vsi;
  1608. memset(&stats, 0, sizeof(struct i40e_eth_stats));
  1609. if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
  1610. aq_ret = I40E_ERR_PARAM;
  1611. goto error_param;
  1612. }
  1613. if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
  1614. aq_ret = I40E_ERR_PARAM;
  1615. goto error_param;
  1616. }
  1617. vsi = pf->vsi[vf->lan_vsi_idx];
  1618. if (!vsi) {
  1619. aq_ret = I40E_ERR_PARAM;
  1620. goto error_param;
  1621. }
  1622. i40e_update_eth_stats(vsi);
  1623. stats = vsi->eth_stats;
  1624. error_param:
  1625. /* send the response back to the VF */
  1626. return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS, aq_ret,
  1627. (u8 *)&stats, sizeof(stats));
  1628. }
  1629. /* If the VF is not trusted restrict the number of MAC/VLAN it can program */
  1630. #define I40E_VC_MAX_MAC_ADDR_PER_VF 8
  1631. #define I40E_VC_MAX_VLAN_PER_VF 8
  1632. /**
  1633. * i40e_check_vf_permission
  1634. * @vf: pointer to the VF info
  1635. * @macaddr: pointer to the MAC Address being checked
  1636. *
  1637. * Check if the VF has permission to add or delete unicast MAC address
  1638. * filters and return error code -EPERM if not. Then check if the
  1639. * address filter requested is broadcast or zero and if so return
  1640. * an invalid MAC address error code.
  1641. **/
  1642. static inline int i40e_check_vf_permission(struct i40e_vf *vf, u8 *macaddr)
  1643. {
  1644. struct i40e_pf *pf = vf->pf;
  1645. int ret = 0;
  1646. if (is_broadcast_ether_addr(macaddr) ||
  1647. is_zero_ether_addr(macaddr)) {
  1648. dev_err(&pf->pdev->dev, "invalid VF MAC addr %pM\n", macaddr);
  1649. ret = I40E_ERR_INVALID_MAC_ADDR;
  1650. } else if (vf->pf_set_mac && !is_multicast_ether_addr(macaddr) &&
  1651. !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) &&
  1652. !ether_addr_equal(macaddr, vf->default_lan_addr.addr)) {
  1653. /* If the host VMM administrator has set the VF MAC address
  1654. * administratively via the ndo_set_vf_mac command then deny
  1655. * permission to the VF to add or delete unicast MAC addresses.
  1656. * Unless the VF is privileged and then it can do whatever.
  1657. * The VF may request to set the MAC address filter already
  1658. * assigned to it so do not return an error in that case.
  1659. */
  1660. dev_err(&pf->pdev->dev,
  1661. "VF attempting to override administratively set MAC address, reload the VF driver to resume normal operation\n");
  1662. ret = -EPERM;
  1663. } else if ((vf->num_mac >= I40E_VC_MAX_MAC_ADDR_PER_VF) &&
  1664. !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
  1665. dev_err(&pf->pdev->dev,
  1666. "VF is not trusted, switch the VF to trusted to add more functionality\n");
  1667. ret = -EPERM;
  1668. }
  1669. return ret;
  1670. }
  1671. /**
  1672. * i40e_vc_add_mac_addr_msg
  1673. * @vf: pointer to the VF info
  1674. * @msg: pointer to the msg buffer
  1675. * @msglen: msg length
  1676. *
  1677. * add guest mac address filter
  1678. **/
  1679. static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  1680. {
  1681. struct i40e_virtchnl_ether_addr_list *al =
  1682. (struct i40e_virtchnl_ether_addr_list *)msg;
  1683. struct i40e_pf *pf = vf->pf;
  1684. struct i40e_vsi *vsi = NULL;
  1685. u16 vsi_id = al->vsi_id;
  1686. i40e_status ret = 0;
  1687. int i;
  1688. if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
  1689. !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
  1690. ret = I40E_ERR_PARAM;
  1691. goto error_param;
  1692. }
  1693. for (i = 0; i < al->num_elements; i++) {
  1694. ret = i40e_check_vf_permission(vf, al->list[i].addr);
  1695. if (ret)
  1696. goto error_param;
  1697. }
  1698. vsi = pf->vsi[vf->lan_vsi_idx];
  1699. /* Lock once, because all function inside for loop accesses VSI's
  1700. * MAC filter list which needs to be protected using same lock.
  1701. */
  1702. spin_lock_bh(&vsi->mac_filter_list_lock);
  1703. /* add new addresses to the list */
  1704. for (i = 0; i < al->num_elements; i++) {
  1705. struct i40e_mac_filter *f;
  1706. f = i40e_find_mac(vsi, al->list[i].addr, true, false);
  1707. if (!f) {
  1708. if (i40e_is_vsi_in_vlan(vsi))
  1709. f = i40e_put_mac_in_vlan(vsi, al->list[i].addr,
  1710. true, false);
  1711. else
  1712. f = i40e_add_filter(vsi, al->list[i].addr, -1,
  1713. true, false);
  1714. }
  1715. if (!f) {
  1716. dev_err(&pf->pdev->dev,
  1717. "Unable to add MAC filter %pM for VF %d\n",
  1718. al->list[i].addr, vf->vf_id);
  1719. ret = I40E_ERR_PARAM;
  1720. spin_unlock_bh(&vsi->mac_filter_list_lock);
  1721. goto error_param;
  1722. } else {
  1723. vf->num_mac++;
  1724. }
  1725. }
  1726. spin_unlock_bh(&vsi->mac_filter_list_lock);
  1727. /* program the updated filter list */
  1728. ret = i40e_sync_vsi_filters(vsi);
  1729. if (ret)
  1730. dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
  1731. vf->vf_id, ret);
  1732. error_param:
  1733. /* send the response to the VF */
  1734. return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
  1735. ret);
  1736. }
  1737. /**
  1738. * i40e_vc_del_mac_addr_msg
  1739. * @vf: pointer to the VF info
  1740. * @msg: pointer to the msg buffer
  1741. * @msglen: msg length
  1742. *
  1743. * remove guest mac address filter
  1744. **/
  1745. static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  1746. {
  1747. struct i40e_virtchnl_ether_addr_list *al =
  1748. (struct i40e_virtchnl_ether_addr_list *)msg;
  1749. struct i40e_pf *pf = vf->pf;
  1750. struct i40e_vsi *vsi = NULL;
  1751. u16 vsi_id = al->vsi_id;
  1752. i40e_status ret = 0;
  1753. int i;
  1754. if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
  1755. !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
  1756. ret = I40E_ERR_PARAM;
  1757. goto error_param;
  1758. }
  1759. for (i = 0; i < al->num_elements; i++) {
  1760. if (is_broadcast_ether_addr(al->list[i].addr) ||
  1761. is_zero_ether_addr(al->list[i].addr)) {
  1762. dev_err(&pf->pdev->dev, "Invalid MAC addr %pM for VF %d\n",
  1763. al->list[i].addr, vf->vf_id);
  1764. ret = I40E_ERR_INVALID_MAC_ADDR;
  1765. goto error_param;
  1766. }
  1767. }
  1768. vsi = pf->vsi[vf->lan_vsi_idx];
  1769. spin_lock_bh(&vsi->mac_filter_list_lock);
  1770. /* delete addresses from the list */
  1771. for (i = 0; i < al->num_elements; i++)
  1772. if (i40e_del_mac_all_vlan(vsi, al->list[i].addr, true, false)) {
  1773. ret = I40E_ERR_INVALID_MAC_ADDR;
  1774. spin_unlock_bh(&vsi->mac_filter_list_lock);
  1775. goto error_param;
  1776. } else {
  1777. vf->num_mac--;
  1778. }
  1779. spin_unlock_bh(&vsi->mac_filter_list_lock);
  1780. /* program the updated filter list */
  1781. ret = i40e_sync_vsi_filters(vsi);
  1782. if (ret)
  1783. dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
  1784. vf->vf_id, ret);
  1785. error_param:
  1786. /* send the response to the VF */
  1787. return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
  1788. ret);
  1789. }
  1790. /**
  1791. * i40e_vc_add_vlan_msg
  1792. * @vf: pointer to the VF info
  1793. * @msg: pointer to the msg buffer
  1794. * @msglen: msg length
  1795. *
  1796. * program guest vlan id
  1797. **/
  1798. static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  1799. {
  1800. struct i40e_virtchnl_vlan_filter_list *vfl =
  1801. (struct i40e_virtchnl_vlan_filter_list *)msg;
  1802. struct i40e_pf *pf = vf->pf;
  1803. struct i40e_vsi *vsi = NULL;
  1804. u16 vsi_id = vfl->vsi_id;
  1805. i40e_status aq_ret = 0;
  1806. int i;
  1807. if ((vf->num_vlan >= I40E_VC_MAX_VLAN_PER_VF) &&
  1808. !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
  1809. dev_err(&pf->pdev->dev,
  1810. "VF is not trusted, switch the VF to trusted to add more VLAN addresses\n");
  1811. goto error_param;
  1812. }
  1813. if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
  1814. !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
  1815. aq_ret = I40E_ERR_PARAM;
  1816. goto error_param;
  1817. }
  1818. for (i = 0; i < vfl->num_elements; i++) {
  1819. if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
  1820. aq_ret = I40E_ERR_PARAM;
  1821. dev_err(&pf->pdev->dev,
  1822. "invalid VF VLAN id %d\n", vfl->vlan_id[i]);
  1823. goto error_param;
  1824. }
  1825. }
  1826. vsi = pf->vsi[vf->lan_vsi_idx];
  1827. if (vsi->info.pvid) {
  1828. aq_ret = I40E_ERR_PARAM;
  1829. goto error_param;
  1830. }
  1831. i40e_vlan_stripping_enable(vsi);
  1832. for (i = 0; i < vfl->num_elements; i++) {
  1833. /* add new VLAN filter */
  1834. int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]);
  1835. if (!ret)
  1836. vf->num_vlan++;
  1837. if (test_bit(I40E_VF_STAT_UC_PROMISC, &vf->vf_states))
  1838. i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
  1839. true,
  1840. vfl->vlan_id[i],
  1841. NULL);
  1842. if (test_bit(I40E_VF_STAT_MC_PROMISC, &vf->vf_states))
  1843. i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
  1844. true,
  1845. vfl->vlan_id[i],
  1846. NULL);
  1847. if (ret)
  1848. dev_err(&pf->pdev->dev,
  1849. "Unable to add VLAN filter %d for VF %d, error %d\n",
  1850. vfl->vlan_id[i], vf->vf_id, ret);
  1851. }
  1852. error_param:
  1853. /* send the response to the VF */
  1854. return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN, aq_ret);
  1855. }
  1856. /**
  1857. * i40e_vc_remove_vlan_msg
  1858. * @vf: pointer to the VF info
  1859. * @msg: pointer to the msg buffer
  1860. * @msglen: msg length
  1861. *
  1862. * remove programmed guest vlan id
  1863. **/
  1864. static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  1865. {
  1866. struct i40e_virtchnl_vlan_filter_list *vfl =
  1867. (struct i40e_virtchnl_vlan_filter_list *)msg;
  1868. struct i40e_pf *pf = vf->pf;
  1869. struct i40e_vsi *vsi = NULL;
  1870. u16 vsi_id = vfl->vsi_id;
  1871. i40e_status aq_ret = 0;
  1872. int i;
  1873. if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
  1874. !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
  1875. aq_ret = I40E_ERR_PARAM;
  1876. goto error_param;
  1877. }
  1878. for (i = 0; i < vfl->num_elements; i++) {
  1879. if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
  1880. aq_ret = I40E_ERR_PARAM;
  1881. goto error_param;
  1882. }
  1883. }
  1884. vsi = pf->vsi[vf->lan_vsi_idx];
  1885. if (vsi->info.pvid) {
  1886. aq_ret = I40E_ERR_PARAM;
  1887. goto error_param;
  1888. }
  1889. for (i = 0; i < vfl->num_elements; i++) {
  1890. int ret = i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]);
  1891. if (!ret)
  1892. vf->num_vlan--;
  1893. if (test_bit(I40E_VF_STAT_UC_PROMISC, &vf->vf_states))
  1894. i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
  1895. false,
  1896. vfl->vlan_id[i],
  1897. NULL);
  1898. if (test_bit(I40E_VF_STAT_MC_PROMISC, &vf->vf_states))
  1899. i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
  1900. false,
  1901. vfl->vlan_id[i],
  1902. NULL);
  1903. if (ret)
  1904. dev_err(&pf->pdev->dev,
  1905. "Unable to delete VLAN filter %d for VF %d, error %d\n",
  1906. vfl->vlan_id[i], vf->vf_id, ret);
  1907. }
  1908. error_param:
  1909. /* send the response to the VF */
  1910. return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN, aq_ret);
  1911. }
  1912. /**
  1913. * i40e_vc_iwarp_msg
  1914. * @vf: pointer to the VF info
  1915. * @msg: pointer to the msg buffer
  1916. * @msglen: msg length
  1917. *
  1918. * called from the VF for the iwarp msgs
  1919. **/
  1920. static int i40e_vc_iwarp_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  1921. {
  1922. struct i40e_pf *pf = vf->pf;
  1923. int abs_vf_id = vf->vf_id + pf->hw.func_caps.vf_base_id;
  1924. i40e_status aq_ret = 0;
  1925. if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
  1926. !test_bit(I40E_VF_STAT_IWARPENA, &vf->vf_states)) {
  1927. aq_ret = I40E_ERR_PARAM;
  1928. goto error_param;
  1929. }
  1930. i40e_notify_client_of_vf_msg(pf->vsi[pf->lan_vsi], abs_vf_id,
  1931. msg, msglen);
  1932. error_param:
  1933. /* send the response to the VF */
  1934. return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_IWARP,
  1935. aq_ret);
  1936. }
  1937. /**
  1938. * i40e_vc_iwarp_qvmap_msg
  1939. * @vf: pointer to the VF info
  1940. * @msg: pointer to the msg buffer
  1941. * @msglen: msg length
  1942. * @config: config qvmap or release it
  1943. *
  1944. * called from the VF for the iwarp msgs
  1945. **/
  1946. static int i40e_vc_iwarp_qvmap_msg(struct i40e_vf *vf, u8 *msg, u16 msglen,
  1947. bool config)
  1948. {
  1949. struct i40e_virtchnl_iwarp_qvlist_info *qvlist_info =
  1950. (struct i40e_virtchnl_iwarp_qvlist_info *)msg;
  1951. i40e_status aq_ret = 0;
  1952. if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
  1953. !test_bit(I40E_VF_STAT_IWARPENA, &vf->vf_states)) {
  1954. aq_ret = I40E_ERR_PARAM;
  1955. goto error_param;
  1956. }
  1957. if (config) {
  1958. if (i40e_config_iwarp_qvlist(vf, qvlist_info))
  1959. aq_ret = I40E_ERR_PARAM;
  1960. } else {
  1961. i40e_release_iwarp_qvlist(vf);
  1962. }
  1963. error_param:
  1964. /* send the response to the VF */
  1965. return i40e_vc_send_resp_to_vf(vf,
  1966. config ? I40E_VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP :
  1967. I40E_VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP,
  1968. aq_ret);
  1969. }
  1970. /**
  1971. * i40e_vc_config_rss_key
  1972. * @vf: pointer to the VF info
  1973. * @msg: pointer to the msg buffer
  1974. * @msglen: msg length
  1975. *
  1976. * Configure the VF's RSS key
  1977. **/
  1978. static int i40e_vc_config_rss_key(struct i40e_vf *vf, u8 *msg, u16 msglen)
  1979. {
  1980. struct i40e_virtchnl_rss_key *vrk =
  1981. (struct i40e_virtchnl_rss_key *)msg;
  1982. struct i40e_pf *pf = vf->pf;
  1983. struct i40e_vsi *vsi = NULL;
  1984. u16 vsi_id = vrk->vsi_id;
  1985. i40e_status aq_ret = 0;
  1986. if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
  1987. !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
  1988. (vrk->key_len != I40E_HKEY_ARRAY_SIZE)) {
  1989. aq_ret = I40E_ERR_PARAM;
  1990. goto err;
  1991. }
  1992. vsi = pf->vsi[vf->lan_vsi_idx];
  1993. aq_ret = i40e_config_rss(vsi, vrk->key, NULL, 0);
  1994. err:
  1995. /* send the response to the VF */
  1996. return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_RSS_KEY,
  1997. aq_ret);
  1998. }
  1999. /**
  2000. * i40e_vc_config_rss_lut
  2001. * @vf: pointer to the VF info
  2002. * @msg: pointer to the msg buffer
  2003. * @msglen: msg length
  2004. *
  2005. * Configure the VF's RSS LUT
  2006. **/
  2007. static int i40e_vc_config_rss_lut(struct i40e_vf *vf, u8 *msg, u16 msglen)
  2008. {
  2009. struct i40e_virtchnl_rss_lut *vrl =
  2010. (struct i40e_virtchnl_rss_lut *)msg;
  2011. struct i40e_pf *pf = vf->pf;
  2012. struct i40e_vsi *vsi = NULL;
  2013. u16 vsi_id = vrl->vsi_id;
  2014. i40e_status aq_ret = 0;
  2015. if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
  2016. !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
  2017. (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE)) {
  2018. aq_ret = I40E_ERR_PARAM;
  2019. goto err;
  2020. }
  2021. vsi = pf->vsi[vf->lan_vsi_idx];
  2022. aq_ret = i40e_config_rss(vsi, NULL, vrl->lut, I40E_VF_HLUT_ARRAY_SIZE);
  2023. /* send the response to the VF */
  2024. err:
  2025. return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_RSS_LUT,
  2026. aq_ret);
  2027. }
  2028. /**
  2029. * i40e_vc_get_rss_hena
  2030. * @vf: pointer to the VF info
  2031. * @msg: pointer to the msg buffer
  2032. * @msglen: msg length
  2033. *
  2034. * Return the RSS HENA bits allowed by the hardware
  2035. **/
  2036. static int i40e_vc_get_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen)
  2037. {
  2038. struct i40e_virtchnl_rss_hena *vrh = NULL;
  2039. struct i40e_pf *pf = vf->pf;
  2040. i40e_status aq_ret = 0;
  2041. int len = 0;
  2042. if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
  2043. aq_ret = I40E_ERR_PARAM;
  2044. goto err;
  2045. }
  2046. len = sizeof(struct i40e_virtchnl_rss_hena);
  2047. vrh = kzalloc(len, GFP_KERNEL);
  2048. if (!vrh) {
  2049. aq_ret = I40E_ERR_NO_MEMORY;
  2050. len = 0;
  2051. goto err;
  2052. }
  2053. vrh->hena = i40e_pf_get_default_rss_hena(pf);
  2054. err:
  2055. /* send the response back to the VF */
  2056. aq_ret = i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_RSS_HENA_CAPS,
  2057. aq_ret, (u8 *)vrh, len);
  2058. return aq_ret;
  2059. }
  2060. /**
  2061. * i40e_vc_set_rss_hena
  2062. * @vf: pointer to the VF info
  2063. * @msg: pointer to the msg buffer
  2064. * @msglen: msg length
  2065. *
  2066. * Set the RSS HENA bits for the VF
  2067. **/
  2068. static int i40e_vc_set_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen)
  2069. {
  2070. struct i40e_virtchnl_rss_hena *vrh =
  2071. (struct i40e_virtchnl_rss_hena *)msg;
  2072. struct i40e_pf *pf = vf->pf;
  2073. struct i40e_hw *hw = &pf->hw;
  2074. i40e_status aq_ret = 0;
  2075. if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
  2076. aq_ret = I40E_ERR_PARAM;
  2077. goto err;
  2078. }
  2079. i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)vrh->hena);
  2080. i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf->vf_id),
  2081. (u32)(vrh->hena >> 32));
  2082. /* send the response to the VF */
  2083. err:
  2084. return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_SET_RSS_HENA,
  2085. aq_ret);
  2086. }
  2087. /**
  2088. * i40e_vc_validate_vf_msg
  2089. * @vf: pointer to the VF info
  2090. * @msg: pointer to the msg buffer
  2091. * @msglen: msg length
  2092. * @msghndl: msg handle
  2093. *
  2094. * validate msg
  2095. **/
  2096. static int i40e_vc_validate_vf_msg(struct i40e_vf *vf, u32 v_opcode,
  2097. u32 v_retval, u8 *msg, u16 msglen)
  2098. {
  2099. bool err_msg_format = false;
  2100. int valid_len = 0;
  2101. /* Check if VF is disabled. */
  2102. if (test_bit(I40E_VF_STAT_DISABLED, &vf->vf_states))
  2103. return I40E_ERR_PARAM;
  2104. /* Validate message length. */
  2105. switch (v_opcode) {
  2106. case I40E_VIRTCHNL_OP_VERSION:
  2107. valid_len = sizeof(struct i40e_virtchnl_version_info);
  2108. break;
  2109. case I40E_VIRTCHNL_OP_RESET_VF:
  2110. break;
  2111. case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
  2112. if (VF_IS_V11(vf))
  2113. valid_len = sizeof(u32);
  2114. break;
  2115. case I40E_VIRTCHNL_OP_CONFIG_TX_QUEUE:
  2116. valid_len = sizeof(struct i40e_virtchnl_txq_info);
  2117. break;
  2118. case I40E_VIRTCHNL_OP_CONFIG_RX_QUEUE:
  2119. valid_len = sizeof(struct i40e_virtchnl_rxq_info);
  2120. break;
  2121. case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
  2122. valid_len = sizeof(struct i40e_virtchnl_vsi_queue_config_info);
  2123. if (msglen >= valid_len) {
  2124. struct i40e_virtchnl_vsi_queue_config_info *vqc =
  2125. (struct i40e_virtchnl_vsi_queue_config_info *)msg;
  2126. valid_len += (vqc->num_queue_pairs *
  2127. sizeof(struct
  2128. i40e_virtchnl_queue_pair_info));
  2129. if (vqc->num_queue_pairs == 0)
  2130. err_msg_format = true;
  2131. }
  2132. break;
  2133. case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
  2134. valid_len = sizeof(struct i40e_virtchnl_irq_map_info);
  2135. if (msglen >= valid_len) {
  2136. struct i40e_virtchnl_irq_map_info *vimi =
  2137. (struct i40e_virtchnl_irq_map_info *)msg;
  2138. valid_len += (vimi->num_vectors *
  2139. sizeof(struct i40e_virtchnl_vector_map));
  2140. if (vimi->num_vectors == 0)
  2141. err_msg_format = true;
  2142. }
  2143. break;
  2144. case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
  2145. case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
  2146. valid_len = sizeof(struct i40e_virtchnl_queue_select);
  2147. break;
  2148. case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
  2149. case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
  2150. valid_len = sizeof(struct i40e_virtchnl_ether_addr_list);
  2151. if (msglen >= valid_len) {
  2152. struct i40e_virtchnl_ether_addr_list *veal =
  2153. (struct i40e_virtchnl_ether_addr_list *)msg;
  2154. valid_len += veal->num_elements *
  2155. sizeof(struct i40e_virtchnl_ether_addr);
  2156. if (veal->num_elements == 0)
  2157. err_msg_format = true;
  2158. }
  2159. break;
  2160. case I40E_VIRTCHNL_OP_ADD_VLAN:
  2161. case I40E_VIRTCHNL_OP_DEL_VLAN:
  2162. valid_len = sizeof(struct i40e_virtchnl_vlan_filter_list);
  2163. if (msglen >= valid_len) {
  2164. struct i40e_virtchnl_vlan_filter_list *vfl =
  2165. (struct i40e_virtchnl_vlan_filter_list *)msg;
  2166. valid_len += vfl->num_elements * sizeof(u16);
  2167. if (vfl->num_elements == 0)
  2168. err_msg_format = true;
  2169. }
  2170. break;
  2171. case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
  2172. valid_len = sizeof(struct i40e_virtchnl_promisc_info);
  2173. break;
  2174. case I40E_VIRTCHNL_OP_GET_STATS:
  2175. valid_len = sizeof(struct i40e_virtchnl_queue_select);
  2176. break;
  2177. case I40E_VIRTCHNL_OP_IWARP:
  2178. /* These messages are opaque to us and will be validated in
  2179. * the RDMA client code. We just need to check for nonzero
  2180. * length. The firmware will enforce max length restrictions.
  2181. */
  2182. if (msglen)
  2183. valid_len = msglen;
  2184. else
  2185. err_msg_format = true;
  2186. break;
  2187. case I40E_VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP:
  2188. valid_len = 0;
  2189. break;
  2190. case I40E_VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP:
  2191. valid_len = sizeof(struct i40e_virtchnl_iwarp_qvlist_info);
  2192. if (msglen >= valid_len) {
  2193. struct i40e_virtchnl_iwarp_qvlist_info *qv =
  2194. (struct i40e_virtchnl_iwarp_qvlist_info *)msg;
  2195. if (qv->num_vectors == 0) {
  2196. err_msg_format = true;
  2197. break;
  2198. }
  2199. valid_len += ((qv->num_vectors - 1) *
  2200. sizeof(struct i40e_virtchnl_iwarp_qv_info));
  2201. }
  2202. break;
  2203. case I40E_VIRTCHNL_OP_CONFIG_RSS_KEY:
  2204. valid_len = sizeof(struct i40e_virtchnl_rss_key);
  2205. if (msglen >= valid_len) {
  2206. struct i40e_virtchnl_rss_key *vrk =
  2207. (struct i40e_virtchnl_rss_key *)msg;
  2208. if (vrk->key_len != I40E_HKEY_ARRAY_SIZE) {
  2209. err_msg_format = true;
  2210. break;
  2211. }
  2212. valid_len += vrk->key_len - 1;
  2213. }
  2214. break;
  2215. case I40E_VIRTCHNL_OP_CONFIG_RSS_LUT:
  2216. valid_len = sizeof(struct i40e_virtchnl_rss_lut);
  2217. if (msglen >= valid_len) {
  2218. struct i40e_virtchnl_rss_lut *vrl =
  2219. (struct i40e_virtchnl_rss_lut *)msg;
  2220. if (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE) {
  2221. err_msg_format = true;
  2222. break;
  2223. }
  2224. valid_len += vrl->lut_entries - 1;
  2225. }
  2226. break;
  2227. case I40E_VIRTCHNL_OP_GET_RSS_HENA_CAPS:
  2228. break;
  2229. case I40E_VIRTCHNL_OP_SET_RSS_HENA:
  2230. valid_len = sizeof(struct i40e_virtchnl_rss_hena);
  2231. break;
  2232. /* These are always errors coming from the VF. */
  2233. case I40E_VIRTCHNL_OP_EVENT:
  2234. case I40E_VIRTCHNL_OP_UNKNOWN:
  2235. default:
  2236. return -EPERM;
  2237. }
  2238. /* few more checks */
  2239. if ((valid_len != msglen) || (err_msg_format)) {
  2240. i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM);
  2241. return -EINVAL;
  2242. } else {
  2243. return 0;
  2244. }
  2245. }
  2246. /**
  2247. * i40e_vc_process_vf_msg
  2248. * @pf: pointer to the PF structure
  2249. * @vf_id: source VF id
  2250. * @msg: pointer to the msg buffer
  2251. * @msglen: msg length
  2252. * @msghndl: msg handle
  2253. *
  2254. * called from the common aeq/arq handler to
  2255. * process request from VF
  2256. **/
  2257. int i40e_vc_process_vf_msg(struct i40e_pf *pf, s16 vf_id, u32 v_opcode,
  2258. u32 v_retval, u8 *msg, u16 msglen)
  2259. {
  2260. struct i40e_hw *hw = &pf->hw;
  2261. int local_vf_id = vf_id - (s16)hw->func_caps.vf_base_id;
  2262. struct i40e_vf *vf;
  2263. int ret;
  2264. pf->vf_aq_requests++;
  2265. if (local_vf_id >= pf->num_alloc_vfs)
  2266. return -EINVAL;
  2267. vf = &(pf->vf[local_vf_id]);
  2268. /* perform basic checks on the msg */
  2269. ret = i40e_vc_validate_vf_msg(vf, v_opcode, v_retval, msg, msglen);
  2270. if (ret) {
  2271. dev_err(&pf->pdev->dev, "Invalid message from VF %d, opcode %d, len %d\n",
  2272. local_vf_id, v_opcode, msglen);
  2273. return ret;
  2274. }
  2275. switch (v_opcode) {
  2276. case I40E_VIRTCHNL_OP_VERSION:
  2277. ret = i40e_vc_get_version_msg(vf, msg);
  2278. break;
  2279. case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
  2280. ret = i40e_vc_get_vf_resources_msg(vf, msg);
  2281. break;
  2282. case I40E_VIRTCHNL_OP_RESET_VF:
  2283. i40e_vc_reset_vf_msg(vf);
  2284. ret = 0;
  2285. break;
  2286. case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
  2287. ret = i40e_vc_config_promiscuous_mode_msg(vf, msg, msglen);
  2288. break;
  2289. case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
  2290. ret = i40e_vc_config_queues_msg(vf, msg, msglen);
  2291. break;
  2292. case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
  2293. ret = i40e_vc_config_irq_map_msg(vf, msg, msglen);
  2294. break;
  2295. case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
  2296. ret = i40e_vc_enable_queues_msg(vf, msg, msglen);
  2297. i40e_vc_notify_vf_link_state(vf);
  2298. break;
  2299. case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
  2300. ret = i40e_vc_disable_queues_msg(vf, msg, msglen);
  2301. break;
  2302. case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
  2303. ret = i40e_vc_add_mac_addr_msg(vf, msg, msglen);
  2304. break;
  2305. case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
  2306. ret = i40e_vc_del_mac_addr_msg(vf, msg, msglen);
  2307. break;
  2308. case I40E_VIRTCHNL_OP_ADD_VLAN:
  2309. ret = i40e_vc_add_vlan_msg(vf, msg, msglen);
  2310. break;
  2311. case I40E_VIRTCHNL_OP_DEL_VLAN:
  2312. ret = i40e_vc_remove_vlan_msg(vf, msg, msglen);
  2313. break;
  2314. case I40E_VIRTCHNL_OP_GET_STATS:
  2315. ret = i40e_vc_get_stats_msg(vf, msg, msglen);
  2316. break;
  2317. case I40E_VIRTCHNL_OP_IWARP:
  2318. ret = i40e_vc_iwarp_msg(vf, msg, msglen);
  2319. break;
  2320. case I40E_VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP:
  2321. ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, true);
  2322. break;
  2323. case I40E_VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP:
  2324. ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, false);
  2325. break;
  2326. case I40E_VIRTCHNL_OP_CONFIG_RSS_KEY:
  2327. ret = i40e_vc_config_rss_key(vf, msg, msglen);
  2328. break;
  2329. case I40E_VIRTCHNL_OP_CONFIG_RSS_LUT:
  2330. ret = i40e_vc_config_rss_lut(vf, msg, msglen);
  2331. break;
  2332. case I40E_VIRTCHNL_OP_GET_RSS_HENA_CAPS:
  2333. ret = i40e_vc_get_rss_hena(vf, msg, msglen);
  2334. break;
  2335. case I40E_VIRTCHNL_OP_SET_RSS_HENA:
  2336. ret = i40e_vc_set_rss_hena(vf, msg, msglen);
  2337. break;
  2338. case I40E_VIRTCHNL_OP_UNKNOWN:
  2339. default:
  2340. dev_err(&pf->pdev->dev, "Unsupported opcode %d from VF %d\n",
  2341. v_opcode, local_vf_id);
  2342. ret = i40e_vc_send_resp_to_vf(vf, v_opcode,
  2343. I40E_ERR_NOT_IMPLEMENTED);
  2344. break;
  2345. }
  2346. return ret;
  2347. }
  2348. /**
  2349. * i40e_vc_process_vflr_event
  2350. * @pf: pointer to the PF structure
  2351. *
  2352. * called from the vlfr irq handler to
  2353. * free up VF resources and state variables
  2354. **/
  2355. int i40e_vc_process_vflr_event(struct i40e_pf *pf)
  2356. {
  2357. struct i40e_hw *hw = &pf->hw;
  2358. u32 reg, reg_idx, bit_idx;
  2359. struct i40e_vf *vf;
  2360. int vf_id;
  2361. if (!test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
  2362. return 0;
  2363. /* Re-enable the VFLR interrupt cause here, before looking for which
  2364. * VF got reset. Otherwise, if another VF gets a reset while the
  2365. * first one is being processed, that interrupt will be lost, and
  2366. * that VF will be stuck in reset forever.
  2367. */
  2368. reg = rd32(hw, I40E_PFINT_ICR0_ENA);
  2369. reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK;
  2370. wr32(hw, I40E_PFINT_ICR0_ENA, reg);
  2371. i40e_flush(hw);
  2372. clear_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
  2373. for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) {
  2374. reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
  2375. bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
  2376. /* read GLGEN_VFLRSTAT register to find out the flr VFs */
  2377. vf = &pf->vf[vf_id];
  2378. reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
  2379. if (reg & BIT(bit_idx))
  2380. /* i40e_reset_vf will clear the bit in GLGEN_VFLRSTAT */
  2381. i40e_reset_vf(vf, true);
  2382. }
  2383. return 0;
  2384. }
  2385. /**
  2386. * i40e_ndo_set_vf_mac
  2387. * @netdev: network interface device structure
  2388. * @vf_id: VF identifier
  2389. * @mac: mac address
  2390. *
  2391. * program VF mac address
  2392. **/
  2393. int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
  2394. {
  2395. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2396. struct i40e_vsi *vsi = np->vsi;
  2397. struct i40e_pf *pf = vsi->back;
  2398. struct i40e_mac_filter *f;
  2399. struct i40e_vf *vf;
  2400. int ret = 0;
  2401. /* validate the request */
  2402. if (vf_id >= pf->num_alloc_vfs) {
  2403. dev_err(&pf->pdev->dev,
  2404. "Invalid VF Identifier %d\n", vf_id);
  2405. ret = -EINVAL;
  2406. goto error_param;
  2407. }
  2408. vf = &(pf->vf[vf_id]);
  2409. vsi = pf->vsi[vf->lan_vsi_idx];
  2410. if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
  2411. dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
  2412. vf_id);
  2413. ret = -EAGAIN;
  2414. goto error_param;
  2415. }
  2416. if (is_multicast_ether_addr(mac)) {
  2417. dev_err(&pf->pdev->dev,
  2418. "Invalid Ethernet address %pM for VF %d\n", mac, vf_id);
  2419. ret = -EINVAL;
  2420. goto error_param;
  2421. }
  2422. /* Lock once because below invoked function add/del_filter requires
  2423. * mac_filter_list_lock to be held
  2424. */
  2425. spin_lock_bh(&vsi->mac_filter_list_lock);
  2426. /* delete the temporary mac address */
  2427. if (!is_zero_ether_addr(vf->default_lan_addr.addr))
  2428. i40e_del_filter(vsi, vf->default_lan_addr.addr,
  2429. vf->port_vlan_id ? vf->port_vlan_id : -1,
  2430. true, false);
  2431. /* Delete all the filters for this VSI - we're going to kill it
  2432. * anyway.
  2433. */
  2434. list_for_each_entry(f, &vsi->mac_filter_list, list)
  2435. i40e_del_filter(vsi, f->macaddr, f->vlan, true, false);
  2436. spin_unlock_bh(&vsi->mac_filter_list_lock);
  2437. dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n", mac, vf_id);
  2438. /* program mac filter */
  2439. if (i40e_sync_vsi_filters(vsi)) {
  2440. dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
  2441. ret = -EIO;
  2442. goto error_param;
  2443. }
  2444. ether_addr_copy(vf->default_lan_addr.addr, mac);
  2445. vf->pf_set_mac = true;
  2446. /* Force the VF driver stop so it has to reload with new MAC address */
  2447. i40e_vc_disable_vf(pf, vf);
  2448. dev_info(&pf->pdev->dev, "Reload the VF driver to make this change effective.\n");
  2449. error_param:
  2450. return ret;
  2451. }
  2452. /**
  2453. * i40e_ndo_set_vf_port_vlan
  2454. * @netdev: network interface device structure
  2455. * @vf_id: VF identifier
  2456. * @vlan_id: mac address
  2457. * @qos: priority setting
  2458. *
  2459. * program VF vlan id and/or qos
  2460. **/
  2461. int i40e_ndo_set_vf_port_vlan(struct net_device *netdev,
  2462. int vf_id, u16 vlan_id, u8 qos)
  2463. {
  2464. u16 vlanprio = vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT);
  2465. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2466. struct i40e_pf *pf = np->vsi->back;
  2467. bool is_vsi_in_vlan = false;
  2468. struct i40e_vsi *vsi;
  2469. struct i40e_vf *vf;
  2470. int ret = 0;
  2471. /* validate the request */
  2472. if (vf_id >= pf->num_alloc_vfs) {
  2473. dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
  2474. ret = -EINVAL;
  2475. goto error_pvid;
  2476. }
  2477. if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) {
  2478. dev_err(&pf->pdev->dev, "Invalid VF Parameters\n");
  2479. ret = -EINVAL;
  2480. goto error_pvid;
  2481. }
  2482. vf = &(pf->vf[vf_id]);
  2483. vsi = pf->vsi[vf->lan_vsi_idx];
  2484. if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
  2485. dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
  2486. vf_id);
  2487. ret = -EAGAIN;
  2488. goto error_pvid;
  2489. }
  2490. if (le16_to_cpu(vsi->info.pvid) == vlanprio)
  2491. /* duplicate request, so just return success */
  2492. goto error_pvid;
  2493. spin_lock_bh(&vsi->mac_filter_list_lock);
  2494. is_vsi_in_vlan = i40e_is_vsi_in_vlan(vsi);
  2495. spin_unlock_bh(&vsi->mac_filter_list_lock);
  2496. if (le16_to_cpu(vsi->info.pvid) == 0 && is_vsi_in_vlan) {
  2497. dev_err(&pf->pdev->dev,
  2498. "VF %d has already configured VLAN filters and the administrator is requesting a port VLAN override.\nPlease unload and reload the VF driver for this change to take effect.\n",
  2499. vf_id);
  2500. /* Administrator Error - knock the VF offline until he does
  2501. * the right thing by reconfiguring his network correctly
  2502. * and then reloading the VF driver.
  2503. */
  2504. i40e_vc_disable_vf(pf, vf);
  2505. /* During reset the VF got a new VSI, so refresh the pointer. */
  2506. vsi = pf->vsi[vf->lan_vsi_idx];
  2507. }
  2508. /* Check for condition where there was already a port VLAN ID
  2509. * filter set and now it is being deleted by setting it to zero.
  2510. * Additionally check for the condition where there was a port
  2511. * VLAN but now there is a new and different port VLAN being set.
  2512. * Before deleting all the old VLAN filters we must add new ones
  2513. * with -1 (I40E_VLAN_ANY) or otherwise we're left with all our
  2514. * MAC addresses deleted.
  2515. */
  2516. if ((!(vlan_id || qos) ||
  2517. vlanprio != le16_to_cpu(vsi->info.pvid)) &&
  2518. vsi->info.pvid)
  2519. ret = i40e_vsi_add_vlan(vsi, I40E_VLAN_ANY);
  2520. if (vsi->info.pvid) {
  2521. /* kill old VLAN */
  2522. ret = i40e_vsi_kill_vlan(vsi, (le16_to_cpu(vsi->info.pvid) &
  2523. VLAN_VID_MASK));
  2524. if (ret) {
  2525. dev_info(&vsi->back->pdev->dev,
  2526. "remove VLAN failed, ret=%d, aq_err=%d\n",
  2527. ret, pf->hw.aq.asq_last_status);
  2528. }
  2529. }
  2530. if (vlan_id || qos)
  2531. ret = i40e_vsi_add_pvid(vsi, vlanprio);
  2532. else
  2533. i40e_vsi_remove_pvid(vsi);
  2534. if (vlan_id) {
  2535. dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n",
  2536. vlan_id, qos, vf_id);
  2537. /* add new VLAN filter */
  2538. ret = i40e_vsi_add_vlan(vsi, vlan_id);
  2539. if (ret) {
  2540. dev_info(&vsi->back->pdev->dev,
  2541. "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
  2542. vsi->back->hw.aq.asq_last_status);
  2543. goto error_pvid;
  2544. }
  2545. /* Kill non-vlan MAC filters - ignore error return since
  2546. * there might not be any non-vlan MAC filters.
  2547. */
  2548. i40e_vsi_kill_vlan(vsi, I40E_VLAN_ANY);
  2549. }
  2550. if (ret) {
  2551. dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n");
  2552. goto error_pvid;
  2553. }
  2554. /* The Port VLAN needs to be saved across resets the same as the
  2555. * default LAN MAC address.
  2556. */
  2557. vf->port_vlan_id = le16_to_cpu(vsi->info.pvid);
  2558. ret = 0;
  2559. error_pvid:
  2560. return ret;
  2561. }
  2562. #define I40E_BW_CREDIT_DIVISOR 50 /* 50Mbps per BW credit */
  2563. #define I40E_MAX_BW_INACTIVE_ACCUM 4 /* device can accumulate 4 credits max */
  2564. /**
  2565. * i40e_ndo_set_vf_bw
  2566. * @netdev: network interface device structure
  2567. * @vf_id: VF identifier
  2568. * @tx_rate: Tx rate
  2569. *
  2570. * configure VF Tx rate
  2571. **/
  2572. int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate,
  2573. int max_tx_rate)
  2574. {
  2575. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2576. struct i40e_pf *pf = np->vsi->back;
  2577. struct i40e_vsi *vsi;
  2578. struct i40e_vf *vf;
  2579. int speed = 0;
  2580. int ret = 0;
  2581. /* validate the request */
  2582. if (vf_id >= pf->num_alloc_vfs) {
  2583. dev_err(&pf->pdev->dev, "Invalid VF Identifier %d.\n", vf_id);
  2584. ret = -EINVAL;
  2585. goto error;
  2586. }
  2587. if (min_tx_rate) {
  2588. dev_err(&pf->pdev->dev, "Invalid min tx rate (%d) (greater than 0) specified for VF %d.\n",
  2589. min_tx_rate, vf_id);
  2590. return -EINVAL;
  2591. }
  2592. vf = &(pf->vf[vf_id]);
  2593. vsi = pf->vsi[vf->lan_vsi_idx];
  2594. if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
  2595. dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
  2596. vf_id);
  2597. ret = -EAGAIN;
  2598. goto error;
  2599. }
  2600. switch (pf->hw.phy.link_info.link_speed) {
  2601. case I40E_LINK_SPEED_40GB:
  2602. speed = 40000;
  2603. break;
  2604. case I40E_LINK_SPEED_20GB:
  2605. speed = 20000;
  2606. break;
  2607. case I40E_LINK_SPEED_10GB:
  2608. speed = 10000;
  2609. break;
  2610. case I40E_LINK_SPEED_1GB:
  2611. speed = 1000;
  2612. break;
  2613. default:
  2614. break;
  2615. }
  2616. if (max_tx_rate > speed) {
  2617. dev_err(&pf->pdev->dev, "Invalid max tx rate %d specified for VF %d.",
  2618. max_tx_rate, vf->vf_id);
  2619. ret = -EINVAL;
  2620. goto error;
  2621. }
  2622. if ((max_tx_rate < 50) && (max_tx_rate > 0)) {
  2623. dev_warn(&pf->pdev->dev, "Setting max Tx rate to minimum usable value of 50Mbps.\n");
  2624. max_tx_rate = 50;
  2625. }
  2626. /* Tx rate credits are in values of 50Mbps, 0 is disabled*/
  2627. ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
  2628. max_tx_rate / I40E_BW_CREDIT_DIVISOR,
  2629. I40E_MAX_BW_INACTIVE_ACCUM, NULL);
  2630. if (ret) {
  2631. dev_err(&pf->pdev->dev, "Unable to set max tx rate, error code %d.\n",
  2632. ret);
  2633. ret = -EIO;
  2634. goto error;
  2635. }
  2636. vf->tx_rate = max_tx_rate;
  2637. error:
  2638. return ret;
  2639. }
  2640. /**
  2641. * i40e_ndo_get_vf_config
  2642. * @netdev: network interface device structure
  2643. * @vf_id: VF identifier
  2644. * @ivi: VF configuration structure
  2645. *
  2646. * return VF configuration
  2647. **/
  2648. int i40e_ndo_get_vf_config(struct net_device *netdev,
  2649. int vf_id, struct ifla_vf_info *ivi)
  2650. {
  2651. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2652. struct i40e_vsi *vsi = np->vsi;
  2653. struct i40e_pf *pf = vsi->back;
  2654. struct i40e_vf *vf;
  2655. int ret = 0;
  2656. /* validate the request */
  2657. if (vf_id >= pf->num_alloc_vfs) {
  2658. dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
  2659. ret = -EINVAL;
  2660. goto error_param;
  2661. }
  2662. vf = &(pf->vf[vf_id]);
  2663. /* first vsi is always the LAN vsi */
  2664. vsi = pf->vsi[vf->lan_vsi_idx];
  2665. if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
  2666. dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
  2667. vf_id);
  2668. ret = -EAGAIN;
  2669. goto error_param;
  2670. }
  2671. ivi->vf = vf_id;
  2672. ether_addr_copy(ivi->mac, vf->default_lan_addr.addr);
  2673. ivi->max_tx_rate = vf->tx_rate;
  2674. ivi->min_tx_rate = 0;
  2675. ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
  2676. ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
  2677. I40E_VLAN_PRIORITY_SHIFT;
  2678. if (vf->link_forced == false)
  2679. ivi->linkstate = IFLA_VF_LINK_STATE_AUTO;
  2680. else if (vf->link_up == true)
  2681. ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
  2682. else
  2683. ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE;
  2684. ivi->spoofchk = vf->spoofchk;
  2685. ret = 0;
  2686. error_param:
  2687. return ret;
  2688. }
  2689. /**
  2690. * i40e_ndo_set_vf_link_state
  2691. * @netdev: network interface device structure
  2692. * @vf_id: VF identifier
  2693. * @link: required link state
  2694. *
  2695. * Set the link state of a specified VF, regardless of physical link state
  2696. **/
  2697. int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link)
  2698. {
  2699. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2700. struct i40e_pf *pf = np->vsi->back;
  2701. struct i40e_virtchnl_pf_event pfe;
  2702. struct i40e_hw *hw = &pf->hw;
  2703. struct i40e_vf *vf;
  2704. int abs_vf_id;
  2705. int ret = 0;
  2706. /* validate the request */
  2707. if (vf_id >= pf->num_alloc_vfs) {
  2708. dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
  2709. ret = -EINVAL;
  2710. goto error_out;
  2711. }
  2712. vf = &pf->vf[vf_id];
  2713. abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
  2714. pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
  2715. pfe.severity = I40E_PF_EVENT_SEVERITY_INFO;
  2716. switch (link) {
  2717. case IFLA_VF_LINK_STATE_AUTO:
  2718. vf->link_forced = false;
  2719. pfe.event_data.link_event.link_status =
  2720. pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP;
  2721. pfe.event_data.link_event.link_speed =
  2722. pf->hw.phy.link_info.link_speed;
  2723. break;
  2724. case IFLA_VF_LINK_STATE_ENABLE:
  2725. vf->link_forced = true;
  2726. vf->link_up = true;
  2727. pfe.event_data.link_event.link_status = true;
  2728. pfe.event_data.link_event.link_speed = I40E_LINK_SPEED_40GB;
  2729. break;
  2730. case IFLA_VF_LINK_STATE_DISABLE:
  2731. vf->link_forced = true;
  2732. vf->link_up = false;
  2733. pfe.event_data.link_event.link_status = false;
  2734. pfe.event_data.link_event.link_speed = 0;
  2735. break;
  2736. default:
  2737. ret = -EINVAL;
  2738. goto error_out;
  2739. }
  2740. /* Notify the VF of its new link state */
  2741. i40e_aq_send_msg_to_vf(hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
  2742. 0, (u8 *)&pfe, sizeof(pfe), NULL);
  2743. error_out:
  2744. return ret;
  2745. }
  2746. /**
  2747. * i40e_ndo_set_vf_spoofchk
  2748. * @netdev: network interface device structure
  2749. * @vf_id: VF identifier
  2750. * @enable: flag to enable or disable feature
  2751. *
  2752. * Enable or disable VF spoof checking
  2753. **/
  2754. int i40e_ndo_set_vf_spoofchk(struct net_device *netdev, int vf_id, bool enable)
  2755. {
  2756. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2757. struct i40e_vsi *vsi = np->vsi;
  2758. struct i40e_pf *pf = vsi->back;
  2759. struct i40e_vsi_context ctxt;
  2760. struct i40e_hw *hw = &pf->hw;
  2761. struct i40e_vf *vf;
  2762. int ret = 0;
  2763. /* validate the request */
  2764. if (vf_id >= pf->num_alloc_vfs) {
  2765. dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
  2766. ret = -EINVAL;
  2767. goto out;
  2768. }
  2769. vf = &(pf->vf[vf_id]);
  2770. if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
  2771. dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
  2772. vf_id);
  2773. ret = -EAGAIN;
  2774. goto out;
  2775. }
  2776. if (enable == vf->spoofchk)
  2777. goto out;
  2778. vf->spoofchk = enable;
  2779. memset(&ctxt, 0, sizeof(ctxt));
  2780. ctxt.seid = pf->vsi[vf->lan_vsi_idx]->seid;
  2781. ctxt.pf_num = pf->hw.pf_id;
  2782. ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
  2783. if (enable)
  2784. ctxt.info.sec_flags |= (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
  2785. I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
  2786. ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
  2787. if (ret) {
  2788. dev_err(&pf->pdev->dev, "Error %d updating VSI parameters\n",
  2789. ret);
  2790. ret = -EIO;
  2791. }
  2792. out:
  2793. return ret;
  2794. }
  2795. /**
  2796. * i40e_ndo_set_vf_trust
  2797. * @netdev: network interface device structure of the pf
  2798. * @vf_id: VF identifier
  2799. * @setting: trust setting
  2800. *
  2801. * Enable or disable VF trust setting
  2802. **/
  2803. int i40e_ndo_set_vf_trust(struct net_device *netdev, int vf_id, bool setting)
  2804. {
  2805. struct i40e_netdev_priv *np = netdev_priv(netdev);
  2806. struct i40e_pf *pf = np->vsi->back;
  2807. struct i40e_vf *vf;
  2808. int ret = 0;
  2809. /* validate the request */
  2810. if (vf_id >= pf->num_alloc_vfs) {
  2811. dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
  2812. return -EINVAL;
  2813. }
  2814. if (pf->flags & I40E_FLAG_MFP_ENABLED) {
  2815. dev_err(&pf->pdev->dev, "Trusted VF not supported in MFP mode.\n");
  2816. return -EINVAL;
  2817. }
  2818. vf = &pf->vf[vf_id];
  2819. if (!vf)
  2820. return -EINVAL;
  2821. if (setting == vf->trusted)
  2822. goto out;
  2823. vf->trusted = setting;
  2824. i40e_vc_notify_vf_reset(vf);
  2825. i40e_reset_vf(vf, false);
  2826. dev_info(&pf->pdev->dev, "VF %u is now %strusted\n",
  2827. vf_id, setting ? "" : "un");
  2828. out:
  2829. return ret;
  2830. }