vc4_irq.c 7.0 KB

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  1. /*
  2. * Copyright © 2014 Broadcom
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. */
  23. /** DOC: Interrupt management for the V3D engine.
  24. *
  25. * We have an interrupt status register (V3D_INTCTL) which reports
  26. * interrupts, and where writing 1 bits clears those interrupts.
  27. * There are also a pair of interrupt registers
  28. * (V3D_INTENA/V3D_INTDIS) where writing a 1 to their bits enables or
  29. * disables that specific interrupt, and 0s written are ignored
  30. * (reading either one returns the set of enabled interrupts).
  31. *
  32. * When we take a binning flush done interrupt, we need to submit the
  33. * next frame for binning and move the finished frame to the render
  34. * thread.
  35. *
  36. * When we take a render frame interrupt, we need to wake the
  37. * processes waiting for some frame to be done, and get the next frame
  38. * submitted ASAP (so the hardware doesn't sit idle when there's work
  39. * to do).
  40. *
  41. * When we take the binner out of memory interrupt, we need to
  42. * allocate some new memory and pass it to the binner so that the
  43. * current job can make progress.
  44. */
  45. #include "vc4_drv.h"
  46. #include "vc4_regs.h"
  47. #define V3D_DRIVER_IRQS (V3D_INT_OUTOMEM | \
  48. V3D_INT_FLDONE | \
  49. V3D_INT_FRDONE)
  50. DECLARE_WAIT_QUEUE_HEAD(render_wait);
  51. static void
  52. vc4_overflow_mem_work(struct work_struct *work)
  53. {
  54. struct vc4_dev *vc4 =
  55. container_of(work, struct vc4_dev, overflow_mem_work);
  56. struct drm_device *dev = vc4->dev;
  57. struct vc4_bo *bo;
  58. bo = vc4_bo_create(dev, 256 * 1024, true);
  59. if (IS_ERR(bo)) {
  60. DRM_ERROR("Couldn't allocate binner overflow mem\n");
  61. return;
  62. }
  63. /* If there's a job executing currently, then our previous
  64. * overflow allocation is getting used in that job and we need
  65. * to queue it to be released when the job is done. But if no
  66. * job is executing at all, then we can free the old overflow
  67. * object direcctly.
  68. *
  69. * No lock necessary for this pointer since we're the only
  70. * ones that update the pointer, and our workqueue won't
  71. * reenter.
  72. */
  73. if (vc4->overflow_mem) {
  74. struct vc4_exec_info *current_exec;
  75. unsigned long irqflags;
  76. spin_lock_irqsave(&vc4->job_lock, irqflags);
  77. current_exec = vc4_first_bin_job(vc4);
  78. if (current_exec) {
  79. vc4->overflow_mem->seqno = vc4->finished_seqno + 1;
  80. list_add_tail(&vc4->overflow_mem->unref_head,
  81. &current_exec->unref_list);
  82. vc4->overflow_mem = NULL;
  83. }
  84. spin_unlock_irqrestore(&vc4->job_lock, irqflags);
  85. }
  86. if (vc4->overflow_mem)
  87. drm_gem_object_unreference_unlocked(&vc4->overflow_mem->base.base);
  88. vc4->overflow_mem = bo;
  89. V3D_WRITE(V3D_BPOA, bo->base.paddr);
  90. V3D_WRITE(V3D_BPOS, bo->base.base.size);
  91. V3D_WRITE(V3D_INTCTL, V3D_INT_OUTOMEM);
  92. V3D_WRITE(V3D_INTENA, V3D_INT_OUTOMEM);
  93. }
  94. static void
  95. vc4_irq_finish_bin_job(struct drm_device *dev)
  96. {
  97. struct vc4_dev *vc4 = to_vc4_dev(dev);
  98. struct vc4_exec_info *exec = vc4_first_bin_job(vc4);
  99. if (!exec)
  100. return;
  101. vc4_move_job_to_render(dev, exec);
  102. vc4_submit_next_bin_job(dev);
  103. }
  104. static void
  105. vc4_cancel_bin_job(struct drm_device *dev)
  106. {
  107. struct vc4_dev *vc4 = to_vc4_dev(dev);
  108. struct vc4_exec_info *exec = vc4_first_bin_job(vc4);
  109. if (!exec)
  110. return;
  111. list_move_tail(&exec->head, &vc4->bin_job_list);
  112. vc4_submit_next_bin_job(dev);
  113. }
  114. static void
  115. vc4_irq_finish_render_job(struct drm_device *dev)
  116. {
  117. struct vc4_dev *vc4 = to_vc4_dev(dev);
  118. struct vc4_exec_info *exec = vc4_first_render_job(vc4);
  119. if (!exec)
  120. return;
  121. vc4->finished_seqno++;
  122. list_move_tail(&exec->head, &vc4->job_done_list);
  123. vc4_submit_next_render_job(dev);
  124. wake_up_all(&vc4->job_wait_queue);
  125. schedule_work(&vc4->job_done_work);
  126. }
  127. irqreturn_t
  128. vc4_irq(int irq, void *arg)
  129. {
  130. struct drm_device *dev = arg;
  131. struct vc4_dev *vc4 = to_vc4_dev(dev);
  132. uint32_t intctl;
  133. irqreturn_t status = IRQ_NONE;
  134. barrier();
  135. intctl = V3D_READ(V3D_INTCTL);
  136. /* Acknowledge the interrupts we're handling here. The binner
  137. * last flush / render frame done interrupt will be cleared,
  138. * while OUTOMEM will stay high until the underlying cause is
  139. * cleared.
  140. */
  141. V3D_WRITE(V3D_INTCTL, intctl);
  142. if (intctl & V3D_INT_OUTOMEM) {
  143. /* Disable OUTOMEM until the work is done. */
  144. V3D_WRITE(V3D_INTDIS, V3D_INT_OUTOMEM);
  145. schedule_work(&vc4->overflow_mem_work);
  146. status = IRQ_HANDLED;
  147. }
  148. if (intctl & V3D_INT_FLDONE) {
  149. spin_lock(&vc4->job_lock);
  150. vc4_irq_finish_bin_job(dev);
  151. spin_unlock(&vc4->job_lock);
  152. status = IRQ_HANDLED;
  153. }
  154. if (intctl & V3D_INT_FRDONE) {
  155. spin_lock(&vc4->job_lock);
  156. vc4_irq_finish_render_job(dev);
  157. spin_unlock(&vc4->job_lock);
  158. status = IRQ_HANDLED;
  159. }
  160. return status;
  161. }
  162. void
  163. vc4_irq_preinstall(struct drm_device *dev)
  164. {
  165. struct vc4_dev *vc4 = to_vc4_dev(dev);
  166. init_waitqueue_head(&vc4->job_wait_queue);
  167. INIT_WORK(&vc4->overflow_mem_work, vc4_overflow_mem_work);
  168. /* Clear any pending interrupts someone might have left around
  169. * for us.
  170. */
  171. V3D_WRITE(V3D_INTCTL, V3D_DRIVER_IRQS);
  172. }
  173. int
  174. vc4_irq_postinstall(struct drm_device *dev)
  175. {
  176. struct vc4_dev *vc4 = to_vc4_dev(dev);
  177. /* Enable both the render done and out of memory interrupts. */
  178. V3D_WRITE(V3D_INTENA, V3D_DRIVER_IRQS);
  179. return 0;
  180. }
  181. void
  182. vc4_irq_uninstall(struct drm_device *dev)
  183. {
  184. struct vc4_dev *vc4 = to_vc4_dev(dev);
  185. /* Disable sending interrupts for our driver's IRQs. */
  186. V3D_WRITE(V3D_INTDIS, V3D_DRIVER_IRQS);
  187. /* Clear any pending interrupts we might have left. */
  188. V3D_WRITE(V3D_INTCTL, V3D_DRIVER_IRQS);
  189. cancel_work_sync(&vc4->overflow_mem_work);
  190. }
  191. /** Reinitializes interrupt registers when a GPU reset is performed. */
  192. void vc4_irq_reset(struct drm_device *dev)
  193. {
  194. struct vc4_dev *vc4 = to_vc4_dev(dev);
  195. unsigned long irqflags;
  196. /* Acknowledge any stale IRQs. */
  197. V3D_WRITE(V3D_INTCTL, V3D_DRIVER_IRQS);
  198. /*
  199. * Turn all our interrupts on. Binner out of memory is the
  200. * only one we expect to trigger at this point, since we've
  201. * just come from poweron and haven't supplied any overflow
  202. * memory yet.
  203. */
  204. V3D_WRITE(V3D_INTENA, V3D_DRIVER_IRQS);
  205. spin_lock_irqsave(&vc4->job_lock, irqflags);
  206. vc4_cancel_bin_job(dev);
  207. vc4_irq_finish_render_job(dev);
  208. spin_unlock_irqrestore(&vc4->job_lock, irqflags);
  209. }