sti_cursor.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397
  1. /*
  2. * Copyright (C) STMicroelectronics SA 2014
  3. * Authors: Vincent Abriou <vincent.abriou@st.com>
  4. * Fabien Dessenne <fabien.dessenne@st.com>
  5. * for STMicroelectronics.
  6. * License terms: GNU General Public License (GPL), version 2
  7. */
  8. #include <linux/seq_file.h>
  9. #include <drm/drm_atomic.h>
  10. #include <drm/drm_fb_cma_helper.h>
  11. #include <drm/drm_gem_cma_helper.h>
  12. #include "sti_compositor.h"
  13. #include "sti_cursor.h"
  14. #include "sti_plane.h"
  15. #include "sti_vtg.h"
  16. /* Registers */
  17. #define CUR_CTL 0x00
  18. #define CUR_VPO 0x0C
  19. #define CUR_PML 0x14
  20. #define CUR_PMP 0x18
  21. #define CUR_SIZE 0x1C
  22. #define CUR_CML 0x20
  23. #define CUR_AWS 0x28
  24. #define CUR_AWE 0x2C
  25. #define CUR_CTL_CLUT_UPDATE BIT(1)
  26. #define STI_CURS_MIN_SIZE 1
  27. #define STI_CURS_MAX_SIZE 128
  28. /*
  29. * pixmap dma buffer stucture
  30. *
  31. * @paddr: physical address
  32. * @size: buffer size
  33. * @base: virtual address
  34. */
  35. struct dma_pixmap {
  36. dma_addr_t paddr;
  37. size_t size;
  38. void *base;
  39. };
  40. /**
  41. * STI Cursor structure
  42. *
  43. * @sti_plane: sti_plane structure
  44. * @dev: driver device
  45. * @regs: cursor registers
  46. * @width: cursor width
  47. * @height: cursor height
  48. * @clut: color look up table
  49. * @clut_paddr: color look up table physical address
  50. * @pixmap: pixmap dma buffer (clut8-format cursor)
  51. */
  52. struct sti_cursor {
  53. struct sti_plane plane;
  54. struct device *dev;
  55. void __iomem *regs;
  56. unsigned int width;
  57. unsigned int height;
  58. unsigned short *clut;
  59. dma_addr_t clut_paddr;
  60. struct dma_pixmap pixmap;
  61. };
  62. static const uint32_t cursor_supported_formats[] = {
  63. DRM_FORMAT_ARGB8888,
  64. };
  65. #define to_sti_cursor(x) container_of(x, struct sti_cursor, plane)
  66. #define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \
  67. readl(cursor->regs + reg))
  68. static void cursor_dbg_vpo(struct seq_file *s, u32 val)
  69. {
  70. seq_printf(s, "\txdo:%4d\tydo:%4d", val & 0x0FFF, (val >> 16) & 0x0FFF);
  71. }
  72. static void cursor_dbg_size(struct seq_file *s, u32 val)
  73. {
  74. seq_printf(s, "\t%d x %d", val & 0x07FF, (val >> 16) & 0x07FF);
  75. }
  76. static void cursor_dbg_pml(struct seq_file *s,
  77. struct sti_cursor *cursor, u32 val)
  78. {
  79. if (cursor->pixmap.paddr == val)
  80. seq_printf(s, "\tVirt @: %p", cursor->pixmap.base);
  81. }
  82. static void cursor_dbg_cml(struct seq_file *s,
  83. struct sti_cursor *cursor, u32 val)
  84. {
  85. if (cursor->clut_paddr == val)
  86. seq_printf(s, "\tVirt @: %p", cursor->clut);
  87. }
  88. static int cursor_dbg_show(struct seq_file *s, void *data)
  89. {
  90. struct drm_info_node *node = s->private;
  91. struct sti_cursor *cursor = (struct sti_cursor *)node->info_ent->data;
  92. struct drm_device *dev = node->minor->dev;
  93. int ret;
  94. ret = mutex_lock_interruptible(&dev->struct_mutex);
  95. if (ret)
  96. return ret;
  97. seq_printf(s, "%s: (vaddr = 0x%p)",
  98. sti_plane_to_str(&cursor->plane), cursor->regs);
  99. DBGFS_DUMP(CUR_CTL);
  100. DBGFS_DUMP(CUR_VPO);
  101. cursor_dbg_vpo(s, readl(cursor->regs + CUR_VPO));
  102. DBGFS_DUMP(CUR_PML);
  103. cursor_dbg_pml(s, cursor, readl(cursor->regs + CUR_PML));
  104. DBGFS_DUMP(CUR_PMP);
  105. DBGFS_DUMP(CUR_SIZE);
  106. cursor_dbg_size(s, readl(cursor->regs + CUR_SIZE));
  107. DBGFS_DUMP(CUR_CML);
  108. cursor_dbg_cml(s, cursor, readl(cursor->regs + CUR_CML));
  109. DBGFS_DUMP(CUR_AWS);
  110. DBGFS_DUMP(CUR_AWE);
  111. seq_puts(s, "\n");
  112. mutex_unlock(&dev->struct_mutex);
  113. return 0;
  114. }
  115. static struct drm_info_list cursor_debugfs_files[] = {
  116. { "cursor", cursor_dbg_show, 0, NULL },
  117. };
  118. static int cursor_debugfs_init(struct sti_cursor *cursor,
  119. struct drm_minor *minor)
  120. {
  121. unsigned int i;
  122. for (i = 0; i < ARRAY_SIZE(cursor_debugfs_files); i++)
  123. cursor_debugfs_files[i].data = cursor;
  124. return drm_debugfs_create_files(cursor_debugfs_files,
  125. ARRAY_SIZE(cursor_debugfs_files),
  126. minor->debugfs_root, minor);
  127. }
  128. static void sti_cursor_argb8888_to_clut8(struct sti_cursor *cursor, u32 *src)
  129. {
  130. u8 *dst = cursor->pixmap.base;
  131. unsigned int i, j;
  132. u32 a, r, g, b;
  133. for (i = 0; i < cursor->height; i++) {
  134. for (j = 0; j < cursor->width; j++) {
  135. /* Pick the 2 higher bits of each component */
  136. a = (*src >> 30) & 3;
  137. r = (*src >> 22) & 3;
  138. g = (*src >> 14) & 3;
  139. b = (*src >> 6) & 3;
  140. *dst = a << 6 | r << 4 | g << 2 | b;
  141. src++;
  142. dst++;
  143. }
  144. }
  145. }
  146. static void sti_cursor_init(struct sti_cursor *cursor)
  147. {
  148. unsigned short *base = cursor->clut;
  149. unsigned int a, r, g, b;
  150. /* Assign CLUT values, ARGB444 format */
  151. for (a = 0; a < 4; a++)
  152. for (r = 0; r < 4; r++)
  153. for (g = 0; g < 4; g++)
  154. for (b = 0; b < 4; b++)
  155. *base++ = (a * 5) << 12 |
  156. (r * 5) << 8 |
  157. (g * 5) << 4 |
  158. (b * 5);
  159. }
  160. static int sti_cursor_atomic_check(struct drm_plane *drm_plane,
  161. struct drm_plane_state *state)
  162. {
  163. struct sti_plane *plane = to_sti_plane(drm_plane);
  164. struct sti_cursor *cursor = to_sti_cursor(plane);
  165. struct drm_crtc *crtc = state->crtc;
  166. struct drm_framebuffer *fb = state->fb;
  167. struct drm_crtc_state *crtc_state;
  168. struct drm_display_mode *mode;
  169. int dst_x, dst_y, dst_w, dst_h;
  170. int src_w, src_h;
  171. /* no need for further checks if the plane is being disabled */
  172. if (!crtc || !fb)
  173. return 0;
  174. crtc_state = drm_atomic_get_crtc_state(state->state, crtc);
  175. mode = &crtc_state->mode;
  176. dst_x = state->crtc_x;
  177. dst_y = state->crtc_y;
  178. dst_w = clamp_val(state->crtc_w, 0, mode->crtc_hdisplay - dst_x);
  179. dst_h = clamp_val(state->crtc_h, 0, mode->crtc_vdisplay - dst_y);
  180. /* src_x are in 16.16 format */
  181. src_w = state->src_w >> 16;
  182. src_h = state->src_h >> 16;
  183. if (src_w < STI_CURS_MIN_SIZE ||
  184. src_h < STI_CURS_MIN_SIZE ||
  185. src_w > STI_CURS_MAX_SIZE ||
  186. src_h > STI_CURS_MAX_SIZE) {
  187. DRM_ERROR("Invalid cursor size (%dx%d)\n",
  188. src_w, src_h);
  189. return -EINVAL;
  190. }
  191. /* If the cursor size has changed, re-allocated the pixmap */
  192. if (!cursor->pixmap.base ||
  193. (cursor->width != src_w) ||
  194. (cursor->height != src_h)) {
  195. cursor->width = src_w;
  196. cursor->height = src_h;
  197. if (cursor->pixmap.base)
  198. dma_free_wc(cursor->dev, cursor->pixmap.size,
  199. cursor->pixmap.base, cursor->pixmap.paddr);
  200. cursor->pixmap.size = cursor->width * cursor->height;
  201. cursor->pixmap.base = dma_alloc_wc(cursor->dev,
  202. cursor->pixmap.size,
  203. &cursor->pixmap.paddr,
  204. GFP_KERNEL | GFP_DMA);
  205. if (!cursor->pixmap.base) {
  206. DRM_ERROR("Failed to allocate memory for pixmap\n");
  207. return -EINVAL;
  208. }
  209. }
  210. if (!drm_fb_cma_get_gem_obj(fb, 0)) {
  211. DRM_ERROR("Can't get CMA GEM object for fb\n");
  212. return -EINVAL;
  213. }
  214. DRM_DEBUG_KMS("CRTC:%d (%s) drm plane:%d (%s)\n",
  215. crtc->base.id, sti_mixer_to_str(to_sti_mixer(crtc)),
  216. drm_plane->base.id, sti_plane_to_str(plane));
  217. DRM_DEBUG_KMS("(%dx%d)@(%d,%d)\n", dst_w, dst_h, dst_x, dst_y);
  218. return 0;
  219. }
  220. static void sti_cursor_atomic_update(struct drm_plane *drm_plane,
  221. struct drm_plane_state *oldstate)
  222. {
  223. struct drm_plane_state *state = drm_plane->state;
  224. struct sti_plane *plane = to_sti_plane(drm_plane);
  225. struct sti_cursor *cursor = to_sti_cursor(plane);
  226. struct drm_crtc *crtc = state->crtc;
  227. struct drm_framebuffer *fb = state->fb;
  228. struct drm_display_mode *mode;
  229. int dst_x, dst_y;
  230. struct drm_gem_cma_object *cma_obj;
  231. u32 y, x;
  232. u32 val;
  233. if (!crtc || !fb)
  234. return;
  235. mode = &crtc->mode;
  236. dst_x = state->crtc_x;
  237. dst_y = state->crtc_y;
  238. cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
  239. /* Convert ARGB8888 to CLUT8 */
  240. sti_cursor_argb8888_to_clut8(cursor, (u32 *)cma_obj->vaddr);
  241. /* AWS and AWE depend on the mode */
  242. y = sti_vtg_get_line_number(*mode, 0);
  243. x = sti_vtg_get_pixel_number(*mode, 0);
  244. val = y << 16 | x;
  245. writel(val, cursor->regs + CUR_AWS);
  246. y = sti_vtg_get_line_number(*mode, mode->vdisplay - 1);
  247. x = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1);
  248. val = y << 16 | x;
  249. writel(val, cursor->regs + CUR_AWE);
  250. /* Set memory location, size, and position */
  251. writel(cursor->pixmap.paddr, cursor->regs + CUR_PML);
  252. writel(cursor->width, cursor->regs + CUR_PMP);
  253. writel(cursor->height << 16 | cursor->width, cursor->regs + CUR_SIZE);
  254. y = sti_vtg_get_line_number(*mode, dst_y);
  255. x = sti_vtg_get_pixel_number(*mode, dst_x);
  256. writel((y << 16) | x, cursor->regs + CUR_VPO);
  257. /* Set and fetch CLUT */
  258. writel(cursor->clut_paddr, cursor->regs + CUR_CML);
  259. writel(CUR_CTL_CLUT_UPDATE, cursor->regs + CUR_CTL);
  260. sti_plane_update_fps(plane, true, false);
  261. plane->status = STI_PLANE_UPDATED;
  262. }
  263. static void sti_cursor_atomic_disable(struct drm_plane *drm_plane,
  264. struct drm_plane_state *oldstate)
  265. {
  266. struct sti_plane *plane = to_sti_plane(drm_plane);
  267. if (!drm_plane->crtc) {
  268. DRM_DEBUG_DRIVER("drm plane:%d not enabled\n",
  269. drm_plane->base.id);
  270. return;
  271. }
  272. DRM_DEBUG_DRIVER("CRTC:%d (%s) drm plane:%d (%s)\n",
  273. drm_plane->crtc->base.id,
  274. sti_mixer_to_str(to_sti_mixer(drm_plane->crtc)),
  275. drm_plane->base.id, sti_plane_to_str(plane));
  276. plane->status = STI_PLANE_DISABLING;
  277. }
  278. static const struct drm_plane_helper_funcs sti_cursor_helpers_funcs = {
  279. .atomic_check = sti_cursor_atomic_check,
  280. .atomic_update = sti_cursor_atomic_update,
  281. .atomic_disable = sti_cursor_atomic_disable,
  282. };
  283. struct drm_plane *sti_cursor_create(struct drm_device *drm_dev,
  284. struct device *dev, int desc,
  285. void __iomem *baseaddr,
  286. unsigned int possible_crtcs)
  287. {
  288. struct sti_cursor *cursor;
  289. size_t size;
  290. int res;
  291. cursor = devm_kzalloc(dev, sizeof(*cursor), GFP_KERNEL);
  292. if (!cursor) {
  293. DRM_ERROR("Failed to allocate memory for cursor\n");
  294. return NULL;
  295. }
  296. /* Allocate clut buffer */
  297. size = 0x100 * sizeof(unsigned short);
  298. cursor->clut = dma_alloc_wc(dev, size, &cursor->clut_paddr,
  299. GFP_KERNEL | GFP_DMA);
  300. if (!cursor->clut) {
  301. DRM_ERROR("Failed to allocate memory for cursor clut\n");
  302. goto err_clut;
  303. }
  304. cursor->dev = dev;
  305. cursor->regs = baseaddr;
  306. cursor->plane.desc = desc;
  307. cursor->plane.status = STI_PLANE_DISABLED;
  308. sti_cursor_init(cursor);
  309. res = drm_universal_plane_init(drm_dev, &cursor->plane.drm_plane,
  310. possible_crtcs,
  311. &sti_plane_helpers_funcs,
  312. cursor_supported_formats,
  313. ARRAY_SIZE(cursor_supported_formats),
  314. DRM_PLANE_TYPE_CURSOR, NULL);
  315. if (res) {
  316. DRM_ERROR("Failed to initialize universal plane\n");
  317. goto err_plane;
  318. }
  319. drm_plane_helper_add(&cursor->plane.drm_plane,
  320. &sti_cursor_helpers_funcs);
  321. sti_plane_init_property(&cursor->plane, DRM_PLANE_TYPE_CURSOR);
  322. if (cursor_debugfs_init(cursor, drm_dev->primary))
  323. DRM_ERROR("CURSOR debugfs setup failed\n");
  324. return &cursor->plane.drm_plane;
  325. err_plane:
  326. dma_free_wc(dev, size, cursor->clut, cursor->clut_paddr);
  327. err_clut:
  328. devm_kfree(dev, cursor);
  329. return NULL;
  330. }