fsl_dcu_drm_drv.c 10 KB

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  1. /*
  2. * Copyright 2015 Freescale Semiconductor, Inc.
  3. *
  4. * Freescale DCU drm device driver
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/clk.h>
  12. #include <linux/clk-provider.h>
  13. #include <linux/io.h>
  14. #include <linux/mfd/syscon.h>
  15. #include <linux/mm.h>
  16. #include <linux/module.h>
  17. #include <linux/of_platform.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/pm.h>
  20. #include <linux/pm_runtime.h>
  21. #include <linux/regmap.h>
  22. #include <drm/drmP.h>
  23. #include <drm/drm_crtc_helper.h>
  24. #include <drm/drm_fb_cma_helper.h>
  25. #include <drm/drm_gem_cma_helper.h>
  26. #include "fsl_dcu_drm_crtc.h"
  27. #include "fsl_dcu_drm_drv.h"
  28. #include "fsl_tcon.h"
  29. static bool fsl_dcu_drm_is_volatile_reg(struct device *dev, unsigned int reg)
  30. {
  31. if (reg == DCU_INT_STATUS || reg == DCU_UPDATE_MODE)
  32. return true;
  33. return false;
  34. }
  35. static const struct regmap_config fsl_dcu_regmap_config = {
  36. .reg_bits = 32,
  37. .reg_stride = 4,
  38. .val_bits = 32,
  39. .cache_type = REGCACHE_RBTREE,
  40. .volatile_reg = fsl_dcu_drm_is_volatile_reg,
  41. };
  42. static int fsl_dcu_drm_irq_init(struct drm_device *dev)
  43. {
  44. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  45. int ret;
  46. ret = drm_irq_install(dev, fsl_dev->irq);
  47. if (ret < 0)
  48. dev_err(dev->dev, "failed to install IRQ handler\n");
  49. regmap_write(fsl_dev->regmap, DCU_INT_STATUS, 0);
  50. regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0);
  51. regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
  52. DCU_UPDATE_MODE_READREG);
  53. return ret;
  54. }
  55. static int fsl_dcu_load(struct drm_device *dev, unsigned long flags)
  56. {
  57. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  58. int ret;
  59. ret = fsl_dcu_drm_modeset_init(fsl_dev);
  60. if (ret < 0) {
  61. dev_err(dev->dev, "failed to initialize mode setting\n");
  62. return ret;
  63. }
  64. ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
  65. if (ret < 0) {
  66. dev_err(dev->dev, "failed to initialize vblank\n");
  67. goto done;
  68. }
  69. ret = fsl_dcu_drm_irq_init(dev);
  70. if (ret < 0)
  71. goto done;
  72. dev->irq_enabled = true;
  73. fsl_dcu_fbdev_init(dev);
  74. return 0;
  75. done:
  76. drm_kms_helper_poll_fini(dev);
  77. if (fsl_dev->fbdev)
  78. drm_fbdev_cma_fini(fsl_dev->fbdev);
  79. drm_mode_config_cleanup(dev);
  80. drm_vblank_cleanup(dev);
  81. drm_irq_uninstall(dev);
  82. dev->dev_private = NULL;
  83. return ret;
  84. }
  85. static int fsl_dcu_unload(struct drm_device *dev)
  86. {
  87. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  88. drm_kms_helper_poll_fini(dev);
  89. if (fsl_dev->fbdev)
  90. drm_fbdev_cma_fini(fsl_dev->fbdev);
  91. drm_mode_config_cleanup(dev);
  92. drm_vblank_cleanup(dev);
  93. drm_irq_uninstall(dev);
  94. dev->dev_private = NULL;
  95. return 0;
  96. }
  97. static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg)
  98. {
  99. struct drm_device *dev = arg;
  100. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  101. unsigned int int_status;
  102. int ret;
  103. ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status);
  104. if (ret) {
  105. dev_err(dev->dev, "read DCU_INT_STATUS failed\n");
  106. return IRQ_NONE;
  107. }
  108. if (int_status & DCU_INT_STATUS_VBLANK)
  109. drm_handle_vblank(dev, 0);
  110. regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status);
  111. regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
  112. DCU_UPDATE_MODE_READREG);
  113. return IRQ_HANDLED;
  114. }
  115. static int fsl_dcu_drm_enable_vblank(struct drm_device *dev, unsigned int pipe)
  116. {
  117. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  118. unsigned int value;
  119. regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value);
  120. value &= ~DCU_INT_MASK_VBLANK;
  121. regmap_write(fsl_dev->regmap, DCU_INT_MASK, value);
  122. return 0;
  123. }
  124. static void fsl_dcu_drm_disable_vblank(struct drm_device *dev,
  125. unsigned int pipe)
  126. {
  127. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  128. unsigned int value;
  129. regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value);
  130. value |= DCU_INT_MASK_VBLANK;
  131. regmap_write(fsl_dev->regmap, DCU_INT_MASK, value);
  132. }
  133. static void fsl_dcu_drm_lastclose(struct drm_device *dev)
  134. {
  135. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  136. drm_fbdev_cma_restore_mode(fsl_dev->fbdev);
  137. }
  138. static const struct file_operations fsl_dcu_drm_fops = {
  139. .owner = THIS_MODULE,
  140. .open = drm_open,
  141. .release = drm_release,
  142. .unlocked_ioctl = drm_ioctl,
  143. #ifdef CONFIG_COMPAT
  144. .compat_ioctl = drm_compat_ioctl,
  145. #endif
  146. .poll = drm_poll,
  147. .read = drm_read,
  148. .llseek = no_llseek,
  149. .mmap = drm_gem_cma_mmap,
  150. };
  151. static struct drm_driver fsl_dcu_drm_driver = {
  152. .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET
  153. | DRIVER_PRIME | DRIVER_ATOMIC,
  154. .lastclose = fsl_dcu_drm_lastclose,
  155. .load = fsl_dcu_load,
  156. .unload = fsl_dcu_unload,
  157. .irq_handler = fsl_dcu_drm_irq,
  158. .get_vblank_counter = drm_vblank_no_hw_counter,
  159. .enable_vblank = fsl_dcu_drm_enable_vblank,
  160. .disable_vblank = fsl_dcu_drm_disable_vblank,
  161. .gem_free_object = drm_gem_cma_free_object,
  162. .gem_vm_ops = &drm_gem_cma_vm_ops,
  163. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  164. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  165. .gem_prime_import = drm_gem_prime_import,
  166. .gem_prime_export = drm_gem_prime_export,
  167. .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
  168. .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
  169. .gem_prime_vmap = drm_gem_cma_prime_vmap,
  170. .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
  171. .gem_prime_mmap = drm_gem_cma_prime_mmap,
  172. .dumb_create = drm_gem_cma_dumb_create,
  173. .dumb_map_offset = drm_gem_cma_dumb_map_offset,
  174. .dumb_destroy = drm_gem_dumb_destroy,
  175. .fops = &fsl_dcu_drm_fops,
  176. .name = "fsl-dcu-drm",
  177. .desc = "Freescale DCU DRM",
  178. .date = "20160425",
  179. .major = 1,
  180. .minor = 1,
  181. };
  182. #ifdef CONFIG_PM_SLEEP
  183. static int fsl_dcu_drm_pm_suspend(struct device *dev)
  184. {
  185. struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
  186. if (!fsl_dev)
  187. return 0;
  188. drm_kms_helper_poll_disable(fsl_dev->drm);
  189. regcache_cache_only(fsl_dev->regmap, true);
  190. regcache_mark_dirty(fsl_dev->regmap);
  191. clk_disable(fsl_dev->clk);
  192. clk_unprepare(fsl_dev->clk);
  193. return 0;
  194. }
  195. static int fsl_dcu_drm_pm_resume(struct device *dev)
  196. {
  197. struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
  198. int ret;
  199. if (!fsl_dev)
  200. return 0;
  201. ret = clk_enable(fsl_dev->clk);
  202. if (ret < 0) {
  203. dev_err(dev, "failed to enable dcu clk\n");
  204. clk_unprepare(fsl_dev->clk);
  205. return ret;
  206. }
  207. ret = clk_prepare(fsl_dev->clk);
  208. if (ret < 0) {
  209. dev_err(dev, "failed to prepare dcu clk\n");
  210. return ret;
  211. }
  212. drm_kms_helper_poll_enable(fsl_dev->drm);
  213. regcache_cache_only(fsl_dev->regmap, false);
  214. regcache_sync(fsl_dev->regmap);
  215. return 0;
  216. }
  217. #endif
  218. static const struct dev_pm_ops fsl_dcu_drm_pm_ops = {
  219. SET_SYSTEM_SLEEP_PM_OPS(fsl_dcu_drm_pm_suspend, fsl_dcu_drm_pm_resume)
  220. };
  221. static const struct fsl_dcu_soc_data fsl_dcu_ls1021a_data = {
  222. .name = "ls1021a",
  223. .total_layer = 16,
  224. .max_layer = 4,
  225. };
  226. static const struct fsl_dcu_soc_data fsl_dcu_vf610_data = {
  227. .name = "vf610",
  228. .total_layer = 64,
  229. .max_layer = 6,
  230. };
  231. static const struct of_device_id fsl_dcu_of_match[] = {
  232. {
  233. .compatible = "fsl,ls1021a-dcu",
  234. .data = &fsl_dcu_ls1021a_data,
  235. }, {
  236. .compatible = "fsl,vf610-dcu",
  237. .data = &fsl_dcu_vf610_data,
  238. }, {
  239. },
  240. };
  241. MODULE_DEVICE_TABLE(of, fsl_dcu_of_match);
  242. static int fsl_dcu_drm_probe(struct platform_device *pdev)
  243. {
  244. struct fsl_dcu_drm_device *fsl_dev;
  245. struct drm_device *drm;
  246. struct device *dev = &pdev->dev;
  247. struct resource *res;
  248. void __iomem *base;
  249. struct drm_driver *driver = &fsl_dcu_drm_driver;
  250. struct clk *pix_clk_in;
  251. char pix_clk_name[32];
  252. const char *pix_clk_in_name;
  253. const struct of_device_id *id;
  254. int ret;
  255. fsl_dev = devm_kzalloc(dev, sizeof(*fsl_dev), GFP_KERNEL);
  256. if (!fsl_dev)
  257. return -ENOMEM;
  258. id = of_match_node(fsl_dcu_of_match, pdev->dev.of_node);
  259. if (!id)
  260. return -ENODEV;
  261. fsl_dev->soc = id->data;
  262. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  263. if (!res) {
  264. dev_err(dev, "could not get memory IO resource\n");
  265. return -ENODEV;
  266. }
  267. base = devm_ioremap_resource(dev, res);
  268. if (IS_ERR(base)) {
  269. ret = PTR_ERR(base);
  270. return ret;
  271. }
  272. fsl_dev->irq = platform_get_irq(pdev, 0);
  273. if (fsl_dev->irq < 0) {
  274. dev_err(dev, "failed to get irq\n");
  275. return -ENXIO;
  276. }
  277. fsl_dev->regmap = devm_regmap_init_mmio(dev, base,
  278. &fsl_dcu_regmap_config);
  279. if (IS_ERR(fsl_dev->regmap)) {
  280. dev_err(dev, "regmap init failed\n");
  281. return PTR_ERR(fsl_dev->regmap);
  282. }
  283. fsl_dev->clk = devm_clk_get(dev, "dcu");
  284. if (IS_ERR(fsl_dev->clk)) {
  285. dev_err(dev, "failed to get dcu clock\n");
  286. return PTR_ERR(fsl_dev->clk);
  287. }
  288. ret = clk_prepare_enable(fsl_dev->clk);
  289. if (ret < 0) {
  290. dev_err(dev, "failed to enable dcu clk\n");
  291. return ret;
  292. }
  293. pix_clk_in = devm_clk_get(dev, "pix");
  294. if (IS_ERR(pix_clk_in)) {
  295. /* legancy binding, use dcu clock as pixel clock input */
  296. pix_clk_in = fsl_dev->clk;
  297. }
  298. pix_clk_in_name = __clk_get_name(pix_clk_in);
  299. snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", pix_clk_in_name);
  300. fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name,
  301. pix_clk_in_name, 0, base + DCU_DIV_RATIO,
  302. 0, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL);
  303. if (IS_ERR(fsl_dev->pix_clk)) {
  304. dev_err(dev, "failed to register pix clk\n");
  305. ret = PTR_ERR(fsl_dev->pix_clk);
  306. goto disable_clk;
  307. }
  308. ret = clk_prepare_enable(fsl_dev->pix_clk);
  309. if (ret < 0) {
  310. dev_err(dev, "failed to enable pix clk\n");
  311. goto unregister_pix_clk;
  312. }
  313. fsl_dev->tcon = fsl_tcon_init(dev);
  314. drm = drm_dev_alloc(driver, dev);
  315. if (!drm) {
  316. ret = -ENOMEM;
  317. goto disable_pix_clk;
  318. }
  319. fsl_dev->dev = dev;
  320. fsl_dev->drm = drm;
  321. fsl_dev->np = dev->of_node;
  322. drm->dev_private = fsl_dev;
  323. dev_set_drvdata(dev, fsl_dev);
  324. ret = drm_dev_register(drm, 0);
  325. if (ret < 0)
  326. goto unref;
  327. DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", driver->name,
  328. driver->major, driver->minor, driver->patchlevel,
  329. driver->date, drm->primary->index);
  330. return 0;
  331. unref:
  332. drm_dev_unref(drm);
  333. disable_pix_clk:
  334. clk_disable_unprepare(fsl_dev->pix_clk);
  335. unregister_pix_clk:
  336. clk_unregister(fsl_dev->pix_clk);
  337. disable_clk:
  338. clk_disable_unprepare(fsl_dev->clk);
  339. return ret;
  340. }
  341. static int fsl_dcu_drm_remove(struct platform_device *pdev)
  342. {
  343. struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev);
  344. clk_disable_unprepare(fsl_dev->clk);
  345. clk_disable_unprepare(fsl_dev->pix_clk);
  346. clk_unregister(fsl_dev->pix_clk);
  347. drm_put_dev(fsl_dev->drm);
  348. return 0;
  349. }
  350. static struct platform_driver fsl_dcu_drm_platform_driver = {
  351. .probe = fsl_dcu_drm_probe,
  352. .remove = fsl_dcu_drm_remove,
  353. .driver = {
  354. .name = "fsl-dcu",
  355. .pm = &fsl_dcu_drm_pm_ops,
  356. .of_match_table = fsl_dcu_of_match,
  357. },
  358. };
  359. module_platform_driver(fsl_dcu_drm_platform_driver);
  360. MODULE_DESCRIPTION("Freescale DCU DRM Driver");
  361. MODULE_LICENSE("GPL");