rtc-ds1307.c 33 KB

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  1. /*
  2. * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
  3. *
  4. * Copyright (C) 2005 James Chapman (ds1337 core)
  5. * Copyright (C) 2006 David Brownell
  6. * Copyright (C) 2009 Matthias Fuchs (rx8025 support)
  7. * Copyright (C) 2012 Bertrand Achard (nvram access fixes)
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/bcd.h>
  14. #include <linux/i2c.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <linux/of_device.h>
  18. #include <linux/of_irq.h>
  19. #include <linux/pm_wakeirq.h>
  20. #include <linux/rtc/ds1307.h>
  21. #include <linux/rtc.h>
  22. #include <linux/slab.h>
  23. #include <linux/string.h>
  24. /*
  25. * We can't determine type by probing, but if we expect pre-Linux code
  26. * to have set the chip up as a clock (turning on the oscillator and
  27. * setting the date and time), Linux can ignore the non-clock features.
  28. * That's a natural job for a factory or repair bench.
  29. */
  30. enum ds_type {
  31. ds_1307,
  32. ds_1337,
  33. ds_1338,
  34. ds_1339,
  35. ds_1340,
  36. ds_1388,
  37. ds_3231,
  38. m41t00,
  39. mcp794xx,
  40. rx_8025,
  41. last_ds_type /* always last */
  42. /* rs5c372 too? different address... */
  43. };
  44. /* RTC registers don't differ much, except for the century flag */
  45. #define DS1307_REG_SECS 0x00 /* 00-59 */
  46. # define DS1307_BIT_CH 0x80
  47. # define DS1340_BIT_nEOSC 0x80
  48. # define MCP794XX_BIT_ST 0x80
  49. #define DS1307_REG_MIN 0x01 /* 00-59 */
  50. #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
  51. # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */
  52. # define DS1307_BIT_PM 0x20 /* in REG_HOUR */
  53. # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */
  54. # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */
  55. #define DS1307_REG_WDAY 0x03 /* 01-07 */
  56. # define MCP794XX_BIT_VBATEN 0x08
  57. #define DS1307_REG_MDAY 0x04 /* 01-31 */
  58. #define DS1307_REG_MONTH 0x05 /* 01-12 */
  59. # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */
  60. #define DS1307_REG_YEAR 0x06 /* 00-99 */
  61. /*
  62. * Other registers (control, status, alarms, trickle charge, NVRAM, etc)
  63. * start at 7, and they differ a LOT. Only control and status matter for
  64. * basic RTC date and time functionality; be careful using them.
  65. */
  66. #define DS1307_REG_CONTROL 0x07 /* or ds1338 */
  67. # define DS1307_BIT_OUT 0x80
  68. # define DS1338_BIT_OSF 0x20
  69. # define DS1307_BIT_SQWE 0x10
  70. # define DS1307_BIT_RS1 0x02
  71. # define DS1307_BIT_RS0 0x01
  72. #define DS1337_REG_CONTROL 0x0e
  73. # define DS1337_BIT_nEOSC 0x80
  74. # define DS1339_BIT_BBSQI 0x20
  75. # define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */
  76. # define DS1337_BIT_RS2 0x10
  77. # define DS1337_BIT_RS1 0x08
  78. # define DS1337_BIT_INTCN 0x04
  79. # define DS1337_BIT_A2IE 0x02
  80. # define DS1337_BIT_A1IE 0x01
  81. #define DS1340_REG_CONTROL 0x07
  82. # define DS1340_BIT_OUT 0x80
  83. # define DS1340_BIT_FT 0x40
  84. # define DS1340_BIT_CALIB_SIGN 0x20
  85. # define DS1340_M_CALIBRATION 0x1f
  86. #define DS1340_REG_FLAG 0x09
  87. # define DS1340_BIT_OSF 0x80
  88. #define DS1337_REG_STATUS 0x0f
  89. # define DS1337_BIT_OSF 0x80
  90. # define DS1337_BIT_A2I 0x02
  91. # define DS1337_BIT_A1I 0x01
  92. #define DS1339_REG_ALARM1_SECS 0x07
  93. #define DS13XX_TRICKLE_CHARGER_MAGIC 0xa0
  94. #define RX8025_REG_CTRL1 0x0e
  95. # define RX8025_BIT_2412 0x20
  96. #define RX8025_REG_CTRL2 0x0f
  97. # define RX8025_BIT_PON 0x10
  98. # define RX8025_BIT_VDET 0x40
  99. # define RX8025_BIT_XST 0x20
  100. struct ds1307 {
  101. u8 offset; /* register's offset */
  102. u8 regs[11];
  103. u16 nvram_offset;
  104. struct bin_attribute *nvram;
  105. enum ds_type type;
  106. unsigned long flags;
  107. #define HAS_NVRAM 0 /* bit 0 == sysfs file active */
  108. #define HAS_ALARM 1 /* bit 1 == irq claimed */
  109. struct i2c_client *client;
  110. struct rtc_device *rtc;
  111. int wakeirq;
  112. s32 (*read_block_data)(const struct i2c_client *client, u8 command,
  113. u8 length, u8 *values);
  114. s32 (*write_block_data)(const struct i2c_client *client, u8 command,
  115. u8 length, const u8 *values);
  116. };
  117. struct chip_desc {
  118. unsigned alarm:1;
  119. u16 nvram_offset;
  120. u16 nvram_size;
  121. u16 trickle_charger_reg;
  122. u8 trickle_charger_setup;
  123. u8 (*do_trickle_setup)(struct i2c_client *, uint32_t, bool);
  124. };
  125. static u8 do_trickle_setup_ds1339(struct i2c_client *,
  126. uint32_t ohms, bool diode);
  127. static struct chip_desc chips[last_ds_type] = {
  128. [ds_1307] = {
  129. .nvram_offset = 8,
  130. .nvram_size = 56,
  131. },
  132. [ds_1337] = {
  133. .alarm = 1,
  134. },
  135. [ds_1338] = {
  136. .nvram_offset = 8,
  137. .nvram_size = 56,
  138. },
  139. [ds_1339] = {
  140. .alarm = 1,
  141. .trickle_charger_reg = 0x10,
  142. .do_trickle_setup = &do_trickle_setup_ds1339,
  143. },
  144. [ds_1340] = {
  145. .trickle_charger_reg = 0x08,
  146. },
  147. [ds_1388] = {
  148. .trickle_charger_reg = 0x0a,
  149. },
  150. [ds_3231] = {
  151. .alarm = 1,
  152. },
  153. [mcp794xx] = {
  154. .alarm = 1,
  155. /* this is battery backed SRAM */
  156. .nvram_offset = 0x20,
  157. .nvram_size = 0x40,
  158. },
  159. };
  160. static const struct i2c_device_id ds1307_id[] = {
  161. { "ds1307", ds_1307 },
  162. { "ds1337", ds_1337 },
  163. { "ds1338", ds_1338 },
  164. { "ds1339", ds_1339 },
  165. { "ds1388", ds_1388 },
  166. { "ds1340", ds_1340 },
  167. { "ds3231", ds_3231 },
  168. { "m41t00", m41t00 },
  169. { "mcp7940x", mcp794xx },
  170. { "mcp7941x", mcp794xx },
  171. { "pt7c4338", ds_1307 },
  172. { "rx8025", rx_8025 },
  173. { }
  174. };
  175. MODULE_DEVICE_TABLE(i2c, ds1307_id);
  176. /*----------------------------------------------------------------------*/
  177. #define BLOCK_DATA_MAX_TRIES 10
  178. static s32 ds1307_read_block_data_once(const struct i2c_client *client,
  179. u8 command, u8 length, u8 *values)
  180. {
  181. s32 i, data;
  182. for (i = 0; i < length; i++) {
  183. data = i2c_smbus_read_byte_data(client, command + i);
  184. if (data < 0)
  185. return data;
  186. values[i] = data;
  187. }
  188. return i;
  189. }
  190. static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command,
  191. u8 length, u8 *values)
  192. {
  193. u8 oldvalues[255];
  194. s32 ret;
  195. int tries = 0;
  196. dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
  197. ret = ds1307_read_block_data_once(client, command, length, values);
  198. if (ret < 0)
  199. return ret;
  200. do {
  201. if (++tries > BLOCK_DATA_MAX_TRIES) {
  202. dev_err(&client->dev,
  203. "ds1307_read_block_data failed\n");
  204. return -EIO;
  205. }
  206. memcpy(oldvalues, values, length);
  207. ret = ds1307_read_block_data_once(client, command, length,
  208. values);
  209. if (ret < 0)
  210. return ret;
  211. } while (memcmp(oldvalues, values, length));
  212. return length;
  213. }
  214. static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command,
  215. u8 length, const u8 *values)
  216. {
  217. u8 currvalues[255];
  218. int tries = 0;
  219. dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
  220. do {
  221. s32 i, ret;
  222. if (++tries > BLOCK_DATA_MAX_TRIES) {
  223. dev_err(&client->dev,
  224. "ds1307_write_block_data failed\n");
  225. return -EIO;
  226. }
  227. for (i = 0; i < length; i++) {
  228. ret = i2c_smbus_write_byte_data(client, command + i,
  229. values[i]);
  230. if (ret < 0)
  231. return ret;
  232. }
  233. ret = ds1307_read_block_data_once(client, command, length,
  234. currvalues);
  235. if (ret < 0)
  236. return ret;
  237. } while (memcmp(currvalues, values, length));
  238. return length;
  239. }
  240. /*----------------------------------------------------------------------*/
  241. /* These RTC devices are not designed to be connected to a SMbus adapter.
  242. SMbus limits block operations length to 32 bytes, whereas it's not
  243. limited on I2C buses. As a result, accesses may exceed 32 bytes;
  244. in that case, split them into smaller blocks */
  245. static s32 ds1307_native_smbus_write_block_data(const struct i2c_client *client,
  246. u8 command, u8 length, const u8 *values)
  247. {
  248. u8 suboffset = 0;
  249. if (length <= I2C_SMBUS_BLOCK_MAX)
  250. return i2c_smbus_write_i2c_block_data(client,
  251. command, length, values);
  252. while (suboffset < length) {
  253. s32 retval = i2c_smbus_write_i2c_block_data(client,
  254. command + suboffset,
  255. min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
  256. values + suboffset);
  257. if (retval < 0)
  258. return retval;
  259. suboffset += I2C_SMBUS_BLOCK_MAX;
  260. }
  261. return length;
  262. }
  263. static s32 ds1307_native_smbus_read_block_data(const struct i2c_client *client,
  264. u8 command, u8 length, u8 *values)
  265. {
  266. u8 suboffset = 0;
  267. if (length <= I2C_SMBUS_BLOCK_MAX)
  268. return i2c_smbus_read_i2c_block_data(client,
  269. command, length, values);
  270. while (suboffset < length) {
  271. s32 retval = i2c_smbus_read_i2c_block_data(client,
  272. command + suboffset,
  273. min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
  274. values + suboffset);
  275. if (retval < 0)
  276. return retval;
  277. suboffset += I2C_SMBUS_BLOCK_MAX;
  278. }
  279. return length;
  280. }
  281. /*----------------------------------------------------------------------*/
  282. /*
  283. * The ds1337 and ds1339 both have two alarms, but we only use the first
  284. * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm
  285. * signal; ds1339 chips have only one alarm signal.
  286. */
  287. static irqreturn_t ds1307_irq(int irq, void *dev_id)
  288. {
  289. struct i2c_client *client = dev_id;
  290. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  291. struct mutex *lock = &ds1307->rtc->ops_lock;
  292. int stat, control;
  293. mutex_lock(lock);
  294. stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
  295. if (stat < 0)
  296. goto out;
  297. if (stat & DS1337_BIT_A1I) {
  298. stat &= ~DS1337_BIT_A1I;
  299. i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
  300. control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  301. if (control < 0)
  302. goto out;
  303. control &= ~DS1337_BIT_A1IE;
  304. i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
  305. rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
  306. }
  307. out:
  308. mutex_unlock(lock);
  309. return IRQ_HANDLED;
  310. }
  311. /*----------------------------------------------------------------------*/
  312. static int ds1307_get_time(struct device *dev, struct rtc_time *t)
  313. {
  314. struct ds1307 *ds1307 = dev_get_drvdata(dev);
  315. int tmp;
  316. /* read the RTC date and time registers all at once */
  317. tmp = ds1307->read_block_data(ds1307->client,
  318. ds1307->offset, 7, ds1307->regs);
  319. if (tmp != 7) {
  320. dev_err(dev, "%s error %d\n", "read", tmp);
  321. return -EIO;
  322. }
  323. dev_dbg(dev, "%s: %7ph\n", "read", ds1307->regs);
  324. t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
  325. t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
  326. tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
  327. t->tm_hour = bcd2bin(tmp);
  328. t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
  329. t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
  330. tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
  331. t->tm_mon = bcd2bin(tmp) - 1;
  332. /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
  333. t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
  334. dev_dbg(dev, "%s secs=%d, mins=%d, "
  335. "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
  336. "read", t->tm_sec, t->tm_min,
  337. t->tm_hour, t->tm_mday,
  338. t->tm_mon, t->tm_year, t->tm_wday);
  339. /* initial clock setting can be undefined */
  340. return rtc_valid_tm(t);
  341. }
  342. static int ds1307_set_time(struct device *dev, struct rtc_time *t)
  343. {
  344. struct ds1307 *ds1307 = dev_get_drvdata(dev);
  345. int result;
  346. int tmp;
  347. u8 *buf = ds1307->regs;
  348. dev_dbg(dev, "%s secs=%d, mins=%d, "
  349. "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
  350. "write", t->tm_sec, t->tm_min,
  351. t->tm_hour, t->tm_mday,
  352. t->tm_mon, t->tm_year, t->tm_wday);
  353. buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
  354. buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
  355. buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
  356. buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
  357. buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
  358. buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
  359. /* assume 20YY not 19YY */
  360. tmp = t->tm_year - 100;
  361. buf[DS1307_REG_YEAR] = bin2bcd(tmp);
  362. switch (ds1307->type) {
  363. case ds_1337:
  364. case ds_1339:
  365. case ds_3231:
  366. buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
  367. break;
  368. case ds_1340:
  369. buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
  370. | DS1340_BIT_CENTURY;
  371. break;
  372. case mcp794xx:
  373. /*
  374. * these bits were cleared when preparing the date/time
  375. * values and need to be set again before writing the
  376. * buffer out to the device.
  377. */
  378. buf[DS1307_REG_SECS] |= MCP794XX_BIT_ST;
  379. buf[DS1307_REG_WDAY] |= MCP794XX_BIT_VBATEN;
  380. break;
  381. default:
  382. break;
  383. }
  384. dev_dbg(dev, "%s: %7ph\n", "write", buf);
  385. result = ds1307->write_block_data(ds1307->client,
  386. ds1307->offset, 7, buf);
  387. if (result < 0) {
  388. dev_err(dev, "%s error %d\n", "write", result);
  389. return result;
  390. }
  391. return 0;
  392. }
  393. static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  394. {
  395. struct i2c_client *client = to_i2c_client(dev);
  396. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  397. int ret;
  398. if (!test_bit(HAS_ALARM, &ds1307->flags))
  399. return -EINVAL;
  400. /* read all ALARM1, ALARM2, and status registers at once */
  401. ret = ds1307->read_block_data(client,
  402. DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
  403. if (ret != 9) {
  404. dev_err(dev, "%s error %d\n", "alarm read", ret);
  405. return -EIO;
  406. }
  407. dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
  408. "alarm read",
  409. ds1307->regs[0], ds1307->regs[1],
  410. ds1307->regs[2], ds1307->regs[3],
  411. ds1307->regs[4], ds1307->regs[5],
  412. ds1307->regs[6], ds1307->regs[7],
  413. ds1307->regs[8]);
  414. /*
  415. * report alarm time (ALARM1); assume 24 hour and day-of-month modes,
  416. * and that all four fields are checked matches
  417. */
  418. t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
  419. t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
  420. t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
  421. t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
  422. t->time.tm_mon = -1;
  423. t->time.tm_year = -1;
  424. t->time.tm_wday = -1;
  425. t->time.tm_yday = -1;
  426. t->time.tm_isdst = -1;
  427. /* ... and status */
  428. t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
  429. t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
  430. dev_dbg(dev, "%s secs=%d, mins=%d, "
  431. "hours=%d, mday=%d, enabled=%d, pending=%d\n",
  432. "alarm read", t->time.tm_sec, t->time.tm_min,
  433. t->time.tm_hour, t->time.tm_mday,
  434. t->enabled, t->pending);
  435. return 0;
  436. }
  437. static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  438. {
  439. struct i2c_client *client = to_i2c_client(dev);
  440. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  441. unsigned char *buf = ds1307->regs;
  442. u8 control, status;
  443. int ret;
  444. if (!test_bit(HAS_ALARM, &ds1307->flags))
  445. return -EINVAL;
  446. dev_dbg(dev, "%s secs=%d, mins=%d, "
  447. "hours=%d, mday=%d, enabled=%d, pending=%d\n",
  448. "alarm set", t->time.tm_sec, t->time.tm_min,
  449. t->time.tm_hour, t->time.tm_mday,
  450. t->enabled, t->pending);
  451. /* read current status of both alarms and the chip */
  452. ret = ds1307->read_block_data(client,
  453. DS1339_REG_ALARM1_SECS, 9, buf);
  454. if (ret != 9) {
  455. dev_err(dev, "%s error %d\n", "alarm write", ret);
  456. return -EIO;
  457. }
  458. control = ds1307->regs[7];
  459. status = ds1307->regs[8];
  460. dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
  461. "alarm set (old status)",
  462. ds1307->regs[0], ds1307->regs[1],
  463. ds1307->regs[2], ds1307->regs[3],
  464. ds1307->regs[4], ds1307->regs[5],
  465. ds1307->regs[6], control, status);
  466. /* set ALARM1, using 24 hour and day-of-month modes */
  467. buf[0] = bin2bcd(t->time.tm_sec);
  468. buf[1] = bin2bcd(t->time.tm_min);
  469. buf[2] = bin2bcd(t->time.tm_hour);
  470. buf[3] = bin2bcd(t->time.tm_mday);
  471. /* set ALARM2 to non-garbage */
  472. buf[4] = 0;
  473. buf[5] = 0;
  474. buf[6] = 0;
  475. /* optionally enable ALARM1 */
  476. buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
  477. if (t->enabled) {
  478. dev_dbg(dev, "alarm IRQ armed\n");
  479. buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
  480. }
  481. buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
  482. ret = ds1307->write_block_data(client,
  483. DS1339_REG_ALARM1_SECS, 9, buf);
  484. if (ret < 0) {
  485. dev_err(dev, "can't set alarm time\n");
  486. return ret;
  487. }
  488. return 0;
  489. }
  490. static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
  491. {
  492. struct i2c_client *client = to_i2c_client(dev);
  493. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  494. int ret;
  495. if (!test_bit(HAS_ALARM, &ds1307->flags))
  496. return -ENOTTY;
  497. ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  498. if (ret < 0)
  499. return ret;
  500. if (enabled)
  501. ret |= DS1337_BIT_A1IE;
  502. else
  503. ret &= ~DS1337_BIT_A1IE;
  504. ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret);
  505. if (ret < 0)
  506. return ret;
  507. return 0;
  508. }
  509. static const struct rtc_class_ops ds13xx_rtc_ops = {
  510. .read_time = ds1307_get_time,
  511. .set_time = ds1307_set_time,
  512. .read_alarm = ds1337_read_alarm,
  513. .set_alarm = ds1337_set_alarm,
  514. .alarm_irq_enable = ds1307_alarm_irq_enable,
  515. };
  516. /*----------------------------------------------------------------------*/
  517. /*
  518. * Alarm support for mcp794xx devices.
  519. */
  520. #define MCP794XX_REG_CONTROL 0x07
  521. # define MCP794XX_BIT_ALM0_EN 0x10
  522. # define MCP794XX_BIT_ALM1_EN 0x20
  523. #define MCP794XX_REG_ALARM0_BASE 0x0a
  524. #define MCP794XX_REG_ALARM0_CTRL 0x0d
  525. #define MCP794XX_REG_ALARM1_BASE 0x11
  526. #define MCP794XX_REG_ALARM1_CTRL 0x14
  527. # define MCP794XX_BIT_ALMX_IF (1 << 3)
  528. # define MCP794XX_BIT_ALMX_C0 (1 << 4)
  529. # define MCP794XX_BIT_ALMX_C1 (1 << 5)
  530. # define MCP794XX_BIT_ALMX_C2 (1 << 6)
  531. # define MCP794XX_BIT_ALMX_POL (1 << 7)
  532. # define MCP794XX_MSK_ALMX_MATCH (MCP794XX_BIT_ALMX_C0 | \
  533. MCP794XX_BIT_ALMX_C1 | \
  534. MCP794XX_BIT_ALMX_C2)
  535. static irqreturn_t mcp794xx_irq(int irq, void *dev_id)
  536. {
  537. struct i2c_client *client = dev_id;
  538. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  539. struct mutex *lock = &ds1307->rtc->ops_lock;
  540. int reg, ret;
  541. mutex_lock(lock);
  542. /* Check and clear alarm 0 interrupt flag. */
  543. reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_ALARM0_CTRL);
  544. if (reg < 0)
  545. goto out;
  546. if (!(reg & MCP794XX_BIT_ALMX_IF))
  547. goto out;
  548. reg &= ~MCP794XX_BIT_ALMX_IF;
  549. ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_ALARM0_CTRL, reg);
  550. if (ret < 0)
  551. goto out;
  552. /* Disable alarm 0. */
  553. reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
  554. if (reg < 0)
  555. goto out;
  556. reg &= ~MCP794XX_BIT_ALM0_EN;
  557. ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
  558. if (ret < 0)
  559. goto out;
  560. rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
  561. out:
  562. mutex_unlock(lock);
  563. return IRQ_HANDLED;
  564. }
  565. static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  566. {
  567. struct i2c_client *client = to_i2c_client(dev);
  568. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  569. u8 *regs = ds1307->regs;
  570. int ret;
  571. if (!test_bit(HAS_ALARM, &ds1307->flags))
  572. return -EINVAL;
  573. /* Read control and alarm 0 registers. */
  574. ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
  575. if (ret < 0)
  576. return ret;
  577. t->enabled = !!(regs[0] & MCP794XX_BIT_ALM0_EN);
  578. /* Report alarm 0 time assuming 24-hour and day-of-month modes. */
  579. t->time.tm_sec = bcd2bin(ds1307->regs[3] & 0x7f);
  580. t->time.tm_min = bcd2bin(ds1307->regs[4] & 0x7f);
  581. t->time.tm_hour = bcd2bin(ds1307->regs[5] & 0x3f);
  582. t->time.tm_wday = bcd2bin(ds1307->regs[6] & 0x7) - 1;
  583. t->time.tm_mday = bcd2bin(ds1307->regs[7] & 0x3f);
  584. t->time.tm_mon = bcd2bin(ds1307->regs[8] & 0x1f) - 1;
  585. t->time.tm_year = -1;
  586. t->time.tm_yday = -1;
  587. t->time.tm_isdst = -1;
  588. dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
  589. "enabled=%d polarity=%d irq=%d match=%d\n", __func__,
  590. t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
  591. t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled,
  592. !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_POL),
  593. !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_IF),
  594. (ds1307->regs[6] & MCP794XX_MSK_ALMX_MATCH) >> 4);
  595. return 0;
  596. }
  597. static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  598. {
  599. struct i2c_client *client = to_i2c_client(dev);
  600. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  601. unsigned char *regs = ds1307->regs;
  602. int ret;
  603. if (!test_bit(HAS_ALARM, &ds1307->flags))
  604. return -EINVAL;
  605. dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
  606. "enabled=%d pending=%d\n", __func__,
  607. t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
  608. t->time.tm_wday, t->time.tm_mday, t->time.tm_mon,
  609. t->enabled, t->pending);
  610. /* Read control and alarm 0 registers. */
  611. ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
  612. if (ret < 0)
  613. return ret;
  614. /* Set alarm 0, using 24-hour and day-of-month modes. */
  615. regs[3] = bin2bcd(t->time.tm_sec);
  616. regs[4] = bin2bcd(t->time.tm_min);
  617. regs[5] = bin2bcd(t->time.tm_hour);
  618. regs[6] = bin2bcd(t->time.tm_wday) + 1;
  619. regs[7] = bin2bcd(t->time.tm_mday);
  620. regs[8] = bin2bcd(t->time.tm_mon) + 1;
  621. /* Clear the alarm 0 interrupt flag. */
  622. regs[6] &= ~MCP794XX_BIT_ALMX_IF;
  623. /* Set alarm match: second, minute, hour, day, date, month. */
  624. regs[6] |= MCP794XX_MSK_ALMX_MATCH;
  625. /* Disable interrupt. We will not enable until completely programmed */
  626. regs[0] &= ~MCP794XX_BIT_ALM0_EN;
  627. ret = ds1307->write_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
  628. if (ret < 0)
  629. return ret;
  630. if (!t->enabled)
  631. return 0;
  632. regs[0] |= MCP794XX_BIT_ALM0_EN;
  633. return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, regs[0]);
  634. }
  635. static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled)
  636. {
  637. struct i2c_client *client = to_i2c_client(dev);
  638. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  639. int reg;
  640. if (!test_bit(HAS_ALARM, &ds1307->flags))
  641. return -EINVAL;
  642. reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
  643. if (reg < 0)
  644. return reg;
  645. if (enabled)
  646. reg |= MCP794XX_BIT_ALM0_EN;
  647. else
  648. reg &= ~MCP794XX_BIT_ALM0_EN;
  649. return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
  650. }
  651. static const struct rtc_class_ops mcp794xx_rtc_ops = {
  652. .read_time = ds1307_get_time,
  653. .set_time = ds1307_set_time,
  654. .read_alarm = mcp794xx_read_alarm,
  655. .set_alarm = mcp794xx_set_alarm,
  656. .alarm_irq_enable = mcp794xx_alarm_irq_enable,
  657. };
  658. /*----------------------------------------------------------------------*/
  659. static ssize_t
  660. ds1307_nvram_read(struct file *filp, struct kobject *kobj,
  661. struct bin_attribute *attr,
  662. char *buf, loff_t off, size_t count)
  663. {
  664. struct i2c_client *client;
  665. struct ds1307 *ds1307;
  666. int result;
  667. client = kobj_to_i2c_client(kobj);
  668. ds1307 = i2c_get_clientdata(client);
  669. result = ds1307->read_block_data(client, ds1307->nvram_offset + off,
  670. count, buf);
  671. if (result < 0)
  672. dev_err(&client->dev, "%s error %d\n", "nvram read", result);
  673. return result;
  674. }
  675. static ssize_t
  676. ds1307_nvram_write(struct file *filp, struct kobject *kobj,
  677. struct bin_attribute *attr,
  678. char *buf, loff_t off, size_t count)
  679. {
  680. struct i2c_client *client;
  681. struct ds1307 *ds1307;
  682. int result;
  683. client = kobj_to_i2c_client(kobj);
  684. ds1307 = i2c_get_clientdata(client);
  685. result = ds1307->write_block_data(client, ds1307->nvram_offset + off,
  686. count, buf);
  687. if (result < 0) {
  688. dev_err(&client->dev, "%s error %d\n", "nvram write", result);
  689. return result;
  690. }
  691. return count;
  692. }
  693. /*----------------------------------------------------------------------*/
  694. static u8 do_trickle_setup_ds1339(struct i2c_client *client,
  695. uint32_t ohms, bool diode)
  696. {
  697. u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE :
  698. DS1307_TRICKLE_CHARGER_NO_DIODE;
  699. switch (ohms) {
  700. case 250:
  701. setup |= DS1307_TRICKLE_CHARGER_250_OHM;
  702. break;
  703. case 2000:
  704. setup |= DS1307_TRICKLE_CHARGER_2K_OHM;
  705. break;
  706. case 4000:
  707. setup |= DS1307_TRICKLE_CHARGER_4K_OHM;
  708. break;
  709. default:
  710. dev_warn(&client->dev,
  711. "Unsupported ohm value %u in dt\n", ohms);
  712. return 0;
  713. }
  714. return setup;
  715. }
  716. static void ds1307_trickle_of_init(struct i2c_client *client,
  717. struct chip_desc *chip)
  718. {
  719. uint32_t ohms = 0;
  720. bool diode = true;
  721. if (!chip->do_trickle_setup)
  722. goto out;
  723. if (of_property_read_u32(client->dev.of_node, "trickle-resistor-ohms" , &ohms))
  724. goto out;
  725. if (of_property_read_bool(client->dev.of_node, "trickle-diode-disable"))
  726. diode = false;
  727. chip->trickle_charger_setup = chip->do_trickle_setup(client,
  728. ohms, diode);
  729. out:
  730. return;
  731. }
  732. static int ds1307_probe(struct i2c_client *client,
  733. const struct i2c_device_id *id)
  734. {
  735. struct ds1307 *ds1307;
  736. int err = -ENODEV;
  737. int tmp;
  738. struct chip_desc *chip = &chips[id->driver_data];
  739. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  740. bool want_irq = false;
  741. unsigned char *buf;
  742. struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev);
  743. irq_handler_t irq_handler = ds1307_irq;
  744. static const int bbsqi_bitpos[] = {
  745. [ds_1337] = 0,
  746. [ds_1339] = DS1339_BIT_BBSQI,
  747. [ds_3231] = DS3231_BIT_BBSQW,
  748. };
  749. const struct rtc_class_ops *rtc_ops = &ds13xx_rtc_ops;
  750. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
  751. && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
  752. return -EIO;
  753. ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL);
  754. if (!ds1307)
  755. return -ENOMEM;
  756. i2c_set_clientdata(client, ds1307);
  757. ds1307->client = client;
  758. ds1307->type = id->driver_data;
  759. if (!pdata && client->dev.of_node)
  760. ds1307_trickle_of_init(client, chip);
  761. else if (pdata && pdata->trickle_charger_setup)
  762. chip->trickle_charger_setup = pdata->trickle_charger_setup;
  763. if (chip->trickle_charger_setup && chip->trickle_charger_reg) {
  764. dev_dbg(&client->dev, "writing trickle charger info 0x%x to 0x%x\n",
  765. DS13XX_TRICKLE_CHARGER_MAGIC | chip->trickle_charger_setup,
  766. chip->trickle_charger_reg);
  767. i2c_smbus_write_byte_data(client, chip->trickle_charger_reg,
  768. DS13XX_TRICKLE_CHARGER_MAGIC |
  769. chip->trickle_charger_setup);
  770. }
  771. buf = ds1307->regs;
  772. if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
  773. ds1307->read_block_data = ds1307_native_smbus_read_block_data;
  774. ds1307->write_block_data = ds1307_native_smbus_write_block_data;
  775. } else {
  776. ds1307->read_block_data = ds1307_read_block_data;
  777. ds1307->write_block_data = ds1307_write_block_data;
  778. }
  779. switch (ds1307->type) {
  780. case ds_1337:
  781. case ds_1339:
  782. case ds_3231:
  783. /* get registers that the "rtc" read below won't read... */
  784. tmp = ds1307->read_block_data(ds1307->client,
  785. DS1337_REG_CONTROL, 2, buf);
  786. if (tmp != 2) {
  787. dev_dbg(&client->dev, "read error %d\n", tmp);
  788. err = -EIO;
  789. goto exit;
  790. }
  791. /* oscillator off? turn it on, so clock can tick. */
  792. if (ds1307->regs[0] & DS1337_BIT_nEOSC)
  793. ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
  794. /*
  795. * Using IRQ? Disable the square wave and both alarms.
  796. * For some variants, be sure alarms can trigger when we're
  797. * running on Vbackup (BBSQI/BBSQW)
  798. */
  799. if (ds1307->client->irq > 0 && chip->alarm) {
  800. ds1307->regs[0] |= DS1337_BIT_INTCN
  801. | bbsqi_bitpos[ds1307->type];
  802. ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
  803. want_irq = true;
  804. }
  805. i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
  806. ds1307->regs[0]);
  807. /* oscillator fault? clear flag, and warn */
  808. if (ds1307->regs[1] & DS1337_BIT_OSF) {
  809. i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
  810. ds1307->regs[1] & ~DS1337_BIT_OSF);
  811. dev_warn(&client->dev, "SET TIME!\n");
  812. }
  813. break;
  814. case rx_8025:
  815. tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
  816. RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
  817. if (tmp != 2) {
  818. dev_dbg(&client->dev, "read error %d\n", tmp);
  819. err = -EIO;
  820. goto exit;
  821. }
  822. /* oscillator off? turn it on, so clock can tick. */
  823. if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
  824. ds1307->regs[1] |= RX8025_BIT_XST;
  825. i2c_smbus_write_byte_data(client,
  826. RX8025_REG_CTRL2 << 4 | 0x08,
  827. ds1307->regs[1]);
  828. dev_warn(&client->dev,
  829. "oscillator stop detected - SET TIME!\n");
  830. }
  831. if (ds1307->regs[1] & RX8025_BIT_PON) {
  832. ds1307->regs[1] &= ~RX8025_BIT_PON;
  833. i2c_smbus_write_byte_data(client,
  834. RX8025_REG_CTRL2 << 4 | 0x08,
  835. ds1307->regs[1]);
  836. dev_warn(&client->dev, "power-on detected\n");
  837. }
  838. if (ds1307->regs[1] & RX8025_BIT_VDET) {
  839. ds1307->regs[1] &= ~RX8025_BIT_VDET;
  840. i2c_smbus_write_byte_data(client,
  841. RX8025_REG_CTRL2 << 4 | 0x08,
  842. ds1307->regs[1]);
  843. dev_warn(&client->dev, "voltage drop detected\n");
  844. }
  845. /* make sure we are running in 24hour mode */
  846. if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
  847. u8 hour;
  848. /* switch to 24 hour mode */
  849. i2c_smbus_write_byte_data(client,
  850. RX8025_REG_CTRL1 << 4 | 0x08,
  851. ds1307->regs[0] |
  852. RX8025_BIT_2412);
  853. tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
  854. RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
  855. if (tmp != 2) {
  856. dev_dbg(&client->dev, "read error %d\n", tmp);
  857. err = -EIO;
  858. goto exit;
  859. }
  860. /* correct hour */
  861. hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
  862. if (hour == 12)
  863. hour = 0;
  864. if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
  865. hour += 12;
  866. i2c_smbus_write_byte_data(client,
  867. DS1307_REG_HOUR << 4 | 0x08,
  868. hour);
  869. }
  870. break;
  871. case ds_1388:
  872. ds1307->offset = 1; /* Seconds starts at 1 */
  873. break;
  874. case mcp794xx:
  875. rtc_ops = &mcp794xx_rtc_ops;
  876. if (ds1307->client->irq > 0 && chip->alarm) {
  877. irq_handler = mcp794xx_irq;
  878. want_irq = true;
  879. }
  880. break;
  881. default:
  882. break;
  883. }
  884. read_rtc:
  885. /* read RTC registers */
  886. tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf);
  887. if (tmp != 8) {
  888. dev_dbg(&client->dev, "read error %d\n", tmp);
  889. err = -EIO;
  890. goto exit;
  891. }
  892. /*
  893. * minimal sanity checking; some chips (like DS1340) don't
  894. * specify the extra bits as must-be-zero, but there are
  895. * still a few values that are clearly out-of-range.
  896. */
  897. tmp = ds1307->regs[DS1307_REG_SECS];
  898. switch (ds1307->type) {
  899. case ds_1307:
  900. case m41t00:
  901. /* clock halted? turn it on, so clock can tick. */
  902. if (tmp & DS1307_BIT_CH) {
  903. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  904. dev_warn(&client->dev, "SET TIME!\n");
  905. goto read_rtc;
  906. }
  907. break;
  908. case ds_1338:
  909. /* clock halted? turn it on, so clock can tick. */
  910. if (tmp & DS1307_BIT_CH)
  911. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  912. /* oscillator fault? clear flag, and warn */
  913. if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
  914. i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
  915. ds1307->regs[DS1307_REG_CONTROL]
  916. & ~DS1338_BIT_OSF);
  917. dev_warn(&client->dev, "SET TIME!\n");
  918. goto read_rtc;
  919. }
  920. break;
  921. case ds_1340:
  922. /* clock halted? turn it on, so clock can tick. */
  923. if (tmp & DS1340_BIT_nEOSC)
  924. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  925. tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
  926. if (tmp < 0) {
  927. dev_dbg(&client->dev, "read error %d\n", tmp);
  928. err = -EIO;
  929. goto exit;
  930. }
  931. /* oscillator fault? clear flag, and warn */
  932. if (tmp & DS1340_BIT_OSF) {
  933. i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
  934. dev_warn(&client->dev, "SET TIME!\n");
  935. }
  936. break;
  937. case mcp794xx:
  938. /* make sure that the backup battery is enabled */
  939. if (!(ds1307->regs[DS1307_REG_WDAY] & MCP794XX_BIT_VBATEN)) {
  940. i2c_smbus_write_byte_data(client, DS1307_REG_WDAY,
  941. ds1307->regs[DS1307_REG_WDAY]
  942. | MCP794XX_BIT_VBATEN);
  943. }
  944. /* clock halted? turn it on, so clock can tick. */
  945. if (!(tmp & MCP794XX_BIT_ST)) {
  946. i2c_smbus_write_byte_data(client, DS1307_REG_SECS,
  947. MCP794XX_BIT_ST);
  948. dev_warn(&client->dev, "SET TIME!\n");
  949. goto read_rtc;
  950. }
  951. break;
  952. default:
  953. break;
  954. }
  955. tmp = ds1307->regs[DS1307_REG_HOUR];
  956. switch (ds1307->type) {
  957. case ds_1340:
  958. case m41t00:
  959. /*
  960. * NOTE: ignores century bits; fix before deploying
  961. * systems that will run through year 2100.
  962. */
  963. break;
  964. case rx_8025:
  965. break;
  966. default:
  967. if (!(tmp & DS1307_BIT_12HR))
  968. break;
  969. /*
  970. * Be sure we're in 24 hour mode. Multi-master systems
  971. * take note...
  972. */
  973. tmp = bcd2bin(tmp & 0x1f);
  974. if (tmp == 12)
  975. tmp = 0;
  976. if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
  977. tmp += 12;
  978. i2c_smbus_write_byte_data(client,
  979. ds1307->offset + DS1307_REG_HOUR,
  980. bin2bcd(tmp));
  981. }
  982. device_set_wakeup_capable(&client->dev, want_irq);
  983. ds1307->rtc = devm_rtc_device_register(&client->dev, client->name,
  984. rtc_ops, THIS_MODULE);
  985. if (IS_ERR(ds1307->rtc)) {
  986. return PTR_ERR(ds1307->rtc);
  987. }
  988. if (want_irq) {
  989. struct device_node *node = client->dev.of_node;
  990. err = devm_request_threaded_irq(&client->dev,
  991. client->irq, NULL, irq_handler,
  992. IRQF_SHARED | IRQF_ONESHOT,
  993. ds1307->rtc->name, client);
  994. if (err) {
  995. client->irq = 0;
  996. dev_err(&client->dev, "unable to request IRQ!\n");
  997. goto no_irq;
  998. }
  999. set_bit(HAS_ALARM, &ds1307->flags);
  1000. dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
  1001. /* Currently supported by OF code only! */
  1002. if (!node)
  1003. goto no_irq;
  1004. err = of_irq_get(node, 1);
  1005. if (err <= 0) {
  1006. if (err == -EPROBE_DEFER)
  1007. goto exit;
  1008. goto no_irq;
  1009. }
  1010. ds1307->wakeirq = err;
  1011. err = dev_pm_set_dedicated_wake_irq(&client->dev,
  1012. ds1307->wakeirq);
  1013. if (err) {
  1014. dev_err(&client->dev, "unable to setup wakeIRQ %d!\n",
  1015. err);
  1016. goto exit;
  1017. }
  1018. }
  1019. no_irq:
  1020. if (chip->nvram_size) {
  1021. ds1307->nvram = devm_kzalloc(&client->dev,
  1022. sizeof(struct bin_attribute),
  1023. GFP_KERNEL);
  1024. if (!ds1307->nvram) {
  1025. dev_err(&client->dev, "cannot allocate memory for nvram sysfs\n");
  1026. } else {
  1027. ds1307->nvram->attr.name = "nvram";
  1028. ds1307->nvram->attr.mode = S_IRUGO | S_IWUSR;
  1029. sysfs_bin_attr_init(ds1307->nvram);
  1030. ds1307->nvram->read = ds1307_nvram_read;
  1031. ds1307->nvram->write = ds1307_nvram_write;
  1032. ds1307->nvram->size = chip->nvram_size;
  1033. ds1307->nvram_offset = chip->nvram_offset;
  1034. err = sysfs_create_bin_file(&client->dev.kobj,
  1035. ds1307->nvram);
  1036. if (err) {
  1037. dev_err(&client->dev,
  1038. "unable to create sysfs file: %s\n",
  1039. ds1307->nvram->attr.name);
  1040. } else {
  1041. set_bit(HAS_NVRAM, &ds1307->flags);
  1042. dev_info(&client->dev, "%zu bytes nvram\n",
  1043. ds1307->nvram->size);
  1044. }
  1045. }
  1046. }
  1047. return 0;
  1048. exit:
  1049. return err;
  1050. }
  1051. static int ds1307_remove(struct i2c_client *client)
  1052. {
  1053. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  1054. if (ds1307->wakeirq)
  1055. dev_pm_clear_wake_irq(&client->dev);
  1056. if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
  1057. sysfs_remove_bin_file(&client->dev.kobj, ds1307->nvram);
  1058. return 0;
  1059. }
  1060. static struct i2c_driver ds1307_driver = {
  1061. .driver = {
  1062. .name = "rtc-ds1307",
  1063. },
  1064. .probe = ds1307_probe,
  1065. .remove = ds1307_remove,
  1066. .id_table = ds1307_id,
  1067. };
  1068. module_i2c_driver(ds1307_driver);
  1069. MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
  1070. MODULE_LICENSE("GPL");