pci-sysfs.c 39 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/export.h>
  21. #include <linux/topology.h>
  22. #include <linux/mm.h>
  23. #include <linux/fs.h>
  24. #include <linux/capability.h>
  25. #include <linux/security.h>
  26. #include <linux/pci-aspm.h>
  27. #include <linux/slab.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/pm_runtime.h>
  30. #include <linux/of.h>
  31. #include "pci.h"
  32. static int sysfs_initialized; /* = 0 */
  33. /* show configuration fields */
  34. #define pci_config_attr(field, format_string) \
  35. static ssize_t \
  36. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  37. { \
  38. struct pci_dev *pdev; \
  39. \
  40. pdev = to_pci_dev(dev); \
  41. return sprintf(buf, format_string, pdev->field); \
  42. } \
  43. static DEVICE_ATTR_RO(field)
  44. pci_config_attr(vendor, "0x%04x\n");
  45. pci_config_attr(device, "0x%04x\n");
  46. pci_config_attr(subsystem_vendor, "0x%04x\n");
  47. pci_config_attr(subsystem_device, "0x%04x\n");
  48. pci_config_attr(class, "0x%06x\n");
  49. pci_config_attr(irq, "%u\n");
  50. static ssize_t broken_parity_status_show(struct device *dev,
  51. struct device_attribute *attr,
  52. char *buf)
  53. {
  54. struct pci_dev *pdev = to_pci_dev(dev);
  55. return sprintf(buf, "%u\n", pdev->broken_parity_status);
  56. }
  57. static ssize_t broken_parity_status_store(struct device *dev,
  58. struct device_attribute *attr,
  59. const char *buf, size_t count)
  60. {
  61. struct pci_dev *pdev = to_pci_dev(dev);
  62. unsigned long val;
  63. if (kstrtoul(buf, 0, &val) < 0)
  64. return -EINVAL;
  65. pdev->broken_parity_status = !!val;
  66. return count;
  67. }
  68. static DEVICE_ATTR_RW(broken_parity_status);
  69. static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
  70. struct device_attribute *attr, char *buf)
  71. {
  72. const struct cpumask *mask;
  73. #ifdef CONFIG_NUMA
  74. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  75. cpumask_of_node(dev_to_node(dev));
  76. #else
  77. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  78. #endif
  79. return cpumap_print_to_pagebuf(list, buf, mask);
  80. }
  81. static ssize_t local_cpus_show(struct device *dev,
  82. struct device_attribute *attr, char *buf)
  83. {
  84. return pci_dev_show_local_cpu(dev, false, attr, buf);
  85. }
  86. static DEVICE_ATTR_RO(local_cpus);
  87. static ssize_t local_cpulist_show(struct device *dev,
  88. struct device_attribute *attr, char *buf)
  89. {
  90. return pci_dev_show_local_cpu(dev, true, attr, buf);
  91. }
  92. static DEVICE_ATTR_RO(local_cpulist);
  93. /*
  94. * PCI Bus Class Devices
  95. */
  96. static ssize_t cpuaffinity_show(struct device *dev,
  97. struct device_attribute *attr, char *buf)
  98. {
  99. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  100. return cpumap_print_to_pagebuf(false, buf, cpumask);
  101. }
  102. static DEVICE_ATTR_RO(cpuaffinity);
  103. static ssize_t cpulistaffinity_show(struct device *dev,
  104. struct device_attribute *attr, char *buf)
  105. {
  106. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  107. return cpumap_print_to_pagebuf(true, buf, cpumask);
  108. }
  109. static DEVICE_ATTR_RO(cpulistaffinity);
  110. /* show resources */
  111. static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
  112. char *buf)
  113. {
  114. struct pci_dev *pci_dev = to_pci_dev(dev);
  115. char *str = buf;
  116. int i;
  117. int max;
  118. resource_size_t start, end;
  119. if (pci_dev->subordinate)
  120. max = DEVICE_COUNT_RESOURCE;
  121. else
  122. max = PCI_BRIDGE_RESOURCES;
  123. for (i = 0; i < max; i++) {
  124. struct resource *res = &pci_dev->resource[i];
  125. pci_resource_to_user(pci_dev, i, res, &start, &end);
  126. str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
  127. (unsigned long long)start,
  128. (unsigned long long)end,
  129. (unsigned long long)res->flags);
  130. }
  131. return (str - buf);
  132. }
  133. static DEVICE_ATTR_RO(resource);
  134. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
  135. char *buf)
  136. {
  137. struct pci_dev *pci_dev = to_pci_dev(dev);
  138. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
  139. pci_dev->vendor, pci_dev->device,
  140. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  141. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  142. (u8)(pci_dev->class));
  143. }
  144. static DEVICE_ATTR_RO(modalias);
  145. static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
  146. const char *buf, size_t count)
  147. {
  148. struct pci_dev *pdev = to_pci_dev(dev);
  149. unsigned long val;
  150. ssize_t result = kstrtoul(buf, 0, &val);
  151. if (result < 0)
  152. return result;
  153. /* this can crash the machine when done on the "wrong" device */
  154. if (!capable(CAP_SYS_ADMIN))
  155. return -EPERM;
  156. if (!val) {
  157. if (pci_is_enabled(pdev))
  158. pci_disable_device(pdev);
  159. else
  160. result = -EIO;
  161. } else
  162. result = pci_enable_device(pdev);
  163. return result < 0 ? result : count;
  164. }
  165. static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
  166. char *buf)
  167. {
  168. struct pci_dev *pdev;
  169. pdev = to_pci_dev(dev);
  170. return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
  171. }
  172. static DEVICE_ATTR_RW(enable);
  173. #ifdef CONFIG_NUMA
  174. static ssize_t numa_node_store(struct device *dev,
  175. struct device_attribute *attr, const char *buf,
  176. size_t count)
  177. {
  178. struct pci_dev *pdev = to_pci_dev(dev);
  179. int node, ret;
  180. if (!capable(CAP_SYS_ADMIN))
  181. return -EPERM;
  182. ret = kstrtoint(buf, 0, &node);
  183. if (ret)
  184. return ret;
  185. if (!node_online(node))
  186. return -EINVAL;
  187. add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
  188. dev_alert(&pdev->dev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
  189. node);
  190. dev->numa_node = node;
  191. return count;
  192. }
  193. static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
  194. char *buf)
  195. {
  196. return sprintf(buf, "%d\n", dev->numa_node);
  197. }
  198. static DEVICE_ATTR_RW(numa_node);
  199. #endif
  200. static ssize_t dma_mask_bits_show(struct device *dev,
  201. struct device_attribute *attr, char *buf)
  202. {
  203. struct pci_dev *pdev = to_pci_dev(dev);
  204. return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
  205. }
  206. static DEVICE_ATTR_RO(dma_mask_bits);
  207. static ssize_t consistent_dma_mask_bits_show(struct device *dev,
  208. struct device_attribute *attr,
  209. char *buf)
  210. {
  211. return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
  212. }
  213. static DEVICE_ATTR_RO(consistent_dma_mask_bits);
  214. static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
  215. char *buf)
  216. {
  217. struct pci_dev *pdev = to_pci_dev(dev);
  218. struct pci_bus *subordinate = pdev->subordinate;
  219. return sprintf(buf, "%u\n", subordinate ?
  220. !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
  221. : !pdev->no_msi);
  222. }
  223. static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
  224. const char *buf, size_t count)
  225. {
  226. struct pci_dev *pdev = to_pci_dev(dev);
  227. struct pci_bus *subordinate = pdev->subordinate;
  228. unsigned long val;
  229. if (kstrtoul(buf, 0, &val) < 0)
  230. return -EINVAL;
  231. if (!capable(CAP_SYS_ADMIN))
  232. return -EPERM;
  233. /*
  234. * "no_msi" and "bus_flags" only affect what happens when a driver
  235. * requests MSI or MSI-X. They don't affect any drivers that have
  236. * already requested MSI or MSI-X.
  237. */
  238. if (!subordinate) {
  239. pdev->no_msi = !val;
  240. dev_info(&pdev->dev, "MSI/MSI-X %s for future drivers\n",
  241. val ? "allowed" : "disallowed");
  242. return count;
  243. }
  244. if (val)
  245. subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
  246. else
  247. subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
  248. dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
  249. val ? "allowed" : "disallowed");
  250. return count;
  251. }
  252. static DEVICE_ATTR_RW(msi_bus);
  253. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  254. size_t count)
  255. {
  256. unsigned long val;
  257. struct pci_bus *b = NULL;
  258. if (kstrtoul(buf, 0, &val) < 0)
  259. return -EINVAL;
  260. if (val) {
  261. pci_lock_rescan_remove();
  262. while ((b = pci_find_next_bus(b)) != NULL)
  263. pci_rescan_bus(b);
  264. pci_unlock_rescan_remove();
  265. }
  266. return count;
  267. }
  268. static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
  269. static struct attribute *pci_bus_attrs[] = {
  270. &bus_attr_rescan.attr,
  271. NULL,
  272. };
  273. static const struct attribute_group pci_bus_group = {
  274. .attrs = pci_bus_attrs,
  275. };
  276. const struct attribute_group *pci_bus_groups[] = {
  277. &pci_bus_group,
  278. NULL,
  279. };
  280. static ssize_t dev_rescan_store(struct device *dev,
  281. struct device_attribute *attr, const char *buf,
  282. size_t count)
  283. {
  284. unsigned long val;
  285. struct pci_dev *pdev = to_pci_dev(dev);
  286. if (kstrtoul(buf, 0, &val) < 0)
  287. return -EINVAL;
  288. if (val) {
  289. pci_lock_rescan_remove();
  290. pci_rescan_bus(pdev->bus);
  291. pci_unlock_rescan_remove();
  292. }
  293. return count;
  294. }
  295. static struct device_attribute dev_rescan_attr = __ATTR(rescan,
  296. (S_IWUSR|S_IWGRP),
  297. NULL, dev_rescan_store);
  298. static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
  299. const char *buf, size_t count)
  300. {
  301. unsigned long val;
  302. if (kstrtoul(buf, 0, &val) < 0)
  303. return -EINVAL;
  304. if (val && device_remove_file_self(dev, attr))
  305. pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
  306. return count;
  307. }
  308. static struct device_attribute dev_remove_attr = __ATTR(remove,
  309. (S_IWUSR|S_IWGRP),
  310. NULL, remove_store);
  311. static ssize_t dev_bus_rescan_store(struct device *dev,
  312. struct device_attribute *attr,
  313. const char *buf, size_t count)
  314. {
  315. unsigned long val;
  316. struct pci_bus *bus = to_pci_bus(dev);
  317. if (kstrtoul(buf, 0, &val) < 0)
  318. return -EINVAL;
  319. if (val) {
  320. pci_lock_rescan_remove();
  321. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  322. pci_rescan_bus_bridge_resize(bus->self);
  323. else
  324. pci_rescan_bus(bus);
  325. pci_unlock_rescan_remove();
  326. }
  327. return count;
  328. }
  329. static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
  330. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  331. static ssize_t d3cold_allowed_store(struct device *dev,
  332. struct device_attribute *attr,
  333. const char *buf, size_t count)
  334. {
  335. struct pci_dev *pdev = to_pci_dev(dev);
  336. unsigned long val;
  337. if (kstrtoul(buf, 0, &val) < 0)
  338. return -EINVAL;
  339. pdev->d3cold_allowed = !!val;
  340. pm_runtime_resume(dev);
  341. return count;
  342. }
  343. static ssize_t d3cold_allowed_show(struct device *dev,
  344. struct device_attribute *attr, char *buf)
  345. {
  346. struct pci_dev *pdev = to_pci_dev(dev);
  347. return sprintf(buf, "%u\n", pdev->d3cold_allowed);
  348. }
  349. static DEVICE_ATTR_RW(d3cold_allowed);
  350. #endif
  351. #ifdef CONFIG_OF
  352. static ssize_t devspec_show(struct device *dev,
  353. struct device_attribute *attr, char *buf)
  354. {
  355. struct pci_dev *pdev = to_pci_dev(dev);
  356. struct device_node *np = pci_device_to_OF_node(pdev);
  357. if (np == NULL || np->full_name == NULL)
  358. return 0;
  359. return sprintf(buf, "%s", np->full_name);
  360. }
  361. static DEVICE_ATTR_RO(devspec);
  362. #endif
  363. #ifdef CONFIG_PCI_IOV
  364. static ssize_t sriov_totalvfs_show(struct device *dev,
  365. struct device_attribute *attr,
  366. char *buf)
  367. {
  368. struct pci_dev *pdev = to_pci_dev(dev);
  369. return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
  370. }
  371. static ssize_t sriov_numvfs_show(struct device *dev,
  372. struct device_attribute *attr,
  373. char *buf)
  374. {
  375. struct pci_dev *pdev = to_pci_dev(dev);
  376. return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
  377. }
  378. /*
  379. * num_vfs > 0; number of VFs to enable
  380. * num_vfs = 0; disable all VFs
  381. *
  382. * Note: SRIOV spec doesn't allow partial VF
  383. * disable, so it's all or none.
  384. */
  385. static ssize_t sriov_numvfs_store(struct device *dev,
  386. struct device_attribute *attr,
  387. const char *buf, size_t count)
  388. {
  389. struct pci_dev *pdev = to_pci_dev(dev);
  390. int ret;
  391. u16 num_vfs;
  392. ret = kstrtou16(buf, 0, &num_vfs);
  393. if (ret < 0)
  394. return ret;
  395. if (num_vfs > pci_sriov_get_totalvfs(pdev))
  396. return -ERANGE;
  397. if (num_vfs == pdev->sriov->num_VFs)
  398. return count; /* no change */
  399. /* is PF driver loaded w/callback */
  400. if (!pdev->driver || !pdev->driver->sriov_configure) {
  401. dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
  402. return -ENOSYS;
  403. }
  404. if (num_vfs == 0) {
  405. /* disable VFs */
  406. ret = pdev->driver->sriov_configure(pdev, 0);
  407. if (ret < 0)
  408. return ret;
  409. return count;
  410. }
  411. /* enable VFs */
  412. if (pdev->sriov->num_VFs) {
  413. dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
  414. pdev->sriov->num_VFs, num_vfs);
  415. return -EBUSY;
  416. }
  417. ret = pdev->driver->sriov_configure(pdev, num_vfs);
  418. if (ret < 0)
  419. return ret;
  420. if (ret != num_vfs)
  421. dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
  422. num_vfs, ret);
  423. return count;
  424. }
  425. static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
  426. static struct device_attribute sriov_numvfs_attr =
  427. __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
  428. sriov_numvfs_show, sriov_numvfs_store);
  429. #endif /* CONFIG_PCI_IOV */
  430. static ssize_t driver_override_store(struct device *dev,
  431. struct device_attribute *attr,
  432. const char *buf, size_t count)
  433. {
  434. struct pci_dev *pdev = to_pci_dev(dev);
  435. char *driver_override, *old = pdev->driver_override, *cp;
  436. /* We need to keep extra room for a newline */
  437. if (count >= (PAGE_SIZE - 1))
  438. return -EINVAL;
  439. driver_override = kstrndup(buf, count, GFP_KERNEL);
  440. if (!driver_override)
  441. return -ENOMEM;
  442. cp = strchr(driver_override, '\n');
  443. if (cp)
  444. *cp = '\0';
  445. if (strlen(driver_override)) {
  446. pdev->driver_override = driver_override;
  447. } else {
  448. kfree(driver_override);
  449. pdev->driver_override = NULL;
  450. }
  451. kfree(old);
  452. return count;
  453. }
  454. static ssize_t driver_override_show(struct device *dev,
  455. struct device_attribute *attr, char *buf)
  456. {
  457. struct pci_dev *pdev = to_pci_dev(dev);
  458. return snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
  459. }
  460. static DEVICE_ATTR_RW(driver_override);
  461. static struct attribute *pci_dev_attrs[] = {
  462. &dev_attr_resource.attr,
  463. &dev_attr_vendor.attr,
  464. &dev_attr_device.attr,
  465. &dev_attr_subsystem_vendor.attr,
  466. &dev_attr_subsystem_device.attr,
  467. &dev_attr_class.attr,
  468. &dev_attr_irq.attr,
  469. &dev_attr_local_cpus.attr,
  470. &dev_attr_local_cpulist.attr,
  471. &dev_attr_modalias.attr,
  472. #ifdef CONFIG_NUMA
  473. &dev_attr_numa_node.attr,
  474. #endif
  475. &dev_attr_dma_mask_bits.attr,
  476. &dev_attr_consistent_dma_mask_bits.attr,
  477. &dev_attr_enable.attr,
  478. &dev_attr_broken_parity_status.attr,
  479. &dev_attr_msi_bus.attr,
  480. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  481. &dev_attr_d3cold_allowed.attr,
  482. #endif
  483. #ifdef CONFIG_OF
  484. &dev_attr_devspec.attr,
  485. #endif
  486. &dev_attr_driver_override.attr,
  487. NULL,
  488. };
  489. static const struct attribute_group pci_dev_group = {
  490. .attrs = pci_dev_attrs,
  491. };
  492. const struct attribute_group *pci_dev_groups[] = {
  493. &pci_dev_group,
  494. NULL,
  495. };
  496. static struct attribute *pcibus_attrs[] = {
  497. &dev_attr_rescan.attr,
  498. &dev_attr_cpuaffinity.attr,
  499. &dev_attr_cpulistaffinity.attr,
  500. NULL,
  501. };
  502. static const struct attribute_group pcibus_group = {
  503. .attrs = pcibus_attrs,
  504. };
  505. const struct attribute_group *pcibus_groups[] = {
  506. &pcibus_group,
  507. NULL,
  508. };
  509. static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
  510. char *buf)
  511. {
  512. struct pci_dev *pdev = to_pci_dev(dev);
  513. struct pci_dev *vga_dev = vga_default_device();
  514. if (vga_dev)
  515. return sprintf(buf, "%u\n", (pdev == vga_dev));
  516. return sprintf(buf, "%u\n",
  517. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  518. IORESOURCE_ROM_SHADOW));
  519. }
  520. static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  521. static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
  522. struct bin_attribute *bin_attr, char *buf,
  523. loff_t off, size_t count)
  524. {
  525. struct pci_dev *dev = to_pci_dev(container_of(kobj, struct device,
  526. kobj));
  527. unsigned int size = 64;
  528. loff_t init_off = off;
  529. u8 *data = (u8 *) buf;
  530. /* Several chips lock up trying to read undefined config space */
  531. if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0)
  532. size = dev->cfg_size;
  533. else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
  534. size = 128;
  535. if (off > size)
  536. return 0;
  537. if (off + count > size) {
  538. size -= off;
  539. count = size;
  540. } else {
  541. size = count;
  542. }
  543. pci_config_pm_runtime_get(dev);
  544. if ((off & 1) && size) {
  545. u8 val;
  546. pci_user_read_config_byte(dev, off, &val);
  547. data[off - init_off] = val;
  548. off++;
  549. size--;
  550. }
  551. if ((off & 3) && size > 2) {
  552. u16 val;
  553. pci_user_read_config_word(dev, off, &val);
  554. data[off - init_off] = val & 0xff;
  555. data[off - init_off + 1] = (val >> 8) & 0xff;
  556. off += 2;
  557. size -= 2;
  558. }
  559. while (size > 3) {
  560. u32 val;
  561. pci_user_read_config_dword(dev, off, &val);
  562. data[off - init_off] = val & 0xff;
  563. data[off - init_off + 1] = (val >> 8) & 0xff;
  564. data[off - init_off + 2] = (val >> 16) & 0xff;
  565. data[off - init_off + 3] = (val >> 24) & 0xff;
  566. off += 4;
  567. size -= 4;
  568. }
  569. if (size >= 2) {
  570. u16 val;
  571. pci_user_read_config_word(dev, off, &val);
  572. data[off - init_off] = val & 0xff;
  573. data[off - init_off + 1] = (val >> 8) & 0xff;
  574. off += 2;
  575. size -= 2;
  576. }
  577. if (size > 0) {
  578. u8 val;
  579. pci_user_read_config_byte(dev, off, &val);
  580. data[off - init_off] = val;
  581. off++;
  582. --size;
  583. }
  584. pci_config_pm_runtime_put(dev);
  585. return count;
  586. }
  587. static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
  588. struct bin_attribute *bin_attr, char *buf,
  589. loff_t off, size_t count)
  590. {
  591. struct pci_dev *dev = to_pci_dev(container_of(kobj, struct device,
  592. kobj));
  593. unsigned int size = count;
  594. loff_t init_off = off;
  595. u8 *data = (u8 *) buf;
  596. if (off > dev->cfg_size)
  597. return 0;
  598. if (off + count > dev->cfg_size) {
  599. size = dev->cfg_size - off;
  600. count = size;
  601. }
  602. pci_config_pm_runtime_get(dev);
  603. if ((off & 1) && size) {
  604. pci_user_write_config_byte(dev, off, data[off - init_off]);
  605. off++;
  606. size--;
  607. }
  608. if ((off & 3) && size > 2) {
  609. u16 val = data[off - init_off];
  610. val |= (u16) data[off - init_off + 1] << 8;
  611. pci_user_write_config_word(dev, off, val);
  612. off += 2;
  613. size -= 2;
  614. }
  615. while (size > 3) {
  616. u32 val = data[off - init_off];
  617. val |= (u32) data[off - init_off + 1] << 8;
  618. val |= (u32) data[off - init_off + 2] << 16;
  619. val |= (u32) data[off - init_off + 3] << 24;
  620. pci_user_write_config_dword(dev, off, val);
  621. off += 4;
  622. size -= 4;
  623. }
  624. if (size >= 2) {
  625. u16 val = data[off - init_off];
  626. val |= (u16) data[off - init_off + 1] << 8;
  627. pci_user_write_config_word(dev, off, val);
  628. off += 2;
  629. size -= 2;
  630. }
  631. if (size) {
  632. pci_user_write_config_byte(dev, off, data[off - init_off]);
  633. off++;
  634. --size;
  635. }
  636. pci_config_pm_runtime_put(dev);
  637. return count;
  638. }
  639. static ssize_t read_vpd_attr(struct file *filp, struct kobject *kobj,
  640. struct bin_attribute *bin_attr, char *buf,
  641. loff_t off, size_t count)
  642. {
  643. struct pci_dev *dev =
  644. to_pci_dev(container_of(kobj, struct device, kobj));
  645. if (off > bin_attr->size)
  646. count = 0;
  647. else if (count > bin_attr->size - off)
  648. count = bin_attr->size - off;
  649. return pci_read_vpd(dev, off, count, buf);
  650. }
  651. static ssize_t write_vpd_attr(struct file *filp, struct kobject *kobj,
  652. struct bin_attribute *bin_attr, char *buf,
  653. loff_t off, size_t count)
  654. {
  655. struct pci_dev *dev =
  656. to_pci_dev(container_of(kobj, struct device, kobj));
  657. if (off > bin_attr->size)
  658. count = 0;
  659. else if (count > bin_attr->size - off)
  660. count = bin_attr->size - off;
  661. return pci_write_vpd(dev, off, count, buf);
  662. }
  663. #ifdef HAVE_PCI_LEGACY
  664. /**
  665. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  666. * @filp: open sysfs file
  667. * @kobj: kobject corresponding to file to read from
  668. * @bin_attr: struct bin_attribute for this file
  669. * @buf: buffer to store results
  670. * @off: offset into legacy I/O port space
  671. * @count: number of bytes to read
  672. *
  673. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  674. * callback routine (pci_legacy_read).
  675. */
  676. static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  677. struct bin_attribute *bin_attr, char *buf,
  678. loff_t off, size_t count)
  679. {
  680. struct pci_bus *bus = to_pci_bus(container_of(kobj, struct device,
  681. kobj));
  682. /* Only support 1, 2 or 4 byte accesses */
  683. if (count != 1 && count != 2 && count != 4)
  684. return -EINVAL;
  685. return pci_legacy_read(bus, off, (u32 *)buf, count);
  686. }
  687. /**
  688. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  689. * @filp: open sysfs file
  690. * @kobj: kobject corresponding to file to read from
  691. * @bin_attr: struct bin_attribute for this file
  692. * @buf: buffer containing value to be written
  693. * @off: offset into legacy I/O port space
  694. * @count: number of bytes to write
  695. *
  696. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  697. * callback routine (pci_legacy_write).
  698. */
  699. static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  700. struct bin_attribute *bin_attr, char *buf,
  701. loff_t off, size_t count)
  702. {
  703. struct pci_bus *bus = to_pci_bus(container_of(kobj, struct device,
  704. kobj));
  705. /* Only support 1, 2 or 4 byte accesses */
  706. if (count != 1 && count != 2 && count != 4)
  707. return -EINVAL;
  708. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  709. }
  710. /**
  711. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  712. * @filp: open sysfs file
  713. * @kobj: kobject corresponding to device to be mapped
  714. * @attr: struct bin_attribute for this file
  715. * @vma: struct vm_area_struct passed to mmap
  716. *
  717. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  718. * legacy memory space (first meg of bus space) into application virtual
  719. * memory space.
  720. */
  721. static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  722. struct bin_attribute *attr,
  723. struct vm_area_struct *vma)
  724. {
  725. struct pci_bus *bus = to_pci_bus(container_of(kobj, struct device,
  726. kobj));
  727. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  728. }
  729. /**
  730. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  731. * @filp: open sysfs file
  732. * @kobj: kobject corresponding to device to be mapped
  733. * @attr: struct bin_attribute for this file
  734. * @vma: struct vm_area_struct passed to mmap
  735. *
  736. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  737. * legacy IO space (first meg of bus space) into application virtual
  738. * memory space. Returns -ENOSYS if the operation isn't supported
  739. */
  740. static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  741. struct bin_attribute *attr,
  742. struct vm_area_struct *vma)
  743. {
  744. struct pci_bus *bus = to_pci_bus(container_of(kobj, struct device,
  745. kobj));
  746. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  747. }
  748. /**
  749. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  750. * @b: bus to create files under
  751. * @mmap_type: I/O port or memory
  752. *
  753. * Stub implementation. Can be overridden by arch if necessary.
  754. */
  755. void __weak pci_adjust_legacy_attr(struct pci_bus *b,
  756. enum pci_mmap_state mmap_type)
  757. {
  758. }
  759. /**
  760. * pci_create_legacy_files - create legacy I/O port and memory files
  761. * @b: bus to create files under
  762. *
  763. * Some platforms allow access to legacy I/O port and ISA memory space on
  764. * a per-bus basis. This routine creates the files and ties them into
  765. * their associated read, write and mmap files from pci-sysfs.c
  766. *
  767. * On error unwind, but don't propagate the error to the caller
  768. * as it is ok to set up the PCI bus without these files.
  769. */
  770. void pci_create_legacy_files(struct pci_bus *b)
  771. {
  772. int error;
  773. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  774. GFP_ATOMIC);
  775. if (!b->legacy_io)
  776. goto kzalloc_err;
  777. sysfs_bin_attr_init(b->legacy_io);
  778. b->legacy_io->attr.name = "legacy_io";
  779. b->legacy_io->size = 0xffff;
  780. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  781. b->legacy_io->read = pci_read_legacy_io;
  782. b->legacy_io->write = pci_write_legacy_io;
  783. b->legacy_io->mmap = pci_mmap_legacy_io;
  784. pci_adjust_legacy_attr(b, pci_mmap_io);
  785. error = device_create_bin_file(&b->dev, b->legacy_io);
  786. if (error)
  787. goto legacy_io_err;
  788. /* Allocated above after the legacy_io struct */
  789. b->legacy_mem = b->legacy_io + 1;
  790. sysfs_bin_attr_init(b->legacy_mem);
  791. b->legacy_mem->attr.name = "legacy_mem";
  792. b->legacy_mem->size = 1024*1024;
  793. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  794. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  795. pci_adjust_legacy_attr(b, pci_mmap_mem);
  796. error = device_create_bin_file(&b->dev, b->legacy_mem);
  797. if (error)
  798. goto legacy_mem_err;
  799. return;
  800. legacy_mem_err:
  801. device_remove_bin_file(&b->dev, b->legacy_io);
  802. legacy_io_err:
  803. kfree(b->legacy_io);
  804. b->legacy_io = NULL;
  805. kzalloc_err:
  806. printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n");
  807. return;
  808. }
  809. void pci_remove_legacy_files(struct pci_bus *b)
  810. {
  811. if (b->legacy_io) {
  812. device_remove_bin_file(&b->dev, b->legacy_io);
  813. device_remove_bin_file(&b->dev, b->legacy_mem);
  814. kfree(b->legacy_io); /* both are allocated here */
  815. }
  816. }
  817. #endif /* HAVE_PCI_LEGACY */
  818. #ifdef HAVE_PCI_MMAP
  819. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  820. enum pci_mmap_api mmap_api)
  821. {
  822. unsigned long nr, start, size, pci_start;
  823. if (pci_resource_len(pdev, resno) == 0)
  824. return 0;
  825. nr = vma_pages(vma);
  826. start = vma->vm_pgoff;
  827. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  828. pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
  829. pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
  830. if (start >= pci_start && start < pci_start + size &&
  831. start + nr <= pci_start + size)
  832. return 1;
  833. return 0;
  834. }
  835. /**
  836. * pci_mmap_resource - map a PCI resource into user memory space
  837. * @kobj: kobject for mapping
  838. * @attr: struct bin_attribute for the file being mapped
  839. * @vma: struct vm_area_struct passed into the mmap
  840. * @write_combine: 1 for write_combine mapping
  841. *
  842. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  843. */
  844. static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  845. struct vm_area_struct *vma, int write_combine)
  846. {
  847. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  848. struct device, kobj));
  849. struct resource *res = attr->private;
  850. enum pci_mmap_state mmap_type;
  851. resource_size_t start, end;
  852. int i;
  853. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  854. if (res == &pdev->resource[i])
  855. break;
  856. if (i >= PCI_ROM_RESOURCE)
  857. return -ENODEV;
  858. if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
  859. WARN(1, "process \"%s\" tried to map 0x%08lx bytes at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  860. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  861. pci_name(pdev), i,
  862. (u64)pci_resource_start(pdev, i),
  863. (u64)pci_resource_len(pdev, i));
  864. return -EINVAL;
  865. }
  866. /* pci_mmap_page_range() expects the same kind of entry as coming
  867. * from /proc/bus/pci/ which is a "user visible" value. If this is
  868. * different from the resource itself, arch will do necessary fixup.
  869. */
  870. pci_resource_to_user(pdev, i, res, &start, &end);
  871. vma->vm_pgoff += start >> PAGE_SHIFT;
  872. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  873. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  874. return -EINVAL;
  875. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  876. }
  877. static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  878. struct bin_attribute *attr,
  879. struct vm_area_struct *vma)
  880. {
  881. return pci_mmap_resource(kobj, attr, vma, 0);
  882. }
  883. static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  884. struct bin_attribute *attr,
  885. struct vm_area_struct *vma)
  886. {
  887. return pci_mmap_resource(kobj, attr, vma, 1);
  888. }
  889. static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
  890. struct bin_attribute *attr, char *buf,
  891. loff_t off, size_t count, bool write)
  892. {
  893. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  894. struct device, kobj));
  895. struct resource *res = attr->private;
  896. unsigned long port = off;
  897. int i;
  898. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  899. if (res == &pdev->resource[i])
  900. break;
  901. if (i >= PCI_ROM_RESOURCE)
  902. return -ENODEV;
  903. port += pci_resource_start(pdev, i);
  904. if (port > pci_resource_end(pdev, i))
  905. return 0;
  906. if (port + count - 1 > pci_resource_end(pdev, i))
  907. return -EINVAL;
  908. switch (count) {
  909. case 1:
  910. if (write)
  911. outb(*(u8 *)buf, port);
  912. else
  913. *(u8 *)buf = inb(port);
  914. return 1;
  915. case 2:
  916. if (write)
  917. outw(*(u16 *)buf, port);
  918. else
  919. *(u16 *)buf = inw(port);
  920. return 2;
  921. case 4:
  922. if (write)
  923. outl(*(u32 *)buf, port);
  924. else
  925. *(u32 *)buf = inl(port);
  926. return 4;
  927. }
  928. return -EINVAL;
  929. }
  930. static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
  931. struct bin_attribute *attr, char *buf,
  932. loff_t off, size_t count)
  933. {
  934. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  935. }
  936. static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
  937. struct bin_attribute *attr, char *buf,
  938. loff_t off, size_t count)
  939. {
  940. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  941. }
  942. /**
  943. * pci_remove_resource_files - cleanup resource files
  944. * @pdev: dev to cleanup
  945. *
  946. * If we created resource files for @pdev, remove them from sysfs and
  947. * free their resources.
  948. */
  949. static void pci_remove_resource_files(struct pci_dev *pdev)
  950. {
  951. int i;
  952. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  953. struct bin_attribute *res_attr;
  954. res_attr = pdev->res_attr[i];
  955. if (res_attr) {
  956. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  957. kfree(res_attr);
  958. }
  959. res_attr = pdev->res_attr_wc[i];
  960. if (res_attr) {
  961. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  962. kfree(res_attr);
  963. }
  964. }
  965. }
  966. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  967. {
  968. /* allocate attribute structure, piggyback attribute name */
  969. int name_len = write_combine ? 13 : 10;
  970. struct bin_attribute *res_attr;
  971. int retval;
  972. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  973. if (res_attr) {
  974. char *res_attr_name = (char *)(res_attr + 1);
  975. sysfs_bin_attr_init(res_attr);
  976. if (write_combine) {
  977. pdev->res_attr_wc[num] = res_attr;
  978. sprintf(res_attr_name, "resource%d_wc", num);
  979. res_attr->mmap = pci_mmap_resource_wc;
  980. } else {
  981. pdev->res_attr[num] = res_attr;
  982. sprintf(res_attr_name, "resource%d", num);
  983. res_attr->mmap = pci_mmap_resource_uc;
  984. }
  985. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  986. res_attr->read = pci_read_resource_io;
  987. res_attr->write = pci_write_resource_io;
  988. }
  989. res_attr->attr.name = res_attr_name;
  990. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  991. res_attr->size = pci_resource_len(pdev, num);
  992. res_attr->private = &pdev->resource[num];
  993. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  994. } else
  995. retval = -ENOMEM;
  996. return retval;
  997. }
  998. /**
  999. * pci_create_resource_files - create resource files in sysfs for @dev
  1000. * @pdev: dev in question
  1001. *
  1002. * Walk the resources in @pdev creating files for each resource available.
  1003. */
  1004. static int pci_create_resource_files(struct pci_dev *pdev)
  1005. {
  1006. int i;
  1007. int retval;
  1008. /* Expose the PCI resources from this device as files */
  1009. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  1010. /* skip empty resources */
  1011. if (!pci_resource_len(pdev, i))
  1012. continue;
  1013. retval = pci_create_attr(pdev, i, 0);
  1014. /* for prefetchable resources, create a WC mappable file */
  1015. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  1016. retval = pci_create_attr(pdev, i, 1);
  1017. if (retval) {
  1018. pci_remove_resource_files(pdev);
  1019. return retval;
  1020. }
  1021. }
  1022. return 0;
  1023. }
  1024. #else /* !HAVE_PCI_MMAP */
  1025. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  1026. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  1027. #endif /* HAVE_PCI_MMAP */
  1028. /**
  1029. * pci_write_rom - used to enable access to the PCI ROM display
  1030. * @filp: sysfs file
  1031. * @kobj: kernel object handle
  1032. * @bin_attr: struct bin_attribute for this file
  1033. * @buf: user input
  1034. * @off: file offset
  1035. * @count: number of byte in input
  1036. *
  1037. * writing anything except 0 enables it
  1038. */
  1039. static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
  1040. struct bin_attribute *bin_attr, char *buf,
  1041. loff_t off, size_t count)
  1042. {
  1043. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  1044. if ((off == 0) && (*buf == '0') && (count == 2))
  1045. pdev->rom_attr_enabled = 0;
  1046. else
  1047. pdev->rom_attr_enabled = 1;
  1048. return count;
  1049. }
  1050. /**
  1051. * pci_read_rom - read a PCI ROM
  1052. * @filp: sysfs file
  1053. * @kobj: kernel object handle
  1054. * @bin_attr: struct bin_attribute for this file
  1055. * @buf: where to put the data we read from the ROM
  1056. * @off: file offset
  1057. * @count: number of bytes to read
  1058. *
  1059. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  1060. * device corresponding to @kobj.
  1061. */
  1062. static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
  1063. struct bin_attribute *bin_attr, char *buf,
  1064. loff_t off, size_t count)
  1065. {
  1066. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  1067. void __iomem *rom;
  1068. size_t size;
  1069. if (!pdev->rom_attr_enabled)
  1070. return -EINVAL;
  1071. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  1072. if (!rom || !size)
  1073. return -EIO;
  1074. if (off >= size)
  1075. count = 0;
  1076. else {
  1077. if (off + count > size)
  1078. count = size - off;
  1079. memcpy_fromio(buf, rom + off, count);
  1080. }
  1081. pci_unmap_rom(pdev, rom);
  1082. return count;
  1083. }
  1084. static struct bin_attribute pci_config_attr = {
  1085. .attr = {
  1086. .name = "config",
  1087. .mode = S_IRUGO | S_IWUSR,
  1088. },
  1089. .size = PCI_CFG_SPACE_SIZE,
  1090. .read = pci_read_config,
  1091. .write = pci_write_config,
  1092. };
  1093. static struct bin_attribute pcie_config_attr = {
  1094. .attr = {
  1095. .name = "config",
  1096. .mode = S_IRUGO | S_IWUSR,
  1097. },
  1098. .size = PCI_CFG_SPACE_EXP_SIZE,
  1099. .read = pci_read_config,
  1100. .write = pci_write_config,
  1101. };
  1102. static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
  1103. const char *buf, size_t count)
  1104. {
  1105. struct pci_dev *pdev = to_pci_dev(dev);
  1106. unsigned long val;
  1107. ssize_t result = kstrtoul(buf, 0, &val);
  1108. if (result < 0)
  1109. return result;
  1110. if (val != 1)
  1111. return -EINVAL;
  1112. result = pci_reset_function(pdev);
  1113. if (result < 0)
  1114. return result;
  1115. return count;
  1116. }
  1117. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1118. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1119. {
  1120. int retval;
  1121. struct bin_attribute *attr;
  1122. /* If the device has VPD, try to expose it in sysfs. */
  1123. if (dev->vpd) {
  1124. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1125. if (!attr)
  1126. return -ENOMEM;
  1127. sysfs_bin_attr_init(attr);
  1128. attr->size = dev->vpd->len;
  1129. attr->attr.name = "vpd";
  1130. attr->attr.mode = S_IRUSR | S_IWUSR;
  1131. attr->read = read_vpd_attr;
  1132. attr->write = write_vpd_attr;
  1133. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  1134. if (retval) {
  1135. kfree(attr);
  1136. return retval;
  1137. }
  1138. dev->vpd->attr = attr;
  1139. }
  1140. /* Active State Power Management */
  1141. pcie_aspm_create_sysfs_dev_files(dev);
  1142. if (!pci_probe_reset_function(dev)) {
  1143. retval = device_create_file(&dev->dev, &reset_attr);
  1144. if (retval)
  1145. goto error;
  1146. dev->reset_fn = 1;
  1147. }
  1148. return 0;
  1149. error:
  1150. pcie_aspm_remove_sysfs_dev_files(dev);
  1151. if (dev->vpd && dev->vpd->attr) {
  1152. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1153. kfree(dev->vpd->attr);
  1154. }
  1155. return retval;
  1156. }
  1157. int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
  1158. {
  1159. int retval;
  1160. int rom_size = 0;
  1161. struct bin_attribute *attr;
  1162. if (!sysfs_initialized)
  1163. return -EACCES;
  1164. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1165. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1166. else
  1167. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1168. if (retval)
  1169. goto err;
  1170. retval = pci_create_resource_files(pdev);
  1171. if (retval)
  1172. goto err_config_file;
  1173. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1174. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1175. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1176. rom_size = 0x20000;
  1177. /* If the device has a ROM, try to expose it in sysfs. */
  1178. if (rom_size) {
  1179. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1180. if (!attr) {
  1181. retval = -ENOMEM;
  1182. goto err_resource_files;
  1183. }
  1184. sysfs_bin_attr_init(attr);
  1185. attr->size = rom_size;
  1186. attr->attr.name = "rom";
  1187. attr->attr.mode = S_IRUSR | S_IWUSR;
  1188. attr->read = pci_read_rom;
  1189. attr->write = pci_write_rom;
  1190. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1191. if (retval) {
  1192. kfree(attr);
  1193. goto err_resource_files;
  1194. }
  1195. pdev->rom_attr = attr;
  1196. }
  1197. /* add sysfs entries for various capabilities */
  1198. retval = pci_create_capabilities_sysfs(pdev);
  1199. if (retval)
  1200. goto err_rom_file;
  1201. pci_create_firmware_label_files(pdev);
  1202. return 0;
  1203. err_rom_file:
  1204. if (rom_size) {
  1205. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1206. kfree(pdev->rom_attr);
  1207. pdev->rom_attr = NULL;
  1208. }
  1209. err_resource_files:
  1210. pci_remove_resource_files(pdev);
  1211. err_config_file:
  1212. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1213. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1214. else
  1215. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1216. err:
  1217. return retval;
  1218. }
  1219. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1220. {
  1221. if (dev->vpd && dev->vpd->attr) {
  1222. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1223. kfree(dev->vpd->attr);
  1224. }
  1225. pcie_aspm_remove_sysfs_dev_files(dev);
  1226. if (dev->reset_fn) {
  1227. device_remove_file(&dev->dev, &reset_attr);
  1228. dev->reset_fn = 0;
  1229. }
  1230. }
  1231. /**
  1232. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1233. * @pdev: device whose entries we should free
  1234. *
  1235. * Cleanup when @pdev is removed from sysfs.
  1236. */
  1237. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1238. {
  1239. int rom_size = 0;
  1240. if (!sysfs_initialized)
  1241. return;
  1242. pci_remove_capabilities_sysfs(pdev);
  1243. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1244. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1245. else
  1246. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1247. pci_remove_resource_files(pdev);
  1248. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1249. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1250. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1251. rom_size = 0x20000;
  1252. if (rom_size && pdev->rom_attr) {
  1253. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1254. kfree(pdev->rom_attr);
  1255. }
  1256. pci_remove_firmware_label_files(pdev);
  1257. }
  1258. static int __init pci_sysfs_init(void)
  1259. {
  1260. struct pci_dev *pdev = NULL;
  1261. int retval;
  1262. sysfs_initialized = 1;
  1263. for_each_pci_dev(pdev) {
  1264. retval = pci_create_sysfs_dev_files(pdev);
  1265. if (retval) {
  1266. pci_dev_put(pdev);
  1267. return retval;
  1268. }
  1269. }
  1270. return 0;
  1271. }
  1272. late_initcall(pci_sysfs_init);
  1273. static struct attribute *pci_dev_dev_attrs[] = {
  1274. &vga_attr.attr,
  1275. NULL,
  1276. };
  1277. static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
  1278. struct attribute *a, int n)
  1279. {
  1280. struct device *dev = container_of(kobj, struct device, kobj);
  1281. struct pci_dev *pdev = to_pci_dev(dev);
  1282. if (a == &vga_attr.attr)
  1283. if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
  1284. return 0;
  1285. return a->mode;
  1286. }
  1287. static struct attribute *pci_dev_hp_attrs[] = {
  1288. &dev_remove_attr.attr,
  1289. &dev_rescan_attr.attr,
  1290. NULL,
  1291. };
  1292. static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
  1293. struct attribute *a, int n)
  1294. {
  1295. struct device *dev = container_of(kobj, struct device, kobj);
  1296. struct pci_dev *pdev = to_pci_dev(dev);
  1297. if (pdev->is_virtfn)
  1298. return 0;
  1299. return a->mode;
  1300. }
  1301. static struct attribute_group pci_dev_hp_attr_group = {
  1302. .attrs = pci_dev_hp_attrs,
  1303. .is_visible = pci_dev_hp_attrs_are_visible,
  1304. };
  1305. #ifdef CONFIG_PCI_IOV
  1306. static struct attribute *sriov_dev_attrs[] = {
  1307. &sriov_totalvfs_attr.attr,
  1308. &sriov_numvfs_attr.attr,
  1309. NULL,
  1310. };
  1311. static umode_t sriov_attrs_are_visible(struct kobject *kobj,
  1312. struct attribute *a, int n)
  1313. {
  1314. struct device *dev = container_of(kobj, struct device, kobj);
  1315. if (!dev_is_pf(dev))
  1316. return 0;
  1317. return a->mode;
  1318. }
  1319. static struct attribute_group sriov_dev_attr_group = {
  1320. .attrs = sriov_dev_attrs,
  1321. .is_visible = sriov_attrs_are_visible,
  1322. };
  1323. #endif /* CONFIG_PCI_IOV */
  1324. static struct attribute_group pci_dev_attr_group = {
  1325. .attrs = pci_dev_dev_attrs,
  1326. .is_visible = pci_dev_attrs_are_visible,
  1327. };
  1328. static const struct attribute_group *pci_dev_attr_groups[] = {
  1329. &pci_dev_attr_group,
  1330. &pci_dev_hp_attr_group,
  1331. #ifdef CONFIG_PCI_IOV
  1332. &sriov_dev_attr_group,
  1333. #endif
  1334. NULL,
  1335. };
  1336. struct device_type pci_dev_type = {
  1337. .groups = pci_dev_attr_groups,
  1338. };