gpio-vf610.c 7.4 KB

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  1. /*
  2. * vf610 GPIO support through PORT and GPIO module
  3. *
  4. * Copyright (c) 2014 Toradex AG.
  5. *
  6. * Author: Stefan Agner <stefan@agner.ch>.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * as published by the Free Software Foundation; either version 2
  11. * of the License, or (at your option) any later version.
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/bitops.h>
  18. #include <linux/err.h>
  19. #include <linux/gpio.h>
  20. #include <linux/init.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/io.h>
  23. #include <linux/ioport.h>
  24. #include <linux/irq.h>
  25. #include <linux/module.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/of.h>
  28. #include <linux/of_device.h>
  29. #include <linux/of_irq.h>
  30. #define VF610_GPIO_PER_PORT 32
  31. struct vf610_gpio_port {
  32. struct gpio_chip gc;
  33. void __iomem *base;
  34. void __iomem *gpio_base;
  35. u8 irqc[VF610_GPIO_PER_PORT];
  36. int irq;
  37. };
  38. #define GPIO_PDOR 0x00
  39. #define GPIO_PSOR 0x04
  40. #define GPIO_PCOR 0x08
  41. #define GPIO_PTOR 0x0c
  42. #define GPIO_PDIR 0x10
  43. #define PORT_PCR(n) ((n) * 0x4)
  44. #define PORT_PCR_IRQC_OFFSET 16
  45. #define PORT_ISFR 0xa0
  46. #define PORT_DFER 0xc0
  47. #define PORT_DFCR 0xc4
  48. #define PORT_DFWR 0xc8
  49. #define PORT_INT_OFF 0x0
  50. #define PORT_INT_LOGIC_ZERO 0x8
  51. #define PORT_INT_RISING_EDGE 0x9
  52. #define PORT_INT_FALLING_EDGE 0xa
  53. #define PORT_INT_EITHER_EDGE 0xb
  54. #define PORT_INT_LOGIC_ONE 0xc
  55. static struct irq_chip vf610_gpio_irq_chip;
  56. static const struct of_device_id vf610_gpio_dt_ids[] = {
  57. { .compatible = "fsl,vf610-gpio" },
  58. { /* sentinel */ }
  59. };
  60. static inline void vf610_gpio_writel(u32 val, void __iomem *reg)
  61. {
  62. writel_relaxed(val, reg);
  63. }
  64. static inline u32 vf610_gpio_readl(void __iomem *reg)
  65. {
  66. return readl_relaxed(reg);
  67. }
  68. static int vf610_gpio_request(struct gpio_chip *chip, unsigned offset)
  69. {
  70. return pinctrl_request_gpio(chip->base + offset);
  71. }
  72. static void vf610_gpio_free(struct gpio_chip *chip, unsigned offset)
  73. {
  74. pinctrl_free_gpio(chip->base + offset);
  75. }
  76. static int vf610_gpio_get(struct gpio_chip *gc, unsigned int gpio)
  77. {
  78. struct vf610_gpio_port *port =
  79. container_of(gc, struct vf610_gpio_port, gc);
  80. return !!(vf610_gpio_readl(port->gpio_base + GPIO_PDIR) & BIT(gpio));
  81. }
  82. static void vf610_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
  83. {
  84. struct vf610_gpio_port *port =
  85. container_of(gc, struct vf610_gpio_port, gc);
  86. unsigned long mask = BIT(gpio);
  87. if (val)
  88. vf610_gpio_writel(mask, port->gpio_base + GPIO_PSOR);
  89. else
  90. vf610_gpio_writel(mask, port->gpio_base + GPIO_PCOR);
  91. }
  92. static int vf610_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
  93. {
  94. return pinctrl_gpio_direction_input(chip->base + gpio);
  95. }
  96. static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
  97. int value)
  98. {
  99. vf610_gpio_set(chip, gpio, value);
  100. return pinctrl_gpio_direction_output(chip->base + gpio);
  101. }
  102. static void vf610_gpio_irq_handler(u32 irq, struct irq_desc *desc)
  103. {
  104. struct vf610_gpio_port *port = irq_desc_get_handler_data(desc);
  105. struct irq_chip *chip = irq_desc_get_chip(desc);
  106. int pin;
  107. unsigned long irq_isfr;
  108. chained_irq_enter(chip, desc);
  109. irq_isfr = vf610_gpio_readl(port->base + PORT_ISFR);
  110. for_each_set_bit(pin, &irq_isfr, VF610_GPIO_PER_PORT) {
  111. vf610_gpio_writel(BIT(pin), port->base + PORT_ISFR);
  112. generic_handle_irq(irq_find_mapping(port->gc.irqdomain, pin));
  113. }
  114. chained_irq_exit(chip, desc);
  115. }
  116. static void vf610_gpio_irq_ack(struct irq_data *d)
  117. {
  118. struct vf610_gpio_port *port = irq_data_get_irq_chip_data(d);
  119. int gpio = d->hwirq;
  120. vf610_gpio_writel(BIT(gpio), port->base + PORT_ISFR);
  121. }
  122. static int vf610_gpio_irq_set_type(struct irq_data *d, u32 type)
  123. {
  124. struct vf610_gpio_port *port = irq_data_get_irq_chip_data(d);
  125. u8 irqc;
  126. switch (type) {
  127. case IRQ_TYPE_EDGE_RISING:
  128. irqc = PORT_INT_RISING_EDGE;
  129. break;
  130. case IRQ_TYPE_EDGE_FALLING:
  131. irqc = PORT_INT_FALLING_EDGE;
  132. break;
  133. case IRQ_TYPE_EDGE_BOTH:
  134. irqc = PORT_INT_EITHER_EDGE;
  135. break;
  136. case IRQ_TYPE_LEVEL_LOW:
  137. irqc = PORT_INT_LOGIC_ZERO;
  138. break;
  139. case IRQ_TYPE_LEVEL_HIGH:
  140. irqc = PORT_INT_LOGIC_ONE;
  141. break;
  142. default:
  143. return -EINVAL;
  144. }
  145. port->irqc[d->hwirq] = irqc;
  146. if (type & IRQ_TYPE_LEVEL_MASK)
  147. __irq_set_handler_locked(d->irq, handle_level_irq);
  148. else
  149. __irq_set_handler_locked(d->irq, handle_edge_irq);
  150. return 0;
  151. }
  152. static void vf610_gpio_irq_mask(struct irq_data *d)
  153. {
  154. struct vf610_gpio_port *port = irq_data_get_irq_chip_data(d);
  155. void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq);
  156. vf610_gpio_writel(0, pcr_base);
  157. }
  158. static void vf610_gpio_irq_unmask(struct irq_data *d)
  159. {
  160. struct vf610_gpio_port *port = irq_data_get_irq_chip_data(d);
  161. void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq);
  162. vf610_gpio_writel(port->irqc[d->hwirq] << PORT_PCR_IRQC_OFFSET,
  163. pcr_base);
  164. }
  165. static int vf610_gpio_irq_set_wake(struct irq_data *d, u32 enable)
  166. {
  167. struct vf610_gpio_port *port = irq_data_get_irq_chip_data(d);
  168. if (enable)
  169. enable_irq_wake(port->irq);
  170. else
  171. disable_irq_wake(port->irq);
  172. return 0;
  173. }
  174. static struct irq_chip vf610_gpio_irq_chip = {
  175. .name = "gpio-vf610",
  176. .irq_ack = vf610_gpio_irq_ack,
  177. .irq_mask = vf610_gpio_irq_mask,
  178. .irq_unmask = vf610_gpio_irq_unmask,
  179. .irq_set_type = vf610_gpio_irq_set_type,
  180. .irq_set_wake = vf610_gpio_irq_set_wake,
  181. };
  182. static int vf610_gpio_probe(struct platform_device *pdev)
  183. {
  184. struct device *dev = &pdev->dev;
  185. struct device_node *np = dev->of_node;
  186. struct vf610_gpio_port *port;
  187. struct resource *iores;
  188. struct gpio_chip *gc;
  189. int ret;
  190. port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL);
  191. if (!port)
  192. return -ENOMEM;
  193. iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  194. port->base = devm_ioremap_resource(dev, iores);
  195. if (IS_ERR(port->base))
  196. return PTR_ERR(port->base);
  197. iores = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  198. port->gpio_base = devm_ioremap_resource(dev, iores);
  199. if (IS_ERR(port->gpio_base))
  200. return PTR_ERR(port->gpio_base);
  201. port->irq = platform_get_irq(pdev, 0);
  202. if (port->irq < 0)
  203. return port->irq;
  204. gc = &port->gc;
  205. gc->of_node = np;
  206. gc->dev = dev;
  207. gc->label = "vf610-gpio";
  208. gc->ngpio = VF610_GPIO_PER_PORT;
  209. gc->base = of_alias_get_id(np, "gpio") * VF610_GPIO_PER_PORT;
  210. gc->request = vf610_gpio_request;
  211. gc->free = vf610_gpio_free;
  212. gc->direction_input = vf610_gpio_direction_input;
  213. gc->get = vf610_gpio_get;
  214. gc->direction_output = vf610_gpio_direction_output;
  215. gc->set = vf610_gpio_set;
  216. ret = gpiochip_add(gc);
  217. if (ret < 0)
  218. return ret;
  219. /* Clear the interrupt status register for all GPIO's */
  220. vf610_gpio_writel(~0, port->base + PORT_ISFR);
  221. ret = gpiochip_irqchip_add(gc, &vf610_gpio_irq_chip, 0,
  222. handle_edge_irq, IRQ_TYPE_NONE);
  223. if (ret) {
  224. dev_err(dev, "failed to add irqchip\n");
  225. gpiochip_remove(gc);
  226. return ret;
  227. }
  228. gpiochip_set_chained_irqchip(gc, &vf610_gpio_irq_chip, port->irq,
  229. vf610_gpio_irq_handler);
  230. return 0;
  231. }
  232. static struct platform_driver vf610_gpio_driver = {
  233. .driver = {
  234. .name = "gpio-vf610",
  235. .of_match_table = vf610_gpio_dt_ids,
  236. },
  237. .probe = vf610_gpio_probe,
  238. };
  239. static int __init gpio_vf610_init(void)
  240. {
  241. return platform_driver_register(&vf610_gpio_driver);
  242. }
  243. device_initcall(gpio_vf610_init);
  244. MODULE_AUTHOR("Stefan Agner <stefan@agner.ch>");
  245. MODULE_DESCRIPTION("Freescale VF610 GPIO");
  246. MODULE_LICENSE("GPL v2");