utils.c 39 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319
  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  10. * Copyright (C) 2015 Intel Deutschland GmbH
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of version 2 of the GNU General Public License as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  24. * USA
  25. *
  26. * The full GNU General Public License is included in this distribution
  27. * in the file called COPYING.
  28. *
  29. * Contact Information:
  30. * Intel Linux Wireless <linuxwifi@intel.com>
  31. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  32. *
  33. * BSD LICENSE
  34. *
  35. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  36. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  37. * All rights reserved.
  38. *
  39. * Redistribution and use in source and binary forms, with or without
  40. * modification, are permitted provided that the following conditions
  41. * are met:
  42. *
  43. * * Redistributions of source code must retain the above copyright
  44. * notice, this list of conditions and the following disclaimer.
  45. * * Redistributions in binary form must reproduce the above copyright
  46. * notice, this list of conditions and the following disclaimer in
  47. * the documentation and/or other materials provided with the
  48. * distribution.
  49. * * Neither the name Intel Corporation nor the names of its
  50. * contributors may be used to endorse or promote products derived
  51. * from this software without specific prior written permission.
  52. *
  53. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  54. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  55. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  56. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  57. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  58. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  59. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  60. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  61. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  62. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  63. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  64. *
  65. *****************************************************************************/
  66. #include <net/mac80211.h>
  67. #include "iwl-debug.h"
  68. #include "iwl-io.h"
  69. #include "iwl-prph.h"
  70. #include "fw-dbg.h"
  71. #include "mvm.h"
  72. #include "fw-api-rs.h"
  73. /*
  74. * Will return 0 even if the cmd failed when RFKILL is asserted unless
  75. * CMD_WANT_SKB is set in cmd->flags.
  76. */
  77. int iwl_mvm_send_cmd(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd)
  78. {
  79. int ret;
  80. #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
  81. if (WARN_ON(mvm->d3_test_active))
  82. return -EIO;
  83. #endif
  84. /*
  85. * Synchronous commands from this op-mode must hold
  86. * the mutex, this ensures we don't try to send two
  87. * (or more) synchronous commands at a time.
  88. */
  89. if (!(cmd->flags & CMD_ASYNC)) {
  90. lockdep_assert_held(&mvm->mutex);
  91. if (!(cmd->flags & CMD_SEND_IN_IDLE))
  92. iwl_mvm_ref(mvm, IWL_MVM_REF_SENDING_CMD);
  93. }
  94. ret = iwl_trans_send_cmd(mvm->trans, cmd);
  95. if (!(cmd->flags & (CMD_ASYNC | CMD_SEND_IN_IDLE)))
  96. iwl_mvm_unref(mvm, IWL_MVM_REF_SENDING_CMD);
  97. /*
  98. * If the caller wants the SKB, then don't hide any problems, the
  99. * caller might access the response buffer which will be NULL if
  100. * the command failed.
  101. */
  102. if (cmd->flags & CMD_WANT_SKB)
  103. return ret;
  104. /* Silently ignore failures if RFKILL is asserted */
  105. if (!ret || ret == -ERFKILL)
  106. return 0;
  107. return ret;
  108. }
  109. int iwl_mvm_send_cmd_pdu(struct iwl_mvm *mvm, u32 id,
  110. u32 flags, u16 len, const void *data)
  111. {
  112. struct iwl_host_cmd cmd = {
  113. .id = id,
  114. .len = { len, },
  115. .data = { data, },
  116. .flags = flags,
  117. };
  118. return iwl_mvm_send_cmd(mvm, &cmd);
  119. }
  120. /*
  121. * We assume that the caller set the status to the success value
  122. */
  123. int iwl_mvm_send_cmd_status(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd,
  124. u32 *status)
  125. {
  126. struct iwl_rx_packet *pkt;
  127. struct iwl_cmd_response *resp;
  128. int ret, resp_len;
  129. lockdep_assert_held(&mvm->mutex);
  130. #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
  131. if (WARN_ON(mvm->d3_test_active))
  132. return -EIO;
  133. #endif
  134. /*
  135. * Only synchronous commands can wait for status,
  136. * we use WANT_SKB so the caller can't.
  137. */
  138. if (WARN_ONCE(cmd->flags & (CMD_ASYNC | CMD_WANT_SKB),
  139. "cmd flags %x", cmd->flags))
  140. return -EINVAL;
  141. cmd->flags |= CMD_WANT_SKB;
  142. ret = iwl_trans_send_cmd(mvm->trans, cmd);
  143. if (ret == -ERFKILL) {
  144. /*
  145. * The command failed because of RFKILL, don't update
  146. * the status, leave it as success and return 0.
  147. */
  148. return 0;
  149. } else if (ret) {
  150. return ret;
  151. }
  152. pkt = cmd->resp_pkt;
  153. /* Can happen if RFKILL is asserted */
  154. if (!pkt) {
  155. ret = 0;
  156. goto out_free_resp;
  157. }
  158. resp_len = iwl_rx_packet_payload_len(pkt);
  159. if (WARN_ON_ONCE(resp_len != sizeof(*resp))) {
  160. ret = -EIO;
  161. goto out_free_resp;
  162. }
  163. resp = (void *)pkt->data;
  164. *status = le32_to_cpu(resp->status);
  165. out_free_resp:
  166. iwl_free_resp(cmd);
  167. return ret;
  168. }
  169. /*
  170. * We assume that the caller set the status to the sucess value
  171. */
  172. int iwl_mvm_send_cmd_pdu_status(struct iwl_mvm *mvm, u32 id, u16 len,
  173. const void *data, u32 *status)
  174. {
  175. struct iwl_host_cmd cmd = {
  176. .id = id,
  177. .len = { len, },
  178. .data = { data, },
  179. };
  180. return iwl_mvm_send_cmd_status(mvm, &cmd, status);
  181. }
  182. #define IWL_DECLARE_RATE_INFO(r) \
  183. [IWL_RATE_##r##M_INDEX] = IWL_RATE_##r##M_PLCP
  184. /*
  185. * Translate from fw_rate_index (IWL_RATE_XXM_INDEX) to PLCP
  186. */
  187. static const u8 fw_rate_idx_to_plcp[IWL_RATE_COUNT] = {
  188. IWL_DECLARE_RATE_INFO(1),
  189. IWL_DECLARE_RATE_INFO(2),
  190. IWL_DECLARE_RATE_INFO(5),
  191. IWL_DECLARE_RATE_INFO(11),
  192. IWL_DECLARE_RATE_INFO(6),
  193. IWL_DECLARE_RATE_INFO(9),
  194. IWL_DECLARE_RATE_INFO(12),
  195. IWL_DECLARE_RATE_INFO(18),
  196. IWL_DECLARE_RATE_INFO(24),
  197. IWL_DECLARE_RATE_INFO(36),
  198. IWL_DECLARE_RATE_INFO(48),
  199. IWL_DECLARE_RATE_INFO(54),
  200. };
  201. int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags,
  202. enum nl80211_band band)
  203. {
  204. int rate = rate_n_flags & RATE_LEGACY_RATE_MSK;
  205. int idx;
  206. int band_offset = 0;
  207. /* Legacy rate format, search for match in table */
  208. if (band == NL80211_BAND_5GHZ)
  209. band_offset = IWL_FIRST_OFDM_RATE;
  210. for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
  211. if (fw_rate_idx_to_plcp[idx] == rate)
  212. return idx - band_offset;
  213. return -1;
  214. }
  215. u8 iwl_mvm_mac80211_idx_to_hwrate(int rate_idx)
  216. {
  217. /* Get PLCP rate for tx_cmd->rate_n_flags */
  218. return fw_rate_idx_to_plcp[rate_idx];
  219. }
  220. void iwl_mvm_rx_fw_error(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb)
  221. {
  222. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  223. struct iwl_error_resp *err_resp = (void *)pkt->data;
  224. IWL_ERR(mvm, "FW Error notification: type 0x%08X cmd_id 0x%02X\n",
  225. le32_to_cpu(err_resp->error_type), err_resp->cmd_id);
  226. IWL_ERR(mvm, "FW Error notification: seq 0x%04X service 0x%08X\n",
  227. le16_to_cpu(err_resp->bad_cmd_seq_num),
  228. le32_to_cpu(err_resp->error_service));
  229. IWL_ERR(mvm, "FW Error notification: timestamp 0x%16llX\n",
  230. le64_to_cpu(err_resp->timestamp));
  231. }
  232. /*
  233. * Returns the first antenna as ANT_[ABC], as defined in iwl-config.h.
  234. * The parameter should also be a combination of ANT_[ABC].
  235. */
  236. u8 first_antenna(u8 mask)
  237. {
  238. BUILD_BUG_ON(ANT_A != BIT(0)); /* using ffs is wrong if not */
  239. if (WARN_ON_ONCE(!mask)) /* ffs will return 0 if mask is zeroed */
  240. return BIT(0);
  241. return BIT(ffs(mask) - 1);
  242. }
  243. /*
  244. * Toggles between TX antennas to send the probe request on.
  245. * Receives the bitmask of valid TX antennas and the *index* used
  246. * for the last TX, and returns the next valid *index* to use.
  247. * In order to set it in the tx_cmd, must do BIT(idx).
  248. */
  249. u8 iwl_mvm_next_antenna(struct iwl_mvm *mvm, u8 valid, u8 last_idx)
  250. {
  251. u8 ind = last_idx;
  252. int i;
  253. for (i = 0; i < RATE_MCS_ANT_NUM; i++) {
  254. ind = (ind + 1) % RATE_MCS_ANT_NUM;
  255. if (valid & BIT(ind))
  256. return ind;
  257. }
  258. WARN_ONCE(1, "Failed to toggle between antennas 0x%x", valid);
  259. return last_idx;
  260. }
  261. static const struct {
  262. const char *name;
  263. u8 num;
  264. } advanced_lookup[] = {
  265. { "NMI_INTERRUPT_WDG", 0x34 },
  266. { "SYSASSERT", 0x35 },
  267. { "UCODE_VERSION_MISMATCH", 0x37 },
  268. { "BAD_COMMAND", 0x38 },
  269. { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
  270. { "FATAL_ERROR", 0x3D },
  271. { "NMI_TRM_HW_ERR", 0x46 },
  272. { "NMI_INTERRUPT_TRM", 0x4C },
  273. { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
  274. { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
  275. { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
  276. { "NMI_INTERRUPT_HOST", 0x66 },
  277. { "NMI_INTERRUPT_ACTION_PT", 0x7C },
  278. { "NMI_INTERRUPT_UNKNOWN", 0x84 },
  279. { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
  280. { "ADVANCED_SYSASSERT", 0 },
  281. };
  282. static const char *desc_lookup(u32 num)
  283. {
  284. int i;
  285. for (i = 0; i < ARRAY_SIZE(advanced_lookup) - 1; i++)
  286. if (advanced_lookup[i].num == num)
  287. return advanced_lookup[i].name;
  288. /* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */
  289. return advanced_lookup[i].name;
  290. }
  291. /*
  292. * Note: This structure is read from the device with IO accesses,
  293. * and the reading already does the endian conversion. As it is
  294. * read with u32-sized accesses, any members with a different size
  295. * need to be ordered correctly though!
  296. */
  297. struct iwl_error_event_table_v1 {
  298. u32 valid; /* (nonzero) valid, (0) log is empty */
  299. u32 error_id; /* type of error */
  300. u32 pc; /* program counter */
  301. u32 blink1; /* branch link */
  302. u32 blink2; /* branch link */
  303. u32 ilink1; /* interrupt link */
  304. u32 ilink2; /* interrupt link */
  305. u32 data1; /* error-specific data */
  306. u32 data2; /* error-specific data */
  307. u32 data3; /* error-specific data */
  308. u32 bcon_time; /* beacon timer */
  309. u32 tsf_low; /* network timestamp function timer */
  310. u32 tsf_hi; /* network timestamp function timer */
  311. u32 gp1; /* GP1 timer register */
  312. u32 gp2; /* GP2 timer register */
  313. u32 gp3; /* GP3 timer register */
  314. u32 ucode_ver; /* uCode version */
  315. u32 hw_ver; /* HW Silicon version */
  316. u32 brd_ver; /* HW board version */
  317. u32 log_pc; /* log program counter */
  318. u32 frame_ptr; /* frame pointer */
  319. u32 stack_ptr; /* stack pointer */
  320. u32 hcmd; /* last host command header */
  321. u32 isr0; /* isr status register LMPM_NIC_ISR0:
  322. * rxtx_flag */
  323. u32 isr1; /* isr status register LMPM_NIC_ISR1:
  324. * host_flag */
  325. u32 isr2; /* isr status register LMPM_NIC_ISR2:
  326. * enc_flag */
  327. u32 isr3; /* isr status register LMPM_NIC_ISR3:
  328. * time_flag */
  329. u32 isr4; /* isr status register LMPM_NIC_ISR4:
  330. * wico interrupt */
  331. u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
  332. u32 wait_event; /* wait event() caller address */
  333. u32 l2p_control; /* L2pControlField */
  334. u32 l2p_duration; /* L2pDurationField */
  335. u32 l2p_mhvalid; /* L2pMhValidBits */
  336. u32 l2p_addr_match; /* L2pAddrMatchStat */
  337. u32 lmpm_pmg_sel; /* indicate which clocks are turned on
  338. * (LMPM_PMG_SEL) */
  339. u32 u_timestamp; /* indicate when the date and time of the
  340. * compilation */
  341. u32 flow_handler; /* FH read/write pointers, RX credit */
  342. } __packed /* LOG_ERROR_TABLE_API_S_VER_1 */;
  343. struct iwl_error_event_table {
  344. u32 valid; /* (nonzero) valid, (0) log is empty */
  345. u32 error_id; /* type of error */
  346. u32 trm_hw_status0; /* TRM HW status */
  347. u32 trm_hw_status1; /* TRM HW status */
  348. u32 blink2; /* branch link */
  349. u32 ilink1; /* interrupt link */
  350. u32 ilink2; /* interrupt link */
  351. u32 data1; /* error-specific data */
  352. u32 data2; /* error-specific data */
  353. u32 data3; /* error-specific data */
  354. u32 bcon_time; /* beacon timer */
  355. u32 tsf_low; /* network timestamp function timer */
  356. u32 tsf_hi; /* network timestamp function timer */
  357. u32 gp1; /* GP1 timer register */
  358. u32 gp2; /* GP2 timer register */
  359. u32 fw_rev_type; /* firmware revision type */
  360. u32 major; /* uCode version major */
  361. u32 minor; /* uCode version minor */
  362. u32 hw_ver; /* HW Silicon version */
  363. u32 brd_ver; /* HW board version */
  364. u32 log_pc; /* log program counter */
  365. u32 frame_ptr; /* frame pointer */
  366. u32 stack_ptr; /* stack pointer */
  367. u32 hcmd; /* last host command header */
  368. u32 isr0; /* isr status register LMPM_NIC_ISR0:
  369. * rxtx_flag */
  370. u32 isr1; /* isr status register LMPM_NIC_ISR1:
  371. * host_flag */
  372. u32 isr2; /* isr status register LMPM_NIC_ISR2:
  373. * enc_flag */
  374. u32 isr3; /* isr status register LMPM_NIC_ISR3:
  375. * time_flag */
  376. u32 isr4; /* isr status register LMPM_NIC_ISR4:
  377. * wico interrupt */
  378. u32 last_cmd_id; /* last HCMD id handled by the firmware */
  379. u32 wait_event; /* wait event() caller address */
  380. u32 l2p_control; /* L2pControlField */
  381. u32 l2p_duration; /* L2pDurationField */
  382. u32 l2p_mhvalid; /* L2pMhValidBits */
  383. u32 l2p_addr_match; /* L2pAddrMatchStat */
  384. u32 lmpm_pmg_sel; /* indicate which clocks are turned on
  385. * (LMPM_PMG_SEL) */
  386. u32 u_timestamp; /* indicate when the date and time of the
  387. * compilation */
  388. u32 flow_handler; /* FH read/write pointers, RX credit */
  389. } __packed /* LOG_ERROR_TABLE_API_S_VER_3 */;
  390. /*
  391. * UMAC error struct - relevant starting from family 8000 chip.
  392. * Note: This structure is read from the device with IO accesses,
  393. * and the reading already does the endian conversion. As it is
  394. * read with u32-sized accesses, any members with a different size
  395. * need to be ordered correctly though!
  396. */
  397. struct iwl_umac_error_event_table {
  398. u32 valid; /* (nonzero) valid, (0) log is empty */
  399. u32 error_id; /* type of error */
  400. u32 blink1; /* branch link */
  401. u32 blink2; /* branch link */
  402. u32 ilink1; /* interrupt link */
  403. u32 ilink2; /* interrupt link */
  404. u32 data1; /* error-specific data */
  405. u32 data2; /* error-specific data */
  406. u32 data3; /* error-specific data */
  407. u32 umac_major;
  408. u32 umac_minor;
  409. u32 frame_pointer; /* core register 27*/
  410. u32 stack_pointer; /* core register 28 */
  411. u32 cmd_header; /* latest host cmd sent to UMAC */
  412. u32 nic_isr_pref; /* ISR status register */
  413. } __packed;
  414. #define ERROR_START_OFFSET (1 * sizeof(u32))
  415. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  416. static void iwl_mvm_dump_umac_error_log(struct iwl_mvm *mvm)
  417. {
  418. struct iwl_trans *trans = mvm->trans;
  419. struct iwl_umac_error_event_table table;
  420. u32 base;
  421. base = mvm->umac_error_event_table;
  422. if (base < 0x800000) {
  423. IWL_ERR(mvm,
  424. "Not valid error log pointer 0x%08X for %s uCode\n",
  425. base,
  426. (mvm->cur_ucode == IWL_UCODE_INIT)
  427. ? "Init" : "RT");
  428. return;
  429. }
  430. iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
  431. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  432. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  433. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  434. mvm->status, table.valid);
  435. }
  436. IWL_ERR(mvm, "0x%08X | %s\n", table.error_id,
  437. desc_lookup(table.error_id));
  438. IWL_ERR(mvm, "0x%08X | umac branchlink1\n", table.blink1);
  439. IWL_ERR(mvm, "0x%08X | umac branchlink2\n", table.blink2);
  440. IWL_ERR(mvm, "0x%08X | umac interruptlink1\n", table.ilink1);
  441. IWL_ERR(mvm, "0x%08X | umac interruptlink2\n", table.ilink2);
  442. IWL_ERR(mvm, "0x%08X | umac data1\n", table.data1);
  443. IWL_ERR(mvm, "0x%08X | umac data2\n", table.data2);
  444. IWL_ERR(mvm, "0x%08X | umac data3\n", table.data3);
  445. IWL_ERR(mvm, "0x%08X | umac major\n", table.umac_major);
  446. IWL_ERR(mvm, "0x%08X | umac minor\n", table.umac_minor);
  447. IWL_ERR(mvm, "0x%08X | frame pointer\n", table.frame_pointer);
  448. IWL_ERR(mvm, "0x%08X | stack pointer\n", table.stack_pointer);
  449. IWL_ERR(mvm, "0x%08X | last host cmd\n", table.cmd_header);
  450. IWL_ERR(mvm, "0x%08X | isr status reg\n", table.nic_isr_pref);
  451. }
  452. void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm)
  453. {
  454. struct iwl_trans *trans = mvm->trans;
  455. struct iwl_error_event_table table;
  456. u32 base;
  457. base = mvm->error_event_table;
  458. if (mvm->cur_ucode == IWL_UCODE_INIT) {
  459. if (!base)
  460. base = mvm->fw->init_errlog_ptr;
  461. } else {
  462. if (!base)
  463. base = mvm->fw->inst_errlog_ptr;
  464. }
  465. if (base < 0x800000) {
  466. IWL_ERR(mvm,
  467. "Not valid error log pointer 0x%08X for %s uCode\n",
  468. base,
  469. (mvm->cur_ucode == IWL_UCODE_INIT)
  470. ? "Init" : "RT");
  471. return;
  472. }
  473. iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
  474. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  475. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  476. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  477. mvm->status, table.valid);
  478. }
  479. /* Do not change this output - scripts rely on it */
  480. IWL_ERR(mvm, "Loaded firmware version: %s\n", mvm->fw->fw_version);
  481. trace_iwlwifi_dev_ucode_error(trans->dev, table.error_id, table.tsf_low,
  482. table.data1, table.data2, table.data3,
  483. table.blink2, table.ilink1,
  484. table.ilink2, table.bcon_time, table.gp1,
  485. table.gp2, table.fw_rev_type, table.major,
  486. table.minor, table.hw_ver, table.brd_ver);
  487. IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id,
  488. desc_lookup(table.error_id));
  489. IWL_ERR(mvm, "0x%08X | trm_hw_status0\n", table.trm_hw_status0);
  490. IWL_ERR(mvm, "0x%08X | trm_hw_status1\n", table.trm_hw_status1);
  491. IWL_ERR(mvm, "0x%08X | branchlink2\n", table.blink2);
  492. IWL_ERR(mvm, "0x%08X | interruptlink1\n", table.ilink1);
  493. IWL_ERR(mvm, "0x%08X | interruptlink2\n", table.ilink2);
  494. IWL_ERR(mvm, "0x%08X | data1\n", table.data1);
  495. IWL_ERR(mvm, "0x%08X | data2\n", table.data2);
  496. IWL_ERR(mvm, "0x%08X | data3\n", table.data3);
  497. IWL_ERR(mvm, "0x%08X | beacon time\n", table.bcon_time);
  498. IWL_ERR(mvm, "0x%08X | tsf low\n", table.tsf_low);
  499. IWL_ERR(mvm, "0x%08X | tsf hi\n", table.tsf_hi);
  500. IWL_ERR(mvm, "0x%08X | time gp1\n", table.gp1);
  501. IWL_ERR(mvm, "0x%08X | time gp2\n", table.gp2);
  502. IWL_ERR(mvm, "0x%08X | uCode revision type\n", table.fw_rev_type);
  503. IWL_ERR(mvm, "0x%08X | uCode version major\n", table.major);
  504. IWL_ERR(mvm, "0x%08X | uCode version minor\n", table.minor);
  505. IWL_ERR(mvm, "0x%08X | hw version\n", table.hw_ver);
  506. IWL_ERR(mvm, "0x%08X | board version\n", table.brd_ver);
  507. IWL_ERR(mvm, "0x%08X | hcmd\n", table.hcmd);
  508. IWL_ERR(mvm, "0x%08X | isr0\n", table.isr0);
  509. IWL_ERR(mvm, "0x%08X | isr1\n", table.isr1);
  510. IWL_ERR(mvm, "0x%08X | isr2\n", table.isr2);
  511. IWL_ERR(mvm, "0x%08X | isr3\n", table.isr3);
  512. IWL_ERR(mvm, "0x%08X | isr4\n", table.isr4);
  513. IWL_ERR(mvm, "0x%08X | last cmd Id\n", table.last_cmd_id);
  514. IWL_ERR(mvm, "0x%08X | wait_event\n", table.wait_event);
  515. IWL_ERR(mvm, "0x%08X | l2p_control\n", table.l2p_control);
  516. IWL_ERR(mvm, "0x%08X | l2p_duration\n", table.l2p_duration);
  517. IWL_ERR(mvm, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid);
  518. IWL_ERR(mvm, "0x%08X | l2p_addr_match\n", table.l2p_addr_match);
  519. IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);
  520. IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp);
  521. IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler);
  522. if (mvm->support_umac_log)
  523. iwl_mvm_dump_umac_error_log(mvm);
  524. }
  525. int iwl_mvm_find_free_queue(struct iwl_mvm *mvm, u8 sta_id, u8 minq, u8 maxq)
  526. {
  527. int i;
  528. lockdep_assert_held(&mvm->queue_info_lock);
  529. /* Start by looking for a free queue */
  530. for (i = minq; i <= maxq; i++)
  531. if (mvm->queue_info[i].hw_queue_refcount == 0 &&
  532. mvm->queue_info[i].status == IWL_MVM_QUEUE_FREE)
  533. return i;
  534. /*
  535. * If no free queue found - settle for an inactive one to reconfigure
  536. * Make sure that the inactive queue either already belongs to this STA,
  537. * or that if it belongs to another one - it isn't the reserved queue
  538. */
  539. for (i = minq; i <= maxq; i++)
  540. if (mvm->queue_info[i].status == IWL_MVM_QUEUE_INACTIVE &&
  541. (sta_id == mvm->queue_info[i].ra_sta_id ||
  542. !mvm->queue_info[i].reserved))
  543. return i;
  544. return -ENOSPC;
  545. }
  546. int iwl_mvm_reconfig_scd(struct iwl_mvm *mvm, int queue, int fifo, int sta_id,
  547. int tid, int frame_limit, u16 ssn)
  548. {
  549. struct iwl_scd_txq_cfg_cmd cmd = {
  550. .scd_queue = queue,
  551. .action = SCD_CFG_ENABLE_QUEUE,
  552. .window = frame_limit,
  553. .sta_id = sta_id,
  554. .ssn = cpu_to_le16(ssn),
  555. .tx_fifo = fifo,
  556. .aggregate = (queue >= IWL_MVM_DQA_MIN_DATA_QUEUE ||
  557. queue == IWL_MVM_DQA_BSS_CLIENT_QUEUE),
  558. .tid = tid,
  559. };
  560. int ret;
  561. spin_lock_bh(&mvm->queue_info_lock);
  562. if (WARN(mvm->queue_info[queue].hw_queue_refcount == 0,
  563. "Trying to reconfig unallocated queue %d\n", queue)) {
  564. spin_unlock_bh(&mvm->queue_info_lock);
  565. return -ENXIO;
  566. }
  567. spin_unlock_bh(&mvm->queue_info_lock);
  568. IWL_DEBUG_TX_QUEUES(mvm, "Reconfig SCD for TXQ #%d\n", queue);
  569. ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd);
  570. WARN_ONCE(ret, "Failed to re-configure queue %d on FIFO %d, ret=%d\n",
  571. queue, fifo, ret);
  572. return ret;
  573. }
  574. void iwl_mvm_enable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
  575. u16 ssn, const struct iwl_trans_txq_scd_cfg *cfg,
  576. unsigned int wdg_timeout)
  577. {
  578. bool enable_queue = true;
  579. spin_lock_bh(&mvm->queue_info_lock);
  580. /* Make sure this TID isn't already enabled */
  581. if (mvm->queue_info[queue].tid_bitmap & BIT(cfg->tid)) {
  582. spin_unlock_bh(&mvm->queue_info_lock);
  583. IWL_ERR(mvm, "Trying to enable TXQ with existing TID %d\n",
  584. cfg->tid);
  585. return;
  586. }
  587. /* Update mappings and refcounts */
  588. if (mvm->queue_info[queue].hw_queue_refcount > 0)
  589. enable_queue = false;
  590. mvm->queue_info[queue].hw_queue_to_mac80211 |= BIT(mac80211_queue);
  591. mvm->queue_info[queue].hw_queue_refcount++;
  592. mvm->queue_info[queue].tid_bitmap |= BIT(cfg->tid);
  593. mvm->queue_info[queue].ra_sta_id = cfg->sta_id;
  594. if (enable_queue) {
  595. if (cfg->tid != IWL_MAX_TID_COUNT)
  596. mvm->queue_info[queue].mac80211_ac =
  597. tid_to_mac80211_ac[cfg->tid];
  598. else
  599. mvm->queue_info[queue].mac80211_ac = IEEE80211_AC_VO;
  600. mvm->queue_info[queue].txq_tid = cfg->tid;
  601. }
  602. IWL_DEBUG_TX_QUEUES(mvm,
  603. "Enabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
  604. queue, mvm->queue_info[queue].hw_queue_refcount,
  605. mvm->queue_info[queue].hw_queue_to_mac80211);
  606. spin_unlock_bh(&mvm->queue_info_lock);
  607. /* Send the enabling command if we need to */
  608. if (enable_queue) {
  609. struct iwl_scd_txq_cfg_cmd cmd = {
  610. .scd_queue = queue,
  611. .action = SCD_CFG_ENABLE_QUEUE,
  612. .window = cfg->frame_limit,
  613. .sta_id = cfg->sta_id,
  614. .ssn = cpu_to_le16(ssn),
  615. .tx_fifo = cfg->fifo,
  616. .aggregate = cfg->aggregate,
  617. .tid = cfg->tid,
  618. };
  619. /* Set sta_id in the command, if it exists */
  620. if (iwl_mvm_is_dqa_supported(mvm))
  621. cmd.sta_id = cfg->sta_id;
  622. iwl_trans_txq_enable_cfg(mvm->trans, queue, ssn, NULL,
  623. wdg_timeout);
  624. WARN(iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd),
  625. &cmd),
  626. "Failed to configure queue %d on FIFO %d\n", queue,
  627. cfg->fifo);
  628. }
  629. }
  630. void iwl_mvm_disable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
  631. u8 tid, u8 flags)
  632. {
  633. struct iwl_scd_txq_cfg_cmd cmd = {
  634. .scd_queue = queue,
  635. .action = SCD_CFG_DISABLE_QUEUE,
  636. };
  637. bool remove_mac_queue = true;
  638. int ret;
  639. spin_lock_bh(&mvm->queue_info_lock);
  640. if (WARN_ON(mvm->queue_info[queue].hw_queue_refcount == 0)) {
  641. spin_unlock_bh(&mvm->queue_info_lock);
  642. return;
  643. }
  644. mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
  645. /*
  646. * If there is another TID with the same AC - don't remove the MAC queue
  647. * from the mapping
  648. */
  649. if (tid < IWL_MAX_TID_COUNT) {
  650. unsigned long tid_bitmap =
  651. mvm->queue_info[queue].tid_bitmap;
  652. int ac = tid_to_mac80211_ac[tid];
  653. int i;
  654. for_each_set_bit(i, &tid_bitmap, IWL_MAX_TID_COUNT) {
  655. if (tid_to_mac80211_ac[i] == ac)
  656. remove_mac_queue = false;
  657. }
  658. }
  659. if (remove_mac_queue)
  660. mvm->queue_info[queue].hw_queue_to_mac80211 &=
  661. ~BIT(mac80211_queue);
  662. mvm->queue_info[queue].hw_queue_refcount--;
  663. cmd.action = mvm->queue_info[queue].hw_queue_refcount ?
  664. SCD_CFG_ENABLE_QUEUE : SCD_CFG_DISABLE_QUEUE;
  665. if (cmd.action == SCD_CFG_DISABLE_QUEUE)
  666. mvm->queue_info[queue].status = IWL_MVM_QUEUE_FREE;
  667. IWL_DEBUG_TX_QUEUES(mvm,
  668. "Disabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
  669. queue,
  670. mvm->queue_info[queue].hw_queue_refcount,
  671. mvm->queue_info[queue].hw_queue_to_mac80211);
  672. /* If the queue is still enabled - nothing left to do in this func */
  673. if (cmd.action == SCD_CFG_ENABLE_QUEUE) {
  674. spin_unlock_bh(&mvm->queue_info_lock);
  675. return;
  676. }
  677. cmd.sta_id = mvm->queue_info[queue].ra_sta_id;
  678. cmd.tid = mvm->queue_info[queue].txq_tid;
  679. /* Make sure queue info is correct even though we overwrite it */
  680. WARN(mvm->queue_info[queue].hw_queue_refcount ||
  681. mvm->queue_info[queue].tid_bitmap ||
  682. mvm->queue_info[queue].hw_queue_to_mac80211,
  683. "TXQ #%d info out-of-sync - refcount=%d, mac map=0x%x, tid=0x%x\n",
  684. queue, mvm->queue_info[queue].hw_queue_refcount,
  685. mvm->queue_info[queue].hw_queue_to_mac80211,
  686. mvm->queue_info[queue].tid_bitmap);
  687. /* If we are here - the queue is freed and we can zero out these vals */
  688. mvm->queue_info[queue].hw_queue_refcount = 0;
  689. mvm->queue_info[queue].tid_bitmap = 0;
  690. mvm->queue_info[queue].hw_queue_to_mac80211 = 0;
  691. /* Regardless if this is a reserved TXQ for a STA - mark it as false */
  692. mvm->queue_info[queue].reserved = false;
  693. spin_unlock_bh(&mvm->queue_info_lock);
  694. iwl_trans_txq_disable(mvm->trans, queue, false);
  695. ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, flags,
  696. sizeof(cmd), &cmd);
  697. if (ret)
  698. IWL_ERR(mvm, "Failed to disable queue %d (ret=%d)\n",
  699. queue, ret);
  700. }
  701. /**
  702. * iwl_mvm_send_lq_cmd() - Send link quality command
  703. * @init: This command is sent as part of station initialization right
  704. * after station has been added.
  705. *
  706. * The link quality command is sent as the last step of station creation.
  707. * This is the special case in which init is set and we call a callback in
  708. * this case to clear the state indicating that station creation is in
  709. * progress.
  710. */
  711. int iwl_mvm_send_lq_cmd(struct iwl_mvm *mvm, struct iwl_lq_cmd *lq, bool init)
  712. {
  713. struct iwl_host_cmd cmd = {
  714. .id = LQ_CMD,
  715. .len = { sizeof(struct iwl_lq_cmd), },
  716. .flags = init ? 0 : CMD_ASYNC,
  717. .data = { lq, },
  718. };
  719. if (WARN_ON(lq->sta_id == IWL_MVM_STATION_COUNT))
  720. return -EINVAL;
  721. return iwl_mvm_send_cmd(mvm, &cmd);
  722. }
  723. /**
  724. * iwl_mvm_update_smps - Get a request to change the SMPS mode
  725. * @req_type: The part of the driver who call for a change.
  726. * @smps_requests: The request to change the SMPS mode.
  727. *
  728. * Get a requst to change the SMPS mode,
  729. * and change it according to all other requests in the driver.
  730. */
  731. void iwl_mvm_update_smps(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  732. enum iwl_mvm_smps_type_request req_type,
  733. enum ieee80211_smps_mode smps_request)
  734. {
  735. struct iwl_mvm_vif *mvmvif;
  736. enum ieee80211_smps_mode smps_mode;
  737. int i;
  738. lockdep_assert_held(&mvm->mutex);
  739. /* SMPS is irrelevant for NICs that don't have at least 2 RX antenna */
  740. if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
  741. return;
  742. if (vif->type == NL80211_IFTYPE_AP)
  743. smps_mode = IEEE80211_SMPS_OFF;
  744. else
  745. smps_mode = IEEE80211_SMPS_AUTOMATIC;
  746. mvmvif = iwl_mvm_vif_from_mac80211(vif);
  747. mvmvif->smps_requests[req_type] = smps_request;
  748. for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
  749. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC) {
  750. smps_mode = IEEE80211_SMPS_STATIC;
  751. break;
  752. }
  753. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
  754. smps_mode = IEEE80211_SMPS_DYNAMIC;
  755. }
  756. ieee80211_request_smps(vif, smps_mode);
  757. }
  758. int iwl_mvm_request_statistics(struct iwl_mvm *mvm, bool clear)
  759. {
  760. struct iwl_statistics_cmd scmd = {
  761. .flags = clear ? cpu_to_le32(IWL_STATISTICS_FLG_CLEAR) : 0,
  762. };
  763. struct iwl_host_cmd cmd = {
  764. .id = STATISTICS_CMD,
  765. .len[0] = sizeof(scmd),
  766. .data[0] = &scmd,
  767. .flags = CMD_WANT_SKB,
  768. };
  769. int ret;
  770. ret = iwl_mvm_send_cmd(mvm, &cmd);
  771. if (ret)
  772. return ret;
  773. iwl_mvm_handle_rx_statistics(mvm, cmd.resp_pkt);
  774. iwl_free_resp(&cmd);
  775. if (clear)
  776. iwl_mvm_accu_radio_stats(mvm);
  777. return 0;
  778. }
  779. void iwl_mvm_accu_radio_stats(struct iwl_mvm *mvm)
  780. {
  781. mvm->accu_radio_stats.rx_time += mvm->radio_stats.rx_time;
  782. mvm->accu_radio_stats.tx_time += mvm->radio_stats.tx_time;
  783. mvm->accu_radio_stats.on_time_rf += mvm->radio_stats.on_time_rf;
  784. mvm->accu_radio_stats.on_time_scan += mvm->radio_stats.on_time_scan;
  785. }
  786. static void iwl_mvm_diversity_iter(void *_data, u8 *mac,
  787. struct ieee80211_vif *vif)
  788. {
  789. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  790. bool *result = _data;
  791. int i;
  792. for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
  793. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC ||
  794. mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
  795. *result = false;
  796. }
  797. }
  798. bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm)
  799. {
  800. bool result = true;
  801. lockdep_assert_held(&mvm->mutex);
  802. if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
  803. return false;
  804. if (mvm->cfg->rx_with_siso_diversity)
  805. return false;
  806. ieee80211_iterate_active_interfaces_atomic(
  807. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  808. iwl_mvm_diversity_iter, &result);
  809. return result;
  810. }
  811. int iwl_mvm_update_low_latency(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  812. bool prev)
  813. {
  814. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  815. int res;
  816. lockdep_assert_held(&mvm->mutex);
  817. if (iwl_mvm_vif_low_latency(mvmvif) == prev)
  818. return 0;
  819. res = iwl_mvm_update_quotas(mvm, false, NULL);
  820. if (res)
  821. return res;
  822. iwl_mvm_bt_coex_vif_change(mvm);
  823. return iwl_mvm_power_update_mac(mvm);
  824. }
  825. static void iwl_mvm_ll_iter(void *_data, u8 *mac, struct ieee80211_vif *vif)
  826. {
  827. bool *result = _data;
  828. if (iwl_mvm_vif_low_latency(iwl_mvm_vif_from_mac80211(vif)))
  829. *result = true;
  830. }
  831. bool iwl_mvm_low_latency(struct iwl_mvm *mvm)
  832. {
  833. bool result = false;
  834. ieee80211_iterate_active_interfaces_atomic(
  835. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  836. iwl_mvm_ll_iter, &result);
  837. return result;
  838. }
  839. struct iwl_bss_iter_data {
  840. struct ieee80211_vif *vif;
  841. bool error;
  842. };
  843. static void iwl_mvm_bss_iface_iterator(void *_data, u8 *mac,
  844. struct ieee80211_vif *vif)
  845. {
  846. struct iwl_bss_iter_data *data = _data;
  847. if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
  848. return;
  849. if (data->vif) {
  850. data->error = true;
  851. return;
  852. }
  853. data->vif = vif;
  854. }
  855. struct ieee80211_vif *iwl_mvm_get_bss_vif(struct iwl_mvm *mvm)
  856. {
  857. struct iwl_bss_iter_data bss_iter_data = {};
  858. ieee80211_iterate_active_interfaces_atomic(
  859. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  860. iwl_mvm_bss_iface_iterator, &bss_iter_data);
  861. if (bss_iter_data.error) {
  862. IWL_ERR(mvm, "More than one managed interface active!\n");
  863. return ERR_PTR(-EINVAL);
  864. }
  865. return bss_iter_data.vif;
  866. }
  867. unsigned int iwl_mvm_get_wd_timeout(struct iwl_mvm *mvm,
  868. struct ieee80211_vif *vif,
  869. bool tdls, bool cmd_q)
  870. {
  871. struct iwl_fw_dbg_trigger_tlv *trigger;
  872. struct iwl_fw_dbg_trigger_txq_timer *txq_timer;
  873. unsigned int default_timeout =
  874. cmd_q ? IWL_DEF_WD_TIMEOUT : mvm->cfg->base_params->wd_timeout;
  875. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS))
  876. return iwlmvm_mod_params.tfd_q_hang_detect ?
  877. default_timeout : IWL_WATCHDOG_DISABLED;
  878. trigger = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS);
  879. txq_timer = (void *)trigger->data;
  880. if (tdls)
  881. return le32_to_cpu(txq_timer->tdls);
  882. if (cmd_q)
  883. return le32_to_cpu(txq_timer->command_queue);
  884. if (WARN_ON(!vif))
  885. return default_timeout;
  886. switch (ieee80211_vif_type_p2p(vif)) {
  887. case NL80211_IFTYPE_ADHOC:
  888. return le32_to_cpu(txq_timer->ibss);
  889. case NL80211_IFTYPE_STATION:
  890. return le32_to_cpu(txq_timer->bss);
  891. case NL80211_IFTYPE_AP:
  892. return le32_to_cpu(txq_timer->softap);
  893. case NL80211_IFTYPE_P2P_CLIENT:
  894. return le32_to_cpu(txq_timer->p2p_client);
  895. case NL80211_IFTYPE_P2P_GO:
  896. return le32_to_cpu(txq_timer->p2p_go);
  897. case NL80211_IFTYPE_P2P_DEVICE:
  898. return le32_to_cpu(txq_timer->p2p_device);
  899. default:
  900. WARN_ON(1);
  901. return mvm->cfg->base_params->wd_timeout;
  902. }
  903. }
  904. void iwl_mvm_connection_loss(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  905. const char *errmsg)
  906. {
  907. struct iwl_fw_dbg_trigger_tlv *trig;
  908. struct iwl_fw_dbg_trigger_mlme *trig_mlme;
  909. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_MLME))
  910. goto out;
  911. trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_MLME);
  912. trig_mlme = (void *)trig->data;
  913. if (!iwl_fw_dbg_trigger_check_stop(mvm, vif, trig))
  914. goto out;
  915. if (trig_mlme->stop_connection_loss &&
  916. --trig_mlme->stop_connection_loss)
  917. goto out;
  918. iwl_mvm_fw_dbg_collect_trig(mvm, trig, "%s", errmsg);
  919. out:
  920. ieee80211_connection_loss(vif);
  921. }
  922. /*
  923. * Remove inactive TIDs of a given queue.
  924. * If all queue TIDs are inactive - mark the queue as inactive
  925. * If only some the queue TIDs are inactive - unmap them from the queue
  926. */
  927. static void iwl_mvm_remove_inactive_tids(struct iwl_mvm *mvm,
  928. struct iwl_mvm_sta *mvmsta, int queue,
  929. unsigned long tid_bitmap)
  930. {
  931. int tid;
  932. lockdep_assert_held(&mvmsta->lock);
  933. lockdep_assert_held(&mvm->queue_info_lock);
  934. /* Go over all non-active TIDs, incl. IWL_MAX_TID_COUNT (for mgmt) */
  935. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  936. /* If some TFDs are still queued - don't mark TID as inactive */
  937. if (iwl_mvm_tid_queued(&mvmsta->tid_data[tid]))
  938. tid_bitmap &= ~BIT(tid);
  939. }
  940. /* If all TIDs in the queue are inactive - mark queue as inactive. */
  941. if (tid_bitmap == mvm->queue_info[queue].tid_bitmap) {
  942. mvm->queue_info[queue].status = IWL_MVM_QUEUE_INACTIVE;
  943. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1)
  944. mvmsta->tid_data[tid].is_tid_active = false;
  945. IWL_DEBUG_TX_QUEUES(mvm, "Queue %d marked as inactive\n",
  946. queue);
  947. return;
  948. }
  949. /*
  950. * If we are here, this is a shared queue and not all TIDs timed-out.
  951. * Remove the ones that did.
  952. */
  953. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  954. int mac_queue = mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]];
  955. mvmsta->tid_data[tid].txq_id = IEEE80211_INVAL_HW_QUEUE;
  956. mvm->queue_info[queue].hw_queue_to_mac80211 &= ~BIT(mac_queue);
  957. mvm->queue_info[queue].hw_queue_refcount--;
  958. mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
  959. mvmsta->tid_data[tid].is_tid_active = false;
  960. IWL_DEBUG_TX_QUEUES(mvm,
  961. "Removing inactive TID %d from shared Q:%d\n",
  962. tid, queue);
  963. }
  964. IWL_DEBUG_TX_QUEUES(mvm,
  965. "TXQ #%d left with tid bitmap 0x%x\n", queue,
  966. mvm->queue_info[queue].tid_bitmap);
  967. /*
  968. * There may be different TIDs with the same mac queues, so make
  969. * sure all TIDs have existing corresponding mac queues enabled
  970. */
  971. tid_bitmap = mvm->queue_info[queue].tid_bitmap;
  972. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  973. mvm->queue_info[queue].hw_queue_to_mac80211 |=
  974. BIT(mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]]);
  975. }
  976. /* If the queue is marked as shared - "unshare" it */
  977. if (mvm->queue_info[queue].hw_queue_refcount == 1 &&
  978. mvm->queue_info[queue].status == IWL_MVM_QUEUE_SHARED) {
  979. mvm->queue_info[queue].status = IWL_MVM_QUEUE_RECONFIGURING;
  980. IWL_DEBUG_TX_QUEUES(mvm, "Marking Q:%d for reconfig\n",
  981. queue);
  982. }
  983. }
  984. void iwl_mvm_inactivity_check(struct iwl_mvm *mvm)
  985. {
  986. unsigned long timeout_queues_map = 0;
  987. unsigned long now = jiffies;
  988. int i;
  989. spin_lock_bh(&mvm->queue_info_lock);
  990. for (i = 0; i < IWL_MAX_HW_QUEUES; i++)
  991. if (mvm->queue_info[i].hw_queue_refcount > 0)
  992. timeout_queues_map |= BIT(i);
  993. spin_unlock_bh(&mvm->queue_info_lock);
  994. rcu_read_lock();
  995. /*
  996. * If a queue time outs - mark it as INACTIVE (don't remove right away
  997. * if we don't have to.) This is an optimization in case traffic comes
  998. * later, and we don't HAVE to use a currently-inactive queue
  999. */
  1000. for_each_set_bit(i, &timeout_queues_map, IWL_MAX_HW_QUEUES) {
  1001. struct ieee80211_sta *sta;
  1002. struct iwl_mvm_sta *mvmsta;
  1003. u8 sta_id;
  1004. int tid;
  1005. unsigned long inactive_tid_bitmap = 0;
  1006. unsigned long queue_tid_bitmap;
  1007. spin_lock_bh(&mvm->queue_info_lock);
  1008. queue_tid_bitmap = mvm->queue_info[i].tid_bitmap;
  1009. /* If TXQ isn't in active use anyway - nothing to do here... */
  1010. if (mvm->queue_info[i].status != IWL_MVM_QUEUE_READY &&
  1011. mvm->queue_info[i].status != IWL_MVM_QUEUE_SHARED) {
  1012. spin_unlock_bh(&mvm->queue_info_lock);
  1013. continue;
  1014. }
  1015. /* Check to see if there are inactive TIDs on this queue */
  1016. for_each_set_bit(tid, &queue_tid_bitmap,
  1017. IWL_MAX_TID_COUNT + 1) {
  1018. if (time_after(mvm->queue_info[i].last_frame_time[tid] +
  1019. IWL_MVM_DQA_QUEUE_TIMEOUT, now))
  1020. continue;
  1021. inactive_tid_bitmap |= BIT(tid);
  1022. }
  1023. spin_unlock_bh(&mvm->queue_info_lock);
  1024. /* If all TIDs are active - finish check on this queue */
  1025. if (!inactive_tid_bitmap)
  1026. continue;
  1027. /*
  1028. * If we are here - the queue hadn't been served recently and is
  1029. * in use
  1030. */
  1031. sta_id = mvm->queue_info[i].ra_sta_id;
  1032. sta = rcu_dereference(mvm->fw_id_to_mac_id[sta_id]);
  1033. /*
  1034. * If the STA doesn't exist anymore, it isn't an error. It could
  1035. * be that it was removed since getting the queues, and in this
  1036. * case it should've inactivated its queues anyway.
  1037. */
  1038. if (IS_ERR_OR_NULL(sta))
  1039. continue;
  1040. mvmsta = iwl_mvm_sta_from_mac80211(sta);
  1041. spin_lock_bh(&mvmsta->lock);
  1042. spin_lock(&mvm->queue_info_lock);
  1043. iwl_mvm_remove_inactive_tids(mvm, mvmsta, i,
  1044. inactive_tid_bitmap);
  1045. spin_unlock(&mvm->queue_info_lock);
  1046. spin_unlock_bh(&mvmsta->lock);
  1047. }
  1048. rcu_read_unlock();
  1049. }
  1050. void iwl_mvm_get_sync_time(struct iwl_mvm *mvm, u32 *gp2, u64 *boottime)
  1051. {
  1052. bool ps_disabled;
  1053. lockdep_assert_held(&mvm->mutex);
  1054. /* Disable power save when reading GP2 */
  1055. ps_disabled = mvm->ps_disabled;
  1056. if (!ps_disabled) {
  1057. mvm->ps_disabled = true;
  1058. iwl_mvm_power_update_device(mvm);
  1059. }
  1060. *gp2 = iwl_read_prph(mvm->trans, DEVICE_SYSTEM_TIME_REG);
  1061. *boottime = ktime_get_boot_ns();
  1062. if (!ps_disabled) {
  1063. mvm->ps_disabled = ps_disabled;
  1064. iwl_mvm_power_update_device(mvm);
  1065. }
  1066. }
  1067. int iwl_mvm_send_lqm_cmd(struct ieee80211_vif *vif,
  1068. enum iwl_lqm_cmd_operatrions operation,
  1069. u32 duration, u32 timeout)
  1070. {
  1071. struct iwl_mvm_vif *mvm_vif = iwl_mvm_vif_from_mac80211(vif);
  1072. struct iwl_link_qual_msrmnt_cmd cmd = {
  1073. .cmd_operation = cpu_to_le32(operation),
  1074. .mac_id = cpu_to_le32(mvm_vif->id),
  1075. .measurement_time = cpu_to_le32(duration),
  1076. .timeout = cpu_to_le32(timeout),
  1077. };
  1078. u32 cmdid =
  1079. iwl_cmd_id(LINK_QUALITY_MEASUREMENT_CMD, MAC_CONF_GROUP, 0);
  1080. int ret;
  1081. if (!fw_has_capa(&mvm_vif->mvm->fw->ucode_capa,
  1082. IWL_UCODE_TLV_CAPA_LQM_SUPPORT))
  1083. return -EOPNOTSUPP;
  1084. if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
  1085. return -EINVAL;
  1086. switch (operation) {
  1087. case LQM_CMD_OPERATION_START_MEASUREMENT:
  1088. if (iwl_mvm_lqm_active(mvm_vif->mvm))
  1089. return -EBUSY;
  1090. if (!vif->bss_conf.assoc)
  1091. return -EINVAL;
  1092. mvm_vif->lqm_active = true;
  1093. break;
  1094. case LQM_CMD_OPERATION_STOP_MEASUREMENT:
  1095. if (!iwl_mvm_lqm_active(mvm_vif->mvm))
  1096. return -EINVAL;
  1097. break;
  1098. default:
  1099. return -EINVAL;
  1100. }
  1101. ret = iwl_mvm_send_cmd_pdu(mvm_vif->mvm, cmdid, 0, sizeof(cmd),
  1102. &cmd);
  1103. /* command failed - roll back lqm_active state */
  1104. if (ret) {
  1105. mvm_vif->lqm_active =
  1106. operation == LQM_CMD_OPERATION_STOP_MEASUREMENT;
  1107. }
  1108. return ret;
  1109. }
  1110. static void iwl_mvm_lqm_active_iterator(void *_data, u8 *mac,
  1111. struct ieee80211_vif *vif)
  1112. {
  1113. struct iwl_mvm_vif *mvm_vif = iwl_mvm_vif_from_mac80211(vif);
  1114. bool *lqm_active = _data;
  1115. *lqm_active = *lqm_active || mvm_vif->lqm_active;
  1116. }
  1117. bool iwl_mvm_lqm_active(struct iwl_mvm *mvm)
  1118. {
  1119. bool ret = false;
  1120. lockdep_assert_held(&mvm->mutex);
  1121. ieee80211_iterate_active_interfaces_atomic(
  1122. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  1123. iwl_mvm_lqm_active_iterator, &ret);
  1124. return ret;
  1125. }