virtgpu_display.c 11 KB

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  1. /*
  2. * Copyright (C) 2015 Red Hat, Inc.
  3. * All Rights Reserved.
  4. *
  5. * Authors:
  6. * Dave Airlie
  7. * Alon Levy
  8. *
  9. * Permission is hereby granted, free of charge, to any person obtaining a
  10. * copy of this software and associated documentation files (the "Software"),
  11. * to deal in the Software without restriction, including without limitation
  12. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13. * and/or sell copies of the Software, and to permit persons to whom the
  14. * Software is furnished to do so, subject to the following conditions:
  15. *
  16. * The above copyright notice and this permission notice shall be included in
  17. * all copies or substantial portions of the Software.
  18. *
  19. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  22. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  25. * OTHER DEALINGS IN THE SOFTWARE.
  26. */
  27. #include "virtgpu_drv.h"
  28. #include <drm/drm_crtc_helper.h>
  29. #include <drm/drm_atomic_helper.h>
  30. #define XRES_MIN 32
  31. #define YRES_MIN 32
  32. #define XRES_DEF 1024
  33. #define YRES_DEF 768
  34. #define XRES_MAX 8192
  35. #define YRES_MAX 8192
  36. static const struct drm_crtc_funcs virtio_gpu_crtc_funcs = {
  37. .set_config = drm_atomic_helper_set_config,
  38. .destroy = drm_crtc_cleanup,
  39. .page_flip = drm_atomic_helper_page_flip,
  40. .reset = drm_atomic_helper_crtc_reset,
  41. .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
  42. .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
  43. };
  44. static void virtio_gpu_user_framebuffer_destroy(struct drm_framebuffer *fb)
  45. {
  46. struct virtio_gpu_framebuffer *virtio_gpu_fb
  47. = to_virtio_gpu_framebuffer(fb);
  48. drm_gem_object_unreference_unlocked(virtio_gpu_fb->obj);
  49. drm_framebuffer_cleanup(fb);
  50. kfree(virtio_gpu_fb);
  51. }
  52. static int
  53. virtio_gpu_framebuffer_surface_dirty(struct drm_framebuffer *fb,
  54. struct drm_file *file_priv,
  55. unsigned flags, unsigned color,
  56. struct drm_clip_rect *clips,
  57. unsigned num_clips)
  58. {
  59. struct virtio_gpu_framebuffer *virtio_gpu_fb
  60. = to_virtio_gpu_framebuffer(fb);
  61. return virtio_gpu_surface_dirty(virtio_gpu_fb, clips, num_clips);
  62. }
  63. static const struct drm_framebuffer_funcs virtio_gpu_fb_funcs = {
  64. .destroy = virtio_gpu_user_framebuffer_destroy,
  65. .dirty = virtio_gpu_framebuffer_surface_dirty,
  66. };
  67. int
  68. virtio_gpu_framebuffer_init(struct drm_device *dev,
  69. struct virtio_gpu_framebuffer *vgfb,
  70. const struct drm_mode_fb_cmd2 *mode_cmd,
  71. struct drm_gem_object *obj)
  72. {
  73. int ret;
  74. struct virtio_gpu_object *bo;
  75. vgfb->obj = obj;
  76. bo = gem_to_virtio_gpu_obj(obj);
  77. drm_helper_mode_fill_fb_struct(dev, &vgfb->base, mode_cmd);
  78. ret = drm_framebuffer_init(dev, &vgfb->base, &virtio_gpu_fb_funcs);
  79. if (ret) {
  80. vgfb->obj = NULL;
  81. return ret;
  82. }
  83. spin_lock_init(&vgfb->dirty_lock);
  84. vgfb->x1 = vgfb->y1 = INT_MAX;
  85. vgfb->x2 = vgfb->y2 = 0;
  86. return 0;
  87. }
  88. static void virtio_gpu_crtc_mode_set_nofb(struct drm_crtc *crtc)
  89. {
  90. struct drm_device *dev = crtc->dev;
  91. struct virtio_gpu_device *vgdev = dev->dev_private;
  92. struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);
  93. virtio_gpu_cmd_set_scanout(vgdev, output->index, 0,
  94. crtc->mode.hdisplay,
  95. crtc->mode.vdisplay, 0, 0);
  96. }
  97. static void virtio_gpu_crtc_enable(struct drm_crtc *crtc)
  98. {
  99. }
  100. static void virtio_gpu_crtc_disable(struct drm_crtc *crtc)
  101. {
  102. struct drm_device *dev = crtc->dev;
  103. struct virtio_gpu_device *vgdev = dev->dev_private;
  104. struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);
  105. virtio_gpu_cmd_set_scanout(vgdev, output->index, 0, 0, 0, 0, 0);
  106. }
  107. static int virtio_gpu_crtc_atomic_check(struct drm_crtc *crtc,
  108. struct drm_crtc_state *state)
  109. {
  110. return 0;
  111. }
  112. static void virtio_gpu_crtc_atomic_flush(struct drm_crtc *crtc,
  113. struct drm_crtc_state *old_state)
  114. {
  115. unsigned long flags;
  116. spin_lock_irqsave(&crtc->dev->event_lock, flags);
  117. if (crtc->state->event)
  118. drm_crtc_send_vblank_event(crtc, crtc->state->event);
  119. crtc->state->event = NULL;
  120. spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
  121. }
  122. static const struct drm_crtc_helper_funcs virtio_gpu_crtc_helper_funcs = {
  123. .enable = virtio_gpu_crtc_enable,
  124. .disable = virtio_gpu_crtc_disable,
  125. .mode_set_nofb = virtio_gpu_crtc_mode_set_nofb,
  126. .atomic_check = virtio_gpu_crtc_atomic_check,
  127. .atomic_flush = virtio_gpu_crtc_atomic_flush,
  128. };
  129. static void virtio_gpu_enc_mode_set(struct drm_encoder *encoder,
  130. struct drm_display_mode *mode,
  131. struct drm_display_mode *adjusted_mode)
  132. {
  133. }
  134. static void virtio_gpu_enc_enable(struct drm_encoder *encoder)
  135. {
  136. }
  137. static void virtio_gpu_enc_disable(struct drm_encoder *encoder)
  138. {
  139. }
  140. static int virtio_gpu_conn_get_modes(struct drm_connector *connector)
  141. {
  142. struct virtio_gpu_output *output =
  143. drm_connector_to_virtio_gpu_output(connector);
  144. struct drm_display_mode *mode = NULL;
  145. int count, width, height;
  146. width = le32_to_cpu(output->info.r.width);
  147. height = le32_to_cpu(output->info.r.height);
  148. count = drm_add_modes_noedid(connector, XRES_MAX, YRES_MAX);
  149. if (width == 0 || height == 0) {
  150. width = XRES_DEF;
  151. height = YRES_DEF;
  152. drm_set_preferred_mode(connector, XRES_DEF, YRES_DEF);
  153. } else {
  154. DRM_DEBUG("add mode: %dx%d\n", width, height);
  155. mode = drm_cvt_mode(connector->dev, width, height, 60,
  156. false, false, false);
  157. mode->type |= DRM_MODE_TYPE_PREFERRED;
  158. drm_mode_probed_add(connector, mode);
  159. count++;
  160. }
  161. return count;
  162. }
  163. static int virtio_gpu_conn_mode_valid(struct drm_connector *connector,
  164. struct drm_display_mode *mode)
  165. {
  166. struct virtio_gpu_output *output =
  167. drm_connector_to_virtio_gpu_output(connector);
  168. int width, height;
  169. width = le32_to_cpu(output->info.r.width);
  170. height = le32_to_cpu(output->info.r.height);
  171. if (!(mode->type & DRM_MODE_TYPE_PREFERRED))
  172. return MODE_OK;
  173. if (mode->hdisplay == XRES_DEF && mode->vdisplay == YRES_DEF)
  174. return MODE_OK;
  175. if (mode->hdisplay <= width && mode->hdisplay >= width - 16 &&
  176. mode->vdisplay <= height && mode->vdisplay >= height - 16)
  177. return MODE_OK;
  178. DRM_DEBUG("del mode: %dx%d\n", mode->hdisplay, mode->vdisplay);
  179. return MODE_BAD;
  180. }
  181. static const struct drm_encoder_helper_funcs virtio_gpu_enc_helper_funcs = {
  182. .mode_set = virtio_gpu_enc_mode_set,
  183. .enable = virtio_gpu_enc_enable,
  184. .disable = virtio_gpu_enc_disable,
  185. };
  186. static const struct drm_connector_helper_funcs virtio_gpu_conn_helper_funcs = {
  187. .get_modes = virtio_gpu_conn_get_modes,
  188. .mode_valid = virtio_gpu_conn_mode_valid,
  189. };
  190. static enum drm_connector_status virtio_gpu_conn_detect(
  191. struct drm_connector *connector,
  192. bool force)
  193. {
  194. struct virtio_gpu_output *output =
  195. drm_connector_to_virtio_gpu_output(connector);
  196. if (output->info.enabled)
  197. return connector_status_connected;
  198. else
  199. return connector_status_disconnected;
  200. }
  201. static void virtio_gpu_conn_destroy(struct drm_connector *connector)
  202. {
  203. struct virtio_gpu_output *virtio_gpu_output =
  204. drm_connector_to_virtio_gpu_output(connector);
  205. drm_connector_unregister(connector);
  206. drm_connector_cleanup(connector);
  207. kfree(virtio_gpu_output);
  208. }
  209. static const struct drm_connector_funcs virtio_gpu_connector_funcs = {
  210. .dpms = drm_atomic_helper_connector_dpms,
  211. .detect = virtio_gpu_conn_detect,
  212. .fill_modes = drm_helper_probe_single_connector_modes,
  213. .destroy = virtio_gpu_conn_destroy,
  214. .reset = drm_atomic_helper_connector_reset,
  215. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  216. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  217. };
  218. static const struct drm_encoder_funcs virtio_gpu_enc_funcs = {
  219. .destroy = drm_encoder_cleanup,
  220. };
  221. static int vgdev_output_init(struct virtio_gpu_device *vgdev, int index)
  222. {
  223. struct drm_device *dev = vgdev->ddev;
  224. struct virtio_gpu_output *output = vgdev->outputs + index;
  225. struct drm_connector *connector = &output->conn;
  226. struct drm_encoder *encoder = &output->enc;
  227. struct drm_crtc *crtc = &output->crtc;
  228. struct drm_plane *primary, *cursor;
  229. output->index = index;
  230. if (index == 0) {
  231. output->info.enabled = cpu_to_le32(true);
  232. output->info.r.width = cpu_to_le32(XRES_DEF);
  233. output->info.r.height = cpu_to_le32(YRES_DEF);
  234. }
  235. primary = virtio_gpu_plane_init(vgdev, DRM_PLANE_TYPE_PRIMARY, index);
  236. if (IS_ERR(primary))
  237. return PTR_ERR(primary);
  238. cursor = virtio_gpu_plane_init(vgdev, DRM_PLANE_TYPE_CURSOR, index);
  239. if (IS_ERR(cursor))
  240. return PTR_ERR(cursor);
  241. drm_crtc_init_with_planes(dev, crtc, primary, cursor,
  242. &virtio_gpu_crtc_funcs, NULL);
  243. drm_crtc_helper_add(crtc, &virtio_gpu_crtc_helper_funcs);
  244. primary->crtc = crtc;
  245. cursor->crtc = crtc;
  246. drm_connector_init(dev, connector, &virtio_gpu_connector_funcs,
  247. DRM_MODE_CONNECTOR_VIRTUAL);
  248. drm_connector_helper_add(connector, &virtio_gpu_conn_helper_funcs);
  249. drm_encoder_init(dev, encoder, &virtio_gpu_enc_funcs,
  250. DRM_MODE_ENCODER_VIRTUAL, NULL);
  251. drm_encoder_helper_add(encoder, &virtio_gpu_enc_helper_funcs);
  252. encoder->possible_crtcs = 1 << index;
  253. drm_mode_connector_attach_encoder(connector, encoder);
  254. drm_connector_register(connector);
  255. return 0;
  256. }
  257. static struct drm_framebuffer *
  258. virtio_gpu_user_framebuffer_create(struct drm_device *dev,
  259. struct drm_file *file_priv,
  260. const struct drm_mode_fb_cmd2 *mode_cmd)
  261. {
  262. struct drm_gem_object *obj = NULL;
  263. struct virtio_gpu_framebuffer *virtio_gpu_fb;
  264. int ret;
  265. /* lookup object associated with res handle */
  266. obj = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]);
  267. if (!obj)
  268. return ERR_PTR(-EINVAL);
  269. virtio_gpu_fb = kzalloc(sizeof(*virtio_gpu_fb), GFP_KERNEL);
  270. if (virtio_gpu_fb == NULL)
  271. return ERR_PTR(-ENOMEM);
  272. ret = virtio_gpu_framebuffer_init(dev, virtio_gpu_fb, mode_cmd, obj);
  273. if (ret) {
  274. kfree(virtio_gpu_fb);
  275. drm_gem_object_unreference_unlocked(obj);
  276. return NULL;
  277. }
  278. return &virtio_gpu_fb->base;
  279. }
  280. static void vgdev_atomic_commit_tail(struct drm_atomic_state *state)
  281. {
  282. struct drm_device *dev = state->dev;
  283. drm_atomic_helper_commit_modeset_disables(dev, state);
  284. drm_atomic_helper_commit_modeset_enables(dev, state);
  285. drm_atomic_helper_commit_planes(dev, state, 0);
  286. drm_atomic_helper_commit_hw_done(state);
  287. drm_atomic_helper_wait_for_vblanks(dev, state);
  288. drm_atomic_helper_cleanup_planes(dev, state);
  289. }
  290. static struct drm_mode_config_helper_funcs virtio_mode_config_helpers = {
  291. .atomic_commit_tail = vgdev_atomic_commit_tail,
  292. };
  293. static const struct drm_mode_config_funcs virtio_gpu_mode_funcs = {
  294. .fb_create = virtio_gpu_user_framebuffer_create,
  295. .atomic_check = drm_atomic_helper_check,
  296. .atomic_commit = drm_atomic_helper_commit,
  297. };
  298. int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev)
  299. {
  300. int i;
  301. drm_mode_config_init(vgdev->ddev);
  302. vgdev->ddev->mode_config.funcs = &virtio_gpu_mode_funcs;
  303. vgdev->ddev->mode_config.helper_private = &virtio_mode_config_helpers;
  304. /* modes will be validated against the framebuffer size */
  305. vgdev->ddev->mode_config.min_width = XRES_MIN;
  306. vgdev->ddev->mode_config.min_height = YRES_MIN;
  307. vgdev->ddev->mode_config.max_width = XRES_MAX;
  308. vgdev->ddev->mode_config.max_height = YRES_MAX;
  309. for (i = 0 ; i < vgdev->num_scanouts; ++i)
  310. vgdev_output_init(vgdev, i);
  311. drm_mode_config_reset(vgdev->ddev);
  312. return 0;
  313. }
  314. void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev)
  315. {
  316. virtio_gpu_fbdev_fini(vgdev);
  317. drm_mode_config_cleanup(vgdev->ddev);
  318. }