intel_dp_mst.c 16 KB

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  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. * 2014 Red Hat Inc.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22. * IN THE SOFTWARE.
  23. *
  24. */
  25. #include <drm/drmP.h>
  26. #include "i915_drv.h"
  27. #include "intel_drv.h"
  28. #include <drm/drm_atomic_helper.h>
  29. #include <drm/drm_crtc_helper.h>
  30. #include <drm/drm_edid.h>
  31. static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
  32. struct intel_crtc_state *pipe_config)
  33. {
  34. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  35. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  36. struct intel_dp *intel_dp = &intel_dig_port->dp;
  37. struct drm_device *dev = encoder->base.dev;
  38. int bpp;
  39. int lane_count, slots, rate;
  40. struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  41. struct intel_connector *found = NULL, *intel_connector;
  42. int mst_pbn;
  43. pipe_config->dp_encoder_is_mst = true;
  44. pipe_config->has_pch_encoder = false;
  45. pipe_config->has_dp_encoder = true;
  46. bpp = 24;
  47. /*
  48. * for MST we always configure max link bw - the spec doesn't
  49. * seem to suggest we should do otherwise.
  50. */
  51. lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
  52. rate = intel_dp_max_link_rate(intel_dp);
  53. if (intel_dp->num_sink_rates) {
  54. intel_dp->link_bw = 0;
  55. intel_dp->rate_select = intel_dp_rate_select(intel_dp, rate);
  56. } else {
  57. intel_dp->link_bw = drm_dp_link_rate_to_bw_code(rate);
  58. intel_dp->rate_select = 0;
  59. }
  60. intel_dp->lane_count = lane_count;
  61. pipe_config->pipe_bpp = 24;
  62. pipe_config->port_clock = rate;
  63. for_each_intel_connector(dev, intel_connector) {
  64. if (intel_connector->new_encoder == encoder) {
  65. found = intel_connector;
  66. break;
  67. }
  68. }
  69. if (!found) {
  70. DRM_ERROR("can't find connector\n");
  71. return false;
  72. }
  73. mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);
  74. pipe_config->pbn = mst_pbn;
  75. slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
  76. intel_link_compute_m_n(bpp, lane_count,
  77. adjusted_mode->crtc_clock,
  78. pipe_config->port_clock,
  79. &pipe_config->dp_m_n);
  80. pipe_config->dp_m_n.tu = slots;
  81. return true;
  82. }
  83. static void intel_mst_disable_dp(struct intel_encoder *encoder)
  84. {
  85. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  86. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  87. struct intel_dp *intel_dp = &intel_dig_port->dp;
  88. int ret;
  89. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  90. drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port);
  91. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  92. if (ret) {
  93. DRM_ERROR("failed to update payload %d\n", ret);
  94. }
  95. }
  96. static void intel_mst_post_disable_dp(struct intel_encoder *encoder)
  97. {
  98. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  99. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  100. struct intel_dp *intel_dp = &intel_dig_port->dp;
  101. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  102. /* this can fail */
  103. drm_dp_check_act_status(&intel_dp->mst_mgr);
  104. /* and this can also fail */
  105. drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  106. drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port);
  107. intel_dp->active_mst_links--;
  108. intel_mst->port = NULL;
  109. if (intel_dp->active_mst_links == 0) {
  110. intel_dig_port->base.post_disable(&intel_dig_port->base);
  111. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
  112. }
  113. }
  114. static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
  115. {
  116. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  117. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  118. struct intel_dp *intel_dp = &intel_dig_port->dp;
  119. struct drm_device *dev = encoder->base.dev;
  120. struct drm_i915_private *dev_priv = dev->dev_private;
  121. enum port port = intel_dig_port->port;
  122. int ret;
  123. uint32_t temp;
  124. struct intel_connector *found = NULL, *intel_connector;
  125. int slots;
  126. struct drm_crtc *crtc = encoder->base.crtc;
  127. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  128. for_each_intel_connector(dev, intel_connector) {
  129. if (intel_connector->new_encoder == encoder) {
  130. found = intel_connector;
  131. break;
  132. }
  133. }
  134. if (!found) {
  135. DRM_ERROR("can't find connector\n");
  136. return;
  137. }
  138. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  139. intel_mst->port = found->port;
  140. if (intel_dp->active_mst_links == 0) {
  141. enum port port = intel_ddi_get_encoder_port(encoder);
  142. I915_WRITE(PORT_CLK_SEL(port),
  143. intel_crtc->config->ddi_pll_sel);
  144. intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
  145. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
  146. intel_dp_start_link_train(intel_dp);
  147. intel_dp_complete_link_train(intel_dp);
  148. intel_dp_stop_link_train(intel_dp);
  149. }
  150. ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
  151. intel_mst->port,
  152. intel_crtc->config->pbn, &slots);
  153. if (ret == false) {
  154. DRM_ERROR("failed to allocate vcpi\n");
  155. return;
  156. }
  157. intel_dp->active_mst_links++;
  158. temp = I915_READ(DP_TP_STATUS(port));
  159. I915_WRITE(DP_TP_STATUS(port), temp);
  160. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  161. }
  162. static void intel_mst_enable_dp(struct intel_encoder *encoder)
  163. {
  164. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  165. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  166. struct intel_dp *intel_dp = &intel_dig_port->dp;
  167. struct drm_device *dev = intel_dig_port->base.base.dev;
  168. struct drm_i915_private *dev_priv = dev->dev_private;
  169. enum port port = intel_dig_port->port;
  170. int ret;
  171. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  172. if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT),
  173. 1))
  174. DRM_ERROR("Timed out waiting for ACT sent\n");
  175. ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
  176. ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  177. }
  178. static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
  179. enum pipe *pipe)
  180. {
  181. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  182. *pipe = intel_mst->pipe;
  183. if (intel_mst->port)
  184. return true;
  185. return false;
  186. }
  187. static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
  188. struct intel_crtc_state *pipe_config)
  189. {
  190. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  191. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  192. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  193. struct drm_device *dev = encoder->base.dev;
  194. struct drm_i915_private *dev_priv = dev->dev_private;
  195. enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
  196. u32 temp, flags = 0;
  197. pipe_config->has_dp_encoder = true;
  198. temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
  199. if (temp & TRANS_DDI_PHSYNC)
  200. flags |= DRM_MODE_FLAG_PHSYNC;
  201. else
  202. flags |= DRM_MODE_FLAG_NHSYNC;
  203. if (temp & TRANS_DDI_PVSYNC)
  204. flags |= DRM_MODE_FLAG_PVSYNC;
  205. else
  206. flags |= DRM_MODE_FLAG_NVSYNC;
  207. switch (temp & TRANS_DDI_BPC_MASK) {
  208. case TRANS_DDI_BPC_6:
  209. pipe_config->pipe_bpp = 18;
  210. break;
  211. case TRANS_DDI_BPC_8:
  212. pipe_config->pipe_bpp = 24;
  213. break;
  214. case TRANS_DDI_BPC_10:
  215. pipe_config->pipe_bpp = 30;
  216. break;
  217. case TRANS_DDI_BPC_12:
  218. pipe_config->pipe_bpp = 36;
  219. break;
  220. default:
  221. break;
  222. }
  223. pipe_config->base.adjusted_mode.flags |= flags;
  224. intel_dp_get_m_n(crtc, pipe_config);
  225. intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
  226. }
  227. static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
  228. {
  229. struct intel_connector *intel_connector = to_intel_connector(connector);
  230. struct intel_dp *intel_dp = intel_connector->mst_port;
  231. struct edid *edid;
  232. int ret;
  233. edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
  234. if (!edid)
  235. return 0;
  236. ret = intel_connector_update_modes(connector, edid);
  237. kfree(edid);
  238. return ret;
  239. }
  240. static enum drm_connector_status
  241. intel_dp_mst_detect(struct drm_connector *connector, bool force)
  242. {
  243. struct intel_connector *intel_connector = to_intel_connector(connector);
  244. struct intel_dp *intel_dp = intel_connector->mst_port;
  245. return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
  246. }
  247. static int
  248. intel_dp_mst_set_property(struct drm_connector *connector,
  249. struct drm_property *property,
  250. uint64_t val)
  251. {
  252. return 0;
  253. }
  254. static void
  255. intel_dp_mst_connector_destroy(struct drm_connector *connector)
  256. {
  257. struct intel_connector *intel_connector = to_intel_connector(connector);
  258. if (!IS_ERR_OR_NULL(intel_connector->edid))
  259. kfree(intel_connector->edid);
  260. drm_connector_cleanup(connector);
  261. kfree(connector);
  262. }
  263. static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
  264. .dpms = intel_connector_dpms,
  265. .detect = intel_dp_mst_detect,
  266. .fill_modes = drm_helper_probe_single_connector_modes,
  267. .set_property = intel_dp_mst_set_property,
  268. .atomic_get_property = intel_connector_atomic_get_property,
  269. .destroy = intel_dp_mst_connector_destroy,
  270. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  271. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  272. };
  273. static int intel_dp_mst_get_modes(struct drm_connector *connector)
  274. {
  275. return intel_dp_mst_get_ddc_modes(connector);
  276. }
  277. static enum drm_mode_status
  278. intel_dp_mst_mode_valid(struct drm_connector *connector,
  279. struct drm_display_mode *mode)
  280. {
  281. /* TODO - validate mode against available PBN for link */
  282. if (mode->clock < 10000)
  283. return MODE_CLOCK_LOW;
  284. if (mode->flags & DRM_MODE_FLAG_DBLCLK)
  285. return MODE_H_ILLEGAL;
  286. return MODE_OK;
  287. }
  288. static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
  289. {
  290. struct intel_connector *intel_connector = to_intel_connector(connector);
  291. struct intel_dp *intel_dp = intel_connector->mst_port;
  292. return &intel_dp->mst_encoders[0]->base.base;
  293. }
  294. static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
  295. .get_modes = intel_dp_mst_get_modes,
  296. .mode_valid = intel_dp_mst_mode_valid,
  297. .best_encoder = intel_mst_best_encoder,
  298. };
  299. static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
  300. {
  301. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  302. drm_encoder_cleanup(encoder);
  303. kfree(intel_mst);
  304. }
  305. static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
  306. .destroy = intel_dp_mst_encoder_destroy,
  307. };
  308. static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
  309. {
  310. if (connector->encoder) {
  311. enum pipe pipe;
  312. if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
  313. return false;
  314. return true;
  315. }
  316. return false;
  317. }
  318. static void intel_connector_add_to_fbdev(struct intel_connector *connector)
  319. {
  320. #ifdef CONFIG_DRM_I915_FBDEV
  321. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  322. drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base);
  323. #endif
  324. }
  325. static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
  326. {
  327. #ifdef CONFIG_DRM_I915_FBDEV
  328. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  329. drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base);
  330. #endif
  331. }
  332. static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
  333. {
  334. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  335. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  336. struct drm_device *dev = intel_dig_port->base.base.dev;
  337. struct intel_connector *intel_connector;
  338. struct drm_connector *connector;
  339. int i;
  340. intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
  341. if (!intel_connector)
  342. return NULL;
  343. connector = &intel_connector->base;
  344. drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
  345. drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
  346. intel_connector->unregister = intel_connector_unregister;
  347. intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
  348. intel_connector->mst_port = intel_dp;
  349. intel_connector->port = port;
  350. for (i = PIPE_A; i <= PIPE_C; i++) {
  351. drm_mode_connector_attach_encoder(&intel_connector->base,
  352. &intel_dp->mst_encoders[i]->base.base);
  353. }
  354. intel_dp_add_properties(intel_dp, connector);
  355. drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
  356. drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
  357. drm_mode_connector_set_path_property(connector, pathprop);
  358. drm_reinit_primary_mode_group(dev);
  359. mutex_lock(&dev->mode_config.mutex);
  360. intel_connector_add_to_fbdev(intel_connector);
  361. mutex_unlock(&dev->mode_config.mutex);
  362. drm_connector_register(&intel_connector->base);
  363. return connector;
  364. }
  365. static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
  366. struct drm_connector *connector)
  367. {
  368. struct intel_connector *intel_connector = to_intel_connector(connector);
  369. struct drm_device *dev = connector->dev;
  370. /* need to nuke the connector */
  371. mutex_lock(&dev->mode_config.mutex);
  372. intel_connector_dpms(connector, DRM_MODE_DPMS_OFF);
  373. mutex_unlock(&dev->mode_config.mutex);
  374. intel_connector->unregister(intel_connector);
  375. mutex_lock(&dev->mode_config.mutex);
  376. intel_connector_remove_from_fbdev(intel_connector);
  377. drm_connector_cleanup(connector);
  378. mutex_unlock(&dev->mode_config.mutex);
  379. drm_reinit_primary_mode_group(dev);
  380. kfree(intel_connector);
  381. DRM_DEBUG_KMS("\n");
  382. }
  383. static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
  384. {
  385. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  386. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  387. struct drm_device *dev = intel_dig_port->base.base.dev;
  388. drm_kms_helper_hotplug_event(dev);
  389. }
  390. static struct drm_dp_mst_topology_cbs mst_cbs = {
  391. .add_connector = intel_dp_add_mst_connector,
  392. .destroy_connector = intel_dp_destroy_mst_connector,
  393. .hotplug = intel_dp_mst_hotplug,
  394. };
  395. static struct intel_dp_mst_encoder *
  396. intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
  397. {
  398. struct intel_dp_mst_encoder *intel_mst;
  399. struct intel_encoder *intel_encoder;
  400. struct drm_device *dev = intel_dig_port->base.base.dev;
  401. intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
  402. if (!intel_mst)
  403. return NULL;
  404. intel_mst->pipe = pipe;
  405. intel_encoder = &intel_mst->base;
  406. intel_mst->primary = intel_dig_port;
  407. drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
  408. DRM_MODE_ENCODER_DPMST);
  409. intel_encoder->type = INTEL_OUTPUT_DP_MST;
  410. intel_encoder->crtc_mask = 0x7;
  411. intel_encoder->cloneable = 0;
  412. intel_encoder->compute_config = intel_dp_mst_compute_config;
  413. intel_encoder->disable = intel_mst_disable_dp;
  414. intel_encoder->post_disable = intel_mst_post_disable_dp;
  415. intel_encoder->pre_enable = intel_mst_pre_enable_dp;
  416. intel_encoder->enable = intel_mst_enable_dp;
  417. intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
  418. intel_encoder->get_config = intel_dp_mst_enc_get_config;
  419. return intel_mst;
  420. }
  421. static bool
  422. intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
  423. {
  424. int i;
  425. struct intel_dp *intel_dp = &intel_dig_port->dp;
  426. for (i = PIPE_A; i <= PIPE_C; i++)
  427. intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
  428. return true;
  429. }
  430. int
  431. intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
  432. {
  433. struct intel_dp *intel_dp = &intel_dig_port->dp;
  434. struct drm_device *dev = intel_dig_port->base.base.dev;
  435. int ret;
  436. intel_dp->can_mst = true;
  437. intel_dp->mst_mgr.cbs = &mst_cbs;
  438. /* create encoders */
  439. intel_dp_create_fake_mst_encoders(intel_dig_port);
  440. ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
  441. if (ret) {
  442. intel_dp->can_mst = false;
  443. return ret;
  444. }
  445. return 0;
  446. }
  447. void
  448. intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
  449. {
  450. struct intel_dp *intel_dp = &intel_dig_port->dp;
  451. if (!intel_dp->can_mst)
  452. return;
  453. drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
  454. /* encoders will get killed by normal cleanup */
  455. }