i915_gem_request.c 16 KB

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  1. /*
  2. * Copyright © 2016 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. */
  24. #include <linux/prime_numbers.h>
  25. #include "../i915_selftest.h"
  26. #include "mock_gem_device.h"
  27. static int igt_add_request(void *arg)
  28. {
  29. struct drm_i915_private *i915 = arg;
  30. struct drm_i915_gem_request *request;
  31. int err = -ENOMEM;
  32. /* Basic preliminary test to create a request and let it loose! */
  33. mutex_lock(&i915->drm.struct_mutex);
  34. request = mock_request(i915->engine[RCS],
  35. i915->kernel_context,
  36. HZ / 10);
  37. if (!request)
  38. goto out_unlock;
  39. i915_add_request(request);
  40. err = 0;
  41. out_unlock:
  42. mutex_unlock(&i915->drm.struct_mutex);
  43. return err;
  44. }
  45. static int igt_wait_request(void *arg)
  46. {
  47. const long T = HZ / 4;
  48. struct drm_i915_private *i915 = arg;
  49. struct drm_i915_gem_request *request;
  50. int err = -EINVAL;
  51. /* Submit a request, then wait upon it */
  52. mutex_lock(&i915->drm.struct_mutex);
  53. request = mock_request(i915->engine[RCS], i915->kernel_context, T);
  54. if (!request) {
  55. err = -ENOMEM;
  56. goto out_unlock;
  57. }
  58. if (i915_wait_request(request, I915_WAIT_LOCKED, 0) != -ETIME) {
  59. pr_err("request wait (busy query) succeeded (expected timeout before submit!)\n");
  60. goto out_unlock;
  61. }
  62. if (i915_wait_request(request, I915_WAIT_LOCKED, T) != -ETIME) {
  63. pr_err("request wait succeeded (expected timeout before submit!)\n");
  64. goto out_unlock;
  65. }
  66. if (i915_gem_request_completed(request)) {
  67. pr_err("request completed before submit!!\n");
  68. goto out_unlock;
  69. }
  70. i915_add_request(request);
  71. if (i915_wait_request(request, I915_WAIT_LOCKED, 0) != -ETIME) {
  72. pr_err("request wait (busy query) succeeded (expected timeout after submit!)\n");
  73. goto out_unlock;
  74. }
  75. if (i915_gem_request_completed(request)) {
  76. pr_err("request completed immediately!\n");
  77. goto out_unlock;
  78. }
  79. if (i915_wait_request(request, I915_WAIT_LOCKED, T / 2) != -ETIME) {
  80. pr_err("request wait succeeded (expected timeout!)\n");
  81. goto out_unlock;
  82. }
  83. if (i915_wait_request(request, I915_WAIT_LOCKED, T) == -ETIME) {
  84. pr_err("request wait timed out!\n");
  85. goto out_unlock;
  86. }
  87. if (!i915_gem_request_completed(request)) {
  88. pr_err("request not complete after waiting!\n");
  89. goto out_unlock;
  90. }
  91. if (i915_wait_request(request, I915_WAIT_LOCKED, T) == -ETIME) {
  92. pr_err("request wait timed out when already complete!\n");
  93. goto out_unlock;
  94. }
  95. err = 0;
  96. out_unlock:
  97. mock_device_flush(i915);
  98. mutex_unlock(&i915->drm.struct_mutex);
  99. return err;
  100. }
  101. static int igt_fence_wait(void *arg)
  102. {
  103. const long T = HZ / 4;
  104. struct drm_i915_private *i915 = arg;
  105. struct drm_i915_gem_request *request;
  106. int err = -EINVAL;
  107. /* Submit a request, treat it as a fence and wait upon it */
  108. mutex_lock(&i915->drm.struct_mutex);
  109. request = mock_request(i915->engine[RCS], i915->kernel_context, T);
  110. if (!request) {
  111. err = -ENOMEM;
  112. goto out_locked;
  113. }
  114. mutex_unlock(&i915->drm.struct_mutex); /* safe as we are single user */
  115. if (dma_fence_wait_timeout(&request->fence, false, T) != -ETIME) {
  116. pr_err("fence wait success before submit (expected timeout)!\n");
  117. goto out_device;
  118. }
  119. mutex_lock(&i915->drm.struct_mutex);
  120. i915_add_request(request);
  121. mutex_unlock(&i915->drm.struct_mutex);
  122. if (dma_fence_is_signaled(&request->fence)) {
  123. pr_err("fence signaled immediately!\n");
  124. goto out_device;
  125. }
  126. if (dma_fence_wait_timeout(&request->fence, false, T / 2) != -ETIME) {
  127. pr_err("fence wait success after submit (expected timeout)!\n");
  128. goto out_device;
  129. }
  130. if (dma_fence_wait_timeout(&request->fence, false, T) <= 0) {
  131. pr_err("fence wait timed out (expected success)!\n");
  132. goto out_device;
  133. }
  134. if (!dma_fence_is_signaled(&request->fence)) {
  135. pr_err("fence unsignaled after waiting!\n");
  136. goto out_device;
  137. }
  138. if (dma_fence_wait_timeout(&request->fence, false, T) <= 0) {
  139. pr_err("fence wait timed out when complete (expected success)!\n");
  140. goto out_device;
  141. }
  142. err = 0;
  143. out_device:
  144. mutex_lock(&i915->drm.struct_mutex);
  145. out_locked:
  146. mock_device_flush(i915);
  147. mutex_unlock(&i915->drm.struct_mutex);
  148. return err;
  149. }
  150. int i915_gem_request_mock_selftests(void)
  151. {
  152. static const struct i915_subtest tests[] = {
  153. SUBTEST(igt_add_request),
  154. SUBTEST(igt_wait_request),
  155. SUBTEST(igt_fence_wait),
  156. };
  157. struct drm_i915_private *i915;
  158. int err;
  159. i915 = mock_gem_device();
  160. if (!i915)
  161. return -ENOMEM;
  162. err = i915_subtests(tests, i915);
  163. drm_dev_unref(&i915->drm);
  164. return err;
  165. }
  166. struct live_test {
  167. struct drm_i915_private *i915;
  168. const char *func;
  169. const char *name;
  170. unsigned int reset_count;
  171. };
  172. static int begin_live_test(struct live_test *t,
  173. struct drm_i915_private *i915,
  174. const char *func,
  175. const char *name)
  176. {
  177. int err;
  178. t->i915 = i915;
  179. t->func = func;
  180. t->name = name;
  181. err = i915_gem_wait_for_idle(i915, I915_WAIT_LOCKED);
  182. if (err) {
  183. pr_err("%s(%s): failed to idle before, with err=%d!",
  184. func, name, err);
  185. return err;
  186. }
  187. i915_gem_retire_requests(i915);
  188. i915->gpu_error.missed_irq_rings = 0;
  189. t->reset_count = i915_reset_count(&i915->gpu_error);
  190. return 0;
  191. }
  192. static int end_live_test(struct live_test *t)
  193. {
  194. struct drm_i915_private *i915 = t->i915;
  195. if (wait_for(intel_execlists_idle(i915), 1)) {
  196. pr_err("%s(%s): GPU not idle\n", t->func, t->name);
  197. return -EIO;
  198. }
  199. if (t->reset_count != i915_reset_count(&i915->gpu_error)) {
  200. pr_err("%s(%s): GPU was reset %d times!\n",
  201. t->func, t->name,
  202. i915_reset_count(&i915->gpu_error) - t->reset_count);
  203. return -EIO;
  204. }
  205. if (i915->gpu_error.missed_irq_rings) {
  206. pr_err("%s(%s): Missed interrupts on engines %lx\n",
  207. t->func, t->name, i915->gpu_error.missed_irq_rings);
  208. return -EIO;
  209. }
  210. return 0;
  211. }
  212. static int live_nop_request(void *arg)
  213. {
  214. struct drm_i915_private *i915 = arg;
  215. struct intel_engine_cs *engine;
  216. struct live_test t;
  217. unsigned int id;
  218. int err;
  219. /* Submit various sized batches of empty requests, to each engine
  220. * (individually), and wait for the batch to complete. We can check
  221. * the overhead of submitting requests to the hardware.
  222. */
  223. mutex_lock(&i915->drm.struct_mutex);
  224. for_each_engine(engine, i915, id) {
  225. IGT_TIMEOUT(end_time);
  226. struct drm_i915_gem_request *request;
  227. unsigned long n, prime;
  228. ktime_t times[2] = {};
  229. err = begin_live_test(&t, i915, __func__, engine->name);
  230. if (err)
  231. goto out_unlock;
  232. for_each_prime_number_from(prime, 1, 8192) {
  233. times[1] = ktime_get_raw();
  234. for (n = 0; n < prime; n++) {
  235. request = i915_gem_request_alloc(engine,
  236. i915->kernel_context);
  237. if (IS_ERR(request)) {
  238. err = PTR_ERR(request);
  239. goto out_unlock;
  240. }
  241. /* This space is left intentionally blank.
  242. *
  243. * We do not actually want to perform any
  244. * action with this request, we just want
  245. * to measure the latency in allocation
  246. * and submission of our breadcrumbs -
  247. * ensuring that the bare request is sufficient
  248. * for the system to work (i.e. proper HEAD
  249. * tracking of the rings, interrupt handling,
  250. * etc). It also gives us the lowest bounds
  251. * for latency.
  252. */
  253. i915_add_request(request);
  254. }
  255. i915_wait_request(request,
  256. I915_WAIT_LOCKED,
  257. MAX_SCHEDULE_TIMEOUT);
  258. times[1] = ktime_sub(ktime_get_raw(), times[1]);
  259. if (prime == 1)
  260. times[0] = times[1];
  261. if (__igt_timeout(end_time, NULL))
  262. break;
  263. }
  264. err = end_live_test(&t);
  265. if (err)
  266. goto out_unlock;
  267. pr_info("Request latencies on %s: 1 = %lluns, %lu = %lluns\n",
  268. engine->name,
  269. ktime_to_ns(times[0]),
  270. prime, div64_u64(ktime_to_ns(times[1]), prime));
  271. }
  272. out_unlock:
  273. mutex_unlock(&i915->drm.struct_mutex);
  274. return err;
  275. }
  276. static struct i915_vma *recursive_batch(struct drm_i915_private *i915)
  277. {
  278. struct i915_gem_context *ctx = i915->kernel_context;
  279. struct i915_address_space *vm = ctx->ppgtt ? &ctx->ppgtt->base : &i915->ggtt.base;
  280. struct drm_i915_gem_object *obj;
  281. const int gen = INTEL_GEN(i915);
  282. struct i915_vma *vma;
  283. u32 *cmd;
  284. int err;
  285. obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
  286. if (IS_ERR(obj))
  287. return ERR_CAST(obj);
  288. vma = i915_vma_instance(obj, vm, NULL);
  289. if (IS_ERR(vma)) {
  290. err = PTR_ERR(vma);
  291. goto err;
  292. }
  293. err = i915_vma_pin(vma, 0, 0, PIN_USER);
  294. if (err)
  295. goto err;
  296. err = i915_gem_object_set_to_gtt_domain(obj, true);
  297. if (err)
  298. goto err;
  299. cmd = i915_gem_object_pin_map(obj, I915_MAP_WC);
  300. if (IS_ERR(cmd)) {
  301. err = PTR_ERR(cmd);
  302. goto err;
  303. }
  304. if (gen >= 8) {
  305. *cmd++ = MI_BATCH_BUFFER_START | 1 << 8 | 1;
  306. *cmd++ = lower_32_bits(vma->node.start);
  307. *cmd++ = upper_32_bits(vma->node.start);
  308. } else if (gen >= 6) {
  309. *cmd++ = MI_BATCH_BUFFER_START | 1 << 8;
  310. *cmd++ = lower_32_bits(vma->node.start);
  311. } else if (gen >= 4) {
  312. *cmd++ = MI_BATCH_BUFFER_START | MI_BATCH_GTT;
  313. *cmd++ = lower_32_bits(vma->node.start);
  314. } else {
  315. *cmd++ = MI_BATCH_BUFFER_START | MI_BATCH_GTT | 1;
  316. *cmd++ = lower_32_bits(vma->node.start);
  317. }
  318. *cmd++ = MI_BATCH_BUFFER_END; /* terminate early in case of error */
  319. wmb();
  320. i915_gem_object_unpin_map(obj);
  321. return vma;
  322. err:
  323. i915_gem_object_put(obj);
  324. return ERR_PTR(err);
  325. }
  326. static int recursive_batch_resolve(struct i915_vma *batch)
  327. {
  328. u32 *cmd;
  329. cmd = i915_gem_object_pin_map(batch->obj, I915_MAP_WC);
  330. if (IS_ERR(cmd))
  331. return PTR_ERR(cmd);
  332. *cmd = MI_BATCH_BUFFER_END;
  333. wmb();
  334. i915_gem_object_unpin_map(batch->obj);
  335. return 0;
  336. }
  337. static int live_all_engines(void *arg)
  338. {
  339. struct drm_i915_private *i915 = arg;
  340. struct intel_engine_cs *engine;
  341. struct drm_i915_gem_request *request[I915_NUM_ENGINES];
  342. struct i915_vma *batch;
  343. struct live_test t;
  344. unsigned int id;
  345. int err;
  346. /* Check we can submit requests to all engines simultaneously. We
  347. * send a recursive batch to each engine - checking that we don't
  348. * block doing so, and that they don't complete too soon.
  349. */
  350. mutex_lock(&i915->drm.struct_mutex);
  351. err = begin_live_test(&t, i915, __func__, "");
  352. if (err)
  353. goto out_unlock;
  354. batch = recursive_batch(i915);
  355. if (IS_ERR(batch)) {
  356. err = PTR_ERR(batch);
  357. pr_err("%s: Unable to create batch, err=%d\n", __func__, err);
  358. goto out_unlock;
  359. }
  360. for_each_engine(engine, i915, id) {
  361. request[id] = i915_gem_request_alloc(engine,
  362. i915->kernel_context);
  363. if (IS_ERR(request[id])) {
  364. err = PTR_ERR(request[id]);
  365. pr_err("%s: Request allocation failed with err=%d\n",
  366. __func__, err);
  367. goto out_request;
  368. }
  369. err = engine->emit_flush(request[id], EMIT_INVALIDATE);
  370. GEM_BUG_ON(err);
  371. err = i915_switch_context(request[id]);
  372. GEM_BUG_ON(err);
  373. err = engine->emit_bb_start(request[id],
  374. batch->node.start,
  375. batch->node.size,
  376. 0);
  377. GEM_BUG_ON(err);
  378. request[id]->batch = batch;
  379. if (!i915_gem_object_has_active_reference(batch->obj)) {
  380. i915_gem_object_get(batch->obj);
  381. i915_gem_object_set_active_reference(batch->obj);
  382. }
  383. i915_vma_move_to_active(batch, request[id], 0);
  384. i915_gem_request_get(request[id]);
  385. i915_add_request(request[id]);
  386. }
  387. for_each_engine(engine, i915, id) {
  388. if (i915_gem_request_completed(request[id])) {
  389. pr_err("%s(%s): request completed too early!\n",
  390. __func__, engine->name);
  391. err = -EINVAL;
  392. goto out_request;
  393. }
  394. }
  395. err = recursive_batch_resolve(batch);
  396. if (err) {
  397. pr_err("%s: failed to resolve batch, err=%d\n", __func__, err);
  398. goto out_request;
  399. }
  400. for_each_engine(engine, i915, id) {
  401. long timeout;
  402. timeout = i915_wait_request(request[id],
  403. I915_WAIT_LOCKED,
  404. MAX_SCHEDULE_TIMEOUT);
  405. if (timeout < 0) {
  406. err = timeout;
  407. pr_err("%s: error waiting for request on %s, err=%d\n",
  408. __func__, engine->name, err);
  409. goto out_request;
  410. }
  411. GEM_BUG_ON(!i915_gem_request_completed(request[id]));
  412. i915_gem_request_put(request[id]);
  413. request[id] = NULL;
  414. }
  415. err = end_live_test(&t);
  416. out_request:
  417. for_each_engine(engine, i915, id)
  418. if (request[id])
  419. i915_gem_request_put(request[id]);
  420. i915_vma_unpin(batch);
  421. i915_vma_put(batch);
  422. out_unlock:
  423. mutex_unlock(&i915->drm.struct_mutex);
  424. return err;
  425. }
  426. static int live_sequential_engines(void *arg)
  427. {
  428. struct drm_i915_private *i915 = arg;
  429. struct drm_i915_gem_request *request[I915_NUM_ENGINES] = {};
  430. struct drm_i915_gem_request *prev = NULL;
  431. struct intel_engine_cs *engine;
  432. struct live_test t;
  433. unsigned int id;
  434. int err;
  435. /* Check we can submit requests to all engines sequentially, such
  436. * that each successive request waits for the earlier ones. This
  437. * tests that we don't execute requests out of order, even though
  438. * they are running on independent engines.
  439. */
  440. mutex_lock(&i915->drm.struct_mutex);
  441. err = begin_live_test(&t, i915, __func__, "");
  442. if (err)
  443. goto out_unlock;
  444. for_each_engine(engine, i915, id) {
  445. struct i915_vma *batch;
  446. batch = recursive_batch(i915);
  447. if (IS_ERR(batch)) {
  448. err = PTR_ERR(batch);
  449. pr_err("%s: Unable to create batch for %s, err=%d\n",
  450. __func__, engine->name, err);
  451. goto out_unlock;
  452. }
  453. request[id] = i915_gem_request_alloc(engine,
  454. i915->kernel_context);
  455. if (IS_ERR(request[id])) {
  456. err = PTR_ERR(request[id]);
  457. pr_err("%s: Request allocation failed for %s with err=%d\n",
  458. __func__, engine->name, err);
  459. goto out_request;
  460. }
  461. if (prev) {
  462. err = i915_gem_request_await_dma_fence(request[id],
  463. &prev->fence);
  464. if (err) {
  465. i915_add_request(request[id]);
  466. pr_err("%s: Request await failed for %s with err=%d\n",
  467. __func__, engine->name, err);
  468. goto out_request;
  469. }
  470. }
  471. err = engine->emit_flush(request[id], EMIT_INVALIDATE);
  472. GEM_BUG_ON(err);
  473. err = i915_switch_context(request[id]);
  474. GEM_BUG_ON(err);
  475. err = engine->emit_bb_start(request[id],
  476. batch->node.start,
  477. batch->node.size,
  478. 0);
  479. GEM_BUG_ON(err);
  480. request[id]->batch = batch;
  481. i915_vma_move_to_active(batch, request[id], 0);
  482. i915_gem_object_set_active_reference(batch->obj);
  483. i915_vma_get(batch);
  484. i915_gem_request_get(request[id]);
  485. i915_add_request(request[id]);
  486. prev = request[id];
  487. }
  488. for_each_engine(engine, i915, id) {
  489. long timeout;
  490. if (i915_gem_request_completed(request[id])) {
  491. pr_err("%s(%s): request completed too early!\n",
  492. __func__, engine->name);
  493. err = -EINVAL;
  494. goto out_request;
  495. }
  496. err = recursive_batch_resolve(request[id]->batch);
  497. if (err) {
  498. pr_err("%s: failed to resolve batch, err=%d\n",
  499. __func__, err);
  500. goto out_request;
  501. }
  502. timeout = i915_wait_request(request[id],
  503. I915_WAIT_LOCKED,
  504. MAX_SCHEDULE_TIMEOUT);
  505. if (timeout < 0) {
  506. err = timeout;
  507. pr_err("%s: error waiting for request on %s, err=%d\n",
  508. __func__, engine->name, err);
  509. goto out_request;
  510. }
  511. GEM_BUG_ON(!i915_gem_request_completed(request[id]));
  512. }
  513. err = end_live_test(&t);
  514. out_request:
  515. for_each_engine(engine, i915, id) {
  516. u32 *cmd;
  517. if (!request[id])
  518. break;
  519. cmd = i915_gem_object_pin_map(request[id]->batch->obj,
  520. I915_MAP_WC);
  521. if (!IS_ERR(cmd)) {
  522. *cmd = MI_BATCH_BUFFER_END;
  523. wmb();
  524. i915_gem_object_unpin_map(request[id]->batch->obj);
  525. }
  526. i915_vma_put(request[id]->batch);
  527. i915_gem_request_put(request[id]);
  528. }
  529. out_unlock:
  530. mutex_unlock(&i915->drm.struct_mutex);
  531. return err;
  532. }
  533. int i915_gem_request_live_selftests(struct drm_i915_private *i915)
  534. {
  535. static const struct i915_subtest tests[] = {
  536. SUBTEST(live_nop_request),
  537. SUBTEST(live_all_engines),
  538. SUBTEST(live_sequential_engines),
  539. };
  540. return i915_subtests(tests, i915);
  541. }