xmon.c 69 KB

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  1. /*
  2. * Routines providing a simple monitor for use on the PowerMac.
  3. *
  4. * Copyright (C) 1996-2005 Paul Mackerras.
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. * Copyrignt (C) 2006 Michael Ellerman, IBM Corp
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * as published by the Free Software Foundation; either version
  11. * 2 of the License, or (at your option) any later version.
  12. */
  13. #include <linux/errno.h>
  14. #include <linux/sched.h>
  15. #include <linux/smp.h>
  16. #include <linux/mm.h>
  17. #include <linux/reboot.h>
  18. #include <linux/delay.h>
  19. #include <linux/kallsyms.h>
  20. #include <linux/kmsg_dump.h>
  21. #include <linux/cpumask.h>
  22. #include <linux/export.h>
  23. #include <linux/sysrq.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/bug.h>
  27. #include <linux/nmi.h>
  28. #include <linux/ctype.h>
  29. #include <asm/ptrace.h>
  30. #include <asm/string.h>
  31. #include <asm/prom.h>
  32. #include <asm/machdep.h>
  33. #include <asm/xmon.h>
  34. #include <asm/processor.h>
  35. #include <asm/pgtable.h>
  36. #include <asm/mmu.h>
  37. #include <asm/mmu_context.h>
  38. #include <asm/cputable.h>
  39. #include <asm/rtas.h>
  40. #include <asm/sstep.h>
  41. #include <asm/irq_regs.h>
  42. #include <asm/spu.h>
  43. #include <asm/spu_priv1.h>
  44. #include <asm/setjmp.h>
  45. #include <asm/reg.h>
  46. #include <asm/debug.h>
  47. #include <asm/hw_breakpoint.h>
  48. #ifdef CONFIG_PPC64
  49. #include <asm/hvcall.h>
  50. #include <asm/paca.h>
  51. #endif
  52. #if defined(CONFIG_PPC_SPLPAR)
  53. #include <asm/plpar_wrappers.h>
  54. #else
  55. static inline long plapr_set_ciabr(unsigned long ciabr) {return 0; };
  56. #endif
  57. #include "nonstdio.h"
  58. #include "dis-asm.h"
  59. #ifdef CONFIG_SMP
  60. static cpumask_t cpus_in_xmon = CPU_MASK_NONE;
  61. static unsigned long xmon_taken = 1;
  62. static int xmon_owner;
  63. static int xmon_gate;
  64. #else
  65. #define xmon_owner 0
  66. #endif /* CONFIG_SMP */
  67. static unsigned long in_xmon __read_mostly = 0;
  68. static unsigned long adrs;
  69. static int size = 1;
  70. #define MAX_DUMP (128 * 1024)
  71. static unsigned long ndump = 64;
  72. static unsigned long nidump = 16;
  73. static unsigned long ncsum = 4096;
  74. static int termch;
  75. static char tmpstr[128];
  76. static long bus_error_jmp[JMP_BUF_LEN];
  77. static int catch_memory_errors;
  78. static long *xmon_fault_jmp[NR_CPUS];
  79. /* Breakpoint stuff */
  80. struct bpt {
  81. unsigned long address;
  82. unsigned int instr[2];
  83. atomic_t ref_count;
  84. int enabled;
  85. unsigned long pad;
  86. };
  87. /* Bits in bpt.enabled */
  88. #define BP_CIABR 1
  89. #define BP_TRAP 2
  90. #define BP_DABR 4
  91. #define NBPTS 256
  92. static struct bpt bpts[NBPTS];
  93. static struct bpt dabr;
  94. static struct bpt *iabr;
  95. static unsigned bpinstr = 0x7fe00008; /* trap */
  96. #define BP_NUM(bp) ((bp) - bpts + 1)
  97. /* Prototypes */
  98. static int cmds(struct pt_regs *);
  99. static int mread(unsigned long, void *, int);
  100. static int mwrite(unsigned long, void *, int);
  101. static int handle_fault(struct pt_regs *);
  102. static void byterev(unsigned char *, int);
  103. static void memex(void);
  104. static int bsesc(void);
  105. static void dump(void);
  106. static void prdump(unsigned long, long);
  107. static int ppc_inst_dump(unsigned long, long, int);
  108. static void dump_log_buf(void);
  109. static void backtrace(struct pt_regs *);
  110. static void excprint(struct pt_regs *);
  111. static void prregs(struct pt_regs *);
  112. static void memops(int);
  113. static void memlocate(void);
  114. static void memzcan(void);
  115. static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned);
  116. int skipbl(void);
  117. int scanhex(unsigned long *valp);
  118. static void scannl(void);
  119. static int hexdigit(int);
  120. void getstring(char *, int);
  121. static void flush_input(void);
  122. static int inchar(void);
  123. static void take_input(char *);
  124. static unsigned long read_spr(int);
  125. static void write_spr(int, unsigned long);
  126. static void super_regs(void);
  127. static void remove_bpts(void);
  128. static void insert_bpts(void);
  129. static void remove_cpu_bpts(void);
  130. static void insert_cpu_bpts(void);
  131. static struct bpt *at_breakpoint(unsigned long pc);
  132. static struct bpt *in_breakpoint_table(unsigned long pc, unsigned long *offp);
  133. static int do_step(struct pt_regs *);
  134. static void bpt_cmds(void);
  135. static void cacheflush(void);
  136. static int cpu_cmd(void);
  137. static void csum(void);
  138. static void bootcmds(void);
  139. static void proccall(void);
  140. void dump_segments(void);
  141. static void symbol_lookup(void);
  142. static void xmon_show_stack(unsigned long sp, unsigned long lr,
  143. unsigned long pc);
  144. static void xmon_print_symbol(unsigned long address, const char *mid,
  145. const char *after);
  146. static const char *getvecname(unsigned long vec);
  147. static int do_spu_cmd(void);
  148. #ifdef CONFIG_44x
  149. static void dump_tlb_44x(void);
  150. #endif
  151. #ifdef CONFIG_PPC_BOOK3E
  152. static void dump_tlb_book3e(void);
  153. #endif
  154. static int xmon_no_auto_backtrace;
  155. extern void xmon_enter(void);
  156. extern void xmon_leave(void);
  157. #ifdef CONFIG_PPC64
  158. #define REG "%.16lx"
  159. #else
  160. #define REG "%.8lx"
  161. #endif
  162. #ifdef __LITTLE_ENDIAN__
  163. #define GETWORD(v) (((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0])
  164. #else
  165. #define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3])
  166. #endif
  167. static char *help_string = "\
  168. Commands:\n\
  169. b show breakpoints\n\
  170. bd set data breakpoint\n\
  171. bi set instruction breakpoint\n\
  172. bc clear breakpoint\n"
  173. #ifdef CONFIG_SMP
  174. "\
  175. c print cpus stopped in xmon\n\
  176. c# try to switch to cpu number h (in hex)\n"
  177. #endif
  178. "\
  179. C checksum\n\
  180. d dump bytes\n\
  181. di dump instructions\n\
  182. df dump float values\n\
  183. dd dump double values\n\
  184. dl dump the kernel log buffer\n"
  185. #ifdef CONFIG_PPC64
  186. "\
  187. dp[#] dump paca for current cpu, or cpu #\n\
  188. dpa dump paca for all possible cpus\n"
  189. #endif
  190. "\
  191. dr dump stream of raw bytes\n\
  192. e print exception information\n\
  193. f flush cache\n\
  194. la lookup symbol+offset of specified address\n\
  195. ls lookup address of specified symbol\n\
  196. m examine/change memory\n\
  197. mm move a block of memory\n\
  198. ms set a block of memory\n\
  199. md compare two blocks of memory\n\
  200. ml locate a block of memory\n\
  201. mz zero a block of memory\n\
  202. mi show information about memory allocation\n\
  203. p call a procedure\n\
  204. r print registers\n\
  205. s single step\n"
  206. #ifdef CONFIG_SPU_BASE
  207. " ss stop execution on all spus\n\
  208. sr restore execution on stopped spus\n\
  209. sf # dump spu fields for spu # (in hex)\n\
  210. sd # dump spu local store for spu # (in hex)\n\
  211. sdi # disassemble spu local store for spu # (in hex)\n"
  212. #endif
  213. " S print special registers\n\
  214. t print backtrace\n\
  215. x exit monitor and recover\n\
  216. X exit monitor and dont recover\n"
  217. #if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E)
  218. " u dump segment table or SLB\n"
  219. #elif defined(CONFIG_PPC_STD_MMU_32)
  220. " u dump segment registers\n"
  221. #elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E)
  222. " u dump TLB\n"
  223. #endif
  224. " ? help\n"
  225. #ifdef CONFIG_PPC64
  226. " # n limit output to n lines per page (dump paca only)\n"
  227. #endif
  228. " zr reboot\n\
  229. zh halt\n"
  230. ;
  231. static struct pt_regs *xmon_regs;
  232. static inline void sync(void)
  233. {
  234. asm volatile("sync; isync");
  235. }
  236. static inline void store_inst(void *p)
  237. {
  238. asm volatile ("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r" (p));
  239. }
  240. static inline void cflush(void *p)
  241. {
  242. asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p));
  243. }
  244. static inline void cinval(void *p)
  245. {
  246. asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p));
  247. }
  248. /**
  249. * write_ciabr() - write the CIABR SPR
  250. * @ciabr: The value to write.
  251. *
  252. * This function writes a value to the CIARB register either directly
  253. * through mtspr instruction if the kernel is in HV privilege mode or
  254. * call a hypervisor function to achieve the same in case the kernel
  255. * is in supervisor privilege mode.
  256. */
  257. static void write_ciabr(unsigned long ciabr)
  258. {
  259. if (!cpu_has_feature(CPU_FTR_ARCH_207S))
  260. return;
  261. if (cpu_has_feature(CPU_FTR_HVMODE)) {
  262. mtspr(SPRN_CIABR, ciabr);
  263. return;
  264. }
  265. plapr_set_ciabr(ciabr);
  266. }
  267. /**
  268. * set_ciabr() - set the CIABR
  269. * @addr: The value to set.
  270. *
  271. * This function sets the correct privilege value into the the HW
  272. * breakpoint address before writing it up in the CIABR register.
  273. */
  274. static void set_ciabr(unsigned long addr)
  275. {
  276. addr &= ~CIABR_PRIV;
  277. if (cpu_has_feature(CPU_FTR_HVMODE))
  278. addr |= CIABR_PRIV_HYPER;
  279. else
  280. addr |= CIABR_PRIV_SUPER;
  281. write_ciabr(addr);
  282. }
  283. /*
  284. * Disable surveillance (the service processor watchdog function)
  285. * while we are in xmon.
  286. * XXX we should re-enable it when we leave. :)
  287. */
  288. #define SURVEILLANCE_TOKEN 9000
  289. static inline void disable_surveillance(void)
  290. {
  291. #ifdef CONFIG_PPC_PSERIES
  292. /* Since this can't be a module, args should end up below 4GB. */
  293. static struct rtas_args args;
  294. /*
  295. * At this point we have got all the cpus we can into
  296. * xmon, so there is hopefully no other cpu calling RTAS
  297. * at the moment, even though we don't take rtas.lock.
  298. * If we did try to take rtas.lock there would be a
  299. * real possibility of deadlock.
  300. */
  301. args.token = rtas_token("set-indicator");
  302. if (args.token == RTAS_UNKNOWN_SERVICE)
  303. return;
  304. args.token = cpu_to_be32(args.token);
  305. args.nargs = cpu_to_be32(3);
  306. args.nret = cpu_to_be32(1);
  307. args.rets = &args.args[3];
  308. args.args[0] = cpu_to_be32(SURVEILLANCE_TOKEN);
  309. args.args[1] = 0;
  310. args.args[2] = 0;
  311. enter_rtas(__pa(&args));
  312. #endif /* CONFIG_PPC_PSERIES */
  313. }
  314. #ifdef CONFIG_SMP
  315. static int xmon_speaker;
  316. static void get_output_lock(void)
  317. {
  318. int me = smp_processor_id() + 0x100;
  319. int last_speaker = 0, prev;
  320. long timeout;
  321. if (xmon_speaker == me)
  322. return;
  323. for (;;) {
  324. last_speaker = cmpxchg(&xmon_speaker, 0, me);
  325. if (last_speaker == 0)
  326. return;
  327. /*
  328. * Wait a full second for the lock, we might be on a slow
  329. * console, but check every 100us.
  330. */
  331. timeout = 10000;
  332. while (xmon_speaker == last_speaker) {
  333. if (--timeout > 0) {
  334. udelay(100);
  335. continue;
  336. }
  337. /* hostile takeover */
  338. prev = cmpxchg(&xmon_speaker, last_speaker, me);
  339. if (prev == last_speaker)
  340. return;
  341. break;
  342. }
  343. }
  344. }
  345. static void release_output_lock(void)
  346. {
  347. xmon_speaker = 0;
  348. }
  349. int cpus_are_in_xmon(void)
  350. {
  351. return !cpumask_empty(&cpus_in_xmon);
  352. }
  353. #endif
  354. static inline int unrecoverable_excp(struct pt_regs *regs)
  355. {
  356. #if defined(CONFIG_4xx) || defined(CONFIG_PPC_BOOK3E)
  357. /* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */
  358. return 0;
  359. #else
  360. return ((regs->msr & MSR_RI) == 0);
  361. #endif
  362. }
  363. static int xmon_core(struct pt_regs *regs, int fromipi)
  364. {
  365. int cmd = 0;
  366. struct bpt *bp;
  367. long recurse_jmp[JMP_BUF_LEN];
  368. unsigned long offset;
  369. unsigned long flags;
  370. #ifdef CONFIG_SMP
  371. int cpu;
  372. int secondary;
  373. unsigned long timeout;
  374. #endif
  375. local_irq_save(flags);
  376. hard_irq_disable();
  377. bp = in_breakpoint_table(regs->nip, &offset);
  378. if (bp != NULL) {
  379. regs->nip = bp->address + offset;
  380. atomic_dec(&bp->ref_count);
  381. }
  382. remove_cpu_bpts();
  383. #ifdef CONFIG_SMP
  384. cpu = smp_processor_id();
  385. if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
  386. get_output_lock();
  387. excprint(regs);
  388. printf("cpu 0x%x: Exception %lx %s in xmon, "
  389. "returning to main loop\n",
  390. cpu, regs->trap, getvecname(TRAP(regs)));
  391. release_output_lock();
  392. longjmp(xmon_fault_jmp[cpu], 1);
  393. }
  394. if (setjmp(recurse_jmp) != 0) {
  395. if (!in_xmon || !xmon_gate) {
  396. get_output_lock();
  397. printf("xmon: WARNING: bad recursive fault "
  398. "on cpu 0x%x\n", cpu);
  399. release_output_lock();
  400. goto waiting;
  401. }
  402. secondary = !(xmon_taken && cpu == xmon_owner);
  403. goto cmdloop;
  404. }
  405. xmon_fault_jmp[cpu] = recurse_jmp;
  406. bp = NULL;
  407. if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT))
  408. bp = at_breakpoint(regs->nip);
  409. if (bp || unrecoverable_excp(regs))
  410. fromipi = 0;
  411. if (!fromipi) {
  412. get_output_lock();
  413. excprint(regs);
  414. if (bp) {
  415. printf("cpu 0x%x stopped at breakpoint 0x%lx (",
  416. cpu, BP_NUM(bp));
  417. xmon_print_symbol(regs->nip, " ", ")\n");
  418. }
  419. if (unrecoverable_excp(regs))
  420. printf("WARNING: exception is not recoverable, "
  421. "can't continue\n");
  422. release_output_lock();
  423. }
  424. cpumask_set_cpu(cpu, &cpus_in_xmon);
  425. waiting:
  426. secondary = 1;
  427. while (secondary && !xmon_gate) {
  428. if (in_xmon == 0) {
  429. if (fromipi)
  430. goto leave;
  431. secondary = test_and_set_bit(0, &in_xmon);
  432. }
  433. barrier();
  434. }
  435. if (!secondary && !xmon_gate) {
  436. /* we are the first cpu to come in */
  437. /* interrupt other cpu(s) */
  438. int ncpus = num_online_cpus();
  439. xmon_owner = cpu;
  440. mb();
  441. if (ncpus > 1) {
  442. smp_send_debugger_break();
  443. /* wait for other cpus to come in */
  444. for (timeout = 100000000; timeout != 0; --timeout) {
  445. if (cpumask_weight(&cpus_in_xmon) >= ncpus)
  446. break;
  447. barrier();
  448. }
  449. }
  450. remove_bpts();
  451. disable_surveillance();
  452. /* for breakpoint or single step, print the current instr. */
  453. if (bp || TRAP(regs) == 0xd00)
  454. ppc_inst_dump(regs->nip, 1, 0);
  455. printf("enter ? for help\n");
  456. mb();
  457. xmon_gate = 1;
  458. barrier();
  459. }
  460. cmdloop:
  461. while (in_xmon) {
  462. if (secondary) {
  463. if (cpu == xmon_owner) {
  464. if (!test_and_set_bit(0, &xmon_taken)) {
  465. secondary = 0;
  466. continue;
  467. }
  468. /* missed it */
  469. while (cpu == xmon_owner)
  470. barrier();
  471. }
  472. barrier();
  473. } else {
  474. cmd = cmds(regs);
  475. if (cmd != 0) {
  476. /* exiting xmon */
  477. insert_bpts();
  478. xmon_gate = 0;
  479. wmb();
  480. in_xmon = 0;
  481. break;
  482. }
  483. /* have switched to some other cpu */
  484. secondary = 1;
  485. }
  486. }
  487. leave:
  488. cpumask_clear_cpu(cpu, &cpus_in_xmon);
  489. xmon_fault_jmp[cpu] = NULL;
  490. #else
  491. /* UP is simple... */
  492. if (in_xmon) {
  493. printf("Exception %lx %s in xmon, returning to main loop\n",
  494. regs->trap, getvecname(TRAP(regs)));
  495. longjmp(xmon_fault_jmp[0], 1);
  496. }
  497. if (setjmp(recurse_jmp) == 0) {
  498. xmon_fault_jmp[0] = recurse_jmp;
  499. in_xmon = 1;
  500. excprint(regs);
  501. bp = at_breakpoint(regs->nip);
  502. if (bp) {
  503. printf("Stopped at breakpoint %lx (", BP_NUM(bp));
  504. xmon_print_symbol(regs->nip, " ", ")\n");
  505. }
  506. if (unrecoverable_excp(regs))
  507. printf("WARNING: exception is not recoverable, "
  508. "can't continue\n");
  509. remove_bpts();
  510. disable_surveillance();
  511. /* for breakpoint or single step, print the current instr. */
  512. if (bp || TRAP(regs) == 0xd00)
  513. ppc_inst_dump(regs->nip, 1, 0);
  514. printf("enter ? for help\n");
  515. }
  516. cmd = cmds(regs);
  517. insert_bpts();
  518. in_xmon = 0;
  519. #endif
  520. #ifdef CONFIG_BOOKE
  521. if (regs->msr & MSR_DE) {
  522. bp = at_breakpoint(regs->nip);
  523. if (bp != NULL) {
  524. regs->nip = (unsigned long) &bp->instr[0];
  525. atomic_inc(&bp->ref_count);
  526. }
  527. }
  528. #else
  529. if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
  530. bp = at_breakpoint(regs->nip);
  531. if (bp != NULL) {
  532. int stepped = emulate_step(regs, bp->instr[0]);
  533. if (stepped == 0) {
  534. regs->nip = (unsigned long) &bp->instr[0];
  535. atomic_inc(&bp->ref_count);
  536. } else if (stepped < 0) {
  537. printf("Couldn't single-step %s instruction\n",
  538. (IS_RFID(bp->instr[0])? "rfid": "mtmsrd"));
  539. }
  540. }
  541. }
  542. #endif
  543. insert_cpu_bpts();
  544. touch_nmi_watchdog();
  545. local_irq_restore(flags);
  546. return cmd != 'X' && cmd != EOF;
  547. }
  548. int xmon(struct pt_regs *excp)
  549. {
  550. struct pt_regs regs;
  551. if (excp == NULL) {
  552. ppc_save_regs(&regs);
  553. excp = &regs;
  554. }
  555. return xmon_core(excp, 0);
  556. }
  557. EXPORT_SYMBOL(xmon);
  558. irqreturn_t xmon_irq(int irq, void *d)
  559. {
  560. unsigned long flags;
  561. local_irq_save(flags);
  562. printf("Keyboard interrupt\n");
  563. xmon(get_irq_regs());
  564. local_irq_restore(flags);
  565. return IRQ_HANDLED;
  566. }
  567. static int xmon_bpt(struct pt_regs *regs)
  568. {
  569. struct bpt *bp;
  570. unsigned long offset;
  571. if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
  572. return 0;
  573. /* Are we at the trap at bp->instr[1] for some bp? */
  574. bp = in_breakpoint_table(regs->nip, &offset);
  575. if (bp != NULL && offset == 4) {
  576. regs->nip = bp->address + 4;
  577. atomic_dec(&bp->ref_count);
  578. return 1;
  579. }
  580. /* Are we at a breakpoint? */
  581. bp = at_breakpoint(regs->nip);
  582. if (!bp)
  583. return 0;
  584. xmon_core(regs, 0);
  585. return 1;
  586. }
  587. static int xmon_sstep(struct pt_regs *regs)
  588. {
  589. if (user_mode(regs))
  590. return 0;
  591. xmon_core(regs, 0);
  592. return 1;
  593. }
  594. static int xmon_break_match(struct pt_regs *regs)
  595. {
  596. if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
  597. return 0;
  598. if (dabr.enabled == 0)
  599. return 0;
  600. xmon_core(regs, 0);
  601. return 1;
  602. }
  603. static int xmon_iabr_match(struct pt_regs *regs)
  604. {
  605. if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
  606. return 0;
  607. if (iabr == NULL)
  608. return 0;
  609. xmon_core(regs, 0);
  610. return 1;
  611. }
  612. static int xmon_ipi(struct pt_regs *regs)
  613. {
  614. #ifdef CONFIG_SMP
  615. if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon))
  616. xmon_core(regs, 1);
  617. #endif
  618. return 0;
  619. }
  620. static int xmon_fault_handler(struct pt_regs *regs)
  621. {
  622. struct bpt *bp;
  623. unsigned long offset;
  624. if (in_xmon && catch_memory_errors)
  625. handle_fault(regs); /* doesn't return */
  626. if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
  627. bp = in_breakpoint_table(regs->nip, &offset);
  628. if (bp != NULL) {
  629. regs->nip = bp->address + offset;
  630. atomic_dec(&bp->ref_count);
  631. }
  632. }
  633. return 0;
  634. }
  635. static struct bpt *at_breakpoint(unsigned long pc)
  636. {
  637. int i;
  638. struct bpt *bp;
  639. bp = bpts;
  640. for (i = 0; i < NBPTS; ++i, ++bp)
  641. if (bp->enabled && pc == bp->address)
  642. return bp;
  643. return NULL;
  644. }
  645. static struct bpt *in_breakpoint_table(unsigned long nip, unsigned long *offp)
  646. {
  647. unsigned long off;
  648. off = nip - (unsigned long) bpts;
  649. if (off >= sizeof(bpts))
  650. return NULL;
  651. off %= sizeof(struct bpt);
  652. if (off != offsetof(struct bpt, instr[0])
  653. && off != offsetof(struct bpt, instr[1]))
  654. return NULL;
  655. *offp = off - offsetof(struct bpt, instr[0]);
  656. return (struct bpt *) (nip - off);
  657. }
  658. static struct bpt *new_breakpoint(unsigned long a)
  659. {
  660. struct bpt *bp;
  661. a &= ~3UL;
  662. bp = at_breakpoint(a);
  663. if (bp)
  664. return bp;
  665. for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
  666. if (!bp->enabled && atomic_read(&bp->ref_count) == 0) {
  667. bp->address = a;
  668. bp->instr[1] = bpinstr;
  669. store_inst(&bp->instr[1]);
  670. return bp;
  671. }
  672. }
  673. printf("Sorry, no free breakpoints. Please clear one first.\n");
  674. return NULL;
  675. }
  676. static void insert_bpts(void)
  677. {
  678. int i;
  679. struct bpt *bp;
  680. bp = bpts;
  681. for (i = 0; i < NBPTS; ++i, ++bp) {
  682. if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0)
  683. continue;
  684. if (mread(bp->address, &bp->instr[0], 4) != 4) {
  685. printf("Couldn't read instruction at %lx, "
  686. "disabling breakpoint there\n", bp->address);
  687. bp->enabled = 0;
  688. continue;
  689. }
  690. if (IS_MTMSRD(bp->instr[0]) || IS_RFID(bp->instr[0])) {
  691. printf("Breakpoint at %lx is on an mtmsrd or rfid "
  692. "instruction, disabling it\n", bp->address);
  693. bp->enabled = 0;
  694. continue;
  695. }
  696. store_inst(&bp->instr[0]);
  697. if (bp->enabled & BP_CIABR)
  698. continue;
  699. if (mwrite(bp->address, &bpinstr, 4) != 4) {
  700. printf("Couldn't write instruction at %lx, "
  701. "disabling breakpoint there\n", bp->address);
  702. bp->enabled &= ~BP_TRAP;
  703. continue;
  704. }
  705. store_inst((void *)bp->address);
  706. }
  707. }
  708. static void insert_cpu_bpts(void)
  709. {
  710. struct arch_hw_breakpoint brk;
  711. if (dabr.enabled) {
  712. brk.address = dabr.address;
  713. brk.type = (dabr.enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
  714. brk.len = 8;
  715. __set_breakpoint(&brk);
  716. }
  717. if (iabr)
  718. set_ciabr(iabr->address);
  719. }
  720. static void remove_bpts(void)
  721. {
  722. int i;
  723. struct bpt *bp;
  724. unsigned instr;
  725. bp = bpts;
  726. for (i = 0; i < NBPTS; ++i, ++bp) {
  727. if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP)
  728. continue;
  729. if (mread(bp->address, &instr, 4) == 4
  730. && instr == bpinstr
  731. && mwrite(bp->address, &bp->instr, 4) != 4)
  732. printf("Couldn't remove breakpoint at %lx\n",
  733. bp->address);
  734. else
  735. store_inst((void *)bp->address);
  736. }
  737. }
  738. static void remove_cpu_bpts(void)
  739. {
  740. hw_breakpoint_disable();
  741. write_ciabr(0);
  742. }
  743. static void set_lpp_cmd(void)
  744. {
  745. unsigned long lpp;
  746. if (!scanhex(&lpp)) {
  747. printf("Invalid number.\n");
  748. lpp = 0;
  749. }
  750. xmon_set_pagination_lpp(lpp);
  751. }
  752. /* Command interpreting routine */
  753. static char *last_cmd;
  754. static int
  755. cmds(struct pt_regs *excp)
  756. {
  757. int cmd = 0;
  758. last_cmd = NULL;
  759. xmon_regs = excp;
  760. if (!xmon_no_auto_backtrace) {
  761. xmon_no_auto_backtrace = 1;
  762. xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
  763. }
  764. for(;;) {
  765. #ifdef CONFIG_SMP
  766. printf("%x:", smp_processor_id());
  767. #endif /* CONFIG_SMP */
  768. printf("mon> ");
  769. flush_input();
  770. termch = 0;
  771. cmd = skipbl();
  772. if( cmd == '\n' ) {
  773. if (last_cmd == NULL)
  774. continue;
  775. take_input(last_cmd);
  776. last_cmd = NULL;
  777. cmd = inchar();
  778. }
  779. switch (cmd) {
  780. case 'm':
  781. cmd = inchar();
  782. switch (cmd) {
  783. case 'm':
  784. case 's':
  785. case 'd':
  786. memops(cmd);
  787. break;
  788. case 'l':
  789. memlocate();
  790. break;
  791. case 'z':
  792. memzcan();
  793. break;
  794. case 'i':
  795. show_mem(0);
  796. break;
  797. default:
  798. termch = cmd;
  799. memex();
  800. }
  801. break;
  802. case 'd':
  803. dump();
  804. break;
  805. case 'l':
  806. symbol_lookup();
  807. break;
  808. case 'r':
  809. prregs(excp); /* print regs */
  810. break;
  811. case 'e':
  812. excprint(excp);
  813. break;
  814. case 'S':
  815. super_regs();
  816. break;
  817. case 't':
  818. backtrace(excp);
  819. break;
  820. case 'f':
  821. cacheflush();
  822. break;
  823. case 's':
  824. if (do_spu_cmd() == 0)
  825. break;
  826. if (do_step(excp))
  827. return cmd;
  828. break;
  829. case 'x':
  830. case 'X':
  831. return cmd;
  832. case EOF:
  833. printf(" <no input ...>\n");
  834. mdelay(2000);
  835. return cmd;
  836. case '?':
  837. xmon_puts(help_string);
  838. break;
  839. case '#':
  840. set_lpp_cmd();
  841. break;
  842. case 'b':
  843. bpt_cmds();
  844. break;
  845. case 'C':
  846. csum();
  847. break;
  848. case 'c':
  849. if (cpu_cmd())
  850. return 0;
  851. break;
  852. case 'z':
  853. bootcmds();
  854. break;
  855. case 'p':
  856. proccall();
  857. break;
  858. #ifdef CONFIG_PPC_STD_MMU
  859. case 'u':
  860. dump_segments();
  861. break;
  862. #elif defined(CONFIG_44x)
  863. case 'u':
  864. dump_tlb_44x();
  865. break;
  866. #elif defined(CONFIG_PPC_BOOK3E)
  867. case 'u':
  868. dump_tlb_book3e();
  869. break;
  870. #endif
  871. default:
  872. printf("Unrecognized command: ");
  873. do {
  874. if (' ' < cmd && cmd <= '~')
  875. putchar(cmd);
  876. else
  877. printf("\\x%x", cmd);
  878. cmd = inchar();
  879. } while (cmd != '\n');
  880. printf(" (type ? for help)\n");
  881. break;
  882. }
  883. }
  884. }
  885. #ifdef CONFIG_BOOKE
  886. static int do_step(struct pt_regs *regs)
  887. {
  888. regs->msr |= MSR_DE;
  889. mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
  890. return 1;
  891. }
  892. #else
  893. /*
  894. * Step a single instruction.
  895. * Some instructions we emulate, others we execute with MSR_SE set.
  896. */
  897. static int do_step(struct pt_regs *regs)
  898. {
  899. unsigned int instr;
  900. int stepped;
  901. /* check we are in 64-bit kernel mode, translation enabled */
  902. if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) {
  903. if (mread(regs->nip, &instr, 4) == 4) {
  904. stepped = emulate_step(regs, instr);
  905. if (stepped < 0) {
  906. printf("Couldn't single-step %s instruction\n",
  907. (IS_RFID(instr)? "rfid": "mtmsrd"));
  908. return 0;
  909. }
  910. if (stepped > 0) {
  911. regs->trap = 0xd00 | (regs->trap & 1);
  912. printf("stepped to ");
  913. xmon_print_symbol(regs->nip, " ", "\n");
  914. ppc_inst_dump(regs->nip, 1, 0);
  915. return 0;
  916. }
  917. }
  918. }
  919. regs->msr |= MSR_SE;
  920. return 1;
  921. }
  922. #endif
  923. static void bootcmds(void)
  924. {
  925. int cmd;
  926. cmd = inchar();
  927. if (cmd == 'r')
  928. ppc_md.restart(NULL);
  929. else if (cmd == 'h')
  930. ppc_md.halt();
  931. else if (cmd == 'p')
  932. if (pm_power_off)
  933. pm_power_off();
  934. }
  935. static int cpu_cmd(void)
  936. {
  937. #ifdef CONFIG_SMP
  938. unsigned long cpu, first_cpu, last_cpu;
  939. int timeout;
  940. if (!scanhex(&cpu)) {
  941. /* print cpus waiting or in xmon */
  942. printf("cpus stopped:");
  943. last_cpu = first_cpu = NR_CPUS;
  944. for_each_possible_cpu(cpu) {
  945. if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
  946. if (cpu == last_cpu + 1) {
  947. last_cpu = cpu;
  948. } else {
  949. if (last_cpu != first_cpu)
  950. printf("-0x%lx", last_cpu);
  951. last_cpu = first_cpu = cpu;
  952. printf(" 0x%lx", cpu);
  953. }
  954. }
  955. }
  956. if (last_cpu != first_cpu)
  957. printf("-0x%lx", last_cpu);
  958. printf("\n");
  959. return 0;
  960. }
  961. /* try to switch to cpu specified */
  962. if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) {
  963. printf("cpu 0x%x isn't in xmon\n", cpu);
  964. return 0;
  965. }
  966. xmon_taken = 0;
  967. mb();
  968. xmon_owner = cpu;
  969. timeout = 10000000;
  970. while (!xmon_taken) {
  971. if (--timeout == 0) {
  972. if (test_and_set_bit(0, &xmon_taken))
  973. break;
  974. /* take control back */
  975. mb();
  976. xmon_owner = smp_processor_id();
  977. printf("cpu 0x%x didn't take control\n", cpu);
  978. return 0;
  979. }
  980. barrier();
  981. }
  982. return 1;
  983. #else
  984. return 0;
  985. #endif /* CONFIG_SMP */
  986. }
  987. static unsigned short fcstab[256] = {
  988. 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
  989. 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
  990. 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
  991. 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
  992. 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
  993. 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
  994. 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
  995. 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
  996. 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
  997. 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
  998. 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
  999. 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
  1000. 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
  1001. 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
  1002. 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
  1003. 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
  1004. 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
  1005. 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
  1006. 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
  1007. 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
  1008. 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
  1009. 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
  1010. 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
  1011. 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
  1012. 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
  1013. 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
  1014. 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
  1015. 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
  1016. 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
  1017. 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
  1018. 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
  1019. 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
  1020. };
  1021. #define FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff])
  1022. static void
  1023. csum(void)
  1024. {
  1025. unsigned int i;
  1026. unsigned short fcs;
  1027. unsigned char v;
  1028. if (!scanhex(&adrs))
  1029. return;
  1030. if (!scanhex(&ncsum))
  1031. return;
  1032. fcs = 0xffff;
  1033. for (i = 0; i < ncsum; ++i) {
  1034. if (mread(adrs+i, &v, 1) == 0) {
  1035. printf("csum stopped at "REG"\n", adrs+i);
  1036. break;
  1037. }
  1038. fcs = FCS(fcs, v);
  1039. }
  1040. printf("%x\n", fcs);
  1041. }
  1042. /*
  1043. * Check if this is a suitable place to put a breakpoint.
  1044. */
  1045. static long check_bp_loc(unsigned long addr)
  1046. {
  1047. unsigned int instr;
  1048. addr &= ~3;
  1049. if (!is_kernel_addr(addr)) {
  1050. printf("Breakpoints may only be placed at kernel addresses\n");
  1051. return 0;
  1052. }
  1053. if (!mread(addr, &instr, sizeof(instr))) {
  1054. printf("Can't read instruction at address %lx\n", addr);
  1055. return 0;
  1056. }
  1057. if (IS_MTMSRD(instr) || IS_RFID(instr)) {
  1058. printf("Breakpoints may not be placed on mtmsrd or rfid "
  1059. "instructions\n");
  1060. return 0;
  1061. }
  1062. return 1;
  1063. }
  1064. static char *breakpoint_help_string =
  1065. "Breakpoint command usage:\n"
  1066. "b show breakpoints\n"
  1067. "b <addr> [cnt] set breakpoint at given instr addr\n"
  1068. "bc clear all breakpoints\n"
  1069. "bc <n/addr> clear breakpoint number n or at addr\n"
  1070. "bi <addr> [cnt] set hardware instr breakpoint (POWER8 only)\n"
  1071. "bd <addr> [cnt] set hardware data breakpoint\n"
  1072. "";
  1073. static void
  1074. bpt_cmds(void)
  1075. {
  1076. int cmd;
  1077. unsigned long a;
  1078. int mode, i;
  1079. struct bpt *bp;
  1080. const char badaddr[] = "Only kernel addresses are permitted "
  1081. "for breakpoints\n";
  1082. cmd = inchar();
  1083. switch (cmd) {
  1084. #ifndef CONFIG_8xx
  1085. case 'd': /* bd - hardware data breakpoint */
  1086. mode = 7;
  1087. cmd = inchar();
  1088. if (cmd == 'r')
  1089. mode = 5;
  1090. else if (cmd == 'w')
  1091. mode = 6;
  1092. else
  1093. termch = cmd;
  1094. dabr.address = 0;
  1095. dabr.enabled = 0;
  1096. if (scanhex(&dabr.address)) {
  1097. if (!is_kernel_addr(dabr.address)) {
  1098. printf(badaddr);
  1099. break;
  1100. }
  1101. dabr.address &= ~HW_BRK_TYPE_DABR;
  1102. dabr.enabled = mode | BP_DABR;
  1103. }
  1104. break;
  1105. case 'i': /* bi - hardware instr breakpoint */
  1106. if (!cpu_has_feature(CPU_FTR_ARCH_207S)) {
  1107. printf("Hardware instruction breakpoint "
  1108. "not supported on this cpu\n");
  1109. break;
  1110. }
  1111. if (iabr) {
  1112. iabr->enabled &= ~BP_CIABR;
  1113. iabr = NULL;
  1114. }
  1115. if (!scanhex(&a))
  1116. break;
  1117. if (!check_bp_loc(a))
  1118. break;
  1119. bp = new_breakpoint(a);
  1120. if (bp != NULL) {
  1121. bp->enabled |= BP_CIABR;
  1122. iabr = bp;
  1123. }
  1124. break;
  1125. #endif
  1126. case 'c':
  1127. if (!scanhex(&a)) {
  1128. /* clear all breakpoints */
  1129. for (i = 0; i < NBPTS; ++i)
  1130. bpts[i].enabled = 0;
  1131. iabr = NULL;
  1132. dabr.enabled = 0;
  1133. printf("All breakpoints cleared\n");
  1134. break;
  1135. }
  1136. if (a <= NBPTS && a >= 1) {
  1137. /* assume a breakpoint number */
  1138. bp = &bpts[a-1]; /* bp nums are 1 based */
  1139. } else {
  1140. /* assume a breakpoint address */
  1141. bp = at_breakpoint(a);
  1142. if (bp == NULL) {
  1143. printf("No breakpoint at %lx\n", a);
  1144. break;
  1145. }
  1146. }
  1147. printf("Cleared breakpoint %lx (", BP_NUM(bp));
  1148. xmon_print_symbol(bp->address, " ", ")\n");
  1149. bp->enabled = 0;
  1150. break;
  1151. default:
  1152. termch = cmd;
  1153. cmd = skipbl();
  1154. if (cmd == '?') {
  1155. printf(breakpoint_help_string);
  1156. break;
  1157. }
  1158. termch = cmd;
  1159. if (!scanhex(&a)) {
  1160. /* print all breakpoints */
  1161. printf(" type address\n");
  1162. if (dabr.enabled) {
  1163. printf(" data "REG" [", dabr.address);
  1164. if (dabr.enabled & 1)
  1165. printf("r");
  1166. if (dabr.enabled & 2)
  1167. printf("w");
  1168. printf("]\n");
  1169. }
  1170. for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
  1171. if (!bp->enabled)
  1172. continue;
  1173. printf("%2x %s ", BP_NUM(bp),
  1174. (bp->enabled & BP_CIABR) ? "inst": "trap");
  1175. xmon_print_symbol(bp->address, " ", "\n");
  1176. }
  1177. break;
  1178. }
  1179. if (!check_bp_loc(a))
  1180. break;
  1181. bp = new_breakpoint(a);
  1182. if (bp != NULL)
  1183. bp->enabled |= BP_TRAP;
  1184. break;
  1185. }
  1186. }
  1187. /* Very cheap human name for vector lookup. */
  1188. static
  1189. const char *getvecname(unsigned long vec)
  1190. {
  1191. char *ret;
  1192. switch (vec) {
  1193. case 0x100: ret = "(System Reset)"; break;
  1194. case 0x200: ret = "(Machine Check)"; break;
  1195. case 0x300: ret = "(Data Access)"; break;
  1196. case 0x380: ret = "(Data SLB Access)"; break;
  1197. case 0x400: ret = "(Instruction Access)"; break;
  1198. case 0x480: ret = "(Instruction SLB Access)"; break;
  1199. case 0x500: ret = "(Hardware Interrupt)"; break;
  1200. case 0x600: ret = "(Alignment)"; break;
  1201. case 0x700: ret = "(Program Check)"; break;
  1202. case 0x800: ret = "(FPU Unavailable)"; break;
  1203. case 0x900: ret = "(Decrementer)"; break;
  1204. case 0x980: ret = "(Hypervisor Decrementer)"; break;
  1205. case 0xa00: ret = "(Doorbell)"; break;
  1206. case 0xc00: ret = "(System Call)"; break;
  1207. case 0xd00: ret = "(Single Step)"; break;
  1208. case 0xe40: ret = "(Emulation Assist)"; break;
  1209. case 0xe60: ret = "(HMI)"; break;
  1210. case 0xe80: ret = "(Hypervisor Doorbell)"; break;
  1211. case 0xf00: ret = "(Performance Monitor)"; break;
  1212. case 0xf20: ret = "(Altivec Unavailable)"; break;
  1213. case 0x1300: ret = "(Instruction Breakpoint)"; break;
  1214. case 0x1500: ret = "(Denormalisation)"; break;
  1215. case 0x1700: ret = "(Altivec Assist)"; break;
  1216. default: ret = "";
  1217. }
  1218. return ret;
  1219. }
  1220. static void get_function_bounds(unsigned long pc, unsigned long *startp,
  1221. unsigned long *endp)
  1222. {
  1223. unsigned long size, offset;
  1224. const char *name;
  1225. *startp = *endp = 0;
  1226. if (pc == 0)
  1227. return;
  1228. if (setjmp(bus_error_jmp) == 0) {
  1229. catch_memory_errors = 1;
  1230. sync();
  1231. name = kallsyms_lookup(pc, &size, &offset, NULL, tmpstr);
  1232. if (name != NULL) {
  1233. *startp = pc - offset;
  1234. *endp = pc - offset + size;
  1235. }
  1236. sync();
  1237. }
  1238. catch_memory_errors = 0;
  1239. }
  1240. #define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long))
  1241. #define MARKER_OFFSET (STACK_FRAME_MARKER * sizeof(unsigned long))
  1242. static void xmon_show_stack(unsigned long sp, unsigned long lr,
  1243. unsigned long pc)
  1244. {
  1245. int max_to_print = 64;
  1246. unsigned long ip;
  1247. unsigned long newsp;
  1248. unsigned long marker;
  1249. struct pt_regs regs;
  1250. while (max_to_print--) {
  1251. if (sp < PAGE_OFFSET) {
  1252. if (sp != 0)
  1253. printf("SP (%lx) is in userspace\n", sp);
  1254. break;
  1255. }
  1256. if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long))
  1257. || !mread(sp, &newsp, sizeof(unsigned long))) {
  1258. printf("Couldn't read stack frame at %lx\n", sp);
  1259. break;
  1260. }
  1261. /*
  1262. * For the first stack frame, try to work out if
  1263. * LR and/or the saved LR value in the bottommost
  1264. * stack frame are valid.
  1265. */
  1266. if ((pc | lr) != 0) {
  1267. unsigned long fnstart, fnend;
  1268. unsigned long nextip;
  1269. int printip = 1;
  1270. get_function_bounds(pc, &fnstart, &fnend);
  1271. nextip = 0;
  1272. if (newsp > sp)
  1273. mread(newsp + LRSAVE_OFFSET, &nextip,
  1274. sizeof(unsigned long));
  1275. if (lr == ip) {
  1276. if (lr < PAGE_OFFSET
  1277. || (fnstart <= lr && lr < fnend))
  1278. printip = 0;
  1279. } else if (lr == nextip) {
  1280. printip = 0;
  1281. } else if (lr >= PAGE_OFFSET
  1282. && !(fnstart <= lr && lr < fnend)) {
  1283. printf("[link register ] ");
  1284. xmon_print_symbol(lr, " ", "\n");
  1285. }
  1286. if (printip) {
  1287. printf("["REG"] ", sp);
  1288. xmon_print_symbol(ip, " ", " (unreliable)\n");
  1289. }
  1290. pc = lr = 0;
  1291. } else {
  1292. printf("["REG"] ", sp);
  1293. xmon_print_symbol(ip, " ", "\n");
  1294. }
  1295. /* Look for "regshere" marker to see if this is
  1296. an exception frame. */
  1297. if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long))
  1298. && marker == STACK_FRAME_REGS_MARKER) {
  1299. if (mread(sp + STACK_FRAME_OVERHEAD, &regs, sizeof(regs))
  1300. != sizeof(regs)) {
  1301. printf("Couldn't read registers at %lx\n",
  1302. sp + STACK_FRAME_OVERHEAD);
  1303. break;
  1304. }
  1305. printf("--- Exception: %lx %s at ", regs.trap,
  1306. getvecname(TRAP(&regs)));
  1307. pc = regs.nip;
  1308. lr = regs.link;
  1309. xmon_print_symbol(pc, " ", "\n");
  1310. }
  1311. if (newsp == 0)
  1312. break;
  1313. sp = newsp;
  1314. }
  1315. }
  1316. static void backtrace(struct pt_regs *excp)
  1317. {
  1318. unsigned long sp;
  1319. if (scanhex(&sp))
  1320. xmon_show_stack(sp, 0, 0);
  1321. else
  1322. xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
  1323. scannl();
  1324. }
  1325. static void print_bug_trap(struct pt_regs *regs)
  1326. {
  1327. #ifdef CONFIG_BUG
  1328. const struct bug_entry *bug;
  1329. unsigned long addr;
  1330. if (regs->msr & MSR_PR)
  1331. return; /* not in kernel */
  1332. addr = regs->nip; /* address of trap instruction */
  1333. if (addr < PAGE_OFFSET)
  1334. return;
  1335. bug = find_bug(regs->nip);
  1336. if (bug == NULL)
  1337. return;
  1338. if (is_warning_bug(bug))
  1339. return;
  1340. #ifdef CONFIG_DEBUG_BUGVERBOSE
  1341. printf("kernel BUG at %s:%u!\n",
  1342. bug->file, bug->line);
  1343. #else
  1344. printf("kernel BUG at %p!\n", (void *)bug->bug_addr);
  1345. #endif
  1346. #endif /* CONFIG_BUG */
  1347. }
  1348. static void excprint(struct pt_regs *fp)
  1349. {
  1350. unsigned long trap;
  1351. #ifdef CONFIG_SMP
  1352. printf("cpu 0x%x: ", smp_processor_id());
  1353. #endif /* CONFIG_SMP */
  1354. trap = TRAP(fp);
  1355. printf("Vector: %lx %s at [%lx]\n", fp->trap, getvecname(trap), fp);
  1356. printf(" pc: ");
  1357. xmon_print_symbol(fp->nip, ": ", "\n");
  1358. printf(" lr: ", fp->link);
  1359. xmon_print_symbol(fp->link, ": ", "\n");
  1360. printf(" sp: %lx\n", fp->gpr[1]);
  1361. printf(" msr: %lx\n", fp->msr);
  1362. if (trap == 0x300 || trap == 0x380 || trap == 0x600 || trap == 0x200) {
  1363. printf(" dar: %lx\n", fp->dar);
  1364. if (trap != 0x380)
  1365. printf(" dsisr: %lx\n", fp->dsisr);
  1366. }
  1367. printf(" current = 0x%lx\n", current);
  1368. #ifdef CONFIG_PPC64
  1369. printf(" paca = 0x%lx\t softe: %d\t irq_happened: 0x%02x\n",
  1370. local_paca, local_paca->soft_enabled, local_paca->irq_happened);
  1371. #endif
  1372. if (current) {
  1373. printf(" pid = %ld, comm = %s\n",
  1374. current->pid, current->comm);
  1375. }
  1376. if (trap == 0x700)
  1377. print_bug_trap(fp);
  1378. }
  1379. static void prregs(struct pt_regs *fp)
  1380. {
  1381. int n, trap;
  1382. unsigned long base;
  1383. struct pt_regs regs;
  1384. if (scanhex(&base)) {
  1385. if (setjmp(bus_error_jmp) == 0) {
  1386. catch_memory_errors = 1;
  1387. sync();
  1388. regs = *(struct pt_regs *)base;
  1389. sync();
  1390. __delay(200);
  1391. } else {
  1392. catch_memory_errors = 0;
  1393. printf("*** Error reading registers from "REG"\n",
  1394. base);
  1395. return;
  1396. }
  1397. catch_memory_errors = 0;
  1398. fp = &regs;
  1399. }
  1400. #ifdef CONFIG_PPC64
  1401. if (FULL_REGS(fp)) {
  1402. for (n = 0; n < 16; ++n)
  1403. printf("R%.2ld = "REG" R%.2ld = "REG"\n",
  1404. n, fp->gpr[n], n+16, fp->gpr[n+16]);
  1405. } else {
  1406. for (n = 0; n < 7; ++n)
  1407. printf("R%.2ld = "REG" R%.2ld = "REG"\n",
  1408. n, fp->gpr[n], n+7, fp->gpr[n+7]);
  1409. }
  1410. #else
  1411. for (n = 0; n < 32; ++n) {
  1412. printf("R%.2d = %.8x%s", n, fp->gpr[n],
  1413. (n & 3) == 3? "\n": " ");
  1414. if (n == 12 && !FULL_REGS(fp)) {
  1415. printf("\n");
  1416. break;
  1417. }
  1418. }
  1419. #endif
  1420. printf("pc = ");
  1421. xmon_print_symbol(fp->nip, " ", "\n");
  1422. if (TRAP(fp) != 0xc00 && cpu_has_feature(CPU_FTR_CFAR)) {
  1423. printf("cfar= ");
  1424. xmon_print_symbol(fp->orig_gpr3, " ", "\n");
  1425. }
  1426. printf("lr = ");
  1427. xmon_print_symbol(fp->link, " ", "\n");
  1428. printf("msr = "REG" cr = %.8lx\n", fp->msr, fp->ccr);
  1429. printf("ctr = "REG" xer = "REG" trap = %4lx\n",
  1430. fp->ctr, fp->xer, fp->trap);
  1431. trap = TRAP(fp);
  1432. if (trap == 0x300 || trap == 0x380 || trap == 0x600)
  1433. printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr);
  1434. }
  1435. static void cacheflush(void)
  1436. {
  1437. int cmd;
  1438. unsigned long nflush;
  1439. cmd = inchar();
  1440. if (cmd != 'i')
  1441. termch = cmd;
  1442. scanhex((void *)&adrs);
  1443. if (termch != '\n')
  1444. termch = 0;
  1445. nflush = 1;
  1446. scanhex(&nflush);
  1447. nflush = (nflush + L1_CACHE_BYTES - 1) / L1_CACHE_BYTES;
  1448. if (setjmp(bus_error_jmp) == 0) {
  1449. catch_memory_errors = 1;
  1450. sync();
  1451. if (cmd != 'i') {
  1452. for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
  1453. cflush((void *) adrs);
  1454. } else {
  1455. for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
  1456. cinval((void *) adrs);
  1457. }
  1458. sync();
  1459. /* wait a little while to see if we get a machine check */
  1460. __delay(200);
  1461. }
  1462. catch_memory_errors = 0;
  1463. }
  1464. static unsigned long
  1465. read_spr(int n)
  1466. {
  1467. unsigned int instrs[2];
  1468. unsigned long (*code)(void);
  1469. unsigned long ret = -1UL;
  1470. #ifdef CONFIG_PPC64
  1471. unsigned long opd[3];
  1472. opd[0] = (unsigned long)instrs;
  1473. opd[1] = 0;
  1474. opd[2] = 0;
  1475. code = (unsigned long (*)(void)) opd;
  1476. #else
  1477. code = (unsigned long (*)(void)) instrs;
  1478. #endif
  1479. /* mfspr r3,n; blr */
  1480. instrs[0] = 0x7c6002a6 + ((n & 0x1F) << 16) + ((n & 0x3e0) << 6);
  1481. instrs[1] = 0x4e800020;
  1482. store_inst(instrs);
  1483. store_inst(instrs+1);
  1484. if (setjmp(bus_error_jmp) == 0) {
  1485. catch_memory_errors = 1;
  1486. sync();
  1487. ret = code();
  1488. sync();
  1489. /* wait a little while to see if we get a machine check */
  1490. __delay(200);
  1491. n = size;
  1492. }
  1493. return ret;
  1494. }
  1495. static void
  1496. write_spr(int n, unsigned long val)
  1497. {
  1498. unsigned int instrs[2];
  1499. unsigned long (*code)(unsigned long);
  1500. #ifdef CONFIG_PPC64
  1501. unsigned long opd[3];
  1502. opd[0] = (unsigned long)instrs;
  1503. opd[1] = 0;
  1504. opd[2] = 0;
  1505. code = (unsigned long (*)(unsigned long)) opd;
  1506. #else
  1507. code = (unsigned long (*)(unsigned long)) instrs;
  1508. #endif
  1509. instrs[0] = 0x7c6003a6 + ((n & 0x1F) << 16) + ((n & 0x3e0) << 6);
  1510. instrs[1] = 0x4e800020;
  1511. store_inst(instrs);
  1512. store_inst(instrs+1);
  1513. if (setjmp(bus_error_jmp) == 0) {
  1514. catch_memory_errors = 1;
  1515. sync();
  1516. code(val);
  1517. sync();
  1518. /* wait a little while to see if we get a machine check */
  1519. __delay(200);
  1520. n = size;
  1521. }
  1522. }
  1523. static unsigned long regno;
  1524. extern char exc_prolog;
  1525. extern char dec_exc;
  1526. static void super_regs(void)
  1527. {
  1528. int cmd;
  1529. unsigned long val;
  1530. cmd = skipbl();
  1531. if (cmd == '\n') {
  1532. unsigned long sp, toc;
  1533. asm("mr %0,1" : "=r" (sp) :);
  1534. asm("mr %0,2" : "=r" (toc) :);
  1535. printf("msr = "REG" sprg0= "REG"\n",
  1536. mfmsr(), mfspr(SPRN_SPRG0));
  1537. printf("pvr = "REG" sprg1= "REG"\n",
  1538. mfspr(SPRN_PVR), mfspr(SPRN_SPRG1));
  1539. printf("dec = "REG" sprg2= "REG"\n",
  1540. mfspr(SPRN_DEC), mfspr(SPRN_SPRG2));
  1541. printf("sp = "REG" sprg3= "REG"\n", sp, mfspr(SPRN_SPRG3));
  1542. printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR));
  1543. return;
  1544. }
  1545. scanhex(&regno);
  1546. switch (cmd) {
  1547. case 'w':
  1548. val = read_spr(regno);
  1549. scanhex(&val);
  1550. write_spr(regno, val);
  1551. /* fall through */
  1552. case 'r':
  1553. printf("spr %lx = %lx\n", regno, read_spr(regno));
  1554. break;
  1555. }
  1556. scannl();
  1557. }
  1558. /*
  1559. * Stuff for reading and writing memory safely
  1560. */
  1561. static int
  1562. mread(unsigned long adrs, void *buf, int size)
  1563. {
  1564. volatile int n;
  1565. char *p, *q;
  1566. n = 0;
  1567. if (setjmp(bus_error_jmp) == 0) {
  1568. catch_memory_errors = 1;
  1569. sync();
  1570. p = (char *)adrs;
  1571. q = (char *)buf;
  1572. switch (size) {
  1573. case 2:
  1574. *(u16 *)q = *(u16 *)p;
  1575. break;
  1576. case 4:
  1577. *(u32 *)q = *(u32 *)p;
  1578. break;
  1579. case 8:
  1580. *(u64 *)q = *(u64 *)p;
  1581. break;
  1582. default:
  1583. for( ; n < size; ++n) {
  1584. *q++ = *p++;
  1585. sync();
  1586. }
  1587. }
  1588. sync();
  1589. /* wait a little while to see if we get a machine check */
  1590. __delay(200);
  1591. n = size;
  1592. }
  1593. catch_memory_errors = 0;
  1594. return n;
  1595. }
  1596. static int
  1597. mwrite(unsigned long adrs, void *buf, int size)
  1598. {
  1599. volatile int n;
  1600. char *p, *q;
  1601. n = 0;
  1602. if (setjmp(bus_error_jmp) == 0) {
  1603. catch_memory_errors = 1;
  1604. sync();
  1605. p = (char *) adrs;
  1606. q = (char *) buf;
  1607. switch (size) {
  1608. case 2:
  1609. *(u16 *)p = *(u16 *)q;
  1610. break;
  1611. case 4:
  1612. *(u32 *)p = *(u32 *)q;
  1613. break;
  1614. case 8:
  1615. *(u64 *)p = *(u64 *)q;
  1616. break;
  1617. default:
  1618. for ( ; n < size; ++n) {
  1619. *p++ = *q++;
  1620. sync();
  1621. }
  1622. }
  1623. sync();
  1624. /* wait a little while to see if we get a machine check */
  1625. __delay(200);
  1626. n = size;
  1627. } else {
  1628. printf("*** Error writing address "REG"\n", adrs + n);
  1629. }
  1630. catch_memory_errors = 0;
  1631. return n;
  1632. }
  1633. static int fault_type;
  1634. static int fault_except;
  1635. static char *fault_chars[] = { "--", "**", "##" };
  1636. static int handle_fault(struct pt_regs *regs)
  1637. {
  1638. fault_except = TRAP(regs);
  1639. switch (TRAP(regs)) {
  1640. case 0x200:
  1641. fault_type = 0;
  1642. break;
  1643. case 0x300:
  1644. case 0x380:
  1645. fault_type = 1;
  1646. break;
  1647. default:
  1648. fault_type = 2;
  1649. }
  1650. longjmp(bus_error_jmp, 1);
  1651. return 0;
  1652. }
  1653. #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t))
  1654. static void
  1655. byterev(unsigned char *val, int size)
  1656. {
  1657. int t;
  1658. switch (size) {
  1659. case 2:
  1660. SWAP(val[0], val[1], t);
  1661. break;
  1662. case 4:
  1663. SWAP(val[0], val[3], t);
  1664. SWAP(val[1], val[2], t);
  1665. break;
  1666. case 8: /* is there really any use for this? */
  1667. SWAP(val[0], val[7], t);
  1668. SWAP(val[1], val[6], t);
  1669. SWAP(val[2], val[5], t);
  1670. SWAP(val[3], val[4], t);
  1671. break;
  1672. }
  1673. }
  1674. static int brev;
  1675. static int mnoread;
  1676. static char *memex_help_string =
  1677. "Memory examine command usage:\n"
  1678. "m [addr] [flags] examine/change memory\n"
  1679. " addr is optional. will start where left off.\n"
  1680. " flags may include chars from this set:\n"
  1681. " b modify by bytes (default)\n"
  1682. " w modify by words (2 byte)\n"
  1683. " l modify by longs (4 byte)\n"
  1684. " d modify by doubleword (8 byte)\n"
  1685. " r toggle reverse byte order mode\n"
  1686. " n do not read memory (for i/o spaces)\n"
  1687. " . ok to read (default)\n"
  1688. "NOTE: flags are saved as defaults\n"
  1689. "";
  1690. static char *memex_subcmd_help_string =
  1691. "Memory examine subcommands:\n"
  1692. " hexval write this val to current location\n"
  1693. " 'string' write chars from string to this location\n"
  1694. " ' increment address\n"
  1695. " ^ decrement address\n"
  1696. " / increment addr by 0x10. //=0x100, ///=0x1000, etc\n"
  1697. " \\ decrement addr by 0x10. \\\\=0x100, \\\\\\=0x1000, etc\n"
  1698. " ` clear no-read flag\n"
  1699. " ; stay at this addr\n"
  1700. " v change to byte mode\n"
  1701. " w change to word (2 byte) mode\n"
  1702. " l change to long (4 byte) mode\n"
  1703. " u change to doubleword (8 byte) mode\n"
  1704. " m addr change current addr\n"
  1705. " n toggle no-read flag\n"
  1706. " r toggle byte reverse flag\n"
  1707. " < count back up count bytes\n"
  1708. " > count skip forward count bytes\n"
  1709. " x exit this mode\n"
  1710. "";
  1711. static void
  1712. memex(void)
  1713. {
  1714. int cmd, inc, i, nslash;
  1715. unsigned long n;
  1716. unsigned char val[16];
  1717. scanhex((void *)&adrs);
  1718. cmd = skipbl();
  1719. if (cmd == '?') {
  1720. printf(memex_help_string);
  1721. return;
  1722. } else {
  1723. termch = cmd;
  1724. }
  1725. last_cmd = "m\n";
  1726. while ((cmd = skipbl()) != '\n') {
  1727. switch( cmd ){
  1728. case 'b': size = 1; break;
  1729. case 'w': size = 2; break;
  1730. case 'l': size = 4; break;
  1731. case 'd': size = 8; break;
  1732. case 'r': brev = !brev; break;
  1733. case 'n': mnoread = 1; break;
  1734. case '.': mnoread = 0; break;
  1735. }
  1736. }
  1737. if( size <= 0 )
  1738. size = 1;
  1739. else if( size > 8 )
  1740. size = 8;
  1741. for(;;){
  1742. if (!mnoread)
  1743. n = mread(adrs, val, size);
  1744. printf(REG"%c", adrs, brev? 'r': ' ');
  1745. if (!mnoread) {
  1746. if (brev)
  1747. byterev(val, size);
  1748. putchar(' ');
  1749. for (i = 0; i < n; ++i)
  1750. printf("%.2x", val[i]);
  1751. for (; i < size; ++i)
  1752. printf("%s", fault_chars[fault_type]);
  1753. }
  1754. putchar(' ');
  1755. inc = size;
  1756. nslash = 0;
  1757. for(;;){
  1758. if( scanhex(&n) ){
  1759. for (i = 0; i < size; ++i)
  1760. val[i] = n >> (i * 8);
  1761. if (!brev)
  1762. byterev(val, size);
  1763. mwrite(adrs, val, size);
  1764. inc = size;
  1765. }
  1766. cmd = skipbl();
  1767. if (cmd == '\n')
  1768. break;
  1769. inc = 0;
  1770. switch (cmd) {
  1771. case '\'':
  1772. for(;;){
  1773. n = inchar();
  1774. if( n == '\\' )
  1775. n = bsesc();
  1776. else if( n == '\'' )
  1777. break;
  1778. for (i = 0; i < size; ++i)
  1779. val[i] = n >> (i * 8);
  1780. if (!brev)
  1781. byterev(val, size);
  1782. mwrite(adrs, val, size);
  1783. adrs += size;
  1784. }
  1785. adrs -= size;
  1786. inc = size;
  1787. break;
  1788. case ',':
  1789. adrs += size;
  1790. break;
  1791. case '.':
  1792. mnoread = 0;
  1793. break;
  1794. case ';':
  1795. break;
  1796. case 'x':
  1797. case EOF:
  1798. scannl();
  1799. return;
  1800. case 'b':
  1801. case 'v':
  1802. size = 1;
  1803. break;
  1804. case 'w':
  1805. size = 2;
  1806. break;
  1807. case 'l':
  1808. size = 4;
  1809. break;
  1810. case 'u':
  1811. size = 8;
  1812. break;
  1813. case '^':
  1814. adrs -= size;
  1815. break;
  1816. case '/':
  1817. if (nslash > 0)
  1818. adrs -= 1 << nslash;
  1819. else
  1820. nslash = 0;
  1821. nslash += 4;
  1822. adrs += 1 << nslash;
  1823. break;
  1824. case '\\':
  1825. if (nslash < 0)
  1826. adrs += 1 << -nslash;
  1827. else
  1828. nslash = 0;
  1829. nslash -= 4;
  1830. adrs -= 1 << -nslash;
  1831. break;
  1832. case 'm':
  1833. scanhex((void *)&adrs);
  1834. break;
  1835. case 'n':
  1836. mnoread = 1;
  1837. break;
  1838. case 'r':
  1839. brev = !brev;
  1840. break;
  1841. case '<':
  1842. n = size;
  1843. scanhex(&n);
  1844. adrs -= n;
  1845. break;
  1846. case '>':
  1847. n = size;
  1848. scanhex(&n);
  1849. adrs += n;
  1850. break;
  1851. case '?':
  1852. printf(memex_subcmd_help_string);
  1853. break;
  1854. }
  1855. }
  1856. adrs += inc;
  1857. }
  1858. }
  1859. static int
  1860. bsesc(void)
  1861. {
  1862. int c;
  1863. c = inchar();
  1864. switch( c ){
  1865. case 'n': c = '\n'; break;
  1866. case 'r': c = '\r'; break;
  1867. case 'b': c = '\b'; break;
  1868. case 't': c = '\t'; break;
  1869. }
  1870. return c;
  1871. }
  1872. static void xmon_rawdump (unsigned long adrs, long ndump)
  1873. {
  1874. long n, m, r, nr;
  1875. unsigned char temp[16];
  1876. for (n = ndump; n > 0;) {
  1877. r = n < 16? n: 16;
  1878. nr = mread(adrs, temp, r);
  1879. adrs += nr;
  1880. for (m = 0; m < r; ++m) {
  1881. if (m < nr)
  1882. printf("%.2x", temp[m]);
  1883. else
  1884. printf("%s", fault_chars[fault_type]);
  1885. }
  1886. n -= r;
  1887. if (nr < r)
  1888. break;
  1889. }
  1890. printf("\n");
  1891. }
  1892. #ifdef CONFIG_PPC64
  1893. static void dump_one_paca(int cpu)
  1894. {
  1895. struct paca_struct *p;
  1896. if (setjmp(bus_error_jmp) != 0) {
  1897. printf("*** Error dumping paca for cpu 0x%x!\n", cpu);
  1898. return;
  1899. }
  1900. catch_memory_errors = 1;
  1901. sync();
  1902. p = &paca[cpu];
  1903. printf("paca for cpu 0x%x @ %p:\n", cpu, p);
  1904. printf(" %-*s = %s\n", 16, "possible", cpu_possible(cpu) ? "yes" : "no");
  1905. printf(" %-*s = %s\n", 16, "present", cpu_present(cpu) ? "yes" : "no");
  1906. printf(" %-*s = %s\n", 16, "online", cpu_online(cpu) ? "yes" : "no");
  1907. #define DUMP(paca, name, format) \
  1908. printf(" %-*s = %#-*"format"\t(0x%lx)\n", 16, #name, 18, paca->name, \
  1909. offsetof(struct paca_struct, name));
  1910. DUMP(p, lock_token, "x");
  1911. DUMP(p, paca_index, "x");
  1912. DUMP(p, kernel_toc, "lx");
  1913. DUMP(p, kernelbase, "lx");
  1914. DUMP(p, kernel_msr, "lx");
  1915. DUMP(p, emergency_sp, "p");
  1916. #ifdef CONFIG_PPC_BOOK3S_64
  1917. DUMP(p, mc_emergency_sp, "p");
  1918. DUMP(p, in_mce, "x");
  1919. #endif
  1920. DUMP(p, data_offset, "lx");
  1921. DUMP(p, hw_cpu_id, "x");
  1922. DUMP(p, cpu_start, "x");
  1923. DUMP(p, kexec_state, "x");
  1924. DUMP(p, __current, "p");
  1925. DUMP(p, kstack, "lx");
  1926. DUMP(p, stab_rr, "lx");
  1927. DUMP(p, saved_r1, "lx");
  1928. DUMP(p, trap_save, "x");
  1929. DUMP(p, soft_enabled, "x");
  1930. DUMP(p, irq_happened, "x");
  1931. DUMP(p, io_sync, "x");
  1932. DUMP(p, irq_work_pending, "x");
  1933. DUMP(p, nap_state_lost, "x");
  1934. #undef DUMP
  1935. catch_memory_errors = 0;
  1936. sync();
  1937. }
  1938. static void dump_all_pacas(void)
  1939. {
  1940. int cpu;
  1941. if (num_possible_cpus() == 0) {
  1942. printf("No possible cpus, use 'dp #' to dump individual cpus\n");
  1943. return;
  1944. }
  1945. for_each_possible_cpu(cpu)
  1946. dump_one_paca(cpu);
  1947. }
  1948. static void dump_pacas(void)
  1949. {
  1950. unsigned long num;
  1951. int c;
  1952. c = inchar();
  1953. if (c == 'a') {
  1954. dump_all_pacas();
  1955. return;
  1956. }
  1957. termch = c; /* Put c back, it wasn't 'a' */
  1958. if (scanhex(&num))
  1959. dump_one_paca(num);
  1960. else
  1961. dump_one_paca(xmon_owner);
  1962. }
  1963. #endif
  1964. static void
  1965. dump(void)
  1966. {
  1967. int c;
  1968. c = inchar();
  1969. #ifdef CONFIG_PPC64
  1970. if (c == 'p') {
  1971. xmon_start_pagination();
  1972. dump_pacas();
  1973. xmon_end_pagination();
  1974. return;
  1975. }
  1976. #endif
  1977. if ((isxdigit(c) && c != 'f' && c != 'd') || c == '\n')
  1978. termch = c;
  1979. scanhex((void *)&adrs);
  1980. if (termch != '\n')
  1981. termch = 0;
  1982. if (c == 'i') {
  1983. scanhex(&nidump);
  1984. if (nidump == 0)
  1985. nidump = 16;
  1986. else if (nidump > MAX_DUMP)
  1987. nidump = MAX_DUMP;
  1988. adrs += ppc_inst_dump(adrs, nidump, 1);
  1989. last_cmd = "di\n";
  1990. } else if (c == 'l') {
  1991. dump_log_buf();
  1992. } else if (c == 'r') {
  1993. scanhex(&ndump);
  1994. if (ndump == 0)
  1995. ndump = 64;
  1996. xmon_rawdump(adrs, ndump);
  1997. adrs += ndump;
  1998. last_cmd = "dr\n";
  1999. } else {
  2000. scanhex(&ndump);
  2001. if (ndump == 0)
  2002. ndump = 64;
  2003. else if (ndump > MAX_DUMP)
  2004. ndump = MAX_DUMP;
  2005. prdump(adrs, ndump);
  2006. adrs += ndump;
  2007. last_cmd = "d\n";
  2008. }
  2009. }
  2010. static void
  2011. prdump(unsigned long adrs, long ndump)
  2012. {
  2013. long n, m, c, r, nr;
  2014. unsigned char temp[16];
  2015. for (n = ndump; n > 0;) {
  2016. printf(REG, adrs);
  2017. putchar(' ');
  2018. r = n < 16? n: 16;
  2019. nr = mread(adrs, temp, r);
  2020. adrs += nr;
  2021. for (m = 0; m < r; ++m) {
  2022. if ((m & (sizeof(long) - 1)) == 0 && m > 0)
  2023. putchar(' ');
  2024. if (m < nr)
  2025. printf("%.2x", temp[m]);
  2026. else
  2027. printf("%s", fault_chars[fault_type]);
  2028. }
  2029. for (; m < 16; ++m) {
  2030. if ((m & (sizeof(long) - 1)) == 0)
  2031. putchar(' ');
  2032. printf(" ");
  2033. }
  2034. printf(" |");
  2035. for (m = 0; m < r; ++m) {
  2036. if (m < nr) {
  2037. c = temp[m];
  2038. putchar(' ' <= c && c <= '~'? c: '.');
  2039. } else
  2040. putchar(' ');
  2041. }
  2042. n -= r;
  2043. for (; m < 16; ++m)
  2044. putchar(' ');
  2045. printf("|\n");
  2046. if (nr < r)
  2047. break;
  2048. }
  2049. }
  2050. typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr);
  2051. static int
  2052. generic_inst_dump(unsigned long adr, long count, int praddr,
  2053. instruction_dump_func dump_func)
  2054. {
  2055. int nr, dotted;
  2056. unsigned long first_adr;
  2057. unsigned long inst, last_inst = 0;
  2058. unsigned char val[4];
  2059. dotted = 0;
  2060. for (first_adr = adr; count > 0; --count, adr += 4) {
  2061. nr = mread(adr, val, 4);
  2062. if (nr == 0) {
  2063. if (praddr) {
  2064. const char *x = fault_chars[fault_type];
  2065. printf(REG" %s%s%s%s\n", adr, x, x, x, x);
  2066. }
  2067. break;
  2068. }
  2069. inst = GETWORD(val);
  2070. if (adr > first_adr && inst == last_inst) {
  2071. if (!dotted) {
  2072. printf(" ...\n");
  2073. dotted = 1;
  2074. }
  2075. continue;
  2076. }
  2077. dotted = 0;
  2078. last_inst = inst;
  2079. if (praddr)
  2080. printf(REG" %.8x", adr, inst);
  2081. printf("\t");
  2082. dump_func(inst, adr);
  2083. printf("\n");
  2084. }
  2085. return adr - first_adr;
  2086. }
  2087. static int
  2088. ppc_inst_dump(unsigned long adr, long count, int praddr)
  2089. {
  2090. return generic_inst_dump(adr, count, praddr, print_insn_powerpc);
  2091. }
  2092. void
  2093. print_address(unsigned long addr)
  2094. {
  2095. xmon_print_symbol(addr, "\t# ", "");
  2096. }
  2097. void
  2098. dump_log_buf(void)
  2099. {
  2100. struct kmsg_dumper dumper = { .active = 1 };
  2101. unsigned char buf[128];
  2102. size_t len;
  2103. if (setjmp(bus_error_jmp) != 0) {
  2104. printf("Error dumping printk buffer!\n");
  2105. return;
  2106. }
  2107. catch_memory_errors = 1;
  2108. sync();
  2109. kmsg_dump_rewind_nolock(&dumper);
  2110. while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) {
  2111. buf[len] = '\0';
  2112. printf("%s", buf);
  2113. }
  2114. sync();
  2115. /* wait a little while to see if we get a machine check */
  2116. __delay(200);
  2117. catch_memory_errors = 0;
  2118. }
  2119. /*
  2120. * Memory operations - move, set, print differences
  2121. */
  2122. static unsigned long mdest; /* destination address */
  2123. static unsigned long msrc; /* source address */
  2124. static unsigned long mval; /* byte value to set memory to */
  2125. static unsigned long mcount; /* # bytes to affect */
  2126. static unsigned long mdiffs; /* max # differences to print */
  2127. static void
  2128. memops(int cmd)
  2129. {
  2130. scanhex((void *)&mdest);
  2131. if( termch != '\n' )
  2132. termch = 0;
  2133. scanhex((void *)(cmd == 's'? &mval: &msrc));
  2134. if( termch != '\n' )
  2135. termch = 0;
  2136. scanhex((void *)&mcount);
  2137. switch( cmd ){
  2138. case 'm':
  2139. memmove((void *)mdest, (void *)msrc, mcount);
  2140. break;
  2141. case 's':
  2142. memset((void *)mdest, mval, mcount);
  2143. break;
  2144. case 'd':
  2145. if( termch != '\n' )
  2146. termch = 0;
  2147. scanhex((void *)&mdiffs);
  2148. memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs);
  2149. break;
  2150. }
  2151. }
  2152. static void
  2153. memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr)
  2154. {
  2155. unsigned n, prt;
  2156. prt = 0;
  2157. for( n = nb; n > 0; --n )
  2158. if( *p1++ != *p2++ )
  2159. if( ++prt <= maxpr )
  2160. printf("%.16x %.2x # %.16x %.2x\n", p1 - 1,
  2161. p1[-1], p2 - 1, p2[-1]);
  2162. if( prt > maxpr )
  2163. printf("Total of %d differences\n", prt);
  2164. }
  2165. static unsigned mend;
  2166. static unsigned mask;
  2167. static void
  2168. memlocate(void)
  2169. {
  2170. unsigned a, n;
  2171. unsigned char val[4];
  2172. last_cmd = "ml";
  2173. scanhex((void *)&mdest);
  2174. if (termch != '\n') {
  2175. termch = 0;
  2176. scanhex((void *)&mend);
  2177. if (termch != '\n') {
  2178. termch = 0;
  2179. scanhex((void *)&mval);
  2180. mask = ~0;
  2181. if (termch != '\n') termch = 0;
  2182. scanhex((void *)&mask);
  2183. }
  2184. }
  2185. n = 0;
  2186. for (a = mdest; a < mend; a += 4) {
  2187. if (mread(a, val, 4) == 4
  2188. && ((GETWORD(val) ^ mval) & mask) == 0) {
  2189. printf("%.16x: %.16x\n", a, GETWORD(val));
  2190. if (++n >= 10)
  2191. break;
  2192. }
  2193. }
  2194. }
  2195. static unsigned long mskip = 0x1000;
  2196. static unsigned long mlim = 0xffffffff;
  2197. static void
  2198. memzcan(void)
  2199. {
  2200. unsigned char v;
  2201. unsigned a;
  2202. int ok, ook;
  2203. scanhex(&mdest);
  2204. if (termch != '\n') termch = 0;
  2205. scanhex(&mskip);
  2206. if (termch != '\n') termch = 0;
  2207. scanhex(&mlim);
  2208. ook = 0;
  2209. for (a = mdest; a < mlim; a += mskip) {
  2210. ok = mread(a, &v, 1);
  2211. if (ok && !ook) {
  2212. printf("%.8x .. ", a);
  2213. } else if (!ok && ook)
  2214. printf("%.8x\n", a - mskip);
  2215. ook = ok;
  2216. if (a + mskip < a)
  2217. break;
  2218. }
  2219. if (ook)
  2220. printf("%.8x\n", a - mskip);
  2221. }
  2222. static void proccall(void)
  2223. {
  2224. unsigned long args[8];
  2225. unsigned long ret;
  2226. int i;
  2227. typedef unsigned long (*callfunc_t)(unsigned long, unsigned long,
  2228. unsigned long, unsigned long, unsigned long,
  2229. unsigned long, unsigned long, unsigned long);
  2230. callfunc_t func;
  2231. if (!scanhex(&adrs))
  2232. return;
  2233. if (termch != '\n')
  2234. termch = 0;
  2235. for (i = 0; i < 8; ++i)
  2236. args[i] = 0;
  2237. for (i = 0; i < 8; ++i) {
  2238. if (!scanhex(&args[i]) || termch == '\n')
  2239. break;
  2240. termch = 0;
  2241. }
  2242. func = (callfunc_t) adrs;
  2243. ret = 0;
  2244. if (setjmp(bus_error_jmp) == 0) {
  2245. catch_memory_errors = 1;
  2246. sync();
  2247. ret = func(args[0], args[1], args[2], args[3],
  2248. args[4], args[5], args[6], args[7]);
  2249. sync();
  2250. printf("return value is 0x%lx\n", ret);
  2251. } else {
  2252. printf("*** %x exception occurred\n", fault_except);
  2253. }
  2254. catch_memory_errors = 0;
  2255. }
  2256. /* Input scanning routines */
  2257. int
  2258. skipbl(void)
  2259. {
  2260. int c;
  2261. if( termch != 0 ){
  2262. c = termch;
  2263. termch = 0;
  2264. } else
  2265. c = inchar();
  2266. while( c == ' ' || c == '\t' )
  2267. c = inchar();
  2268. return c;
  2269. }
  2270. #define N_PTREGS 44
  2271. static char *regnames[N_PTREGS] = {
  2272. "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
  2273. "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
  2274. "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
  2275. "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
  2276. "pc", "msr", "or3", "ctr", "lr", "xer", "ccr",
  2277. #ifdef CONFIG_PPC64
  2278. "softe",
  2279. #else
  2280. "mq",
  2281. #endif
  2282. "trap", "dar", "dsisr", "res"
  2283. };
  2284. int
  2285. scanhex(unsigned long *vp)
  2286. {
  2287. int c, d;
  2288. unsigned long v;
  2289. c = skipbl();
  2290. if (c == '%') {
  2291. /* parse register name */
  2292. char regname[8];
  2293. int i;
  2294. for (i = 0; i < sizeof(regname) - 1; ++i) {
  2295. c = inchar();
  2296. if (!isalnum(c)) {
  2297. termch = c;
  2298. break;
  2299. }
  2300. regname[i] = c;
  2301. }
  2302. regname[i] = 0;
  2303. for (i = 0; i < N_PTREGS; ++i) {
  2304. if (strcmp(regnames[i], regname) == 0) {
  2305. if (xmon_regs == NULL) {
  2306. printf("regs not available\n");
  2307. return 0;
  2308. }
  2309. *vp = ((unsigned long *)xmon_regs)[i];
  2310. return 1;
  2311. }
  2312. }
  2313. printf("invalid register name '%%%s'\n", regname);
  2314. return 0;
  2315. }
  2316. /* skip leading "0x" if any */
  2317. if (c == '0') {
  2318. c = inchar();
  2319. if (c == 'x') {
  2320. c = inchar();
  2321. } else {
  2322. d = hexdigit(c);
  2323. if (d == EOF) {
  2324. termch = c;
  2325. *vp = 0;
  2326. return 1;
  2327. }
  2328. }
  2329. } else if (c == '$') {
  2330. int i;
  2331. for (i=0; i<63; i++) {
  2332. c = inchar();
  2333. if (isspace(c) || c == '\0') {
  2334. termch = c;
  2335. break;
  2336. }
  2337. tmpstr[i] = c;
  2338. }
  2339. tmpstr[i++] = 0;
  2340. *vp = 0;
  2341. if (setjmp(bus_error_jmp) == 0) {
  2342. catch_memory_errors = 1;
  2343. sync();
  2344. *vp = kallsyms_lookup_name(tmpstr);
  2345. sync();
  2346. }
  2347. catch_memory_errors = 0;
  2348. if (!(*vp)) {
  2349. printf("unknown symbol '%s'\n", tmpstr);
  2350. return 0;
  2351. }
  2352. return 1;
  2353. }
  2354. d = hexdigit(c);
  2355. if (d == EOF) {
  2356. termch = c;
  2357. return 0;
  2358. }
  2359. v = 0;
  2360. do {
  2361. v = (v << 4) + d;
  2362. c = inchar();
  2363. d = hexdigit(c);
  2364. } while (d != EOF);
  2365. termch = c;
  2366. *vp = v;
  2367. return 1;
  2368. }
  2369. static void
  2370. scannl(void)
  2371. {
  2372. int c;
  2373. c = termch;
  2374. termch = 0;
  2375. while( c != '\n' )
  2376. c = inchar();
  2377. }
  2378. static int hexdigit(int c)
  2379. {
  2380. if( '0' <= c && c <= '9' )
  2381. return c - '0';
  2382. if( 'A' <= c && c <= 'F' )
  2383. return c - ('A' - 10);
  2384. if( 'a' <= c && c <= 'f' )
  2385. return c - ('a' - 10);
  2386. return EOF;
  2387. }
  2388. void
  2389. getstring(char *s, int size)
  2390. {
  2391. int c;
  2392. c = skipbl();
  2393. do {
  2394. if( size > 1 ){
  2395. *s++ = c;
  2396. --size;
  2397. }
  2398. c = inchar();
  2399. } while( c != ' ' && c != '\t' && c != '\n' );
  2400. termch = c;
  2401. *s = 0;
  2402. }
  2403. static char line[256];
  2404. static char *lineptr;
  2405. static void
  2406. flush_input(void)
  2407. {
  2408. lineptr = NULL;
  2409. }
  2410. static int
  2411. inchar(void)
  2412. {
  2413. if (lineptr == NULL || *lineptr == 0) {
  2414. if (xmon_gets(line, sizeof(line)) == NULL) {
  2415. lineptr = NULL;
  2416. return EOF;
  2417. }
  2418. lineptr = line;
  2419. }
  2420. return *lineptr++;
  2421. }
  2422. static void
  2423. take_input(char *str)
  2424. {
  2425. lineptr = str;
  2426. }
  2427. static void
  2428. symbol_lookup(void)
  2429. {
  2430. int type = inchar();
  2431. unsigned long addr;
  2432. static char tmp[64];
  2433. switch (type) {
  2434. case 'a':
  2435. if (scanhex(&addr))
  2436. xmon_print_symbol(addr, ": ", "\n");
  2437. termch = 0;
  2438. break;
  2439. case 's':
  2440. getstring(tmp, 64);
  2441. if (setjmp(bus_error_jmp) == 0) {
  2442. catch_memory_errors = 1;
  2443. sync();
  2444. addr = kallsyms_lookup_name(tmp);
  2445. if (addr)
  2446. printf("%s: %lx\n", tmp, addr);
  2447. else
  2448. printf("Symbol '%s' not found.\n", tmp);
  2449. sync();
  2450. }
  2451. catch_memory_errors = 0;
  2452. termch = 0;
  2453. break;
  2454. }
  2455. }
  2456. /* Print an address in numeric and symbolic form (if possible) */
  2457. static void xmon_print_symbol(unsigned long address, const char *mid,
  2458. const char *after)
  2459. {
  2460. char *modname;
  2461. const char *name = NULL;
  2462. unsigned long offset, size;
  2463. printf(REG, address);
  2464. if (setjmp(bus_error_jmp) == 0) {
  2465. catch_memory_errors = 1;
  2466. sync();
  2467. name = kallsyms_lookup(address, &size, &offset, &modname,
  2468. tmpstr);
  2469. sync();
  2470. /* wait a little while to see if we get a machine check */
  2471. __delay(200);
  2472. }
  2473. catch_memory_errors = 0;
  2474. if (name) {
  2475. printf("%s%s+%#lx/%#lx", mid, name, offset, size);
  2476. if (modname)
  2477. printf(" [%s]", modname);
  2478. }
  2479. printf("%s", after);
  2480. }
  2481. #ifdef CONFIG_PPC_BOOK3S_64
  2482. void dump_segments(void)
  2483. {
  2484. int i;
  2485. unsigned long esid,vsid;
  2486. unsigned long llp;
  2487. printf("SLB contents of cpu 0x%x\n", smp_processor_id());
  2488. for (i = 0; i < mmu_slb_size; i++) {
  2489. asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i));
  2490. asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i));
  2491. if (esid || vsid) {
  2492. printf("%02d %016lx %016lx", i, esid, vsid);
  2493. if (esid & SLB_ESID_V) {
  2494. llp = vsid & SLB_VSID_LLP;
  2495. if (vsid & SLB_VSID_B_1T) {
  2496. printf(" 1T ESID=%9lx VSID=%13lx LLP:%3lx \n",
  2497. GET_ESID_1T(esid),
  2498. (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T,
  2499. llp);
  2500. } else {
  2501. printf(" 256M ESID=%9lx VSID=%13lx LLP:%3lx \n",
  2502. GET_ESID(esid),
  2503. (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT,
  2504. llp);
  2505. }
  2506. } else
  2507. printf("\n");
  2508. }
  2509. }
  2510. }
  2511. #endif
  2512. #ifdef CONFIG_PPC_STD_MMU_32
  2513. void dump_segments(void)
  2514. {
  2515. int i;
  2516. printf("sr0-15 =");
  2517. for (i = 0; i < 16; ++i)
  2518. printf(" %x", mfsrin(i));
  2519. printf("\n");
  2520. }
  2521. #endif
  2522. #ifdef CONFIG_44x
  2523. static void dump_tlb_44x(void)
  2524. {
  2525. int i;
  2526. for (i = 0; i < PPC44x_TLB_SIZE; i++) {
  2527. unsigned long w0,w1,w2;
  2528. asm volatile("tlbre %0,%1,0" : "=r" (w0) : "r" (i));
  2529. asm volatile("tlbre %0,%1,1" : "=r" (w1) : "r" (i));
  2530. asm volatile("tlbre %0,%1,2" : "=r" (w2) : "r" (i));
  2531. printf("[%02x] %08x %08x %08x ", i, w0, w1, w2);
  2532. if (w0 & PPC44x_TLB_VALID) {
  2533. printf("V %08x -> %01x%08x %c%c%c%c%c",
  2534. w0 & PPC44x_TLB_EPN_MASK,
  2535. w1 & PPC44x_TLB_ERPN_MASK,
  2536. w1 & PPC44x_TLB_RPN_MASK,
  2537. (w2 & PPC44x_TLB_W) ? 'W' : 'w',
  2538. (w2 & PPC44x_TLB_I) ? 'I' : 'i',
  2539. (w2 & PPC44x_TLB_M) ? 'M' : 'm',
  2540. (w2 & PPC44x_TLB_G) ? 'G' : 'g',
  2541. (w2 & PPC44x_TLB_E) ? 'E' : 'e');
  2542. }
  2543. printf("\n");
  2544. }
  2545. }
  2546. #endif /* CONFIG_44x */
  2547. #ifdef CONFIG_PPC_BOOK3E
  2548. static void dump_tlb_book3e(void)
  2549. {
  2550. u32 mmucfg, pidmask, lpidmask;
  2551. u64 ramask;
  2552. int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0;
  2553. int mmu_version;
  2554. static const char *pgsz_names[] = {
  2555. " 1K",
  2556. " 2K",
  2557. " 4K",
  2558. " 8K",
  2559. " 16K",
  2560. " 32K",
  2561. " 64K",
  2562. "128K",
  2563. "256K",
  2564. "512K",
  2565. " 1M",
  2566. " 2M",
  2567. " 4M",
  2568. " 8M",
  2569. " 16M",
  2570. " 32M",
  2571. " 64M",
  2572. "128M",
  2573. "256M",
  2574. "512M",
  2575. " 1G",
  2576. " 2G",
  2577. " 4G",
  2578. " 8G",
  2579. " 16G",
  2580. " 32G",
  2581. " 64G",
  2582. "128G",
  2583. "256G",
  2584. "512G",
  2585. " 1T",
  2586. " 2T",
  2587. };
  2588. /* Gather some infos about the MMU */
  2589. mmucfg = mfspr(SPRN_MMUCFG);
  2590. mmu_version = (mmucfg & 3) + 1;
  2591. ntlbs = ((mmucfg >> 2) & 3) + 1;
  2592. pidsz = ((mmucfg >> 6) & 0x1f) + 1;
  2593. lpidsz = (mmucfg >> 24) & 0xf;
  2594. rasz = (mmucfg >> 16) & 0x7f;
  2595. if ((mmu_version > 1) && (mmucfg & 0x10000))
  2596. lrat = 1;
  2597. printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n",
  2598. mmu_version, ntlbs, pidsz, lpidsz, rasz);
  2599. pidmask = (1ul << pidsz) - 1;
  2600. lpidmask = (1ul << lpidsz) - 1;
  2601. ramask = (1ull << rasz) - 1;
  2602. for (tlb = 0; tlb < ntlbs; tlb++) {
  2603. u32 tlbcfg;
  2604. int nent, assoc, new_cc = 1;
  2605. printf("TLB %d:\n------\n", tlb);
  2606. switch(tlb) {
  2607. case 0:
  2608. tlbcfg = mfspr(SPRN_TLB0CFG);
  2609. break;
  2610. case 1:
  2611. tlbcfg = mfspr(SPRN_TLB1CFG);
  2612. break;
  2613. case 2:
  2614. tlbcfg = mfspr(SPRN_TLB2CFG);
  2615. break;
  2616. case 3:
  2617. tlbcfg = mfspr(SPRN_TLB3CFG);
  2618. break;
  2619. default:
  2620. printf("Unsupported TLB number !\n");
  2621. continue;
  2622. }
  2623. nent = tlbcfg & 0xfff;
  2624. assoc = (tlbcfg >> 24) & 0xff;
  2625. for (i = 0; i < nent; i++) {
  2626. u32 mas0 = MAS0_TLBSEL(tlb);
  2627. u32 mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K);
  2628. u64 mas2 = 0;
  2629. u64 mas7_mas3;
  2630. int esel = i, cc = i;
  2631. if (assoc != 0) {
  2632. cc = i / assoc;
  2633. esel = i % assoc;
  2634. mas2 = cc * 0x1000;
  2635. }
  2636. mas0 |= MAS0_ESEL(esel);
  2637. mtspr(SPRN_MAS0, mas0);
  2638. mtspr(SPRN_MAS1, mas1);
  2639. mtspr(SPRN_MAS2, mas2);
  2640. asm volatile("tlbre 0,0,0" : : : "memory");
  2641. mas1 = mfspr(SPRN_MAS1);
  2642. mas2 = mfspr(SPRN_MAS2);
  2643. mas7_mas3 = mfspr(SPRN_MAS7_MAS3);
  2644. if (assoc && (i % assoc) == 0)
  2645. new_cc = 1;
  2646. if (!(mas1 & MAS1_VALID))
  2647. continue;
  2648. if (assoc == 0)
  2649. printf("%04x- ", i);
  2650. else if (new_cc)
  2651. printf("%04x-%c", cc, 'A' + esel);
  2652. else
  2653. printf(" |%c", 'A' + esel);
  2654. new_cc = 0;
  2655. printf(" %016llx %04x %s %c%c AS%c",
  2656. mas2 & ~0x3ffull,
  2657. (mas1 >> 16) & 0x3fff,
  2658. pgsz_names[(mas1 >> 7) & 0x1f],
  2659. mas1 & MAS1_IND ? 'I' : ' ',
  2660. mas1 & MAS1_IPROT ? 'P' : ' ',
  2661. mas1 & MAS1_TS ? '1' : '0');
  2662. printf(" %c%c%c%c%c%c%c",
  2663. mas2 & MAS2_X0 ? 'a' : ' ',
  2664. mas2 & MAS2_X1 ? 'v' : ' ',
  2665. mas2 & MAS2_W ? 'w' : ' ',
  2666. mas2 & MAS2_I ? 'i' : ' ',
  2667. mas2 & MAS2_M ? 'm' : ' ',
  2668. mas2 & MAS2_G ? 'g' : ' ',
  2669. mas2 & MAS2_E ? 'e' : ' ');
  2670. printf(" %016llx", mas7_mas3 & ramask & ~0x7ffull);
  2671. if (mas1 & MAS1_IND)
  2672. printf(" %s\n",
  2673. pgsz_names[(mas7_mas3 >> 1) & 0x1f]);
  2674. else
  2675. printf(" U%c%c%c S%c%c%c\n",
  2676. mas7_mas3 & MAS3_UX ? 'x' : ' ',
  2677. mas7_mas3 & MAS3_UW ? 'w' : ' ',
  2678. mas7_mas3 & MAS3_UR ? 'r' : ' ',
  2679. mas7_mas3 & MAS3_SX ? 'x' : ' ',
  2680. mas7_mas3 & MAS3_SW ? 'w' : ' ',
  2681. mas7_mas3 & MAS3_SR ? 'r' : ' ');
  2682. }
  2683. }
  2684. }
  2685. #endif /* CONFIG_PPC_BOOK3E */
  2686. static void xmon_init(int enable)
  2687. {
  2688. if (enable) {
  2689. __debugger = xmon;
  2690. __debugger_ipi = xmon_ipi;
  2691. __debugger_bpt = xmon_bpt;
  2692. __debugger_sstep = xmon_sstep;
  2693. __debugger_iabr_match = xmon_iabr_match;
  2694. __debugger_break_match = xmon_break_match;
  2695. __debugger_fault_handler = xmon_fault_handler;
  2696. } else {
  2697. __debugger = NULL;
  2698. __debugger_ipi = NULL;
  2699. __debugger_bpt = NULL;
  2700. __debugger_sstep = NULL;
  2701. __debugger_iabr_match = NULL;
  2702. __debugger_break_match = NULL;
  2703. __debugger_fault_handler = NULL;
  2704. }
  2705. }
  2706. #ifdef CONFIG_MAGIC_SYSRQ
  2707. static void sysrq_handle_xmon(int key)
  2708. {
  2709. /* ensure xmon is enabled */
  2710. xmon_init(1);
  2711. debugger(get_irq_regs());
  2712. }
  2713. static struct sysrq_key_op sysrq_xmon_op = {
  2714. .handler = sysrq_handle_xmon,
  2715. .help_msg = "xmon(x)",
  2716. .action_msg = "Entering xmon",
  2717. };
  2718. static int __init setup_xmon_sysrq(void)
  2719. {
  2720. register_sysrq_key('x', &sysrq_xmon_op);
  2721. return 0;
  2722. }
  2723. __initcall(setup_xmon_sysrq);
  2724. #endif /* CONFIG_MAGIC_SYSRQ */
  2725. static int __initdata xmon_early, xmon_off;
  2726. static int __init early_parse_xmon(char *p)
  2727. {
  2728. if (!p || strncmp(p, "early", 5) == 0) {
  2729. /* just "xmon" is equivalent to "xmon=early" */
  2730. xmon_init(1);
  2731. xmon_early = 1;
  2732. } else if (strncmp(p, "on", 2) == 0)
  2733. xmon_init(1);
  2734. else if (strncmp(p, "off", 3) == 0)
  2735. xmon_off = 1;
  2736. else if (strncmp(p, "nobt", 4) == 0)
  2737. xmon_no_auto_backtrace = 1;
  2738. else
  2739. return 1;
  2740. return 0;
  2741. }
  2742. early_param("xmon", early_parse_xmon);
  2743. void __init xmon_setup(void)
  2744. {
  2745. #ifdef CONFIG_XMON_DEFAULT
  2746. if (!xmon_off)
  2747. xmon_init(1);
  2748. #endif
  2749. if (xmon_early)
  2750. debugger(NULL);
  2751. }
  2752. #ifdef CONFIG_SPU_BASE
  2753. struct spu_info {
  2754. struct spu *spu;
  2755. u64 saved_mfc_sr1_RW;
  2756. u32 saved_spu_runcntl_RW;
  2757. unsigned long dump_addr;
  2758. u8 stopped_ok;
  2759. };
  2760. #define XMON_NUM_SPUS 16 /* Enough for current hardware */
  2761. static struct spu_info spu_info[XMON_NUM_SPUS];
  2762. void xmon_register_spus(struct list_head *list)
  2763. {
  2764. struct spu *spu;
  2765. list_for_each_entry(spu, list, full_list) {
  2766. if (spu->number >= XMON_NUM_SPUS) {
  2767. WARN_ON(1);
  2768. continue;
  2769. }
  2770. spu_info[spu->number].spu = spu;
  2771. spu_info[spu->number].stopped_ok = 0;
  2772. spu_info[spu->number].dump_addr = (unsigned long)
  2773. spu_info[spu->number].spu->local_store;
  2774. }
  2775. }
  2776. static void stop_spus(void)
  2777. {
  2778. struct spu *spu;
  2779. int i;
  2780. u64 tmp;
  2781. for (i = 0; i < XMON_NUM_SPUS; i++) {
  2782. if (!spu_info[i].spu)
  2783. continue;
  2784. if (setjmp(bus_error_jmp) == 0) {
  2785. catch_memory_errors = 1;
  2786. sync();
  2787. spu = spu_info[i].spu;
  2788. spu_info[i].saved_spu_runcntl_RW =
  2789. in_be32(&spu->problem->spu_runcntl_RW);
  2790. tmp = spu_mfc_sr1_get(spu);
  2791. spu_info[i].saved_mfc_sr1_RW = tmp;
  2792. tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
  2793. spu_mfc_sr1_set(spu, tmp);
  2794. sync();
  2795. __delay(200);
  2796. spu_info[i].stopped_ok = 1;
  2797. printf("Stopped spu %.2d (was %s)\n", i,
  2798. spu_info[i].saved_spu_runcntl_RW ?
  2799. "running" : "stopped");
  2800. } else {
  2801. catch_memory_errors = 0;
  2802. printf("*** Error stopping spu %.2d\n", i);
  2803. }
  2804. catch_memory_errors = 0;
  2805. }
  2806. }
  2807. static void restart_spus(void)
  2808. {
  2809. struct spu *spu;
  2810. int i;
  2811. for (i = 0; i < XMON_NUM_SPUS; i++) {
  2812. if (!spu_info[i].spu)
  2813. continue;
  2814. if (!spu_info[i].stopped_ok) {
  2815. printf("*** Error, spu %d was not successfully stopped"
  2816. ", not restarting\n", i);
  2817. continue;
  2818. }
  2819. if (setjmp(bus_error_jmp) == 0) {
  2820. catch_memory_errors = 1;
  2821. sync();
  2822. spu = spu_info[i].spu;
  2823. spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW);
  2824. out_be32(&spu->problem->spu_runcntl_RW,
  2825. spu_info[i].saved_spu_runcntl_RW);
  2826. sync();
  2827. __delay(200);
  2828. printf("Restarted spu %.2d\n", i);
  2829. } else {
  2830. catch_memory_errors = 0;
  2831. printf("*** Error restarting spu %.2d\n", i);
  2832. }
  2833. catch_memory_errors = 0;
  2834. }
  2835. }
  2836. #define DUMP_WIDTH 23
  2837. #define DUMP_VALUE(format, field, value) \
  2838. do { \
  2839. if (setjmp(bus_error_jmp) == 0) { \
  2840. catch_memory_errors = 1; \
  2841. sync(); \
  2842. printf(" %-*s = "format"\n", DUMP_WIDTH, \
  2843. #field, value); \
  2844. sync(); \
  2845. __delay(200); \
  2846. } else { \
  2847. catch_memory_errors = 0; \
  2848. printf(" %-*s = *** Error reading field.\n", \
  2849. DUMP_WIDTH, #field); \
  2850. } \
  2851. catch_memory_errors = 0; \
  2852. } while (0)
  2853. #define DUMP_FIELD(obj, format, field) \
  2854. DUMP_VALUE(format, field, obj->field)
  2855. static void dump_spu_fields(struct spu *spu)
  2856. {
  2857. printf("Dumping spu fields at address %p:\n", spu);
  2858. DUMP_FIELD(spu, "0x%x", number);
  2859. DUMP_FIELD(spu, "%s", name);
  2860. DUMP_FIELD(spu, "0x%lx", local_store_phys);
  2861. DUMP_FIELD(spu, "0x%p", local_store);
  2862. DUMP_FIELD(spu, "0x%lx", ls_size);
  2863. DUMP_FIELD(spu, "0x%x", node);
  2864. DUMP_FIELD(spu, "0x%lx", flags);
  2865. DUMP_FIELD(spu, "%d", class_0_pending);
  2866. DUMP_FIELD(spu, "0x%lx", class_0_dar);
  2867. DUMP_FIELD(spu, "0x%lx", class_1_dar);
  2868. DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
  2869. DUMP_FIELD(spu, "0x%lx", irqs[0]);
  2870. DUMP_FIELD(spu, "0x%lx", irqs[1]);
  2871. DUMP_FIELD(spu, "0x%lx", irqs[2]);
  2872. DUMP_FIELD(spu, "0x%x", slb_replace);
  2873. DUMP_FIELD(spu, "%d", pid);
  2874. DUMP_FIELD(spu, "0x%p", mm);
  2875. DUMP_FIELD(spu, "0x%p", ctx);
  2876. DUMP_FIELD(spu, "0x%p", rq);
  2877. DUMP_FIELD(spu, "0x%p", timestamp);
  2878. DUMP_FIELD(spu, "0x%lx", problem_phys);
  2879. DUMP_FIELD(spu, "0x%p", problem);
  2880. DUMP_VALUE("0x%x", problem->spu_runcntl_RW,
  2881. in_be32(&spu->problem->spu_runcntl_RW));
  2882. DUMP_VALUE("0x%x", problem->spu_status_R,
  2883. in_be32(&spu->problem->spu_status_R));
  2884. DUMP_VALUE("0x%x", problem->spu_npc_RW,
  2885. in_be32(&spu->problem->spu_npc_RW));
  2886. DUMP_FIELD(spu, "0x%p", priv2);
  2887. DUMP_FIELD(spu, "0x%p", pdata);
  2888. }
  2889. int
  2890. spu_inst_dump(unsigned long adr, long count, int praddr)
  2891. {
  2892. return generic_inst_dump(adr, count, praddr, print_insn_spu);
  2893. }
  2894. static void dump_spu_ls(unsigned long num, int subcmd)
  2895. {
  2896. unsigned long offset, addr, ls_addr;
  2897. if (setjmp(bus_error_jmp) == 0) {
  2898. catch_memory_errors = 1;
  2899. sync();
  2900. ls_addr = (unsigned long)spu_info[num].spu->local_store;
  2901. sync();
  2902. __delay(200);
  2903. } else {
  2904. catch_memory_errors = 0;
  2905. printf("*** Error: accessing spu info for spu %d\n", num);
  2906. return;
  2907. }
  2908. catch_memory_errors = 0;
  2909. if (scanhex(&offset))
  2910. addr = ls_addr + offset;
  2911. else
  2912. addr = spu_info[num].dump_addr;
  2913. if (addr >= ls_addr + LS_SIZE) {
  2914. printf("*** Error: address outside of local store\n");
  2915. return;
  2916. }
  2917. switch (subcmd) {
  2918. case 'i':
  2919. addr += spu_inst_dump(addr, 16, 1);
  2920. last_cmd = "sdi\n";
  2921. break;
  2922. default:
  2923. prdump(addr, 64);
  2924. addr += 64;
  2925. last_cmd = "sd\n";
  2926. break;
  2927. }
  2928. spu_info[num].dump_addr = addr;
  2929. }
  2930. static int do_spu_cmd(void)
  2931. {
  2932. static unsigned long num = 0;
  2933. int cmd, subcmd = 0;
  2934. cmd = inchar();
  2935. switch (cmd) {
  2936. case 's':
  2937. stop_spus();
  2938. break;
  2939. case 'r':
  2940. restart_spus();
  2941. break;
  2942. case 'd':
  2943. subcmd = inchar();
  2944. if (isxdigit(subcmd) || subcmd == '\n')
  2945. termch = subcmd;
  2946. case 'f':
  2947. scanhex(&num);
  2948. if (num >= XMON_NUM_SPUS || !spu_info[num].spu) {
  2949. printf("*** Error: invalid spu number\n");
  2950. return 0;
  2951. }
  2952. switch (cmd) {
  2953. case 'f':
  2954. dump_spu_fields(spu_info[num].spu);
  2955. break;
  2956. default:
  2957. dump_spu_ls(num, subcmd);
  2958. break;
  2959. }
  2960. break;
  2961. default:
  2962. return -1;
  2963. }
  2964. return 0;
  2965. }
  2966. #else /* ! CONFIG_SPU_BASE */
  2967. static int do_spu_cmd(void)
  2968. {
  2969. return -1;
  2970. }
  2971. #endif