vfio_pci.c 34 KB

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  1. /*
  2. * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
  3. * Author: Alex Williamson <alex.williamson@redhat.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * Derived from original vfio:
  10. * Copyright 2010 Cisco Systems, Inc. All rights reserved.
  11. * Author: Tom Lyon, pugs@cisco.com
  12. */
  13. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14. #include <linux/device.h>
  15. #include <linux/eventfd.h>
  16. #include <linux/file.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/iommu.h>
  19. #include <linux/module.h>
  20. #include <linux/mutex.h>
  21. #include <linux/notifier.h>
  22. #include <linux/pci.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/slab.h>
  25. #include <linux/types.h>
  26. #include <linux/uaccess.h>
  27. #include <linux/vfio.h>
  28. #include <linux/vgaarb.h>
  29. #include "vfio_pci_private.h"
  30. #define DRIVER_VERSION "0.2"
  31. #define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>"
  32. #define DRIVER_DESC "VFIO PCI - User Level meta-driver"
  33. static char ids[1024] __initdata;
  34. module_param_string(ids, ids, sizeof(ids), 0);
  35. MODULE_PARM_DESC(ids, "Initial PCI IDs to add to the vfio driver, format is \"vendor:device[:subvendor[:subdevice[:class[:class_mask]]]]\" and multiple comma separated entries can be specified");
  36. static bool nointxmask;
  37. module_param_named(nointxmask, nointxmask, bool, S_IRUGO | S_IWUSR);
  38. MODULE_PARM_DESC(nointxmask,
  39. "Disable support for PCI 2.3 style INTx masking. If this resolves problems for specific devices, report lspci -vvvxxx to linux-pci@vger.kernel.org so the device can be fixed automatically via the broken_intx_masking flag.");
  40. #ifdef CONFIG_VFIO_PCI_VGA
  41. static bool disable_vga;
  42. module_param(disable_vga, bool, S_IRUGO);
  43. MODULE_PARM_DESC(disable_vga, "Disable VGA resource access through vfio-pci");
  44. #endif
  45. static bool disable_idle_d3;
  46. module_param(disable_idle_d3, bool, S_IRUGO | S_IWUSR);
  47. MODULE_PARM_DESC(disable_idle_d3,
  48. "Disable using the PCI D3 low power state for idle, unused devices");
  49. static DEFINE_MUTEX(driver_lock);
  50. static inline bool vfio_vga_disabled(void)
  51. {
  52. #ifdef CONFIG_VFIO_PCI_VGA
  53. return disable_vga;
  54. #else
  55. return true;
  56. #endif
  57. }
  58. /*
  59. * Our VGA arbiter participation is limited since we don't know anything
  60. * about the device itself. However, if the device is the only VGA device
  61. * downstream of a bridge and VFIO VGA support is disabled, then we can
  62. * safely return legacy VGA IO and memory as not decoded since the user
  63. * has no way to get to it and routing can be disabled externally at the
  64. * bridge.
  65. */
  66. static unsigned int vfio_pci_set_vga_decode(void *opaque, bool single_vga)
  67. {
  68. struct vfio_pci_device *vdev = opaque;
  69. struct pci_dev *tmp = NULL, *pdev = vdev->pdev;
  70. unsigned char max_busnr;
  71. unsigned int decodes;
  72. if (single_vga || !vfio_vga_disabled() || pci_is_root_bus(pdev->bus))
  73. return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
  74. VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
  75. max_busnr = pci_bus_max_busnr(pdev->bus);
  76. decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
  77. while ((tmp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, tmp)) != NULL) {
  78. if (tmp == pdev ||
  79. pci_domain_nr(tmp->bus) != pci_domain_nr(pdev->bus) ||
  80. pci_is_root_bus(tmp->bus))
  81. continue;
  82. if (tmp->bus->number >= pdev->bus->number &&
  83. tmp->bus->number <= max_busnr) {
  84. pci_dev_put(tmp);
  85. decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
  86. break;
  87. }
  88. }
  89. return decodes;
  90. }
  91. static inline bool vfio_pci_is_vga(struct pci_dev *pdev)
  92. {
  93. return (pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA;
  94. }
  95. static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev);
  96. static void vfio_pci_disable(struct vfio_pci_device *vdev);
  97. static int vfio_pci_enable(struct vfio_pci_device *vdev)
  98. {
  99. struct pci_dev *pdev = vdev->pdev;
  100. int ret;
  101. u16 cmd;
  102. u8 msix_pos;
  103. pci_set_power_state(pdev, PCI_D0);
  104. /* Don't allow our initial saved state to include busmaster */
  105. pci_clear_master(pdev);
  106. ret = pci_enable_device(pdev);
  107. if (ret)
  108. return ret;
  109. vdev->reset_works = (pci_reset_function(pdev) == 0);
  110. pci_save_state(pdev);
  111. vdev->pci_saved_state = pci_store_saved_state(pdev);
  112. if (!vdev->pci_saved_state)
  113. pr_debug("%s: Couldn't store %s saved state\n",
  114. __func__, dev_name(&pdev->dev));
  115. ret = vfio_config_init(vdev);
  116. if (ret) {
  117. kfree(vdev->pci_saved_state);
  118. vdev->pci_saved_state = NULL;
  119. pci_disable_device(pdev);
  120. return ret;
  121. }
  122. if (likely(!nointxmask))
  123. vdev->pci_2_3 = pci_intx_mask_supported(pdev);
  124. pci_read_config_word(pdev, PCI_COMMAND, &cmd);
  125. if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) {
  126. cmd &= ~PCI_COMMAND_INTX_DISABLE;
  127. pci_write_config_word(pdev, PCI_COMMAND, cmd);
  128. }
  129. msix_pos = pdev->msix_cap;
  130. if (msix_pos) {
  131. u16 flags;
  132. u32 table;
  133. pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags);
  134. pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table);
  135. vdev->msix_bar = table & PCI_MSIX_TABLE_BIR;
  136. vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET;
  137. vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16;
  138. } else
  139. vdev->msix_bar = 0xFF;
  140. if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev))
  141. vdev->has_vga = true;
  142. if (vfio_pci_is_vga(pdev) &&
  143. pdev->vendor == PCI_VENDOR_ID_INTEL &&
  144. IS_ENABLED(CONFIG_VFIO_PCI_IGD)) {
  145. ret = vfio_pci_igd_init(vdev);
  146. if (ret) {
  147. dev_warn(&vdev->pdev->dev,
  148. "Failed to setup Intel IGD regions\n");
  149. vfio_pci_disable(vdev);
  150. return ret;
  151. }
  152. }
  153. return 0;
  154. }
  155. static void vfio_pci_disable(struct vfio_pci_device *vdev)
  156. {
  157. struct pci_dev *pdev = vdev->pdev;
  158. int i, bar;
  159. /* Stop the device from further DMA */
  160. pci_clear_master(pdev);
  161. vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE |
  162. VFIO_IRQ_SET_ACTION_TRIGGER,
  163. vdev->irq_type, 0, 0, NULL);
  164. vdev->virq_disabled = false;
  165. for (i = 0; i < vdev->num_regions; i++)
  166. vdev->region[i].ops->release(vdev, &vdev->region[i]);
  167. vdev->num_regions = 0;
  168. kfree(vdev->region);
  169. vdev->region = NULL; /* don't krealloc a freed pointer */
  170. vfio_config_free(vdev);
  171. for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
  172. if (!vdev->barmap[bar])
  173. continue;
  174. pci_iounmap(pdev, vdev->barmap[bar]);
  175. pci_release_selected_regions(pdev, 1 << bar);
  176. vdev->barmap[bar] = NULL;
  177. }
  178. vdev->needs_reset = true;
  179. /*
  180. * If we have saved state, restore it. If we can reset the device,
  181. * even better. Resetting with current state seems better than
  182. * nothing, but saving and restoring current state without reset
  183. * is just busy work.
  184. */
  185. if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) {
  186. pr_info("%s: Couldn't reload %s saved state\n",
  187. __func__, dev_name(&pdev->dev));
  188. if (!vdev->reset_works)
  189. goto out;
  190. pci_save_state(pdev);
  191. }
  192. /*
  193. * Disable INTx and MSI, presumably to avoid spurious interrupts
  194. * during reset. Stolen from pci_reset_function()
  195. */
  196. pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
  197. /*
  198. * Try to reset the device. The success of this is dependent on
  199. * being able to lock the device, which is not always possible.
  200. */
  201. if (vdev->reset_works && !pci_try_reset_function(pdev))
  202. vdev->needs_reset = false;
  203. pci_restore_state(pdev);
  204. out:
  205. pci_disable_device(pdev);
  206. vfio_pci_try_bus_reset(vdev);
  207. if (!disable_idle_d3)
  208. pci_set_power_state(pdev, PCI_D3hot);
  209. }
  210. static void vfio_pci_release(void *device_data)
  211. {
  212. struct vfio_pci_device *vdev = device_data;
  213. mutex_lock(&driver_lock);
  214. if (!(--vdev->refcnt)) {
  215. vfio_spapr_pci_eeh_release(vdev->pdev);
  216. vfio_pci_disable(vdev);
  217. }
  218. mutex_unlock(&driver_lock);
  219. module_put(THIS_MODULE);
  220. }
  221. static int vfio_pci_open(void *device_data)
  222. {
  223. struct vfio_pci_device *vdev = device_data;
  224. int ret = 0;
  225. if (!try_module_get(THIS_MODULE))
  226. return -ENODEV;
  227. mutex_lock(&driver_lock);
  228. if (!vdev->refcnt) {
  229. ret = vfio_pci_enable(vdev);
  230. if (ret)
  231. goto error;
  232. vfio_spapr_pci_eeh_open(vdev->pdev);
  233. }
  234. vdev->refcnt++;
  235. error:
  236. mutex_unlock(&driver_lock);
  237. if (ret)
  238. module_put(THIS_MODULE);
  239. return ret;
  240. }
  241. static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
  242. {
  243. if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) {
  244. u8 pin;
  245. pci_read_config_byte(vdev->pdev, PCI_INTERRUPT_PIN, &pin);
  246. if (IS_ENABLED(CONFIG_VFIO_PCI_INTX) && pin)
  247. return 1;
  248. } else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) {
  249. u8 pos;
  250. u16 flags;
  251. pos = vdev->pdev->msi_cap;
  252. if (pos) {
  253. pci_read_config_word(vdev->pdev,
  254. pos + PCI_MSI_FLAGS, &flags);
  255. return 1 << ((flags & PCI_MSI_FLAGS_QMASK) >> 1);
  256. }
  257. } else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) {
  258. u8 pos;
  259. u16 flags;
  260. pos = vdev->pdev->msix_cap;
  261. if (pos) {
  262. pci_read_config_word(vdev->pdev,
  263. pos + PCI_MSIX_FLAGS, &flags);
  264. return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
  265. }
  266. } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) {
  267. if (pci_is_pcie(vdev->pdev))
  268. return 1;
  269. } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) {
  270. return 1;
  271. }
  272. return 0;
  273. }
  274. static int vfio_pci_count_devs(struct pci_dev *pdev, void *data)
  275. {
  276. (*(int *)data)++;
  277. return 0;
  278. }
  279. struct vfio_pci_fill_info {
  280. int max;
  281. int cur;
  282. struct vfio_pci_dependent_device *devices;
  283. };
  284. static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data)
  285. {
  286. struct vfio_pci_fill_info *fill = data;
  287. struct iommu_group *iommu_group;
  288. if (fill->cur == fill->max)
  289. return -EAGAIN; /* Something changed, try again */
  290. iommu_group = iommu_group_get(&pdev->dev);
  291. if (!iommu_group)
  292. return -EPERM; /* Cannot reset non-isolated devices */
  293. fill->devices[fill->cur].group_id = iommu_group_id(iommu_group);
  294. fill->devices[fill->cur].segment = pci_domain_nr(pdev->bus);
  295. fill->devices[fill->cur].bus = pdev->bus->number;
  296. fill->devices[fill->cur].devfn = pdev->devfn;
  297. fill->cur++;
  298. iommu_group_put(iommu_group);
  299. return 0;
  300. }
  301. struct vfio_pci_group_entry {
  302. struct vfio_group *group;
  303. int id;
  304. };
  305. struct vfio_pci_group_info {
  306. int count;
  307. struct vfio_pci_group_entry *groups;
  308. };
  309. static int vfio_pci_validate_devs(struct pci_dev *pdev, void *data)
  310. {
  311. struct vfio_pci_group_info *info = data;
  312. struct iommu_group *group;
  313. int id, i;
  314. group = iommu_group_get(&pdev->dev);
  315. if (!group)
  316. return -EPERM;
  317. id = iommu_group_id(group);
  318. for (i = 0; i < info->count; i++)
  319. if (info->groups[i].id == id)
  320. break;
  321. iommu_group_put(group);
  322. return (i == info->count) ? -EINVAL : 0;
  323. }
  324. static bool vfio_pci_dev_below_slot(struct pci_dev *pdev, struct pci_slot *slot)
  325. {
  326. for (; pdev; pdev = pdev->bus->self)
  327. if (pdev->bus == slot->bus)
  328. return (pdev->slot == slot);
  329. return false;
  330. }
  331. struct vfio_pci_walk_info {
  332. int (*fn)(struct pci_dev *, void *data);
  333. void *data;
  334. struct pci_dev *pdev;
  335. bool slot;
  336. int ret;
  337. };
  338. static int vfio_pci_walk_wrapper(struct pci_dev *pdev, void *data)
  339. {
  340. struct vfio_pci_walk_info *walk = data;
  341. if (!walk->slot || vfio_pci_dev_below_slot(pdev, walk->pdev->slot))
  342. walk->ret = walk->fn(pdev, walk->data);
  343. return walk->ret;
  344. }
  345. static int vfio_pci_for_each_slot_or_bus(struct pci_dev *pdev,
  346. int (*fn)(struct pci_dev *,
  347. void *data), void *data,
  348. bool slot)
  349. {
  350. struct vfio_pci_walk_info walk = {
  351. .fn = fn, .data = data, .pdev = pdev, .slot = slot, .ret = 0,
  352. };
  353. pci_walk_bus(pdev->bus, vfio_pci_walk_wrapper, &walk);
  354. return walk.ret;
  355. }
  356. static int msix_sparse_mmap_cap(struct vfio_pci_device *vdev,
  357. struct vfio_info_cap *caps)
  358. {
  359. struct vfio_info_cap_header *header;
  360. struct vfio_region_info_cap_sparse_mmap *sparse;
  361. size_t end, size;
  362. int nr_areas = 2, i = 0;
  363. end = pci_resource_len(vdev->pdev, vdev->msix_bar);
  364. /* If MSI-X table is aligned to the start or end, only one area */
  365. if (((vdev->msix_offset & PAGE_MASK) == 0) ||
  366. (PAGE_ALIGN(vdev->msix_offset + vdev->msix_size) >= end))
  367. nr_areas = 1;
  368. size = sizeof(*sparse) + (nr_areas * sizeof(*sparse->areas));
  369. header = vfio_info_cap_add(caps, size,
  370. VFIO_REGION_INFO_CAP_SPARSE_MMAP, 1);
  371. if (IS_ERR(header))
  372. return PTR_ERR(header);
  373. sparse = container_of(header,
  374. struct vfio_region_info_cap_sparse_mmap, header);
  375. sparse->nr_areas = nr_areas;
  376. if (vdev->msix_offset & PAGE_MASK) {
  377. sparse->areas[i].offset = 0;
  378. sparse->areas[i].size = vdev->msix_offset & PAGE_MASK;
  379. i++;
  380. }
  381. if (PAGE_ALIGN(vdev->msix_offset + vdev->msix_size) < end) {
  382. sparse->areas[i].offset = PAGE_ALIGN(vdev->msix_offset +
  383. vdev->msix_size);
  384. sparse->areas[i].size = end - sparse->areas[i].offset;
  385. i++;
  386. }
  387. return 0;
  388. }
  389. static int region_type_cap(struct vfio_pci_device *vdev,
  390. struct vfio_info_cap *caps,
  391. unsigned int type, unsigned int subtype)
  392. {
  393. struct vfio_info_cap_header *header;
  394. struct vfio_region_info_cap_type *cap;
  395. header = vfio_info_cap_add(caps, sizeof(*cap),
  396. VFIO_REGION_INFO_CAP_TYPE, 1);
  397. if (IS_ERR(header))
  398. return PTR_ERR(header);
  399. cap = container_of(header, struct vfio_region_info_cap_type, header);
  400. cap->type = type;
  401. cap->subtype = subtype;
  402. return 0;
  403. }
  404. int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
  405. unsigned int type, unsigned int subtype,
  406. const struct vfio_pci_regops *ops,
  407. size_t size, u32 flags, void *data)
  408. {
  409. struct vfio_pci_region *region;
  410. region = krealloc(vdev->region,
  411. (vdev->num_regions + 1) * sizeof(*region),
  412. GFP_KERNEL);
  413. if (!region)
  414. return -ENOMEM;
  415. vdev->region = region;
  416. vdev->region[vdev->num_regions].type = type;
  417. vdev->region[vdev->num_regions].subtype = subtype;
  418. vdev->region[vdev->num_regions].ops = ops;
  419. vdev->region[vdev->num_regions].size = size;
  420. vdev->region[vdev->num_regions].flags = flags;
  421. vdev->region[vdev->num_regions].data = data;
  422. vdev->num_regions++;
  423. return 0;
  424. }
  425. static long vfio_pci_ioctl(void *device_data,
  426. unsigned int cmd, unsigned long arg)
  427. {
  428. struct vfio_pci_device *vdev = device_data;
  429. unsigned long minsz;
  430. if (cmd == VFIO_DEVICE_GET_INFO) {
  431. struct vfio_device_info info;
  432. minsz = offsetofend(struct vfio_device_info, num_irqs);
  433. if (copy_from_user(&info, (void __user *)arg, minsz))
  434. return -EFAULT;
  435. if (info.argsz < minsz)
  436. return -EINVAL;
  437. info.flags = VFIO_DEVICE_FLAGS_PCI;
  438. if (vdev->reset_works)
  439. info.flags |= VFIO_DEVICE_FLAGS_RESET;
  440. info.num_regions = VFIO_PCI_NUM_REGIONS + vdev->num_regions;
  441. info.num_irqs = VFIO_PCI_NUM_IRQS;
  442. return copy_to_user((void __user *)arg, &info, minsz) ?
  443. -EFAULT : 0;
  444. } else if (cmd == VFIO_DEVICE_GET_REGION_INFO) {
  445. struct pci_dev *pdev = vdev->pdev;
  446. struct vfio_region_info info;
  447. struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
  448. int i, ret;
  449. minsz = offsetofend(struct vfio_region_info, offset);
  450. if (copy_from_user(&info, (void __user *)arg, minsz))
  451. return -EFAULT;
  452. if (info.argsz < minsz)
  453. return -EINVAL;
  454. switch (info.index) {
  455. case VFIO_PCI_CONFIG_REGION_INDEX:
  456. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  457. info.size = pdev->cfg_size;
  458. info.flags = VFIO_REGION_INFO_FLAG_READ |
  459. VFIO_REGION_INFO_FLAG_WRITE;
  460. break;
  461. case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
  462. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  463. info.size = pci_resource_len(pdev, info.index);
  464. if (!info.size) {
  465. info.flags = 0;
  466. break;
  467. }
  468. info.flags = VFIO_REGION_INFO_FLAG_READ |
  469. VFIO_REGION_INFO_FLAG_WRITE;
  470. if (IS_ENABLED(CONFIG_VFIO_PCI_MMAP) &&
  471. pci_resource_flags(pdev, info.index) &
  472. IORESOURCE_MEM && info.size >= PAGE_SIZE) {
  473. info.flags |= VFIO_REGION_INFO_FLAG_MMAP;
  474. if (info.index == vdev->msix_bar) {
  475. ret = msix_sparse_mmap_cap(vdev, &caps);
  476. if (ret)
  477. return ret;
  478. }
  479. }
  480. break;
  481. case VFIO_PCI_ROM_REGION_INDEX:
  482. {
  483. void __iomem *io;
  484. size_t size;
  485. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  486. info.flags = 0;
  487. /* Report the BAR size, not the ROM size */
  488. info.size = pci_resource_len(pdev, info.index);
  489. if (!info.size) {
  490. /* Shadow ROMs appear as PCI option ROMs */
  491. if (pdev->resource[PCI_ROM_RESOURCE].flags &
  492. IORESOURCE_ROM_SHADOW)
  493. info.size = 0x20000;
  494. else
  495. break;
  496. }
  497. /* Is it really there? */
  498. io = pci_map_rom(pdev, &size);
  499. if (!io || !size) {
  500. info.size = 0;
  501. break;
  502. }
  503. pci_unmap_rom(pdev, io);
  504. info.flags = VFIO_REGION_INFO_FLAG_READ;
  505. break;
  506. }
  507. case VFIO_PCI_VGA_REGION_INDEX:
  508. if (!vdev->has_vga)
  509. return -EINVAL;
  510. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  511. info.size = 0xc0000;
  512. info.flags = VFIO_REGION_INFO_FLAG_READ |
  513. VFIO_REGION_INFO_FLAG_WRITE;
  514. break;
  515. default:
  516. if (info.index >=
  517. VFIO_PCI_NUM_REGIONS + vdev->num_regions)
  518. return -EINVAL;
  519. i = info.index - VFIO_PCI_NUM_REGIONS;
  520. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  521. info.size = vdev->region[i].size;
  522. info.flags = vdev->region[i].flags;
  523. ret = region_type_cap(vdev, &caps,
  524. vdev->region[i].type,
  525. vdev->region[i].subtype);
  526. if (ret)
  527. return ret;
  528. }
  529. if (caps.size) {
  530. info.flags |= VFIO_REGION_INFO_FLAG_CAPS;
  531. if (info.argsz < sizeof(info) + caps.size) {
  532. info.argsz = sizeof(info) + caps.size;
  533. info.cap_offset = 0;
  534. } else {
  535. vfio_info_cap_shift(&caps, sizeof(info));
  536. if (copy_to_user((void __user *)arg +
  537. sizeof(info), caps.buf,
  538. caps.size)) {
  539. kfree(caps.buf);
  540. return -EFAULT;
  541. }
  542. info.cap_offset = sizeof(info);
  543. }
  544. kfree(caps.buf);
  545. }
  546. return copy_to_user((void __user *)arg, &info, minsz) ?
  547. -EFAULT : 0;
  548. } else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) {
  549. struct vfio_irq_info info;
  550. minsz = offsetofend(struct vfio_irq_info, count);
  551. if (copy_from_user(&info, (void __user *)arg, minsz))
  552. return -EFAULT;
  553. if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
  554. return -EINVAL;
  555. switch (info.index) {
  556. case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
  557. case VFIO_PCI_REQ_IRQ_INDEX:
  558. break;
  559. case VFIO_PCI_ERR_IRQ_INDEX:
  560. if (pci_is_pcie(vdev->pdev))
  561. break;
  562. /* pass thru to return error */
  563. default:
  564. return -EINVAL;
  565. }
  566. info.flags = VFIO_IRQ_INFO_EVENTFD;
  567. info.count = vfio_pci_get_irq_count(vdev, info.index);
  568. if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
  569. info.flags |= (VFIO_IRQ_INFO_MASKABLE |
  570. VFIO_IRQ_INFO_AUTOMASKED);
  571. else
  572. info.flags |= VFIO_IRQ_INFO_NORESIZE;
  573. return copy_to_user((void __user *)arg, &info, minsz) ?
  574. -EFAULT : 0;
  575. } else if (cmd == VFIO_DEVICE_SET_IRQS) {
  576. struct vfio_irq_set hdr;
  577. u8 *data = NULL;
  578. int ret = 0;
  579. minsz = offsetofend(struct vfio_irq_set, count);
  580. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  581. return -EFAULT;
  582. if (hdr.argsz < minsz || hdr.index >= VFIO_PCI_NUM_IRQS ||
  583. hdr.flags & ~(VFIO_IRQ_SET_DATA_TYPE_MASK |
  584. VFIO_IRQ_SET_ACTION_TYPE_MASK))
  585. return -EINVAL;
  586. if (!(hdr.flags & VFIO_IRQ_SET_DATA_NONE)) {
  587. size_t size;
  588. int max = vfio_pci_get_irq_count(vdev, hdr.index);
  589. if (hdr.flags & VFIO_IRQ_SET_DATA_BOOL)
  590. size = sizeof(uint8_t);
  591. else if (hdr.flags & VFIO_IRQ_SET_DATA_EVENTFD)
  592. size = sizeof(int32_t);
  593. else
  594. return -EINVAL;
  595. if (hdr.argsz - minsz < hdr.count * size ||
  596. hdr.start >= max || hdr.start + hdr.count > max)
  597. return -EINVAL;
  598. data = memdup_user((void __user *)(arg + minsz),
  599. hdr.count * size);
  600. if (IS_ERR(data))
  601. return PTR_ERR(data);
  602. }
  603. mutex_lock(&vdev->igate);
  604. ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index,
  605. hdr.start, hdr.count, data);
  606. mutex_unlock(&vdev->igate);
  607. kfree(data);
  608. return ret;
  609. } else if (cmd == VFIO_DEVICE_RESET) {
  610. return vdev->reset_works ?
  611. pci_try_reset_function(vdev->pdev) : -EINVAL;
  612. } else if (cmd == VFIO_DEVICE_GET_PCI_HOT_RESET_INFO) {
  613. struct vfio_pci_hot_reset_info hdr;
  614. struct vfio_pci_fill_info fill = { 0 };
  615. struct vfio_pci_dependent_device *devices = NULL;
  616. bool slot = false;
  617. int ret = 0;
  618. minsz = offsetofend(struct vfio_pci_hot_reset_info, count);
  619. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  620. return -EFAULT;
  621. if (hdr.argsz < minsz)
  622. return -EINVAL;
  623. hdr.flags = 0;
  624. /* Can we do a slot or bus reset or neither? */
  625. if (!pci_probe_reset_slot(vdev->pdev->slot))
  626. slot = true;
  627. else if (pci_probe_reset_bus(vdev->pdev->bus))
  628. return -ENODEV;
  629. /* How many devices are affected? */
  630. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  631. vfio_pci_count_devs,
  632. &fill.max, slot);
  633. if (ret)
  634. return ret;
  635. WARN_ON(!fill.max); /* Should always be at least one */
  636. /*
  637. * If there's enough space, fill it now, otherwise return
  638. * -ENOSPC and the number of devices affected.
  639. */
  640. if (hdr.argsz < sizeof(hdr) + (fill.max * sizeof(*devices))) {
  641. ret = -ENOSPC;
  642. hdr.count = fill.max;
  643. goto reset_info_exit;
  644. }
  645. devices = kcalloc(fill.max, sizeof(*devices), GFP_KERNEL);
  646. if (!devices)
  647. return -ENOMEM;
  648. fill.devices = devices;
  649. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  650. vfio_pci_fill_devs,
  651. &fill, slot);
  652. /*
  653. * If a device was removed between counting and filling,
  654. * we may come up short of fill.max. If a device was
  655. * added, we'll have a return of -EAGAIN above.
  656. */
  657. if (!ret)
  658. hdr.count = fill.cur;
  659. reset_info_exit:
  660. if (copy_to_user((void __user *)arg, &hdr, minsz))
  661. ret = -EFAULT;
  662. if (!ret) {
  663. if (copy_to_user((void __user *)(arg + minsz), devices,
  664. hdr.count * sizeof(*devices)))
  665. ret = -EFAULT;
  666. }
  667. kfree(devices);
  668. return ret;
  669. } else if (cmd == VFIO_DEVICE_PCI_HOT_RESET) {
  670. struct vfio_pci_hot_reset hdr;
  671. int32_t *group_fds;
  672. struct vfio_pci_group_entry *groups;
  673. struct vfio_pci_group_info info;
  674. bool slot = false;
  675. int i, count = 0, ret = 0;
  676. minsz = offsetofend(struct vfio_pci_hot_reset, count);
  677. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  678. return -EFAULT;
  679. if (hdr.argsz < minsz || hdr.flags)
  680. return -EINVAL;
  681. /* Can we do a slot or bus reset or neither? */
  682. if (!pci_probe_reset_slot(vdev->pdev->slot))
  683. slot = true;
  684. else if (pci_probe_reset_bus(vdev->pdev->bus))
  685. return -ENODEV;
  686. /*
  687. * We can't let userspace give us an arbitrarily large
  688. * buffer to copy, so verify how many we think there
  689. * could be. Note groups can have multiple devices so
  690. * one group per device is the max.
  691. */
  692. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  693. vfio_pci_count_devs,
  694. &count, slot);
  695. if (ret)
  696. return ret;
  697. /* Somewhere between 1 and count is OK */
  698. if (!hdr.count || hdr.count > count)
  699. return -EINVAL;
  700. group_fds = kcalloc(hdr.count, sizeof(*group_fds), GFP_KERNEL);
  701. groups = kcalloc(hdr.count, sizeof(*groups), GFP_KERNEL);
  702. if (!group_fds || !groups) {
  703. kfree(group_fds);
  704. kfree(groups);
  705. return -ENOMEM;
  706. }
  707. if (copy_from_user(group_fds, (void __user *)(arg + minsz),
  708. hdr.count * sizeof(*group_fds))) {
  709. kfree(group_fds);
  710. kfree(groups);
  711. return -EFAULT;
  712. }
  713. /*
  714. * For each group_fd, get the group through the vfio external
  715. * user interface and store the group and iommu ID. This
  716. * ensures the group is held across the reset.
  717. */
  718. for (i = 0; i < hdr.count; i++) {
  719. struct vfio_group *group;
  720. struct fd f = fdget(group_fds[i]);
  721. if (!f.file) {
  722. ret = -EBADF;
  723. break;
  724. }
  725. group = vfio_group_get_external_user(f.file);
  726. fdput(f);
  727. if (IS_ERR(group)) {
  728. ret = PTR_ERR(group);
  729. break;
  730. }
  731. groups[i].group = group;
  732. groups[i].id = vfio_external_user_iommu_id(group);
  733. }
  734. kfree(group_fds);
  735. /* release reference to groups on error */
  736. if (ret)
  737. goto hot_reset_release;
  738. info.count = hdr.count;
  739. info.groups = groups;
  740. /*
  741. * Test whether all the affected devices are contained
  742. * by the set of groups provided by the user.
  743. */
  744. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  745. vfio_pci_validate_devs,
  746. &info, slot);
  747. if (!ret)
  748. /* User has access, do the reset */
  749. ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
  750. pci_try_reset_bus(vdev->pdev->bus);
  751. hot_reset_release:
  752. for (i--; i >= 0; i--)
  753. vfio_group_put_external_user(groups[i].group);
  754. kfree(groups);
  755. return ret;
  756. }
  757. return -ENOTTY;
  758. }
  759. static ssize_t vfio_pci_rw(void *device_data, char __user *buf,
  760. size_t count, loff_t *ppos, bool iswrite)
  761. {
  762. unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
  763. struct vfio_pci_device *vdev = device_data;
  764. if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
  765. return -EINVAL;
  766. switch (index) {
  767. case VFIO_PCI_CONFIG_REGION_INDEX:
  768. return vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);
  769. case VFIO_PCI_ROM_REGION_INDEX:
  770. if (iswrite)
  771. return -EINVAL;
  772. return vfio_pci_bar_rw(vdev, buf, count, ppos, false);
  773. case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
  774. return vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);
  775. case VFIO_PCI_VGA_REGION_INDEX:
  776. return vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite);
  777. default:
  778. index -= VFIO_PCI_NUM_REGIONS;
  779. return vdev->region[index].ops->rw(vdev, buf,
  780. count, ppos, iswrite);
  781. }
  782. return -EINVAL;
  783. }
  784. static ssize_t vfio_pci_read(void *device_data, char __user *buf,
  785. size_t count, loff_t *ppos)
  786. {
  787. if (!count)
  788. return 0;
  789. return vfio_pci_rw(device_data, buf, count, ppos, false);
  790. }
  791. static ssize_t vfio_pci_write(void *device_data, const char __user *buf,
  792. size_t count, loff_t *ppos)
  793. {
  794. if (!count)
  795. return 0;
  796. return vfio_pci_rw(device_data, (char __user *)buf, count, ppos, true);
  797. }
  798. static int vfio_pci_mmap(void *device_data, struct vm_area_struct *vma)
  799. {
  800. struct vfio_pci_device *vdev = device_data;
  801. struct pci_dev *pdev = vdev->pdev;
  802. unsigned int index;
  803. u64 phys_len, req_len, pgoff, req_start;
  804. int ret;
  805. index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
  806. if (vma->vm_end < vma->vm_start)
  807. return -EINVAL;
  808. if ((vma->vm_flags & VM_SHARED) == 0)
  809. return -EINVAL;
  810. if (index >= VFIO_PCI_ROM_REGION_INDEX)
  811. return -EINVAL;
  812. if (!(pci_resource_flags(pdev, index) & IORESOURCE_MEM))
  813. return -EINVAL;
  814. phys_len = pci_resource_len(pdev, index);
  815. req_len = vma->vm_end - vma->vm_start;
  816. pgoff = vma->vm_pgoff &
  817. ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
  818. req_start = pgoff << PAGE_SHIFT;
  819. if (phys_len < PAGE_SIZE || req_start + req_len > phys_len)
  820. return -EINVAL;
  821. if (index == vdev->msix_bar) {
  822. /*
  823. * Disallow mmaps overlapping the MSI-X table; users don't
  824. * get to touch this directly. We could find somewhere
  825. * else to map the overlap, but page granularity is only
  826. * a recommendation, not a requirement, so the user needs
  827. * to know which bits are real. Requiring them to mmap
  828. * around the table makes that clear.
  829. */
  830. /* If neither entirely above nor below, then it overlaps */
  831. if (!(req_start >= vdev->msix_offset + vdev->msix_size ||
  832. req_start + req_len <= vdev->msix_offset))
  833. return -EINVAL;
  834. }
  835. /*
  836. * Even though we don't make use of the barmap for the mmap,
  837. * we need to request the region and the barmap tracks that.
  838. */
  839. if (!vdev->barmap[index]) {
  840. ret = pci_request_selected_regions(pdev,
  841. 1 << index, "vfio-pci");
  842. if (ret)
  843. return ret;
  844. vdev->barmap[index] = pci_iomap(pdev, index, 0);
  845. }
  846. vma->vm_private_data = vdev;
  847. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  848. vma->vm_pgoff = (pci_resource_start(pdev, index) >> PAGE_SHIFT) + pgoff;
  849. return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
  850. req_len, vma->vm_page_prot);
  851. }
  852. static void vfio_pci_request(void *device_data, unsigned int count)
  853. {
  854. struct vfio_pci_device *vdev = device_data;
  855. mutex_lock(&vdev->igate);
  856. if (vdev->req_trigger) {
  857. if (!(count % 10))
  858. dev_notice_ratelimited(&vdev->pdev->dev,
  859. "Relaying device request to user (#%u)\n",
  860. count);
  861. eventfd_signal(vdev->req_trigger, 1);
  862. } else if (count == 0) {
  863. dev_warn(&vdev->pdev->dev,
  864. "No device request channel registered, blocked until released by user\n");
  865. }
  866. mutex_unlock(&vdev->igate);
  867. }
  868. static const struct vfio_device_ops vfio_pci_ops = {
  869. .name = "vfio-pci",
  870. .open = vfio_pci_open,
  871. .release = vfio_pci_release,
  872. .ioctl = vfio_pci_ioctl,
  873. .read = vfio_pci_read,
  874. .write = vfio_pci_write,
  875. .mmap = vfio_pci_mmap,
  876. .request = vfio_pci_request,
  877. };
  878. static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  879. {
  880. struct vfio_pci_device *vdev;
  881. struct iommu_group *group;
  882. int ret;
  883. if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL)
  884. return -EINVAL;
  885. group = vfio_iommu_group_get(&pdev->dev);
  886. if (!group)
  887. return -EINVAL;
  888. vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
  889. if (!vdev) {
  890. vfio_iommu_group_put(group, &pdev->dev);
  891. return -ENOMEM;
  892. }
  893. vdev->pdev = pdev;
  894. vdev->irq_type = VFIO_PCI_NUM_IRQS;
  895. mutex_init(&vdev->igate);
  896. spin_lock_init(&vdev->irqlock);
  897. ret = vfio_add_group_dev(&pdev->dev, &vfio_pci_ops, vdev);
  898. if (ret) {
  899. vfio_iommu_group_put(group, &pdev->dev);
  900. kfree(vdev);
  901. return ret;
  902. }
  903. if (vfio_pci_is_vga(pdev)) {
  904. vga_client_register(pdev, vdev, NULL, vfio_pci_set_vga_decode);
  905. vga_set_legacy_decoding(pdev,
  906. vfio_pci_set_vga_decode(vdev, false));
  907. }
  908. if (!disable_idle_d3) {
  909. /*
  910. * pci-core sets the device power state to an unknown value at
  911. * bootup and after being removed from a driver. The only
  912. * transition it allows from this unknown state is to D0, which
  913. * typically happens when a driver calls pci_enable_device().
  914. * We're not ready to enable the device yet, but we do want to
  915. * be able to get to D3. Therefore first do a D0 transition
  916. * before going to D3.
  917. */
  918. pci_set_power_state(pdev, PCI_D0);
  919. pci_set_power_state(pdev, PCI_D3hot);
  920. }
  921. return ret;
  922. }
  923. static void vfio_pci_remove(struct pci_dev *pdev)
  924. {
  925. struct vfio_pci_device *vdev;
  926. vdev = vfio_del_group_dev(&pdev->dev);
  927. if (!vdev)
  928. return;
  929. vfio_iommu_group_put(pdev->dev.iommu_group, &pdev->dev);
  930. kfree(vdev->region);
  931. kfree(vdev);
  932. if (vfio_pci_is_vga(pdev)) {
  933. vga_client_register(pdev, NULL, NULL, NULL);
  934. vga_set_legacy_decoding(pdev,
  935. VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
  936. VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM);
  937. }
  938. if (!disable_idle_d3)
  939. pci_set_power_state(pdev, PCI_D0);
  940. }
  941. static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev,
  942. pci_channel_state_t state)
  943. {
  944. struct vfio_pci_device *vdev;
  945. struct vfio_device *device;
  946. device = vfio_device_get_from_dev(&pdev->dev);
  947. if (device == NULL)
  948. return PCI_ERS_RESULT_DISCONNECT;
  949. vdev = vfio_device_data(device);
  950. if (vdev == NULL) {
  951. vfio_device_put(device);
  952. return PCI_ERS_RESULT_DISCONNECT;
  953. }
  954. mutex_lock(&vdev->igate);
  955. if (vdev->err_trigger)
  956. eventfd_signal(vdev->err_trigger, 1);
  957. mutex_unlock(&vdev->igate);
  958. vfio_device_put(device);
  959. return PCI_ERS_RESULT_CAN_RECOVER;
  960. }
  961. static const struct pci_error_handlers vfio_err_handlers = {
  962. .error_detected = vfio_pci_aer_err_detected,
  963. };
  964. static struct pci_driver vfio_pci_driver = {
  965. .name = "vfio-pci",
  966. .id_table = NULL, /* only dynamic ids */
  967. .probe = vfio_pci_probe,
  968. .remove = vfio_pci_remove,
  969. .err_handler = &vfio_err_handlers,
  970. };
  971. struct vfio_devices {
  972. struct vfio_device **devices;
  973. int cur_index;
  974. int max_index;
  975. };
  976. static int vfio_pci_get_devs(struct pci_dev *pdev, void *data)
  977. {
  978. struct vfio_devices *devs = data;
  979. struct vfio_device *device;
  980. if (devs->cur_index == devs->max_index)
  981. return -ENOSPC;
  982. device = vfio_device_get_from_dev(&pdev->dev);
  983. if (!device)
  984. return -EINVAL;
  985. if (pci_dev_driver(pdev) != &vfio_pci_driver) {
  986. vfio_device_put(device);
  987. return -EBUSY;
  988. }
  989. devs->devices[devs->cur_index++] = device;
  990. return 0;
  991. }
  992. /*
  993. * Attempt to do a bus/slot reset if there are devices affected by a reset for
  994. * this device that are needs_reset and all of the affected devices are unused
  995. * (!refcnt). Callers are required to hold driver_lock when calling this to
  996. * prevent device opens and concurrent bus reset attempts. We prevent device
  997. * unbinds by acquiring and holding a reference to the vfio_device.
  998. *
  999. * NB: vfio-core considers a group to be viable even if some devices are
  1000. * bound to drivers like pci-stub or pcieport. Here we require all devices
  1001. * to be bound to vfio_pci since that's the only way we can be sure they
  1002. * stay put.
  1003. */
  1004. static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev)
  1005. {
  1006. struct vfio_devices devs = { .cur_index = 0 };
  1007. int i = 0, ret = -EINVAL;
  1008. bool needs_reset = false, slot = false;
  1009. struct vfio_pci_device *tmp;
  1010. if (!pci_probe_reset_slot(vdev->pdev->slot))
  1011. slot = true;
  1012. else if (pci_probe_reset_bus(vdev->pdev->bus))
  1013. return;
  1014. if (vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
  1015. &i, slot) || !i)
  1016. return;
  1017. devs.max_index = i;
  1018. devs.devices = kcalloc(i, sizeof(struct vfio_device *), GFP_KERNEL);
  1019. if (!devs.devices)
  1020. return;
  1021. if (vfio_pci_for_each_slot_or_bus(vdev->pdev,
  1022. vfio_pci_get_devs, &devs, slot))
  1023. goto put_devs;
  1024. for (i = 0; i < devs.cur_index; i++) {
  1025. tmp = vfio_device_data(devs.devices[i]);
  1026. if (tmp->needs_reset)
  1027. needs_reset = true;
  1028. if (tmp->refcnt)
  1029. goto put_devs;
  1030. }
  1031. if (needs_reset)
  1032. ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
  1033. pci_try_reset_bus(vdev->pdev->bus);
  1034. put_devs:
  1035. for (i = 0; i < devs.cur_index; i++) {
  1036. tmp = vfio_device_data(devs.devices[i]);
  1037. if (!ret)
  1038. tmp->needs_reset = false;
  1039. if (!tmp->refcnt && !disable_idle_d3)
  1040. pci_set_power_state(tmp->pdev, PCI_D3hot);
  1041. vfio_device_put(devs.devices[i]);
  1042. }
  1043. kfree(devs.devices);
  1044. }
  1045. static void __exit vfio_pci_cleanup(void)
  1046. {
  1047. pci_unregister_driver(&vfio_pci_driver);
  1048. vfio_pci_uninit_perm_bits();
  1049. }
  1050. static void __init vfio_pci_fill_ids(void)
  1051. {
  1052. char *p, *id;
  1053. int rc;
  1054. /* no ids passed actually */
  1055. if (ids[0] == '\0')
  1056. return;
  1057. /* add ids specified in the module parameter */
  1058. p = ids;
  1059. while ((id = strsep(&p, ","))) {
  1060. unsigned int vendor, device, subvendor = PCI_ANY_ID,
  1061. subdevice = PCI_ANY_ID, class = 0, class_mask = 0;
  1062. int fields;
  1063. if (!strlen(id))
  1064. continue;
  1065. fields = sscanf(id, "%x:%x:%x:%x:%x:%x",
  1066. &vendor, &device, &subvendor, &subdevice,
  1067. &class, &class_mask);
  1068. if (fields < 2) {
  1069. pr_warn("invalid id string \"%s\"\n", id);
  1070. continue;
  1071. }
  1072. rc = pci_add_dynid(&vfio_pci_driver, vendor, device,
  1073. subvendor, subdevice, class, class_mask, 0);
  1074. if (rc)
  1075. pr_warn("failed to add dynamic id [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x (%d)\n",
  1076. vendor, device, subvendor, subdevice,
  1077. class, class_mask, rc);
  1078. else
  1079. pr_info("add [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x\n",
  1080. vendor, device, subvendor, subdevice,
  1081. class, class_mask);
  1082. }
  1083. }
  1084. static int __init vfio_pci_init(void)
  1085. {
  1086. int ret;
  1087. /* Allocate shared config space permision data used by all devices */
  1088. ret = vfio_pci_init_perm_bits();
  1089. if (ret)
  1090. return ret;
  1091. /* Register and scan for devices */
  1092. ret = pci_register_driver(&vfio_pci_driver);
  1093. if (ret)
  1094. goto out_driver;
  1095. vfio_pci_fill_ids();
  1096. return 0;
  1097. out_driver:
  1098. vfio_pci_uninit_perm_bits();
  1099. return ret;
  1100. }
  1101. module_init(vfio_pci_init);
  1102. module_exit(vfio_pci_cleanup);
  1103. MODULE_VERSION(DRIVER_VERSION);
  1104. MODULE_LICENSE("GPL v2");
  1105. MODULE_AUTHOR(DRIVER_AUTHOR);
  1106. MODULE_DESCRIPTION(DRIVER_DESC);