dwc3-pci.c 6.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233
  1. /**
  2. * dwc3-pci.c - PCI Specific glue layer
  3. *
  4. * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
  5. *
  6. * Authors: Felipe Balbi <balbi@ti.com>,
  7. * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
  8. *
  9. * This program is free software: you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 of
  11. * the License as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/slab.h>
  21. #include <linux/pci.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/gpio/consumer.h>
  24. #include <linux/acpi.h>
  25. #include "platform_data.h"
  26. #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd
  27. #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI 0xabce
  28. #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31 0xabcf
  29. #define PCI_DEVICE_ID_INTEL_BYT 0x0f37
  30. #define PCI_DEVICE_ID_INTEL_MRFLD 0x119e
  31. #define PCI_DEVICE_ID_INTEL_BSW 0x22b7
  32. #define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30
  33. #define PCI_DEVICE_ID_INTEL_SPTH 0xa130
  34. #define PCI_DEVICE_ID_INTEL_BXT 0x0aaa
  35. #define PCI_DEVICE_ID_INTEL_APL 0x5aaa
  36. static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
  37. static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
  38. static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
  39. { "reset-gpios", &reset_gpios, 1 },
  40. { "cs-gpios", &cs_gpios, 1 },
  41. { },
  42. };
  43. static int dwc3_pci_quirks(struct pci_dev *pdev)
  44. {
  45. if (pdev->vendor == PCI_VENDOR_ID_AMD &&
  46. pdev->device == PCI_DEVICE_ID_AMD_NL_USB) {
  47. struct dwc3_platform_data pdata;
  48. memset(&pdata, 0, sizeof(pdata));
  49. pdata.has_lpm_erratum = true;
  50. pdata.lpm_nyet_threshold = 0xf;
  51. pdata.u2exit_lfps_quirk = true;
  52. pdata.u2ss_inp3_quirk = true;
  53. pdata.req_p1p2p3_quirk = true;
  54. pdata.del_p1p2p3_quirk = true;
  55. pdata.del_phy_power_chg_quirk = true;
  56. pdata.lfps_filter_quirk = true;
  57. pdata.rx_detect_poll_quirk = true;
  58. pdata.tx_de_emphasis_quirk = true;
  59. pdata.tx_de_emphasis = 1;
  60. /*
  61. * FIXME these quirks should be removed when AMD NL
  62. * taps out
  63. */
  64. pdata.disable_scramble_quirk = true;
  65. pdata.dis_u3_susphy_quirk = true;
  66. pdata.dis_u2_susphy_quirk = true;
  67. return platform_device_add_data(pci_get_drvdata(pdev), &pdata,
  68. sizeof(pdata));
  69. }
  70. if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
  71. pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
  72. struct gpio_desc *gpio;
  73. acpi_dev_add_driver_gpios(ACPI_COMPANION(&pdev->dev),
  74. acpi_dwc3_byt_gpios);
  75. /*
  76. * These GPIOs will turn on the USB2 PHY. Note that we have to
  77. * put the gpio descriptors again here because the phy driver
  78. * might want to grab them, too.
  79. */
  80. gpio = gpiod_get_optional(&pdev->dev, "cs", GPIOD_OUT_LOW);
  81. if (IS_ERR(gpio))
  82. return PTR_ERR(gpio);
  83. gpiod_set_value_cansleep(gpio, 1);
  84. gpiod_put(gpio);
  85. gpio = gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW);
  86. if (IS_ERR(gpio))
  87. return PTR_ERR(gpio);
  88. if (gpio) {
  89. gpiod_set_value_cansleep(gpio, 1);
  90. gpiod_put(gpio);
  91. usleep_range(10000, 11000);
  92. }
  93. }
  94. if (pdev->vendor == PCI_VENDOR_ID_SYNOPSYS &&
  95. (pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 ||
  96. pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI ||
  97. pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31)) {
  98. struct dwc3_platform_data pdata;
  99. memset(&pdata, 0, sizeof(pdata));
  100. pdata.usb3_lpm_capable = true;
  101. pdata.has_lpm_erratum = true;
  102. pdata.dis_enblslpm_quirk = true;
  103. return platform_device_add_data(pci_get_drvdata(pdev), &pdata,
  104. sizeof(pdata));
  105. }
  106. return 0;
  107. }
  108. static int dwc3_pci_probe(struct pci_dev *pci,
  109. const struct pci_device_id *id)
  110. {
  111. struct resource res[2];
  112. struct platform_device *dwc3;
  113. int ret;
  114. struct device *dev = &pci->dev;
  115. ret = pcim_enable_device(pci);
  116. if (ret) {
  117. dev_err(dev, "failed to enable pci device\n");
  118. return -ENODEV;
  119. }
  120. pci_set_master(pci);
  121. dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
  122. if (!dwc3) {
  123. dev_err(dev, "couldn't allocate dwc3 device\n");
  124. return -ENOMEM;
  125. }
  126. memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
  127. res[0].start = pci_resource_start(pci, 0);
  128. res[0].end = pci_resource_end(pci, 0);
  129. res[0].name = "dwc_usb3";
  130. res[0].flags = IORESOURCE_MEM;
  131. res[1].start = pci->irq;
  132. res[1].name = "dwc_usb3";
  133. res[1].flags = IORESOURCE_IRQ;
  134. ret = platform_device_add_resources(dwc3, res, ARRAY_SIZE(res));
  135. if (ret) {
  136. dev_err(dev, "couldn't add resources to dwc3 device\n");
  137. return ret;
  138. }
  139. pci_set_drvdata(pci, dwc3);
  140. ret = dwc3_pci_quirks(pci);
  141. if (ret)
  142. goto err;
  143. dwc3->dev.parent = dev;
  144. ACPI_COMPANION_SET(&dwc3->dev, ACPI_COMPANION(dev));
  145. ret = platform_device_add(dwc3);
  146. if (ret) {
  147. dev_err(dev, "failed to register dwc3 device\n");
  148. goto err;
  149. }
  150. return 0;
  151. err:
  152. platform_device_put(dwc3);
  153. return ret;
  154. }
  155. static void dwc3_pci_remove(struct pci_dev *pci)
  156. {
  157. acpi_dev_remove_driver_gpios(ACPI_COMPANION(&pci->dev));
  158. platform_device_unregister(pci_get_drvdata(pci));
  159. }
  160. static const struct pci_device_id dwc3_pci_id_table[] = {
  161. {
  162. PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
  163. PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3),
  164. },
  165. {
  166. PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
  167. PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI),
  168. },
  169. {
  170. PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
  171. PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31),
  172. },
  173. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BSW), },
  174. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), },
  175. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), },
  176. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTLP), },
  177. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTH), },
  178. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT), },
  179. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL), },
  180. { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), },
  181. { } /* Terminating Entry */
  182. };
  183. MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
  184. static struct pci_driver dwc3_pci_driver = {
  185. .name = "dwc3-pci",
  186. .id_table = dwc3_pci_id_table,
  187. .probe = dwc3_pci_probe,
  188. .remove = dwc3_pci_remove,
  189. };
  190. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
  191. MODULE_LICENSE("GPL v2");
  192. MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
  193. module_pci_driver(dwc3_pci_driver);