udc.c 48 KB

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  1. /*
  2. * udc.c - ChipIdea UDC driver
  3. *
  4. * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
  5. *
  6. * Author: David Lopo
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/device.h>
  14. #include <linux/dmapool.h>
  15. #include <linux/err.h>
  16. #include <linux/irqreturn.h>
  17. #include <linux/kernel.h>
  18. #include <linux/slab.h>
  19. #include <linux/pm_runtime.h>
  20. #include <linux/usb/ch9.h>
  21. #include <linux/usb/gadget.h>
  22. #include <linux/usb/otg-fsm.h>
  23. #include <linux/usb/chipidea.h>
  24. #include "ci.h"
  25. #include "udc.h"
  26. #include "bits.h"
  27. #include "otg.h"
  28. #include "otg_fsm.h"
  29. /* control endpoint description */
  30. static const struct usb_endpoint_descriptor
  31. ctrl_endpt_out_desc = {
  32. .bLength = USB_DT_ENDPOINT_SIZE,
  33. .bDescriptorType = USB_DT_ENDPOINT,
  34. .bEndpointAddress = USB_DIR_OUT,
  35. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  36. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  37. };
  38. static const struct usb_endpoint_descriptor
  39. ctrl_endpt_in_desc = {
  40. .bLength = USB_DT_ENDPOINT_SIZE,
  41. .bDescriptorType = USB_DT_ENDPOINT,
  42. .bEndpointAddress = USB_DIR_IN,
  43. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  44. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  45. };
  46. /**
  47. * hw_ep_bit: calculates the bit number
  48. * @num: endpoint number
  49. * @dir: endpoint direction
  50. *
  51. * This function returns bit number
  52. */
  53. static inline int hw_ep_bit(int num, int dir)
  54. {
  55. return num + (dir ? 16 : 0);
  56. }
  57. static inline int ep_to_bit(struct ci_hdrc *ci, int n)
  58. {
  59. int fill = 16 - ci->hw_ep_max / 2;
  60. if (n >= ci->hw_ep_max / 2)
  61. n += fill;
  62. return n;
  63. }
  64. /**
  65. * hw_device_state: enables/disables interrupts (execute without interruption)
  66. * @dma: 0 => disable, !0 => enable and set dma engine
  67. *
  68. * This function returns an error code
  69. */
  70. static int hw_device_state(struct ci_hdrc *ci, u32 dma)
  71. {
  72. if (dma) {
  73. hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
  74. /* interrupt, error, port change, reset, sleep/suspend */
  75. hw_write(ci, OP_USBINTR, ~0,
  76. USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
  77. } else {
  78. hw_write(ci, OP_USBINTR, ~0, 0);
  79. }
  80. return 0;
  81. }
  82. /**
  83. * hw_ep_flush: flush endpoint fifo (execute without interruption)
  84. * @num: endpoint number
  85. * @dir: endpoint direction
  86. *
  87. * This function returns an error code
  88. */
  89. static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
  90. {
  91. int n = hw_ep_bit(num, dir);
  92. do {
  93. /* flush any pending transfer */
  94. hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
  95. while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
  96. cpu_relax();
  97. } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
  98. return 0;
  99. }
  100. /**
  101. * hw_ep_disable: disables endpoint (execute without interruption)
  102. * @num: endpoint number
  103. * @dir: endpoint direction
  104. *
  105. * This function returns an error code
  106. */
  107. static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
  108. {
  109. hw_ep_flush(ci, num, dir);
  110. hw_write(ci, OP_ENDPTCTRL + num,
  111. dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
  112. return 0;
  113. }
  114. /**
  115. * hw_ep_enable: enables endpoint (execute without interruption)
  116. * @num: endpoint number
  117. * @dir: endpoint direction
  118. * @type: endpoint type
  119. *
  120. * This function returns an error code
  121. */
  122. static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
  123. {
  124. u32 mask, data;
  125. if (dir) {
  126. mask = ENDPTCTRL_TXT; /* type */
  127. data = type << __ffs(mask);
  128. mask |= ENDPTCTRL_TXS; /* unstall */
  129. mask |= ENDPTCTRL_TXR; /* reset data toggle */
  130. data |= ENDPTCTRL_TXR;
  131. mask |= ENDPTCTRL_TXE; /* enable */
  132. data |= ENDPTCTRL_TXE;
  133. } else {
  134. mask = ENDPTCTRL_RXT; /* type */
  135. data = type << __ffs(mask);
  136. mask |= ENDPTCTRL_RXS; /* unstall */
  137. mask |= ENDPTCTRL_RXR; /* reset data toggle */
  138. data |= ENDPTCTRL_RXR;
  139. mask |= ENDPTCTRL_RXE; /* enable */
  140. data |= ENDPTCTRL_RXE;
  141. }
  142. hw_write(ci, OP_ENDPTCTRL + num, mask, data);
  143. return 0;
  144. }
  145. /**
  146. * hw_ep_get_halt: return endpoint halt status
  147. * @num: endpoint number
  148. * @dir: endpoint direction
  149. *
  150. * This function returns 1 if endpoint halted
  151. */
  152. static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
  153. {
  154. u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  155. return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
  156. }
  157. /**
  158. * hw_ep_prime: primes endpoint (execute without interruption)
  159. * @num: endpoint number
  160. * @dir: endpoint direction
  161. * @is_ctrl: true if control endpoint
  162. *
  163. * This function returns an error code
  164. */
  165. static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
  166. {
  167. int n = hw_ep_bit(num, dir);
  168. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  169. return -EAGAIN;
  170. hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
  171. while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  172. cpu_relax();
  173. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  174. return -EAGAIN;
  175. /* status shoult be tested according with manual but it doesn't work */
  176. return 0;
  177. }
  178. /**
  179. * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
  180. * without interruption)
  181. * @num: endpoint number
  182. * @dir: endpoint direction
  183. * @value: true => stall, false => unstall
  184. *
  185. * This function returns an error code
  186. */
  187. static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
  188. {
  189. if (value != 0 && value != 1)
  190. return -EINVAL;
  191. do {
  192. enum ci_hw_regs reg = OP_ENDPTCTRL + num;
  193. u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  194. u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
  195. /* data toggle - reserved for EP0 but it's in ESS */
  196. hw_write(ci, reg, mask_xs|mask_xr,
  197. value ? mask_xs : mask_xr);
  198. } while (value != hw_ep_get_halt(ci, num, dir));
  199. return 0;
  200. }
  201. /**
  202. * hw_is_port_high_speed: test if port is high speed
  203. *
  204. * This function returns true if high speed port
  205. */
  206. static int hw_port_is_high_speed(struct ci_hdrc *ci)
  207. {
  208. return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
  209. hw_read(ci, OP_PORTSC, PORTSC_HSP);
  210. }
  211. /**
  212. * hw_test_and_clear_complete: test & clear complete status (execute without
  213. * interruption)
  214. * @n: endpoint number
  215. *
  216. * This function returns complete status
  217. */
  218. static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
  219. {
  220. n = ep_to_bit(ci, n);
  221. return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
  222. }
  223. /**
  224. * hw_test_and_clear_intr_active: test & clear active interrupts (execute
  225. * without interruption)
  226. *
  227. * This function returns active interrutps
  228. */
  229. static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
  230. {
  231. u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
  232. hw_write(ci, OP_USBSTS, ~0, reg);
  233. return reg;
  234. }
  235. /**
  236. * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
  237. * interruption)
  238. *
  239. * This function returns guard value
  240. */
  241. static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
  242. {
  243. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
  244. }
  245. /**
  246. * hw_test_and_set_setup_guard: test & set setup guard (execute without
  247. * interruption)
  248. *
  249. * This function returns guard value
  250. */
  251. static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
  252. {
  253. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
  254. }
  255. /**
  256. * hw_usb_set_address: configures USB address (execute without interruption)
  257. * @value: new USB address
  258. *
  259. * This function explicitly sets the address, without the "USBADRA" (advance)
  260. * feature, which is not supported by older versions of the controller.
  261. */
  262. static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
  263. {
  264. hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
  265. value << __ffs(DEVICEADDR_USBADR));
  266. }
  267. /**
  268. * hw_usb_reset: restart device after a bus reset (execute without
  269. * interruption)
  270. *
  271. * This function returns an error code
  272. */
  273. static int hw_usb_reset(struct ci_hdrc *ci)
  274. {
  275. hw_usb_set_address(ci, 0);
  276. /* ESS flushes only at end?!? */
  277. hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
  278. /* clear setup token semaphores */
  279. hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
  280. /* clear complete status */
  281. hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
  282. /* wait until all bits cleared */
  283. while (hw_read(ci, OP_ENDPTPRIME, ~0))
  284. udelay(10); /* not RTOS friendly */
  285. /* reset all endpoints ? */
  286. /* reset internal status and wait for further instructions
  287. no need to verify the port reset status (ESS does it) */
  288. return 0;
  289. }
  290. /******************************************************************************
  291. * UTIL block
  292. *****************************************************************************/
  293. static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
  294. unsigned length)
  295. {
  296. int i;
  297. u32 temp;
  298. struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
  299. GFP_ATOMIC);
  300. if (node == NULL)
  301. return -ENOMEM;
  302. node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC,
  303. &node->dma);
  304. if (node->ptr == NULL) {
  305. kfree(node);
  306. return -ENOMEM;
  307. }
  308. node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
  309. node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
  310. node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
  311. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
  312. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  313. if (hwreq->req.length == 0
  314. || hwreq->req.length % hwep->ep.maxpacket)
  315. mul++;
  316. node->ptr->token |= mul << __ffs(TD_MULTO);
  317. }
  318. temp = (u32) (hwreq->req.dma + hwreq->req.actual);
  319. if (length) {
  320. node->ptr->page[0] = cpu_to_le32(temp);
  321. for (i = 1; i < TD_PAGE_COUNT; i++) {
  322. u32 page = temp + i * CI_HDRC_PAGE_SIZE;
  323. page &= ~TD_RESERVED_MASK;
  324. node->ptr->page[i] = cpu_to_le32(page);
  325. }
  326. }
  327. hwreq->req.actual += length;
  328. if (!list_empty(&hwreq->tds)) {
  329. /* get the last entry */
  330. lastnode = list_entry(hwreq->tds.prev,
  331. struct td_node, td);
  332. lastnode->ptr->next = cpu_to_le32(node->dma);
  333. }
  334. INIT_LIST_HEAD(&node->td);
  335. list_add_tail(&node->td, &hwreq->tds);
  336. return 0;
  337. }
  338. /**
  339. * _usb_addr: calculates endpoint address from direction & number
  340. * @ep: endpoint
  341. */
  342. static inline u8 _usb_addr(struct ci_hw_ep *ep)
  343. {
  344. return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
  345. }
  346. /**
  347. * _hardware_enqueue: configures a request at hardware level
  348. * @hwep: endpoint
  349. * @hwreq: request
  350. *
  351. * This function returns an error code
  352. */
  353. static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  354. {
  355. struct ci_hdrc *ci = hwep->ci;
  356. int ret = 0;
  357. unsigned rest = hwreq->req.length;
  358. int pages = TD_PAGE_COUNT;
  359. struct td_node *firstnode, *lastnode;
  360. /* don't queue twice */
  361. if (hwreq->req.status == -EALREADY)
  362. return -EALREADY;
  363. hwreq->req.status = -EALREADY;
  364. ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir);
  365. if (ret)
  366. return ret;
  367. /*
  368. * The first buffer could be not page aligned.
  369. * In that case we have to span into one extra td.
  370. */
  371. if (hwreq->req.dma % PAGE_SIZE)
  372. pages--;
  373. if (rest == 0) {
  374. ret = add_td_to_list(hwep, hwreq, 0);
  375. if (ret < 0)
  376. goto done;
  377. }
  378. while (rest > 0) {
  379. unsigned count = min(hwreq->req.length - hwreq->req.actual,
  380. (unsigned)(pages * CI_HDRC_PAGE_SIZE));
  381. ret = add_td_to_list(hwep, hwreq, count);
  382. if (ret < 0)
  383. goto done;
  384. rest -= count;
  385. }
  386. if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
  387. && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
  388. ret = add_td_to_list(hwep, hwreq, 0);
  389. if (ret < 0)
  390. goto done;
  391. }
  392. firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
  393. lastnode = list_entry(hwreq->tds.prev,
  394. struct td_node, td);
  395. lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
  396. if (!hwreq->req.no_interrupt)
  397. lastnode->ptr->token |= cpu_to_le32(TD_IOC);
  398. wmb();
  399. hwreq->req.actual = 0;
  400. if (!list_empty(&hwep->qh.queue)) {
  401. struct ci_hw_req *hwreqprev;
  402. int n = hw_ep_bit(hwep->num, hwep->dir);
  403. int tmp_stat;
  404. struct td_node *prevlastnode;
  405. u32 next = firstnode->dma & TD_ADDR_MASK;
  406. hwreqprev = list_entry(hwep->qh.queue.prev,
  407. struct ci_hw_req, queue);
  408. prevlastnode = list_entry(hwreqprev->tds.prev,
  409. struct td_node, td);
  410. prevlastnode->ptr->next = cpu_to_le32(next);
  411. wmb();
  412. if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  413. goto done;
  414. do {
  415. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
  416. tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
  417. } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
  418. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
  419. if (tmp_stat)
  420. goto done;
  421. }
  422. /* QH configuration */
  423. hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
  424. hwep->qh.ptr->td.token &=
  425. cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
  426. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
  427. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  428. if (hwreq->req.length == 0
  429. || hwreq->req.length % hwep->ep.maxpacket)
  430. mul++;
  431. hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
  432. }
  433. wmb(); /* synchronize before ep prime */
  434. ret = hw_ep_prime(ci, hwep->num, hwep->dir,
  435. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  436. done:
  437. return ret;
  438. }
  439. /*
  440. * free_pending_td: remove a pending request for the endpoint
  441. * @hwep: endpoint
  442. */
  443. static void free_pending_td(struct ci_hw_ep *hwep)
  444. {
  445. struct td_node *pending = hwep->pending_td;
  446. dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
  447. hwep->pending_td = NULL;
  448. kfree(pending);
  449. }
  450. static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
  451. struct td_node *node)
  452. {
  453. hwep->qh.ptr->td.next = node->dma;
  454. hwep->qh.ptr->td.token &=
  455. cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
  456. /* Synchronize before ep prime */
  457. wmb();
  458. return hw_ep_prime(ci, hwep->num, hwep->dir,
  459. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  460. }
  461. /**
  462. * _hardware_dequeue: handles a request at hardware level
  463. * @gadget: gadget
  464. * @hwep: endpoint
  465. *
  466. * This function returns an error code
  467. */
  468. static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  469. {
  470. u32 tmptoken;
  471. struct td_node *node, *tmpnode;
  472. unsigned remaining_length;
  473. unsigned actual = hwreq->req.length;
  474. struct ci_hdrc *ci = hwep->ci;
  475. if (hwreq->req.status != -EALREADY)
  476. return -EINVAL;
  477. hwreq->req.status = 0;
  478. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  479. tmptoken = le32_to_cpu(node->ptr->token);
  480. if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
  481. int n = hw_ep_bit(hwep->num, hwep->dir);
  482. if (ci->rev == CI_REVISION_24)
  483. if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
  484. reprime_dtd(ci, hwep, node);
  485. hwreq->req.status = -EALREADY;
  486. return -EBUSY;
  487. }
  488. remaining_length = (tmptoken & TD_TOTAL_BYTES);
  489. remaining_length >>= __ffs(TD_TOTAL_BYTES);
  490. actual -= remaining_length;
  491. hwreq->req.status = tmptoken & TD_STATUS;
  492. if ((TD_STATUS_HALTED & hwreq->req.status)) {
  493. hwreq->req.status = -EPIPE;
  494. break;
  495. } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
  496. hwreq->req.status = -EPROTO;
  497. break;
  498. } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
  499. hwreq->req.status = -EILSEQ;
  500. break;
  501. }
  502. if (remaining_length) {
  503. if (hwep->dir) {
  504. hwreq->req.status = -EPROTO;
  505. break;
  506. }
  507. }
  508. /*
  509. * As the hardware could still address the freed td
  510. * which will run the udc unusable, the cleanup of the
  511. * td has to be delayed by one.
  512. */
  513. if (hwep->pending_td)
  514. free_pending_td(hwep);
  515. hwep->pending_td = node;
  516. list_del_init(&node->td);
  517. }
  518. usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir);
  519. hwreq->req.actual += actual;
  520. if (hwreq->req.status)
  521. return hwreq->req.status;
  522. return hwreq->req.actual;
  523. }
  524. /**
  525. * _ep_nuke: dequeues all endpoint requests
  526. * @hwep: endpoint
  527. *
  528. * This function returns an error code
  529. * Caller must hold lock
  530. */
  531. static int _ep_nuke(struct ci_hw_ep *hwep)
  532. __releases(hwep->lock)
  533. __acquires(hwep->lock)
  534. {
  535. struct td_node *node, *tmpnode;
  536. if (hwep == NULL)
  537. return -EINVAL;
  538. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  539. while (!list_empty(&hwep->qh.queue)) {
  540. /* pop oldest request */
  541. struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
  542. struct ci_hw_req, queue);
  543. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  544. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  545. list_del_init(&node->td);
  546. node->ptr = NULL;
  547. kfree(node);
  548. }
  549. list_del_init(&hwreq->queue);
  550. hwreq->req.status = -ESHUTDOWN;
  551. if (hwreq->req.complete != NULL) {
  552. spin_unlock(hwep->lock);
  553. usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
  554. spin_lock(hwep->lock);
  555. }
  556. }
  557. if (hwep->pending_td)
  558. free_pending_td(hwep);
  559. return 0;
  560. }
  561. static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
  562. {
  563. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  564. int direction, retval = 0;
  565. unsigned long flags;
  566. if (ep == NULL || hwep->ep.desc == NULL)
  567. return -EINVAL;
  568. if (usb_endpoint_xfer_isoc(hwep->ep.desc))
  569. return -EOPNOTSUPP;
  570. spin_lock_irqsave(hwep->lock, flags);
  571. if (value && hwep->dir == TX && check_transfer &&
  572. !list_empty(&hwep->qh.queue) &&
  573. !usb_endpoint_xfer_control(hwep->ep.desc)) {
  574. spin_unlock_irqrestore(hwep->lock, flags);
  575. return -EAGAIN;
  576. }
  577. direction = hwep->dir;
  578. do {
  579. retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
  580. if (!value)
  581. hwep->wedge = 0;
  582. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  583. hwep->dir = (hwep->dir == TX) ? RX : TX;
  584. } while (hwep->dir != direction);
  585. spin_unlock_irqrestore(hwep->lock, flags);
  586. return retval;
  587. }
  588. /**
  589. * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
  590. * @gadget: gadget
  591. *
  592. * This function returns an error code
  593. */
  594. static int _gadget_stop_activity(struct usb_gadget *gadget)
  595. {
  596. struct usb_ep *ep;
  597. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  598. unsigned long flags;
  599. spin_lock_irqsave(&ci->lock, flags);
  600. ci->gadget.speed = USB_SPEED_UNKNOWN;
  601. ci->remote_wakeup = 0;
  602. ci->suspended = 0;
  603. spin_unlock_irqrestore(&ci->lock, flags);
  604. /* flush all endpoints */
  605. gadget_for_each_ep(ep, gadget) {
  606. usb_ep_fifo_flush(ep);
  607. }
  608. usb_ep_fifo_flush(&ci->ep0out->ep);
  609. usb_ep_fifo_flush(&ci->ep0in->ep);
  610. /* make sure to disable all endpoints */
  611. gadget_for_each_ep(ep, gadget) {
  612. usb_ep_disable(ep);
  613. }
  614. if (ci->status != NULL) {
  615. usb_ep_free_request(&ci->ep0in->ep, ci->status);
  616. ci->status = NULL;
  617. }
  618. return 0;
  619. }
  620. /******************************************************************************
  621. * ISR block
  622. *****************************************************************************/
  623. /**
  624. * isr_reset_handler: USB reset interrupt handler
  625. * @ci: UDC device
  626. *
  627. * This function resets USB engine after a bus reset occurred
  628. */
  629. static void isr_reset_handler(struct ci_hdrc *ci)
  630. __releases(ci->lock)
  631. __acquires(ci->lock)
  632. {
  633. int retval;
  634. spin_unlock(&ci->lock);
  635. if (ci->gadget.speed != USB_SPEED_UNKNOWN)
  636. usb_gadget_udc_reset(&ci->gadget, ci->driver);
  637. retval = _gadget_stop_activity(&ci->gadget);
  638. if (retval)
  639. goto done;
  640. retval = hw_usb_reset(ci);
  641. if (retval)
  642. goto done;
  643. ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
  644. if (ci->status == NULL)
  645. retval = -ENOMEM;
  646. done:
  647. spin_lock(&ci->lock);
  648. if (retval)
  649. dev_err(ci->dev, "error: %i\n", retval);
  650. }
  651. /**
  652. * isr_get_status_complete: get_status request complete function
  653. * @ep: endpoint
  654. * @req: request handled
  655. *
  656. * Caller must release lock
  657. */
  658. static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
  659. {
  660. if (ep == NULL || req == NULL)
  661. return;
  662. kfree(req->buf);
  663. usb_ep_free_request(ep, req);
  664. }
  665. /**
  666. * _ep_queue: queues (submits) an I/O request to an endpoint
  667. * @ep: endpoint
  668. * @req: request
  669. * @gfp_flags: GFP flags (not used)
  670. *
  671. * Caller must hold lock
  672. * This function returns an error code
  673. */
  674. static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
  675. gfp_t __maybe_unused gfp_flags)
  676. {
  677. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  678. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  679. struct ci_hdrc *ci = hwep->ci;
  680. int retval = 0;
  681. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  682. return -EINVAL;
  683. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  684. if (req->length)
  685. hwep = (ci->ep0_dir == RX) ?
  686. ci->ep0out : ci->ep0in;
  687. if (!list_empty(&hwep->qh.queue)) {
  688. _ep_nuke(hwep);
  689. dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
  690. _usb_addr(hwep));
  691. }
  692. }
  693. if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
  694. hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) {
  695. dev_err(hwep->ci->dev, "request length too big for isochronous\n");
  696. return -EMSGSIZE;
  697. }
  698. /* first nuke then test link, e.g. previous status has not sent */
  699. if (!list_empty(&hwreq->queue)) {
  700. dev_err(hwep->ci->dev, "request already in queue\n");
  701. return -EBUSY;
  702. }
  703. /* push request */
  704. hwreq->req.status = -EINPROGRESS;
  705. hwreq->req.actual = 0;
  706. retval = _hardware_enqueue(hwep, hwreq);
  707. if (retval == -EALREADY)
  708. retval = 0;
  709. if (!retval)
  710. list_add_tail(&hwreq->queue, &hwep->qh.queue);
  711. return retval;
  712. }
  713. /**
  714. * isr_get_status_response: get_status request response
  715. * @ci: ci struct
  716. * @setup: setup request packet
  717. *
  718. * This function returns an error code
  719. */
  720. static int isr_get_status_response(struct ci_hdrc *ci,
  721. struct usb_ctrlrequest *setup)
  722. __releases(hwep->lock)
  723. __acquires(hwep->lock)
  724. {
  725. struct ci_hw_ep *hwep = ci->ep0in;
  726. struct usb_request *req = NULL;
  727. gfp_t gfp_flags = GFP_ATOMIC;
  728. int dir, num, retval;
  729. if (hwep == NULL || setup == NULL)
  730. return -EINVAL;
  731. spin_unlock(hwep->lock);
  732. req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
  733. spin_lock(hwep->lock);
  734. if (req == NULL)
  735. return -ENOMEM;
  736. req->complete = isr_get_status_complete;
  737. req->length = 2;
  738. req->buf = kzalloc(req->length, gfp_flags);
  739. if (req->buf == NULL) {
  740. retval = -ENOMEM;
  741. goto err_free_req;
  742. }
  743. if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  744. *(u16 *)req->buf = (ci->remote_wakeup << 1) |
  745. ci->gadget.is_selfpowered;
  746. } else if ((setup->bRequestType & USB_RECIP_MASK) \
  747. == USB_RECIP_ENDPOINT) {
  748. dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
  749. TX : RX;
  750. num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
  751. *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
  752. }
  753. /* else do nothing; reserved for future use */
  754. retval = _ep_queue(&hwep->ep, req, gfp_flags);
  755. if (retval)
  756. goto err_free_buf;
  757. return 0;
  758. err_free_buf:
  759. kfree(req->buf);
  760. err_free_req:
  761. spin_unlock(hwep->lock);
  762. usb_ep_free_request(&hwep->ep, req);
  763. spin_lock(hwep->lock);
  764. return retval;
  765. }
  766. /**
  767. * isr_setup_status_complete: setup_status request complete function
  768. * @ep: endpoint
  769. * @req: request handled
  770. *
  771. * Caller must release lock. Put the port in test mode if test mode
  772. * feature is selected.
  773. */
  774. static void
  775. isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
  776. {
  777. struct ci_hdrc *ci = req->context;
  778. unsigned long flags;
  779. if (ci->setaddr) {
  780. hw_usb_set_address(ci, ci->address);
  781. ci->setaddr = false;
  782. if (ci->address)
  783. usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
  784. }
  785. spin_lock_irqsave(&ci->lock, flags);
  786. if (ci->test_mode)
  787. hw_port_test_set(ci, ci->test_mode);
  788. spin_unlock_irqrestore(&ci->lock, flags);
  789. }
  790. /**
  791. * isr_setup_status_phase: queues the status phase of a setup transation
  792. * @ci: ci struct
  793. *
  794. * This function returns an error code
  795. */
  796. static int isr_setup_status_phase(struct ci_hdrc *ci)
  797. {
  798. int retval;
  799. struct ci_hw_ep *hwep;
  800. hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
  801. ci->status->context = ci;
  802. ci->status->complete = isr_setup_status_complete;
  803. retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
  804. return retval;
  805. }
  806. /**
  807. * isr_tr_complete_low: transaction complete low level handler
  808. * @hwep: endpoint
  809. *
  810. * This function returns an error code
  811. * Caller must hold lock
  812. */
  813. static int isr_tr_complete_low(struct ci_hw_ep *hwep)
  814. __releases(hwep->lock)
  815. __acquires(hwep->lock)
  816. {
  817. struct ci_hw_req *hwreq, *hwreqtemp;
  818. struct ci_hw_ep *hweptemp = hwep;
  819. int retval = 0;
  820. list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
  821. queue) {
  822. retval = _hardware_dequeue(hwep, hwreq);
  823. if (retval < 0)
  824. break;
  825. list_del_init(&hwreq->queue);
  826. if (hwreq->req.complete != NULL) {
  827. spin_unlock(hwep->lock);
  828. if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
  829. hwreq->req.length)
  830. hweptemp = hwep->ci->ep0in;
  831. usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
  832. spin_lock(hwep->lock);
  833. }
  834. }
  835. if (retval == -EBUSY)
  836. retval = 0;
  837. return retval;
  838. }
  839. static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
  840. {
  841. dev_warn(&ci->gadget.dev,
  842. "connect the device to an alternate port if you want HNP\n");
  843. return isr_setup_status_phase(ci);
  844. }
  845. /**
  846. * isr_setup_packet_handler: setup packet handler
  847. * @ci: UDC descriptor
  848. *
  849. * This function handles setup packet
  850. */
  851. static void isr_setup_packet_handler(struct ci_hdrc *ci)
  852. __releases(ci->lock)
  853. __acquires(ci->lock)
  854. {
  855. struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
  856. struct usb_ctrlrequest req;
  857. int type, num, dir, err = -EINVAL;
  858. u8 tmode = 0;
  859. /*
  860. * Flush data and handshake transactions of previous
  861. * setup packet.
  862. */
  863. _ep_nuke(ci->ep0out);
  864. _ep_nuke(ci->ep0in);
  865. /* read_setup_packet */
  866. do {
  867. hw_test_and_set_setup_guard(ci);
  868. memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
  869. } while (!hw_test_and_clear_setup_guard(ci));
  870. type = req.bRequestType;
  871. ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
  872. switch (req.bRequest) {
  873. case USB_REQ_CLEAR_FEATURE:
  874. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  875. le16_to_cpu(req.wValue) ==
  876. USB_ENDPOINT_HALT) {
  877. if (req.wLength != 0)
  878. break;
  879. num = le16_to_cpu(req.wIndex);
  880. dir = num & USB_ENDPOINT_DIR_MASK;
  881. num &= USB_ENDPOINT_NUMBER_MASK;
  882. if (dir) /* TX */
  883. num += ci->hw_ep_max / 2;
  884. if (!ci->ci_hw_ep[num].wedge) {
  885. spin_unlock(&ci->lock);
  886. err = usb_ep_clear_halt(
  887. &ci->ci_hw_ep[num].ep);
  888. spin_lock(&ci->lock);
  889. if (err)
  890. break;
  891. }
  892. err = isr_setup_status_phase(ci);
  893. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
  894. le16_to_cpu(req.wValue) ==
  895. USB_DEVICE_REMOTE_WAKEUP) {
  896. if (req.wLength != 0)
  897. break;
  898. ci->remote_wakeup = 0;
  899. err = isr_setup_status_phase(ci);
  900. } else {
  901. goto delegate;
  902. }
  903. break;
  904. case USB_REQ_GET_STATUS:
  905. if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
  906. le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
  907. type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
  908. type != (USB_DIR_IN|USB_RECIP_INTERFACE))
  909. goto delegate;
  910. if (le16_to_cpu(req.wLength) != 2 ||
  911. le16_to_cpu(req.wValue) != 0)
  912. break;
  913. err = isr_get_status_response(ci, &req);
  914. break;
  915. case USB_REQ_SET_ADDRESS:
  916. if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
  917. goto delegate;
  918. if (le16_to_cpu(req.wLength) != 0 ||
  919. le16_to_cpu(req.wIndex) != 0)
  920. break;
  921. ci->address = (u8)le16_to_cpu(req.wValue);
  922. ci->setaddr = true;
  923. err = isr_setup_status_phase(ci);
  924. break;
  925. case USB_REQ_SET_FEATURE:
  926. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  927. le16_to_cpu(req.wValue) ==
  928. USB_ENDPOINT_HALT) {
  929. if (req.wLength != 0)
  930. break;
  931. num = le16_to_cpu(req.wIndex);
  932. dir = num & USB_ENDPOINT_DIR_MASK;
  933. num &= USB_ENDPOINT_NUMBER_MASK;
  934. if (dir) /* TX */
  935. num += ci->hw_ep_max / 2;
  936. spin_unlock(&ci->lock);
  937. err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
  938. spin_lock(&ci->lock);
  939. if (!err)
  940. isr_setup_status_phase(ci);
  941. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
  942. if (req.wLength != 0)
  943. break;
  944. switch (le16_to_cpu(req.wValue)) {
  945. case USB_DEVICE_REMOTE_WAKEUP:
  946. ci->remote_wakeup = 1;
  947. err = isr_setup_status_phase(ci);
  948. break;
  949. case USB_DEVICE_TEST_MODE:
  950. tmode = le16_to_cpu(req.wIndex) >> 8;
  951. switch (tmode) {
  952. case TEST_J:
  953. case TEST_K:
  954. case TEST_SE0_NAK:
  955. case TEST_PACKET:
  956. case TEST_FORCE_EN:
  957. ci->test_mode = tmode;
  958. err = isr_setup_status_phase(
  959. ci);
  960. break;
  961. default:
  962. break;
  963. }
  964. break;
  965. case USB_DEVICE_B_HNP_ENABLE:
  966. if (ci_otg_is_fsm_mode(ci)) {
  967. ci->gadget.b_hnp_enable = 1;
  968. err = isr_setup_status_phase(
  969. ci);
  970. }
  971. break;
  972. case USB_DEVICE_A_ALT_HNP_SUPPORT:
  973. if (ci_otg_is_fsm_mode(ci))
  974. err = otg_a_alt_hnp_support(ci);
  975. break;
  976. case USB_DEVICE_A_HNP_SUPPORT:
  977. if (ci_otg_is_fsm_mode(ci)) {
  978. ci->gadget.a_hnp_support = 1;
  979. err = isr_setup_status_phase(
  980. ci);
  981. }
  982. break;
  983. default:
  984. goto delegate;
  985. }
  986. } else {
  987. goto delegate;
  988. }
  989. break;
  990. default:
  991. delegate:
  992. if (req.wLength == 0) /* no data phase */
  993. ci->ep0_dir = TX;
  994. spin_unlock(&ci->lock);
  995. err = ci->driver->setup(&ci->gadget, &req);
  996. spin_lock(&ci->lock);
  997. break;
  998. }
  999. if (err < 0) {
  1000. spin_unlock(&ci->lock);
  1001. if (_ep_set_halt(&hwep->ep, 1, false))
  1002. dev_err(ci->dev, "error: _ep_set_halt\n");
  1003. spin_lock(&ci->lock);
  1004. }
  1005. }
  1006. /**
  1007. * isr_tr_complete_handler: transaction complete interrupt handler
  1008. * @ci: UDC descriptor
  1009. *
  1010. * This function handles traffic events
  1011. */
  1012. static void isr_tr_complete_handler(struct ci_hdrc *ci)
  1013. __releases(ci->lock)
  1014. __acquires(ci->lock)
  1015. {
  1016. unsigned i;
  1017. int err;
  1018. for (i = 0; i < ci->hw_ep_max; i++) {
  1019. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1020. if (hwep->ep.desc == NULL)
  1021. continue; /* not configured */
  1022. if (hw_test_and_clear_complete(ci, i)) {
  1023. err = isr_tr_complete_low(hwep);
  1024. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  1025. if (err > 0) /* needs status phase */
  1026. err = isr_setup_status_phase(ci);
  1027. if (err < 0) {
  1028. spin_unlock(&ci->lock);
  1029. if (_ep_set_halt(&hwep->ep, 1, false))
  1030. dev_err(ci->dev,
  1031. "error: _ep_set_halt\n");
  1032. spin_lock(&ci->lock);
  1033. }
  1034. }
  1035. }
  1036. /* Only handle setup packet below */
  1037. if (i == 0 &&
  1038. hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
  1039. isr_setup_packet_handler(ci);
  1040. }
  1041. }
  1042. /******************************************************************************
  1043. * ENDPT block
  1044. *****************************************************************************/
  1045. /**
  1046. * ep_enable: configure endpoint, making it usable
  1047. *
  1048. * Check usb_ep_enable() at "usb_gadget.h" for details
  1049. */
  1050. static int ep_enable(struct usb_ep *ep,
  1051. const struct usb_endpoint_descriptor *desc)
  1052. {
  1053. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1054. int retval = 0;
  1055. unsigned long flags;
  1056. u32 cap = 0;
  1057. if (ep == NULL || desc == NULL)
  1058. return -EINVAL;
  1059. spin_lock_irqsave(hwep->lock, flags);
  1060. /* only internal SW should enable ctrl endpts */
  1061. if (!list_empty(&hwep->qh.queue)) {
  1062. dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
  1063. spin_unlock_irqrestore(hwep->lock, flags);
  1064. return -EBUSY;
  1065. }
  1066. hwep->ep.desc = desc;
  1067. hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
  1068. hwep->num = usb_endpoint_num(desc);
  1069. hwep->type = usb_endpoint_type(desc);
  1070. hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff;
  1071. hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc));
  1072. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1073. cap |= QH_IOS;
  1074. cap |= QH_ZLT;
  1075. cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
  1076. /*
  1077. * For ISO-TX, we set mult at QH as the largest value, and use
  1078. * MultO at TD as real mult value.
  1079. */
  1080. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
  1081. cap |= 3 << __ffs(QH_MULT);
  1082. hwep->qh.ptr->cap = cpu_to_le32(cap);
  1083. hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
  1084. if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  1085. dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
  1086. retval = -EINVAL;
  1087. }
  1088. /*
  1089. * Enable endpoints in the HW other than ep0 as ep0
  1090. * is always enabled
  1091. */
  1092. if (hwep->num)
  1093. retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
  1094. hwep->type);
  1095. spin_unlock_irqrestore(hwep->lock, flags);
  1096. return retval;
  1097. }
  1098. /**
  1099. * ep_disable: endpoint is no longer usable
  1100. *
  1101. * Check usb_ep_disable() at "usb_gadget.h" for details
  1102. */
  1103. static int ep_disable(struct usb_ep *ep)
  1104. {
  1105. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1106. int direction, retval = 0;
  1107. unsigned long flags;
  1108. if (ep == NULL)
  1109. return -EINVAL;
  1110. else if (hwep->ep.desc == NULL)
  1111. return -EBUSY;
  1112. spin_lock_irqsave(hwep->lock, flags);
  1113. /* only internal SW should disable ctrl endpts */
  1114. direction = hwep->dir;
  1115. do {
  1116. retval |= _ep_nuke(hwep);
  1117. retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
  1118. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1119. hwep->dir = (hwep->dir == TX) ? RX : TX;
  1120. } while (hwep->dir != direction);
  1121. hwep->ep.desc = NULL;
  1122. spin_unlock_irqrestore(hwep->lock, flags);
  1123. return retval;
  1124. }
  1125. /**
  1126. * ep_alloc_request: allocate a request object to use with this endpoint
  1127. *
  1128. * Check usb_ep_alloc_request() at "usb_gadget.h" for details
  1129. */
  1130. static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
  1131. {
  1132. struct ci_hw_req *hwreq = NULL;
  1133. if (ep == NULL)
  1134. return NULL;
  1135. hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
  1136. if (hwreq != NULL) {
  1137. INIT_LIST_HEAD(&hwreq->queue);
  1138. INIT_LIST_HEAD(&hwreq->tds);
  1139. }
  1140. return (hwreq == NULL) ? NULL : &hwreq->req;
  1141. }
  1142. /**
  1143. * ep_free_request: frees a request object
  1144. *
  1145. * Check usb_ep_free_request() at "usb_gadget.h" for details
  1146. */
  1147. static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
  1148. {
  1149. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1150. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1151. struct td_node *node, *tmpnode;
  1152. unsigned long flags;
  1153. if (ep == NULL || req == NULL) {
  1154. return;
  1155. } else if (!list_empty(&hwreq->queue)) {
  1156. dev_err(hwep->ci->dev, "freeing queued request\n");
  1157. return;
  1158. }
  1159. spin_lock_irqsave(hwep->lock, flags);
  1160. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1161. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1162. list_del_init(&node->td);
  1163. node->ptr = NULL;
  1164. kfree(node);
  1165. }
  1166. kfree(hwreq);
  1167. spin_unlock_irqrestore(hwep->lock, flags);
  1168. }
  1169. /**
  1170. * ep_queue: queues (submits) an I/O request to an endpoint
  1171. *
  1172. * Check usb_ep_queue()* at usb_gadget.h" for details
  1173. */
  1174. static int ep_queue(struct usb_ep *ep, struct usb_request *req,
  1175. gfp_t __maybe_unused gfp_flags)
  1176. {
  1177. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1178. int retval = 0;
  1179. unsigned long flags;
  1180. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  1181. return -EINVAL;
  1182. spin_lock_irqsave(hwep->lock, flags);
  1183. retval = _ep_queue(ep, req, gfp_flags);
  1184. spin_unlock_irqrestore(hwep->lock, flags);
  1185. return retval;
  1186. }
  1187. /**
  1188. * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
  1189. *
  1190. * Check usb_ep_dequeue() at "usb_gadget.h" for details
  1191. */
  1192. static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
  1193. {
  1194. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1195. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1196. unsigned long flags;
  1197. struct td_node *node, *tmpnode;
  1198. if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
  1199. hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
  1200. list_empty(&hwep->qh.queue))
  1201. return -EINVAL;
  1202. spin_lock_irqsave(hwep->lock, flags);
  1203. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1204. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1205. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1206. list_del(&node->td);
  1207. kfree(node);
  1208. }
  1209. /* pop request */
  1210. list_del_init(&hwreq->queue);
  1211. usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
  1212. req->status = -ECONNRESET;
  1213. if (hwreq->req.complete != NULL) {
  1214. spin_unlock(hwep->lock);
  1215. usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
  1216. spin_lock(hwep->lock);
  1217. }
  1218. spin_unlock_irqrestore(hwep->lock, flags);
  1219. return 0;
  1220. }
  1221. /**
  1222. * ep_set_halt: sets the endpoint halt feature
  1223. *
  1224. * Check usb_ep_set_halt() at "usb_gadget.h" for details
  1225. */
  1226. static int ep_set_halt(struct usb_ep *ep, int value)
  1227. {
  1228. return _ep_set_halt(ep, value, true);
  1229. }
  1230. /**
  1231. * ep_set_wedge: sets the halt feature and ignores clear requests
  1232. *
  1233. * Check usb_ep_set_wedge() at "usb_gadget.h" for details
  1234. */
  1235. static int ep_set_wedge(struct usb_ep *ep)
  1236. {
  1237. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1238. unsigned long flags;
  1239. if (ep == NULL || hwep->ep.desc == NULL)
  1240. return -EINVAL;
  1241. spin_lock_irqsave(hwep->lock, flags);
  1242. hwep->wedge = 1;
  1243. spin_unlock_irqrestore(hwep->lock, flags);
  1244. return usb_ep_set_halt(ep);
  1245. }
  1246. /**
  1247. * ep_fifo_flush: flushes contents of a fifo
  1248. *
  1249. * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
  1250. */
  1251. static void ep_fifo_flush(struct usb_ep *ep)
  1252. {
  1253. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1254. unsigned long flags;
  1255. if (ep == NULL) {
  1256. dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
  1257. return;
  1258. }
  1259. spin_lock_irqsave(hwep->lock, flags);
  1260. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1261. spin_unlock_irqrestore(hwep->lock, flags);
  1262. }
  1263. /**
  1264. * Endpoint-specific part of the API to the USB controller hardware
  1265. * Check "usb_gadget.h" for details
  1266. */
  1267. static const struct usb_ep_ops usb_ep_ops = {
  1268. .enable = ep_enable,
  1269. .disable = ep_disable,
  1270. .alloc_request = ep_alloc_request,
  1271. .free_request = ep_free_request,
  1272. .queue = ep_queue,
  1273. .dequeue = ep_dequeue,
  1274. .set_halt = ep_set_halt,
  1275. .set_wedge = ep_set_wedge,
  1276. .fifo_flush = ep_fifo_flush,
  1277. };
  1278. /******************************************************************************
  1279. * GADGET block
  1280. *****************************************************************************/
  1281. static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
  1282. {
  1283. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1284. unsigned long flags;
  1285. int gadget_ready = 0;
  1286. spin_lock_irqsave(&ci->lock, flags);
  1287. ci->vbus_active = is_active;
  1288. if (ci->driver)
  1289. gadget_ready = 1;
  1290. spin_unlock_irqrestore(&ci->lock, flags);
  1291. if (gadget_ready) {
  1292. if (is_active) {
  1293. pm_runtime_get_sync(&_gadget->dev);
  1294. hw_device_reset(ci);
  1295. hw_device_state(ci, ci->ep0out->qh.dma);
  1296. usb_gadget_set_state(_gadget, USB_STATE_POWERED);
  1297. usb_udc_vbus_handler(_gadget, true);
  1298. } else {
  1299. usb_udc_vbus_handler(_gadget, false);
  1300. if (ci->driver)
  1301. ci->driver->disconnect(&ci->gadget);
  1302. hw_device_state(ci, 0);
  1303. if (ci->platdata->notify_event)
  1304. ci->platdata->notify_event(ci,
  1305. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1306. _gadget_stop_activity(&ci->gadget);
  1307. pm_runtime_put_sync(&_gadget->dev);
  1308. usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
  1309. }
  1310. }
  1311. return 0;
  1312. }
  1313. static int ci_udc_wakeup(struct usb_gadget *_gadget)
  1314. {
  1315. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1316. unsigned long flags;
  1317. int ret = 0;
  1318. spin_lock_irqsave(&ci->lock, flags);
  1319. if (!ci->remote_wakeup) {
  1320. ret = -EOPNOTSUPP;
  1321. goto out;
  1322. }
  1323. if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
  1324. ret = -EINVAL;
  1325. goto out;
  1326. }
  1327. hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
  1328. out:
  1329. spin_unlock_irqrestore(&ci->lock, flags);
  1330. return ret;
  1331. }
  1332. static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
  1333. {
  1334. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1335. if (ci->usb_phy)
  1336. return usb_phy_set_power(ci->usb_phy, ma);
  1337. return -ENOTSUPP;
  1338. }
  1339. static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
  1340. {
  1341. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1342. struct ci_hw_ep *hwep = ci->ep0in;
  1343. unsigned long flags;
  1344. spin_lock_irqsave(hwep->lock, flags);
  1345. _gadget->is_selfpowered = (is_on != 0);
  1346. spin_unlock_irqrestore(hwep->lock, flags);
  1347. return 0;
  1348. }
  1349. /* Change Data+ pullup status
  1350. * this func is used by usb_gadget_connect/disconnet
  1351. */
  1352. static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
  1353. {
  1354. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1355. /* Data+ pullup controlled by OTG state machine in OTG fsm mode */
  1356. if (ci_otg_is_fsm_mode(ci))
  1357. return 0;
  1358. pm_runtime_get_sync(&ci->gadget.dev);
  1359. if (is_on)
  1360. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  1361. else
  1362. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  1363. pm_runtime_put_sync(&ci->gadget.dev);
  1364. return 0;
  1365. }
  1366. static int ci_udc_start(struct usb_gadget *gadget,
  1367. struct usb_gadget_driver *driver);
  1368. static int ci_udc_stop(struct usb_gadget *gadget);
  1369. /**
  1370. * Device operations part of the API to the USB controller hardware,
  1371. * which don't involve endpoints (or i/o)
  1372. * Check "usb_gadget.h" for details
  1373. */
  1374. static const struct usb_gadget_ops usb_gadget_ops = {
  1375. .vbus_session = ci_udc_vbus_session,
  1376. .wakeup = ci_udc_wakeup,
  1377. .set_selfpowered = ci_udc_selfpowered,
  1378. .pullup = ci_udc_pullup,
  1379. .vbus_draw = ci_udc_vbus_draw,
  1380. .udc_start = ci_udc_start,
  1381. .udc_stop = ci_udc_stop,
  1382. };
  1383. static int init_eps(struct ci_hdrc *ci)
  1384. {
  1385. int retval = 0, i, j;
  1386. for (i = 0; i < ci->hw_ep_max/2; i++)
  1387. for (j = RX; j <= TX; j++) {
  1388. int k = i + j * ci->hw_ep_max/2;
  1389. struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
  1390. scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
  1391. (j == TX) ? "in" : "out");
  1392. hwep->ci = ci;
  1393. hwep->lock = &ci->lock;
  1394. hwep->td_pool = ci->td_pool;
  1395. hwep->ep.name = hwep->name;
  1396. hwep->ep.ops = &usb_ep_ops;
  1397. if (i == 0) {
  1398. hwep->ep.caps.type_control = true;
  1399. } else {
  1400. hwep->ep.caps.type_iso = true;
  1401. hwep->ep.caps.type_bulk = true;
  1402. hwep->ep.caps.type_int = true;
  1403. }
  1404. if (j == TX)
  1405. hwep->ep.caps.dir_in = true;
  1406. else
  1407. hwep->ep.caps.dir_out = true;
  1408. /*
  1409. * for ep0: maxP defined in desc, for other
  1410. * eps, maxP is set by epautoconfig() called
  1411. * by gadget layer
  1412. */
  1413. usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
  1414. INIT_LIST_HEAD(&hwep->qh.queue);
  1415. hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
  1416. &hwep->qh.dma);
  1417. if (hwep->qh.ptr == NULL)
  1418. retval = -ENOMEM;
  1419. else
  1420. memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr));
  1421. /*
  1422. * set up shorthands for ep0 out and in endpoints,
  1423. * don't add to gadget's ep_list
  1424. */
  1425. if (i == 0) {
  1426. if (j == RX)
  1427. ci->ep0out = hwep;
  1428. else
  1429. ci->ep0in = hwep;
  1430. usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
  1431. continue;
  1432. }
  1433. list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
  1434. }
  1435. return retval;
  1436. }
  1437. static void destroy_eps(struct ci_hdrc *ci)
  1438. {
  1439. int i;
  1440. for (i = 0; i < ci->hw_ep_max; i++) {
  1441. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1442. if (hwep->pending_td)
  1443. free_pending_td(hwep);
  1444. dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
  1445. }
  1446. }
  1447. /**
  1448. * ci_udc_start: register a gadget driver
  1449. * @gadget: our gadget
  1450. * @driver: the driver being registered
  1451. *
  1452. * Interrupts are enabled here.
  1453. */
  1454. static int ci_udc_start(struct usb_gadget *gadget,
  1455. struct usb_gadget_driver *driver)
  1456. {
  1457. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1458. unsigned long flags;
  1459. int retval = -ENOMEM;
  1460. if (driver->disconnect == NULL)
  1461. return -EINVAL;
  1462. ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
  1463. retval = usb_ep_enable(&ci->ep0out->ep);
  1464. if (retval)
  1465. return retval;
  1466. ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
  1467. retval = usb_ep_enable(&ci->ep0in->ep);
  1468. if (retval)
  1469. return retval;
  1470. ci->driver = driver;
  1471. /* Start otg fsm for B-device */
  1472. if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
  1473. ci_hdrc_otg_fsm_start(ci);
  1474. return retval;
  1475. }
  1476. pm_runtime_get_sync(&ci->gadget.dev);
  1477. if (ci->vbus_active) {
  1478. spin_lock_irqsave(&ci->lock, flags);
  1479. hw_device_reset(ci);
  1480. } else {
  1481. usb_udc_vbus_handler(&ci->gadget, false);
  1482. pm_runtime_put_sync(&ci->gadget.dev);
  1483. return retval;
  1484. }
  1485. retval = hw_device_state(ci, ci->ep0out->qh.dma);
  1486. spin_unlock_irqrestore(&ci->lock, flags);
  1487. if (retval)
  1488. pm_runtime_put_sync(&ci->gadget.dev);
  1489. return retval;
  1490. }
  1491. static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
  1492. {
  1493. if (!ci_otg_is_fsm_mode(ci))
  1494. return;
  1495. mutex_lock(&ci->fsm.lock);
  1496. if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
  1497. ci->fsm.a_bidl_adis_tmout = 1;
  1498. ci_hdrc_otg_fsm_start(ci);
  1499. } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
  1500. ci->fsm.protocol = PROTO_UNDEF;
  1501. ci->fsm.otg->state = OTG_STATE_UNDEFINED;
  1502. }
  1503. mutex_unlock(&ci->fsm.lock);
  1504. }
  1505. /**
  1506. * ci_udc_stop: unregister a gadget driver
  1507. */
  1508. static int ci_udc_stop(struct usb_gadget *gadget)
  1509. {
  1510. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1511. unsigned long flags;
  1512. spin_lock_irqsave(&ci->lock, flags);
  1513. if (ci->vbus_active) {
  1514. hw_device_state(ci, 0);
  1515. if (ci->platdata->notify_event)
  1516. ci->platdata->notify_event(ci,
  1517. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1518. spin_unlock_irqrestore(&ci->lock, flags);
  1519. _gadget_stop_activity(&ci->gadget);
  1520. spin_lock_irqsave(&ci->lock, flags);
  1521. pm_runtime_put(&ci->gadget.dev);
  1522. }
  1523. ci->driver = NULL;
  1524. spin_unlock_irqrestore(&ci->lock, flags);
  1525. ci_udc_stop_for_otg_fsm(ci);
  1526. return 0;
  1527. }
  1528. /******************************************************************************
  1529. * BUS block
  1530. *****************************************************************************/
  1531. /**
  1532. * udc_irq: ci interrupt handler
  1533. *
  1534. * This function returns IRQ_HANDLED if the IRQ has been handled
  1535. * It locks access to registers
  1536. */
  1537. static irqreturn_t udc_irq(struct ci_hdrc *ci)
  1538. {
  1539. irqreturn_t retval;
  1540. u32 intr;
  1541. if (ci == NULL)
  1542. return IRQ_HANDLED;
  1543. spin_lock(&ci->lock);
  1544. if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
  1545. if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
  1546. USBMODE_CM_DC) {
  1547. spin_unlock(&ci->lock);
  1548. return IRQ_NONE;
  1549. }
  1550. }
  1551. intr = hw_test_and_clear_intr_active(ci);
  1552. if (intr) {
  1553. /* order defines priority - do NOT change it */
  1554. if (USBi_URI & intr)
  1555. isr_reset_handler(ci);
  1556. if (USBi_PCI & intr) {
  1557. ci->gadget.speed = hw_port_is_high_speed(ci) ?
  1558. USB_SPEED_HIGH : USB_SPEED_FULL;
  1559. if (ci->suspended && ci->driver->resume) {
  1560. spin_unlock(&ci->lock);
  1561. ci->driver->resume(&ci->gadget);
  1562. spin_lock(&ci->lock);
  1563. ci->suspended = 0;
  1564. }
  1565. }
  1566. if (USBi_UI & intr)
  1567. isr_tr_complete_handler(ci);
  1568. if (USBi_SLI & intr) {
  1569. if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
  1570. ci->driver->suspend) {
  1571. ci->suspended = 1;
  1572. spin_unlock(&ci->lock);
  1573. ci->driver->suspend(&ci->gadget);
  1574. usb_gadget_set_state(&ci->gadget,
  1575. USB_STATE_SUSPENDED);
  1576. spin_lock(&ci->lock);
  1577. }
  1578. }
  1579. retval = IRQ_HANDLED;
  1580. } else {
  1581. retval = IRQ_NONE;
  1582. }
  1583. spin_unlock(&ci->lock);
  1584. return retval;
  1585. }
  1586. /**
  1587. * udc_start: initialize gadget role
  1588. * @ci: chipidea controller
  1589. */
  1590. static int udc_start(struct ci_hdrc *ci)
  1591. {
  1592. struct device *dev = ci->dev;
  1593. struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
  1594. int retval = 0;
  1595. spin_lock_init(&ci->lock);
  1596. ci->gadget.ops = &usb_gadget_ops;
  1597. ci->gadget.speed = USB_SPEED_UNKNOWN;
  1598. ci->gadget.max_speed = USB_SPEED_HIGH;
  1599. ci->gadget.name = ci->platdata->name;
  1600. ci->gadget.otg_caps = otg_caps;
  1601. if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
  1602. otg_caps->adp_support))
  1603. ci->gadget.is_otg = 1;
  1604. INIT_LIST_HEAD(&ci->gadget.ep_list);
  1605. /* alloc resources */
  1606. ci->qh_pool = dma_pool_create("ci_hw_qh", dev,
  1607. sizeof(struct ci_hw_qh),
  1608. 64, CI_HDRC_PAGE_SIZE);
  1609. if (ci->qh_pool == NULL)
  1610. return -ENOMEM;
  1611. ci->td_pool = dma_pool_create("ci_hw_td", dev,
  1612. sizeof(struct ci_hw_td),
  1613. 64, CI_HDRC_PAGE_SIZE);
  1614. if (ci->td_pool == NULL) {
  1615. retval = -ENOMEM;
  1616. goto free_qh_pool;
  1617. }
  1618. retval = init_eps(ci);
  1619. if (retval)
  1620. goto free_pools;
  1621. ci->gadget.ep0 = &ci->ep0in->ep;
  1622. retval = usb_add_gadget_udc(dev, &ci->gadget);
  1623. if (retval)
  1624. goto destroy_eps;
  1625. pm_runtime_no_callbacks(&ci->gadget.dev);
  1626. pm_runtime_enable(&ci->gadget.dev);
  1627. return retval;
  1628. destroy_eps:
  1629. destroy_eps(ci);
  1630. free_pools:
  1631. dma_pool_destroy(ci->td_pool);
  1632. free_qh_pool:
  1633. dma_pool_destroy(ci->qh_pool);
  1634. return retval;
  1635. }
  1636. /**
  1637. * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
  1638. *
  1639. * No interrupts active, the IRQ has been released
  1640. */
  1641. void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
  1642. {
  1643. if (!ci->roles[CI_ROLE_GADGET])
  1644. return;
  1645. usb_del_gadget_udc(&ci->gadget);
  1646. destroy_eps(ci);
  1647. dma_pool_destroy(ci->td_pool);
  1648. dma_pool_destroy(ci->qh_pool);
  1649. }
  1650. static int udc_id_switch_for_device(struct ci_hdrc *ci)
  1651. {
  1652. if (ci->is_otg)
  1653. /* Clear and enable BSV irq */
  1654. hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
  1655. OTGSC_BSVIS | OTGSC_BSVIE);
  1656. return 0;
  1657. }
  1658. static void udc_id_switch_for_host(struct ci_hdrc *ci)
  1659. {
  1660. /*
  1661. * host doesn't care B_SESSION_VALID event
  1662. * so clear and disbale BSV irq
  1663. */
  1664. if (ci->is_otg)
  1665. hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
  1666. }
  1667. /**
  1668. * ci_hdrc_gadget_init - initialize device related bits
  1669. * ci: the controller
  1670. *
  1671. * This function initializes the gadget, if the device is "device capable".
  1672. */
  1673. int ci_hdrc_gadget_init(struct ci_hdrc *ci)
  1674. {
  1675. struct ci_role_driver *rdrv;
  1676. if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
  1677. return -ENXIO;
  1678. rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
  1679. if (!rdrv)
  1680. return -ENOMEM;
  1681. rdrv->start = udc_id_switch_for_device;
  1682. rdrv->stop = udc_id_switch_for_host;
  1683. rdrv->irq = udc_irq;
  1684. rdrv->name = "gadget";
  1685. ci->roles[CI_ROLE_GADGET] = rdrv;
  1686. return udc_start(ci);
  1687. }