spi-pxa2xx.h 4.0 KB

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  1. /*
  2. * Copyright (C) 2005 Stephen Street / StreetFire Sound Labs
  3. * Copyright (C) 2013, Intel Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #ifndef SPI_PXA2XX_H
  10. #define SPI_PXA2XX_H
  11. #include <linux/atomic.h>
  12. #include <linux/dmaengine.h>
  13. #include <linux/errno.h>
  14. #include <linux/io.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/pxa2xx_ssp.h>
  18. #include <linux/scatterlist.h>
  19. #include <linux/sizes.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/spi/pxa2xx_spi.h>
  22. struct driver_data {
  23. /* Driver model hookup */
  24. struct platform_device *pdev;
  25. /* SSP Info */
  26. struct ssp_device *ssp;
  27. /* SPI framework hookup */
  28. enum pxa_ssp_type ssp_type;
  29. struct spi_master *master;
  30. /* PXA hookup */
  31. struct pxa2xx_spi_master *master_info;
  32. /* SSP register addresses */
  33. void __iomem *ioaddr;
  34. u32 ssdr_physical;
  35. /* SSP masks*/
  36. u32 dma_cr1;
  37. u32 int_cr1;
  38. u32 clear_sr;
  39. u32 mask_sr;
  40. /* Message Transfer pump */
  41. struct tasklet_struct pump_transfers;
  42. /* DMA engine support */
  43. struct dma_chan *rx_chan;
  44. struct dma_chan *tx_chan;
  45. struct sg_table rx_sgt;
  46. struct sg_table tx_sgt;
  47. int rx_nents;
  48. int tx_nents;
  49. void *dummy;
  50. atomic_t dma_running;
  51. /* Current message transfer state info */
  52. struct spi_message *cur_msg;
  53. struct spi_transfer *cur_transfer;
  54. struct chip_data *cur_chip;
  55. size_t len;
  56. void *tx;
  57. void *tx_end;
  58. void *rx;
  59. void *rx_end;
  60. int dma_mapped;
  61. size_t rx_map_len;
  62. size_t tx_map_len;
  63. u8 n_bytes;
  64. int (*write)(struct driver_data *drv_data);
  65. int (*read)(struct driver_data *drv_data);
  66. irqreturn_t (*transfer_handler)(struct driver_data *drv_data);
  67. void (*cs_control)(u32 command);
  68. void __iomem *lpss_base;
  69. };
  70. struct chip_data {
  71. u32 cr1;
  72. u32 dds_rate;
  73. u32 timeout;
  74. u8 n_bytes;
  75. u32 dma_burst_size;
  76. u32 threshold;
  77. u32 dma_threshold;
  78. u16 lpss_rx_threshold;
  79. u16 lpss_tx_threshold;
  80. u8 enable_dma;
  81. union {
  82. int gpio_cs;
  83. unsigned int frm;
  84. };
  85. int gpio_cs_inverted;
  86. int (*write)(struct driver_data *drv_data);
  87. int (*read)(struct driver_data *drv_data);
  88. void (*cs_control)(u32 command);
  89. };
  90. static inline u32 pxa2xx_spi_read(const struct driver_data *drv_data,
  91. unsigned reg)
  92. {
  93. return __raw_readl(drv_data->ioaddr + reg);
  94. }
  95. static inline void pxa2xx_spi_write(const struct driver_data *drv_data,
  96. unsigned reg, u32 val)
  97. {
  98. __raw_writel(val, drv_data->ioaddr + reg);
  99. }
  100. #define START_STATE ((void *)0)
  101. #define RUNNING_STATE ((void *)1)
  102. #define DONE_STATE ((void *)2)
  103. #define ERROR_STATE ((void *)-1)
  104. #define IS_DMA_ALIGNED(x) IS_ALIGNED((unsigned long)(x), DMA_ALIGNMENT)
  105. #define DMA_ALIGNMENT 8
  106. static inline int pxa25x_ssp_comp(struct driver_data *drv_data)
  107. {
  108. switch (drv_data->ssp_type) {
  109. case PXA25x_SSP:
  110. case CE4100_SSP:
  111. case QUARK_X1000_SSP:
  112. return 1;
  113. default:
  114. return 0;
  115. }
  116. }
  117. static inline void write_SSSR_CS(struct driver_data *drv_data, u32 val)
  118. {
  119. if (drv_data->ssp_type == CE4100_SSP ||
  120. drv_data->ssp_type == QUARK_X1000_SSP)
  121. val |= pxa2xx_spi_read(drv_data, SSSR) & SSSR_ALT_FRM_MASK;
  122. pxa2xx_spi_write(drv_data, SSSR, val);
  123. }
  124. extern int pxa2xx_spi_flush(struct driver_data *drv_data);
  125. extern void *pxa2xx_spi_next_transfer(struct driver_data *drv_data);
  126. #define MAX_DMA_LEN SZ_64K
  127. #define DEFAULT_DMA_CR1 (SSCR1_TSRE | SSCR1_RSRE | SSCR1_TRAIL)
  128. extern bool pxa2xx_spi_dma_is_possible(size_t len);
  129. extern int pxa2xx_spi_map_dma_buffers(struct driver_data *drv_data);
  130. extern irqreturn_t pxa2xx_spi_dma_transfer(struct driver_data *drv_data);
  131. extern int pxa2xx_spi_dma_prepare(struct driver_data *drv_data, u32 dma_burst);
  132. extern void pxa2xx_spi_dma_start(struct driver_data *drv_data);
  133. extern int pxa2xx_spi_dma_setup(struct driver_data *drv_data);
  134. extern void pxa2xx_spi_dma_release(struct driver_data *drv_data);
  135. extern int pxa2xx_spi_set_dma_burst_and_threshold(struct chip_data *chip,
  136. struct spi_device *spi,
  137. u8 bits_per_word,
  138. u32 *burst_code,
  139. u32 *threshold);
  140. #endif /* SPI_PXA2XX_H */